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@phoddie phoddie commented Dec 18, 2025

This DTS uses absolute GPIO numbers for pins on gpio1 rather than relative pin numbers. This causes an abort on boot when led1, neopixel_pwr, or mipi_dbi is enabled.

Here's the crash log:

I (67) soc_init: ESP Simple boot
I (67) soc_init: compile time Dec 17 2025 09:37:12
W (67) soc_init: Unicore bootloader
I (68) soc_init: chip revision: v0.2
I (70) flash_init: Boot SPI Speed : 80MHz
I (73) flash_init: SPI Mode       : DIO
I (77) flash_init: SPI Flash Size : 4MB
I (81) boot: DRAM    : lma=00000020h vma=3fc91af0h size=03790h ( 14224)
I (87) boot: IRAM    : lma=000037b8h vma=40374000h size=0dae0h ( 56032)
I (93) boot: IROM    : lma=00020000h vma=42000000h size=3b380h (242560)
I (99) boot: DROM    : lma=00060000h vma=3c040000h size=1a9ech (109036)
I (105) boot: libc heap size 248 kB.
I (108) spi_flash: detected chip: generic
I (112) spi_flash: flash io: dio
ASSERTION FAIL [(cfg->port_pin_mask & (gpio_port_pins_t)(1UL << (pin))) != 0U] @ WEST_TOPDIR/zephyr/include/zephyr/drivers/gpio.h:1041
    Unsupported pin
** FATAL EXCEPTION
** CPU 0 EXCCAUSE 63 (zephyr exception)
**  PC 0x40377587 VADDR (nil)
**  PS 0x60920
**    (INTLEVEL:0 EXCM: 0 UM:1 RING:0 WOE:1 OWB:9 CALLINC:2)
**  A0 0x820258c8  SP 0x3fc9a5f0  A2 0x4  A3 0x3fc9a600
**  A4 0x3fc9a5e0  A5 0x4  A6 0xfffbffff  A7 0x600c2180
**  A8 0x8037b958  A9 0x3fc9a4f0 A10 0x11 A11 0x11
** A12 0x3c051dfc A13 0x4 A14 0x25 A15 0x3fc9a600
** LBEG 0x400570e8 LEND 0x400570f3 LCOUNT (nil)
** SAR 0x4
**  THREADPTR 0x3fc9a5d0

This DTS uses absolute GPIO numbers for pins on gpio1 rather than relative pin numbers. This causes an abort on boot when led1, neopixel_pwr, or mipi_dbi is enabled.

Signed-off-by: Peter Hoddie <[email protected]>
@sonarqubecloud
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2 participants