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ESP32: Only access PSRAM inside a critical section - #230

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bugadani:psram-aware-atomics
Aug 11, 2026
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ESP32: Only access PSRAM inside a critical section#230
taiki-e merged 7 commits into
taiki-e:mainfrom
bugadani:psram-aware-atomics

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@bugadani bugadani commented Apr 20, 2026

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Second attempt of trying to progress on esp-rs/esp-hal#2027, an alternative approach to #225. This PR has (almost) entirely been generated by Cursor/Claude, with minimal touchups from me after reading through what changes were made. I tried my bst to make sure it's not entirely nonsense, though I don't necessarily understand everything (especially NotRefUnwindSafe).

The key differences from the previous PR are:

  • It doesn't try to reuse the critical section implementation. This limits changes to existing code considerably, especially it allows not changing the cfg maze. Not making a mess also allows us to make changes like supporting unsafe-assume-single-core easier in the future.
  • The PR replaces core_atomic with a similar-ish implementation for the affected chips.
  • The PR doesn't attempt to rewrite everything in assembly, but instead uses core::sync::atomic. I'm walking back on assembly for the time being to allow progressing on this issue in any (limited) way.
  • If critical-section is not enabled, access to PSRAM will panic. Trying to force-require the feature is a weird state to me, although I can flip it into a compile error easily enough if preferred.

Copilot AI review requested due to automatic review settings April 20, 2026 12:44
@bugadani bugadani changed the title Only access PSRAM inside a critical section ESP32: Only access PSRAM inside a critical section Apr 20, 2026

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bugadani force-pushed the psram-aware-atomics branch 10 times, most recently from a4c1561 to bb1c956 Compare April 27, 2026 06:29
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bugadani force-pushed the psram-aware-atomics branch from bb1c956 to 60f12cd Compare May 9, 2026 16:30
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taiki-e force-pushed the main branch 4 times, most recently from 22b5886 to c0afe95 Compare May 31, 2026 11:35
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bugadani commented Jun 2, 2026

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@taiki-e is the CI failure somehow my fault? What do I need to do to clear it?

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bugadani force-pushed the psram-aware-atomics branch from 60f12cd to 993a65c Compare June 10, 2026 13:28

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Thanks! This looks good overall.

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Comment thread src/imp/xtensa.rs Outdated
Comment thread src/imp/xtensa.rs Outdated
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bugadani force-pushed the psram-aware-atomics branch 2 times, most recently from aa32cee to f47ed8c Compare June 22, 2026 07:09
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@taiki-e thank you for your review. I've removed the Atomic64 implementation, cleaned up the rest of your observations, and also added one more commit (also LLM-assisted) that fixes a potential issue with losing stores when they race with an RMW operation.

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taiki-e force-pushed the main branch 6 times, most recently from be0e1a4 to 6c92015 Compare June 25, 2026 18:08
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taiki-e force-pushed the main branch 2 times, most recently from 9a94c72 to be6bcf2 Compare July 3, 2026 19:29
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taiki-e force-pushed the main branch 7 times, most recently from 70a1c4e to 6c8f764 Compare July 18, 2026 13:02
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bugadani force-pushed the psram-aware-atomics branch from 0df045b to eaaa579 Compare July 28, 2026 12:58
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taiki-e force-pushed the main branch 3 times, most recently from 955f5c8 to 55f8b99 Compare August 7, 2026 16:45

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Sorry, I hadn't merged it due to a CI issue (see review comment), but I forgot to comment on that.

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bugadani and others added 2 commits August 11, 2026 11:55
Co-authored-by: Taiki Endo <te316e89@gmail.com>
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bugadani force-pushed the psram-aware-atomics branch from 5a38561 to 90b4a61 Compare August 11, 2026 11:37

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Thanks!

@taiki-e
taiki-e merged commit 59ab3b1 into taiki-e:main Aug 11, 2026
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bugadani deleted the psram-aware-atomics branch August 11, 2026 13:46
Comment thread src/imp/xtensa.rs
// disabled, the PSRAM path panics.
//
// `$ptr` is the backing raw pointer; the CS-path closure is an
// `unsafe` block that uses `read_volatile`/`write_volatile` on it.

@taiki-e taiki-e Aug 13, 2026

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@bugadani Is there a specific reason why pre::volatile_{read,write} is used here? (interrupt/mod.rs uses normal ptr::{read,write}.) If this is a type of memory where normal ptr::{read,write} are not permitted, I guess using static Mutex/Spinlock would result in UB; therefore, I don't believe it should be usable as a normal memory region.

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No particular reason besides muscle memory, I can come back and relax this.

I'm not entirely sure about your Mutex/Spinlock comment, we aren't placing a Mutex into PSRAM, that would either be incorrect (our Mutex implementation contains an AtomicU32), or circular.

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3 participants