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48 changes: 41 additions & 7 deletions crates/sel4-generate-target-specs/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,11 +28,28 @@ struct Config {
#[derive(Debug, Copy, Clone, PartialEq, Eq)]
enum Arch {
AArch64,
Riscv64,
Riscv32,
Riscv64(RiscVArch),
Riscv32(RiscVArch),
X86_64,
}

#[derive(Debug, Copy, Clone, PartialEq, Eq)]
enum RiscVArch {
IMAC,
IMAFC,
GC,
}

impl RiscVArch {
fn arch_suffix_for_target_name(&self) -> String {
match self {
Self::IMAFC => "imafc".to_owned(),
Self::IMAC => "imac".to_owned(),
Self::GC => "gc".to_owned(),
}
}
}

impl Config {
fn target_spec(&self) -> Target {
let mut target = match &self.arch {
Expand All @@ -56,8 +73,14 @@ impl Config {
)]);
target
}
Arch::Riscv64 => builtin("riscv64imac-unknown-none-elf"),
Arch::Riscv32 => builtin("riscv32imac-unknown-none-elf"),
Arch::Riscv64(riscv_arch) => builtin(&format!(
"riscv64{}-unknown-none-elf",
riscv_arch.arch_suffix_for_target_name()
)),
Arch::Riscv32(riscv_arch) => builtin(&format!(
"riscv32{}-unknown-none-elf",
riscv_arch.arch_suffix_for_target_name()
)),
Arch::X86_64 => {
let mut target = builtin("x86_64-unknown-none");
let options = &mut target.options;
Expand Down Expand Up @@ -132,8 +155,12 @@ impl Arch {
fn name(&self) -> String {
match self {
Self::AArch64 => "aarch64".to_owned(),
Self::Riscv64 => "riscv64imac".to_owned(),
Self::Riscv32 => "riscv32imac".to_owned(),
Self::Riscv64(riscv_arch) => {
format!("riscv64{}", riscv_arch.arch_suffix_for_target_name())
}
Self::Riscv32(riscv_arch) => {
format!("riscv32{}", riscv_arch.arch_suffix_for_target_name())
}
Self::X86_64 => "x86_64".to_owned(),
}
}
Expand All @@ -146,7 +173,14 @@ impl Arch {
}

fn all() -> Vec<Self> {
vec![Self::AArch64, Self::Riscv64, Self::Riscv32, Self::X86_64]
let mut v = vec![];
v.push(Self::AArch64);
v.push(Self::Riscv64(RiscVArch::IMAC));
v.push(Self::Riscv64(RiscVArch::GC));
v.push(Self::Riscv32(RiscVArch::IMAC));
// v.push(Self::Riscv32(RiscVArch::IMAFC)); # TODO add after bumping Rust toolchain
v.push(Self::X86_64);
v
}
}

Expand Down
68 changes: 58 additions & 10 deletions hacking/nix/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,10 @@ let

in

# let
# defaultNixpkgsPath = ../../../x/nixpkgs;
# in

{ nixpkgsPath ? defaultNixpkgsPath
, nixpkgsFn ? import nixpkgsPath
, lib ? import (nixpkgsPath + "/lib")
Expand Down Expand Up @@ -63,20 +67,64 @@ let
config = "armv7l-unknown-linux-gnueabihf";
};
};
riscv64 = {
none = mkLeafWithGuard {
config = "riscv64-none-elf";
riscv64 = rec {
default = imac;
imac = {
none = mkLeafWithGuard (rec {
config = "riscv64-none-elf";
gcc = this.gccParams;
this = {
rustTargetRiscVArch = "imac";
gccParams = { arch = "rv64imac_zicsr_zifencei"; abi = "lp64"; };
};
});
};
linux = mkLeafWithGuard {
config = "riscv64-unknown-linux-gnu";
# TODO
# Currently incompatible with the "cc" crate. Must do something like
# https://github.com/rust-lang/cc-rs/pull/460 (except for bare metal) or
# https://github.com/rust-lang/cc-rs/pull/796.
# TODO
# Will require KernelRiscvExtD in sel4test.
gc = {
none = mkLeafWithGuard (rec {
config = "riscv64-none-elf";
gcc = {}; # equivalent to default, omitting means we can use cached binary
this = {
rustTargetRiscVArch = "gc";
gccParams = { arch = "rv64gc"; abi = "lp64d"; };
};
});
linux = mkLeafWithGuard {
config = "riscv64-unknown-linux-gnu";
};
};
};
riscv32 = {
none = mkLeafWithGuard {
config = "riscv32-none-elf";
riscv32 = rec {
default = imac;
imac = {
none = mkLeafWithGuard (rec {
config = "riscv32-none-elf";
gcc = this.gccParams;
this = {
rustTargetRiscVArch = "imac";
gccParams = { arch = "rv32imac_zicsr_zifencei"; abi = "ilp32"; };
};
});
};
linux = mkLeafWithGuard {
config = "riscv32-unknown-linux-gnu";
# TODO (see note for riscv64.gc)
# TODO will require KernelRiscvExtF in sel4test
imafc = {
none = mkLeafWithGuard (rec {
config = "riscv32-none-elf";
gcc = {}; # equivalent to default, omitting means we can use cached binary
this = {
rustTargetRiscVArch = "imafc";
gccParams = { arch = "rv64imafc_zicsr_zifencei"; abi = "ilp32f"; };
};
});
linux = mkLeafWithGuard {
config = "riscv32-unknown-linux-gnu";
};
};
};
x86_64 = {
Expand Down
5 changes: 0 additions & 5 deletions hacking/nix/overlay/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -35,9 +35,4 @@ assert !(super ? scopeName);
(callPackage ./python-overrides.nix {})
];

# HACK: something wrong with multilib for riscv beyond gcc11 in nixpkgs
gccMultiStdenvGeneric = overrideCC stdenv (buildPackages.wrapCC (gcc11Stdenv.cc.cc.override {
enableMultilib = true;
}));

}
30 changes: 12 additions & 18 deletions hacking/nix/scope/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -60,20 +60,14 @@ superCallPackage ../rust-utils {} self //

sources = callPackage ./sources.nix {};

seL4Arch =
lib.head
(map
(x: lib.elemAt x 1)
(lib.filter
(x: lib.elemAt x 0)
(with hostPlatform; [
[ isAarch64 "aarch64" ]
[ isAarch32 "aarch32" ]
[ isRiscV64 "riscv64" ]
[ isRiscV32 "riscv32" ]
[ isx86_64 "x86_64" ]
[ isx86_32 "ia32" ]
])));
seL4Arch = with hostPlatform;
if isAarch64 then "aarch64" else
if isAarch32 then "aarch32" else
if isRiscV64 then "riscv64" else
if isRiscV32 then "riscv32" else
if isx86_64 then "x86_64" else
if isx86_32 then "ia32" else
throw "unkown platform";

### rust

Expand All @@ -82,8 +76,8 @@ superCallPackage ../rust-utils {} self //
rustTargetArchName = {
aarch64 = "aarch64";
aarch32 = "armv7a";
riscv64 = "riscv64imac";
riscv32 = "riscv32imac";
riscv64 = "riscv64${hostPlatform.this.rustTargetRiscVArch}";
riscv32 = "riscv32${hostPlatform.this.rustTargetRiscVArch}";
x86_64 = "x86_64";
ia32 = "i686";
}."${seL4Arch}";
Expand All @@ -98,8 +92,8 @@ superCallPackage ../rust-utils {} self //
bareMetalRustTargetInfo = mkBuiltinRustTargetInfo {
aarch64 = "aarch64-unknown-none";
aarch32 = "armv7a-none-eabi"; # armv7a-none-eabihf?
riscv64 = "riscv64imac-unknown-none-elf"; # gc?
riscv32 = "riscv32imac-unknown-none-elf"; # gc?
riscv64 = "riscv64${hostPlatform.this.rustTargetRiscVArch}-unknown-none-elf";
riscv32 = "riscv32${hostPlatform.this.rustTargetRiscVArch}-unknown-none-elf";
x86_64 = "x86_64-unknown-none";
ia32 = "i686-unknown-linux-gnu"; # HACK
}."${seL4Arch}";
Expand Down
1 change: 1 addition & 0 deletions hacking/nix/scope/sel4/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ stdenv.mkDerivation {
dtc libxml2
python3Packages.sel4-deps
];

depsBuildBuild = [
# NOTE: cause drv.__spliced.buildBuild to be used to work around splicing issue
qemuForSeL4
Expand Down
12 changes: 5 additions & 7 deletions hacking/nix/scope/sel4test/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,6 @@
, python3Packages
, qemuForSeL4
, git
, gccMultiStdenvGeneric
, sources
, crateUtils
, defaultRustToolchain
Expand All @@ -39,10 +38,6 @@

with lib;

let
thisStdenv = if hostPlatform.isRiscV then gccMultiStdenvGeneric else stdenv;
in

let
rustToolchain = defaultRustToolchain;
rustTargetInfo = bareMetalRustTargetInfo;
Expand All @@ -51,14 +46,15 @@ let
let
bool = v: if v then "TRUE" else "FALSE";
in [
"-DCROSS_COMPILER_PREFIX=${thisStdenv.cc.targetPrefix}"
"-DCROSS_COMPILER_PREFIX=${stdenv.cc.targetPrefix}"
"-DKernelSel4Arch=${seL4Arch}"
"-DMCS=${bool mcs}"
"-DSMP=${bool smp}"
"-DSIMULATION=TRUE"
"-DLibSel4UseRust=${bool rust}"
"-DLibSel4TestPrinterRegex='${filter}'"
] ++ lib.optionals rust [
"-DHACK_RUST_TARGET=${rustTargetInfo.name}"
"-DHACK_CARGO_MANIFEST_PATH=${workspace}/Cargo.toml"
"-DHACK_CARGO_CONFIG=${cargoConfig}"
"-DHACK_CARGO_NO_BUILD_SYSROOT=TRUE"
Expand All @@ -67,6 +63,8 @@ let
"-DPLATFORM=pc99"
] ++ lib.optionals hostPlatform.isRiscV [
"-DPLATFORM=spike"
"-DOPENSBI_PLAT_ISA=${hostPlatform.this.gccParams.arch}"
"-DOPENSBI_PLAT_ABI=${hostPlatform.this.gccParams.abi}"
] ++ lib.optionals hostPlatform.isAarch [
"-DPLATFORM=qemu-arm-virt"
"-DARM_HYP=${bool virtualization}"
Expand Down Expand Up @@ -129,7 +127,7 @@ let
compilerBuiltinsWeakIntrinsics = true;
};

tests = thisStdenv.mkDerivation {
tests = stdenv.mkDerivation {
name = "sel4test";

src = fetchRepoProject {
Expand Down
5 changes: 3 additions & 2 deletions hacking/nix/scope/sources.nix
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,8 @@ let
srcRoot = ../../..;

# TODO
localRoot = srcRoot + "/tmp/src";
# localRoot = srcRoot + "/tmp/src";
localRoot = srcRoot + "/../x";

mkKeepRef = rev: "refs/tags/keep/${builtins.substring 0 32 rev}";

Expand All @@ -60,7 +61,7 @@ in rec {

rust-sel4test = fetchGit {
url = "https://github.com/coliasgroup/seL4.git";
rev = "b31b459876e01008336394bfa90388d8729ff5f5"; # rust-sel4test
rev = "85e36760bd158cf12a170450685eb7b0b05d2076"; # rust-sel4test
local = localRoot + "/seL4";
};
};
Expand Down
2 changes: 1 addition & 1 deletion hacking/nix/scope/world/default.nix
Original file line number Diff line number Diff line change
Expand Up @@ -130,7 +130,7 @@ self: with self;
inherit (worldConfig) kernelLoaderConfig;
};

mkSeL4KernelWithPayload = { appELF } : callPackage ./mk-sel4-kernel-loader-with-payload.nix {} {
mkSeL4KernelLoaderWithPayload = { appELF } : callPackage ./mk-sel4-kernel-loader-with-payload.nix {} {
app = appELF;
};

Expand Down
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