drivers: qcom: add GENI I2C driver and enable i2c config - #58
Open
VeshalaAnilKumar wants to merge 1 commit into
Open
VeshalaAnilKumar wants to merge 1 commit into
VeshalaAnilKumar wants to merge 1 commit into
Conversation
Sumit Garg (b49020)
force-pushed
the
qcom-next
branch
2 times, most recently
from
September 7, 2026 07:43
1a117cb to
dab3efd
Compare
Member
|
Please rebase this PR to tip of qcom-next. |
Add a Qualcomm I2C geni driver implementing i2c_ctrl_ops for a GENI Serial Engine in FIFO transfer mode, driven by polling rather than interrupts. Enabled CFG_QCOM_GENI_I2C in lemans platform, and add the corresponding qup config settings in qup_i2c_config[] table. Signed-off-by: Anil Veshala Veshala <anil.veshala@oss.qualcomm.com>
VeshalaAnilKumar
force-pushed
the
buses-qup-i2c
branch
from
September 8, 2026 06:04
1009b32 to
d4661f6
Compare
Member
|
VeshalaAnilKumar how has this PR been tested on Lemans EVK? Is there any I2C bus assigned to TZ/OP-TEE? |
There was a problem hiding this comment.
🟡 Changes recommended
The new driver currently references missing clock APIs (build/link blocker) and contains a few confirmed correctness/configuration issues that should be resolved before it can be safely merged.
Once you've addressed the issues Copilot identified, you can request another Copilot review.
Pull request overview
This PR introduces a Qualcomm QUPv3 GENI-based I2C controller driver for OP-TEE, intended to let the lemans platform use I2C via the generic i2c_ctrl_ops interface without devicetree integration.
Changes:
- Add a new GENI I2C driver (
qcom_geni_i2c.c) with polling-based FIFO transfers and optional firmware loading/pinmux setup. - Add lemans platform configuration for QUP GENI I2C instances (register mappings, clocks, pin groups, and an embedded firmware blob).
- Wire the driver into the build and enable
CFG_DRIVERS_I2C/CFG_QCOM_GENI_I2Cfor lemans.
File summaries
| File | Description |
|---|---|
| core/include/drivers/qcom_geni_i2c.h | New public interface and platform config structures for the GENI I2C driver |
| core/drivers/i2c/sub.mk | Adds Qualcomm I2C subdirectory to the build |
| core/drivers/i2c/qcom/sub.mk | Adds the GENI I2C driver + platform subdir when enabled |
| core/drivers/i2c/qcom/qcom_geni_i2c.c | New polling-mode GENI I2C controller implementation |
| core/drivers/i2c/qcom/platform/sub.mk | Selects per-flavor platform config subdir |
| core/drivers/i2c/qcom/platform/lemans/sub.mk | Adds lemans GENI I2C config source |
| core/drivers/i2c/qcom/platform/lemans/qcom_geni_i2c_config.c | Lemans register mappings, pinmux groups, clocks, and embedded I2C firmware blob |
| core/arch/arm/plat-qcom/hoya/lemans/target.mk | Enables I2C + GENI I2C driver for lemans |
Review details
- Files reviewed: 8/8 changed files
- Comments generated: 6
- Review effort level: Lite
💡 Add a code-review agent skill or configure MCP servers for context-aware, tailored reviews. Learn more in the docs.
Comment on lines
+1044
to
+1048
| res = qcom_clk_get_by_name(qi->se_clock_name, &qi->se_clk); | ||
| if (res) { | ||
| EMSG("QUP I2C: cannot get clock %s: %#" PRIx32, | ||
| qi->se_clock_name, res); | ||
| return res; |
| #include <mm/core_mmu.h> | ||
| #include <util.h> | ||
|
|
||
| #define CFG_QUP2_SE2_I2C_EN |
Comment on lines
+305
to
+306
| EMSG("QUP I2C %u: no SCL timing table for a %lu Hz SE clock (need 19.2 or 32 MHz)", | ||
| qi->id, qi->clk_hz); |
|
|
||
| #define CFG_QUP2_SE2_I2C_EN | ||
|
|
||
| const uint8_t i2c_qup_fw[] = |
Comment on lines
+279
to
+283
| * (geni_i2c_clk_map_idx() keys off clk_get_rate(gi2c->se.clk), not off a | ||
| * config value). Trusting the platform-cfg number instead would silently | ||
| * mis-time SCL by whatever ratio the real rate differs by, so read it | ||
| * back from the clock and only fall back to the cfg value if the clock | ||
| * framework cannot report one. |
Comment on lines
+1051
to
+1057
| res = qcom_clk_enable_dfs(qi->se_clk); | ||
| if (res) { | ||
| EMSG("QUP SPI: enable DFS on %s failed: %#" PRIx32, | ||
| qi->se_clock_name, res); | ||
| qi->se_clk = NULL; | ||
| return res; | ||
| } |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Add a Qualcomm I2C geni driver implementing i2c_ctrl_ops for a GENI Serial Engine in FIFO transfer mode, driven by polling rather than interrupts. Enabled CFG_QCOM_GENI_I2C in lemans platform, and add the corresponding qup config settings in qup_i2c_config[] table.