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drivers: hv: mshv_vtl: Support for Secure AVIC #111

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drivers: hv: mshv_vtl: Support for Secure AVIC #111

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4 changes: 4 additions & 0 deletions arch/x86/include/asm/apic.h
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Original file line number Diff line number Diff line change
Expand Up @@ -241,6 +241,10 @@ static inline u64 native_x2apic_icr_read(void)
return val;
}

#if defined(CONFIG_AMD_SECURE_AVIC)
extern void x2apic_savic_init_backing_page(void *backing_page);
#endif

extern int x2apic_mode;
extern int x2apic_phys;
extern void __init x2apic_set_max_apicid(u32 apicid);
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7 changes: 6 additions & 1 deletion arch/x86/include/asm/sev.h
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Expand Up @@ -109,7 +109,12 @@ struct rmp_state {
u32 asid;
} __packed;

#define RMPADJUST_VMSA_PAGE_BIT BIT(16)
/* Target VMPL takes the first byte */
#define RMPADJUST_ENABLE_READ BIT(8)
#define RMPADJUST_ENABLE_WRITE BIT(9)
#define RMPADJUST_USER_EXECUTE BIT(10)
#define RMPADJUST_KERNEL_EXECUTE BIT(11)
#define RMPADJUST_VMSA_PAGE_BIT BIT(16)

/* SNP Guest message request */
struct snp_req_data {
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12 changes: 10 additions & 2 deletions arch/x86/include/asm/svm.h
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Expand Up @@ -5,7 +5,8 @@
#include <uapi/asm/svm.h>
#include <uapi/asm/kvm.h>

#include <asm/hyperv-tlfs.h>
/* TODO: including into mshv_vtl_main.c breaks the build. */
// #include <asm/hyperv-tlfs.h>

/*
* 32-bit intercept words in the VMCB Control Area, starting
Expand Down Expand Up @@ -164,7 +165,8 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
* for use by hypervisor/software.
*/
union {
struct hv_vmcb_enlightenments hv_enlightenments;
/* TODO: including into mshv_vtl_main.c breaks the build. */
// struct hv_vmcb_enlightenments hv_enlightenments;
u8 reserved_sw[32];
};
};
Expand All @@ -183,6 +185,9 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
#define V_GIF_SHIFT 9
#define V_GIF_MASK (1 << V_GIF_SHIFT)

#define V_INT_SHADOW 10
#define V_INT_SHADOW_MASK (1 << V_INT_SHADOW)

#define V_NMI_PENDING_SHIFT 11
#define V_NMI_PENDING_MASK (1 << V_NMI_PENDING_SHIFT)

Expand All @@ -195,6 +200,9 @@ struct __attribute__ ((__packed__)) vmcb_control_area {
#define V_IGN_TPR_SHIFT 20
#define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)

#define V_GUEST_BUSY_SHIFT 63
#define V_GUEST_BUSY_MASK (1ULL << V_GUEST_BUSY_SHIFT)

#define V_IRQ_INJECTION_BITS_MASK (V_IRQ_MASK | V_INTR_PRIO_MASK | V_IGN_TPR_MASK)

#define V_INTR_MASKING_SHIFT 24
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6 changes: 4 additions & 2 deletions arch/x86/include/uapi/asm/svm.h
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Expand Up @@ -94,8 +94,10 @@
#define SVM_EXIT_CR13_WRITE_TRAP 0x09d
#define SVM_EXIT_CR14_WRITE_TRAP 0x09e
#define SVM_EXIT_CR15_WRITE_TRAP 0x09f
#define SVM_EXIT_INVPCID 0x0a2
#define SVM_EXIT_NPF 0x400
#define SVM_EXIT_INVPCID 0x0a2
#define SVM_EXIT_BUSLOCK 0x0a5
#define SVM_EXIT_IDLE_HLT 0x0a6
#define SVM_EXIT_NPF 0x400
#define SVM_EXIT_AVIC_INCOMPLETE_IPI 0x401
#define SVM_EXIT_AVIC_UNACCELERATED_ACCESS 0x402
#define SVM_EXIT_VMGEXIT 0x403
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4 changes: 2 additions & 2 deletions arch/x86/kernel/apic/x2apic_savic.c
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Expand Up @@ -334,7 +334,7 @@ static void savic_eoi(void)
}
}

static void init_apic_page(struct apic_page *ap)
void x2apic_savic_init_backing_page(void *ap)
{
u32 apic_id;

Expand Down Expand Up @@ -365,7 +365,7 @@ static void savic_setup(void)
return;

backing_page = this_cpu_ptr(apic_page);
init_apic_page(backing_page);
x2apic_savic_init_backing_page(backing_page);
gpa = __pa(backing_page);

gfn = gpa >> PAGE_SHIFT;
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