fix signed loads lh and lb on both 32-bit and 64-bit RISC-V#344
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Thanks for noticing the issue, just a couple things
Co-authored-by: ALVAROPING1 <43814863+ALVAROPING1@users.noreply.github.com>
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Hello,
Thank you for your work, your simulator is very well done.
I noticed a small issue with the implementation of the
lhandlbinstructions in both RISC-V 32-bit and 64-bit modes. It appears that sign extension is not being applied when loading values. As a result, the loaded data may not correctly preserve the sign when expanded to the full register width.