I'm not sure this is the correct place to report this, but I've got an mango pi mq pro soc with an allwinner d1 cpu, which is supposed to be an C906 chip.
I recently ran into a problem, when I ran vmsgt.vx v8, v8, a3, which give an illegal instruction, while vmsgt.vx v16, v8, a3 didn't do so (the vector unit was enabled for both).
I haven't found anything in the spec suggesting vmsgt.vx shouldn't work when the source register is also the destination register, compilers generate this type of code and qemu interprets it just fine.
Can anybody reproduce this?
I've been browsing the source code for some time now, but with my limited understanding of hardware design I wasn't able to find where/if the problem occurs here.
I'm not sure this is the correct place to report this, but I've got an mango pi mq pro soc with an allwinner d1 cpu, which is supposed to be an C906 chip.
I recently ran into a problem, when I ran
vmsgt.vx v8, v8, a3, which give an illegal instruction, whilevmsgt.vx v16, v8, a3didn't do so (the vector unit was enabled for both).I haven't found anything in the spec suggesting
vmsgt.vxshouldn't work when the source register is also the destination register, compilers generate this type of code and qemu interprets it just fine.Can anybody reproduce this?
I've been browsing the source code for some time now, but with my limited understanding of hardware design I wasn't able to find where/if the problem occurs here.