[tarsur909]

GPU qualification found incorrect FA4 gradients from implicit CUDA stream launches, uninitialized reverse sparse-mask counts, Split-D artifacts built against a different TVM ABI, and BF16 rounding of saved output state at scale 1. Bind native launches to Torch's current stream, reconstruct reverse metadata from forward lists, pin and verify the complete artifact inventory, and retain FP32 native output and distributed merge state for backward. Model-facing outputs retain their input dtype; public active-output collectives retain their original traffic size.

Fix the stale hybrid backward keyword argument, bound distributed test groups with prompt error collection and guaranteed worker cleanup, and use Unix symlinks for nested virtualenv fixtures. Reuse unchanged FA3 and FA4 components independently while preserving original provenance. Fail qualification promptly, bound compiler concurrency, and prepare v0.1.6; v0.1.2 through v0.1.5 remain unpublished.

Validation:

• Local portable suite: 1,002 passed, 83 skipped.
• CPU regressions cover ABI rejection, independent component reuse, reverse sparse counts and indices, FP32 raw state, input-dtype model outputs, and worker cleanup.
• Existing scale-1 D=512 / 32K gradient regression fails with rounded state and passes with the native FP32 fix on H100; tolerances are unchanged.
• Prior two-H100 qualification passed 167 attention/kernel cases before exposing that numerical defect. All 124 FP32 artifacts were rebuilt and verified. Packaged prequalification passed 99 impacted wide-head/kernel checks and the distributed, checkpoint-resume, and performance gates.
• Ruff and documentation checks pass. CI passed on Python 3.10, 3.12, and 3.14, including package and checkpoint checks.
• Publication remains gated on complete immutable-tag, installed-wheel GPU qualification and clean binary-only installation.