Add RISC-V Vector (RVV) CPU capability - #48

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XYenChi wants to merge 21 commits into

RuyiAI-Stack:riscvfrom

Commits on Aug 30, 2026

Add RISC-V Blocklist (#1)

authored and
WuXintong123
committed
0479f8b
add riscv64 ci

yuzibo
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WuXintong123
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fb0bd0a
Test ci with PR (#8)

yuzibo
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WuXintong123
committed
98c8c8a
Fix no main brach issue

yuzibo
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WuXintong123
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26aab04
move the patch to dest

yuzibo
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WuXintong123
committed
72843ab
Fix block list format and remove test_cpu_select_algorithm (#4)

XYenChi
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WuXintong123
committed
7338bc0
move the patch to dest

yuzibo
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WuXintong123
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7444a79
[blacklist]: update it (#11)

yuzibo
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WuXintong123
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c8cb84b
Use commit sha on PR workflow (#12)

yuzibo
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WuXintong123
committed
abf25cc
Fix bytes_to_scalar for float/complex on RISC-V

XYenChi
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WuXintong123
committed
930f39f
Fix test_float_to_int_conversion_nonfinite for RISC-V

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WuXintong123
committed
782e92a
Skip test if no qengine

XYenChi
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WuXintong123
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12e0d70
Replace offical cpuinfo repo (#18)

XYenChi
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WuXintong123
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01db43b
[ci] split core and full ci (#20)

yuzibo
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WuXintong123
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ddad2c3
[ci] fix ci workflow and other issue (#21)

yuzibo
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WuXintong123
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54a71e9
[ci]: continue parsing Jenkins outputs after Jenkins job failure (#40)

yuzibo
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WuXintong123
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2653522
[CI] workaround to judge Jenkins job success (#41)

yuzibo
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WuXintong123
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1571898
[SyncBots] Integrate PyTorch at 1154a55
WuXintong123
committed
5b326fe
[SyncBots] Integrate PyTorch at 2760264
WuXintong123
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55d456e
[test]Scope linear cross entropy ULP tolerance to RISC-V (#42)
WuXintong123
committed
6e72cda

Commits on Aug 31, 2026

Add RISC-V Vector (RVV) CPU capability
XYenChi
committed
7a391b4