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dev(val): add ACS SMC secure timer support and TF-A integration - #544

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chetan-rathore merged 2 commits into
ARM-software:mainfrom
shanmugapriyal03:smc_services
Sep 21, 2026
Merged

chetan-rathore merged 2 commits into
ARM-software:mainfrom
shanmugapriyal03:smc_services

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  • Add VAL wrapper and ACS EL3 SMC services for secure timer operations
  • Add system counter frequency read and CNTHPS/CNTHVS PPI discovery
  • Add EL3 timer helpers and secure timer interrupt information
  • Add G017 secure physical timer PPI mapping test
  • Add T010 and T011 system counter minimum frequency tests
  • Add TF-A build support for ACS EL3 SMC services

SrikarJosyula and others added 2 commits September 18, 2026 10:27
 - Add VAL wrapper for ACS EL3 SMC service calls.
 - Define ACS SMC handler FID and service selectors.
 - Add EL3 timer helpers for CNTID, CNTPCT, CNTPS program, and CNTPS disable.
 - Extend timer info tables with secure timer interrupt fields.
 - Add G017 test for secure physical timer CNTPS PPI mapping.
 - Add T010 and T011 tests to check system counter GT minimum freq
 - Wire G017 into BSA/UEFI builds and rule metadata.
 - Skip G017 when EL1 CNTPCT skip-trap policy is enabled.

Signed-off-by: Srikar Josyula <srikar.josyula@arm.com>
Co-authored-by: Shanmuga Priya L <shanmuga.priyal@arm.com>
Co-authored-by: Riddhi Kabra <RiddhiKabra@arm.com>
Change-Id: Ia567561a2ea4e35c9f845200a4e6b74e72c7a30a
- Add ACS EL3 SMC handler implementation
- Introduce SMC services to read the system counter frequency and
- discover CNTHPS/CNTHVS timer PPIs
- Add build script to integrate ACS EL3 sources into TF-A and build BL31
- Support automatic RD-V3 BL31 packaging and stack repackaging after a
  successful build

Signed-off-by: Shanmuga Priya L <shanmuga.priyal@arm.com>
Change-Id: Ie8f5c53309cfb432df3b887ce6de89ca881299e1
@chetan-rathore
chetan-rathore merged commit b2457ff into ARM-software:main Sep 21, 2026
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3 participants