WIP

Author: serge-sans-paille

include/xsimd/arch/xsimd_rvv.hpp

@@ -1518,7 +1518,7 @@ namespace xsimd
                 // (A) Easy case: the number of slots fits in T.
                 const auto zero = detail::broadcast<as_unsigned_integer_t<T>, types::detail::rvv_width_m1>(T(0));
                 auto ones = detail::broadcast<as_unsigned_integer_t<T>, A::width>(1);
-                auto iota = detail::vindex<A, as_unsigned_integer_t<T>>();
+                auto iota = detail::rvvid(as_unsigned_integer_t<T> {});
                 auto upowers = detail::rvvsll(ones, iota);
                 auto r = __riscv_vredor(self.data.as_mask(), upowers, (typename decltype(zero)::register_type)zero, batch_bool<T, A>::size);
                 return detail::reduce_scalar<A, as_unsigned_integer_t<T>>(r);
@@ -1539,18 +1539,17 @@ namespace xsimd
                 // The low part is similar to the approach in (A).
                 const auto zero = detail::broadcast<as_unsigned_integer_t<T>, types::detail::rvv_width_m1>(T(0));
                 auto ones = detail::broadcast<as_unsigned_integer_t<T>, A::width>(1);
-                auto iota = detail::vindex<A, as_unsigned_integer_t<T>>();
-                auto upowers_low = detail::rvvsll(ones, iota);
+                auto iota = detail::rvvid(as_unsigned_integer_t<T> {});
+                auto upowers = detail::rvvsll(ones, iota);
                 auto low_mask = self & make_batch_bool_constant<T, LowerHalf, A>();
-                auto r_low = __riscv_vredor(low_mask.data.as_mask(), upowers_low, (typename decltype(zero)::register_type)zero, batch_bool<T, A>::size);
+                auto r_low = __riscv_vredor(low_mask.data.as_mask(), upowers, (typename decltype(zero)::register_type)zero, batch_bool<T, A>::size);
 
                 // The high part requires a sub before the shift.
-                auto iota_high = __riscv_vsub(iota, 8 * sizeof(T), batch_bool<T, A>::size);
-                auto upowers_high = detail::rvvsll(ones, iota_high);
+                upowers = details::rvvslideup(upowers, 8 * sizeof(T));
                 auto high_mask = self & make_batch_bool_constant<T, UpperHalf, A>();
-                auto r_high = __riscv_vredor(high_mask.data.as_mask(), upowers_high, (typename decltype(zero)::register_type)zero, batch_bool<T, A>::size);
+                auto r_high = __riscv_vredor(high_mask.data.as_mask(), upowers, (typename decltype(zero)::register_type)zero, batch_bool<T, A>::size);
 
-                // Agglomerate the two parts.
+                // Concatenate the two parts.
                 return (uint64_t)detail::reduce_scalar<A, as_unsigned_integer_t<T>>(r_low) | ((uint64_t)detail::reduce_scalar<A, as_unsigned_integer_t<T>>(r_high) << (8 * sizeof(T)));
             }
             else