`let` aliases: no `++` concatenation, no classical aliases, no alias-of-alias

[TheGupta2012]

Limitation

Aliasing and
Register concatenation and slicing
define let over qubit and classical registers, allow the ++ concatenation operator in the
aliased expression, and allow an alias to be built from another alias.

pyqasm supports only the simple and sliced qubit-register cases. The spec's own worked
example fails on its second line.

Example QASM failure

The spec's example, verbatim:

OPENQASM 3.0;
qubit[2] one;
qubit[10] two;
let concatenated = one ++ two;      // <-- fails here
let first = concatenated[0];
let last = concatenated[-1];
let qubit_selection = two[{0, 3, 5}];
let sliced = concatenated[0:6];
let every_second = concatenated[0:2:12];
let last_three = two[-4:-1];
let both = sliced ++ last_three;

ValidationError: Unsupported aliasing AliasStatement(... value=Concatenation(...))

Alias of an alias:

OPENQASM 3.0;
qubit[4] q;
let a = q;
let b = a[0];
// ValidationError: Qubit register a not found for aliasing

Classical register alias — the spec permits let over classical bits, and
For loops explicitly names "the target of a let
statement that creates an alias to classical bits" as an iterable:

OPENQASM 3.0;
bit[4] b;
let c = b;
// ValidationError: Qubit register b not found for aliasing

OPENQASM 3.0;
bit[2] a;
bit[2] b;
let c = a ++ b;
// ValidationError: Unsupported aliasing ...

Simple and sliced qubit aliases work today, including gates and delays applied to them, so the
alias machinery exists — it is the expression forms and the classical case that are missing.

Change Requested

1. Handle openqasm3.ast.Concatenation as an alias value, for both qubit and bit registers,
   producing an alias whose length is the sum of its parts.
2. Resolve an alias target that is itself an alias, by looking through to the underlying
   register. Nesting must work to arbitrary depth (sliced ++ last_three in the spec example
   concatenates two aliases).
3. Support let over classical bit[n] registers, not only qubit registers, and correct the
   error message, which currently says "Qubit register ... not found" even when the name refers
   to a declared classical register.
4. Support the discrete-set alias form two[{0, 3, 5}].

Negative indices inside alias expressions (concatenated[-1], two[-4:-1]) are covered by the
separate negative-indexing issue; the two should land together for the spec example to pass in
full.

Implementation Details

• Alias handling is Qasm3Visitor._visit_alias_statement in src/pyqasm/visitor.py; the two
  errors above are raised at visitor.py:2806 ("Unsupported aliasing") and
  visitor.py:2811 ("Qubit register ... not found for aliasing").
• The lookup at 2811 consults only the qubit register table. It needs to consult the classical
  scope as well, and the resulting alias must record which kind it is so downstream index
  resolution picks the right table.
• Aliases are currently stored as a name → concrete-qubit-list mapping. Concatenation fits that
  model directly: resolve each operand to its list and join them. Alias-of-alias then works
  for free, provided the lookup checks the alias table before the register table.
• Concatenation nodes may nest (a ++ b ++ c), so resolution should recurse rather than
  assume two operands.
• A classical alias must be usable everywhere a bit[n] is: as a for iterable, indexed,
  sliced, and assigned to. Coordinate with the bit[n] representation issue.
• Tests: tests/qasm3/test_alias.py — the spec example above as a single end-to-end case,
  plus qubit ++, bit ++, alias-of-alias, discrete-set alias, a gate applied through a
  concatenated alias, and a length-mismatch error case.