diff --git a/.qsys_edit/filters.xml b/.qsys_edit/filters.xml new file mode 100644 index 0000000..9927661 --- /dev/null +++ b/.qsys_edit/filters.xml @@ -0,0 +1,2 @@ + + diff --git a/.qsys_edit/preferences.xml b/.qsys_edit/preferences.xml new file mode 100644 index 0000000..c5b7680 --- /dev/null +++ b/.qsys_edit/preferences.xml @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/PWMGenerator.vhd b/PWMGenerator.vhd index 7347870..a50795b 100644 --- a/PWMGenerator.vhd +++ b/PWMGenerator.vhd @@ -22,19 +22,20 @@ ENTITY PWM_GEN IS END PWM_GEN; ARCHITECTURE a OF PWM_GEN IS - SIGNAL COUNT : STD_LOGIC_VECTOR(4 DOWNTO 0); - SIGNAL COMPARE : STD_LOGIC_VECTOR(4 DOWNTO 0); + SIGNAL COUNT : STD_LOGIC_VECTOR(6 DOWNTO 0); + SIGNAL COMPARE : STD_LOGIC_VECTOR(6 DOWNTO 0); BEGIN IO_Handler: PROCESS (RESETN, CS) + BEGIN -- Create a register to store the data sent from SCOMP IF (RESETN = '0') THEN - COMPARE <= "00000"; + COMPARE <= "0000000"; ELSIF rising_edge(CS) THEN -- When written to, latch IO_DATA into the compare register. - COMPARE <= IO_DATA(4 DOWNTO 0); + COMPARE <= IO_DATA(6 DOWNTO 0); END IF; END PROCESS; @@ -55,7 +56,7 @@ ARCHITECTURE a OF PWM_GEN IS END IF; -- todo: on overflow, set the output high - IF (COUNT = "11111") THEN + IF (COUNT = "1111111") THEN PWM_OUT <= '1'; END IF; @@ -64,5 +65,6 @@ ARCHITECTURE a OF PWM_GEN IS END IF; END PROCESS; + END a; \ No newline at end of file diff --git a/PositionControl.asm b/PositionControl.asm index 1ac47e5..f8fee15 100644 --- a/PositionControl.asm +++ b/PositionControl.asm @@ -3,37 +3,31 @@ ORG 0 Start: - LOAD VelControlOn - JPOS Velocity LOAD PosControlOn JPOS Position -Velocity: - ; IN Switches - LOAD VelControl - OUT PWM - - IN Quad - OUT Hex0 - - JUMP Velocity - Position: - IN Switches - ; LOAD PosControlSpeed - OUT PWM - + IN Quad CALL Abs OUT Hex0 SUB PosControl JZERO End + ; IN Switches + LOAD PosControlSpeed + OUT PWM + JUMP Position End: LOAD Zero OUT PWM + + ; IN Quad + ; CALL Abs + ; OUT Hex1 + JUMP End Abs: @@ -48,6 +42,7 @@ Abs_r: ; IO address constants Switches: EQU &H000 Hex0: EQU &H004 +Hex1: EQU &H005 PWM: EQU &H021 Quad: EQU &H0F1 @@ -57,6 +52,8 @@ NegOne: DW -1 VelControlOn: DW 0 PosControlOn: DW 1 +PosControlSpeed: DW &B10000 + VelControl: DW &B01111 -PosControlSpeed: DW &B11001 -PosControl: DW 540 +PosControl: DW 1080 +; DirControl: DW diff --git a/PositionControl.mif b/PositionControl.mif new file mode 100644 index 0000000..e6e8c0c --- /dev/null +++ b/PositionControl.mif @@ -0,0 +1,47 @@ +-- Altera Memory Initialization File (MIF) + +DEPTH = 2048; +WIDTH = 16; + +ADDRESS_RADIX = HEX; +DATA_RADIX = HEX; + +CONTENT + BEGIN + [000..7FF] : 0000; -- Default to NOP + + 000 : 081D; -- LOAD VelControlOn + 001 : 3804; -- JPOS Velocity + 002 : 081E; -- LOAD PosControlOn + 003 : 3809; -- JPOS Position + 004 : 0820; -- LOAD VelControl + 005 : 9821; -- OUT PWM + 006 : 90F1; -- IN Quad + 007 : 9804; -- OUT Hex0 + 008 : 2804; -- JUMP Velocity + 009 : 90F1; -- IN Quad + 00A : 8017; -- CALL Abs + 00B : 9804; -- OUT Hex0 + 00C : 2021; -- SUB PosControl + 00D : 4011; -- JZERO End + 00E : 081F; -- LOAD PosControlSpeed + 00F : 9821; -- OUT PWM + 010 : 2809; -- JUMP Position + 011 : 081B; -- LOAD Zero + 012 : 9821; -- OUT PWM + 013 : 90F1; -- IN Quad + 014 : 8017; -- CALL Abs + 015 : 9805; -- OUT Hex1 + 016 : 2811; -- JUMP End + 017 : 381A; -- JPOS Abs_r ; If already positive, return + 018 : 581C; -- XOR NegOne ; Flip all bits + 019 : 6801; -- ADDI 1 ; Add one + 01A : 8800; -- RETURN + 01B : 0000; -- Zero: DW 0 + 01C : FFFF; -- NegOne: DW -1 + 01D : 0000; -- VelControlOn: DW 0 + 01E : 0001; -- PosControlOn: DW 1 + 01F : 0010; -- PosControlSpeed: DW &B10000 + 020 : 000F; -- VelControl: DW &B01111 + 021 : 0438; -- PosControl: DW 1080 + END; diff --git a/SCOMP.qsf b/SCOMP.qsf index 4141f94..e44cc2c 100644 --- a/SCOMP.qsf +++ b/SCOMP.qsf @@ -218,4 +218,5 @@ set_location_assignment PIN_AB8 -to STBY set_location_assignment PIN_Y10 -to ENCODER_H1 set_location_assignment PIN_AB9 -to ENCODER_H2 set_global_assignment -name VHDL_FILE output_files/PositionControl.vhd +set_global_assignment -name VHDL_FILE VelocityControl.vhd set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/SCOMP.qws b/SCOMP.qws index efde55b..15d8e19 100644 Binary files a/SCOMP.qws and b/SCOMP.qws differ diff --git a/SCOMP_System.bdf b/SCOMP_System.bdf index 54b76ce..eba40fc 100644 --- a/SCOMP_System.bdf +++ b/SCOMP_System.bdf @@ -733,63 +733,6 @@ https://fpgasoftware.intel.com/eula. (rectangle (rect 16 16 224 112)) ) ) -(symbol - (rect 792 32 1000 176) - (text "clk_div" (rect 5 0 40 12)(font "Arial" )) - (text "inst5" (rect 8 128 31 140)(font "Arial" )) - (port - (pt 0 32) - (input) - (text "clock_10MHz" (rect 0 0 64 12)(font "Arial" )) - (text "clock_10MHz" (rect 21 27 85 39)(font "Arial" )) - (line (pt 0 32)(pt 16 32)) - ) - (port - (pt 208 32) - (output) - (text "clock_100kHz" (rect 0 0 68 12)(font "Arial" )) - (text "clock_100kHz" (rect 130 27 198 39)(font "Arial" )) - (line (pt 208 32)(pt 192 32)) - ) - (port - (pt 208 48) - (output) - (text "clock_10kHz" (rect 0 0 62 12)(font "Arial" )) - (text "clock_10kHz" (rect 135 43 197 55)(font "Arial" )) - (line (pt 208 48)(pt 192 48)) - ) - (port - (pt 208 64) - (output) - (text "clock_100Hz" (rect 0 0 62 12)(font "Arial" )) - (text "clock_100Hz" (rect 135 59 197 71)(font "Arial" )) - (line (pt 208 64)(pt 192 64)) - ) - (port - (pt 208 80) - (output) - (text "clock_32Hz" (rect 0 0 56 12)(font "Arial" )) - (text "clock_32Hz" (rect 140 75 196 87)(font "Arial" )) - (line (pt 208 80)(pt 192 80)) - ) - (port - (pt 208 96) - (output) - (text "clock_10Hz" (rect 0 0 56 12)(font "Arial" )) - (text "clock_10Hz" (rect 140 91 196 103)(font "Arial" )) - (line (pt 208 96)(pt 192 96)) - ) - (port - (pt 208 112) - (output) - (text "clock_4Hz" (rect 0 0 50 12)(font "Arial" )) - (text "clock_4Hz" (rect 145 107 195 119)(font "Arial" )) - (line (pt 208 112)(pt 192 112)) - ) - (drawing - (rectangle (rect 16 16 192 128)) - ) -) (symbol (rect 472 920 504 936) (text "VCC" (rect 7 0 27 10)(font "Arial" (font_size 6))) @@ -1048,90 +991,154 @@ https://fpgasoftware.intel.com/eula. (pt 240 32) (output) (text "SWITCH_EN" (rect 0 0 64 12)(font "Arial" )) - (text "SWITCH_EN" (rect 165 27 219 39)(font "Arial" )) + (text "SWITCH_EN" (rect 165 27 229 39)(font "Arial" )) (line (pt 240 32)(pt 224 32)) ) (port (pt 240 48) (output) (text "LED_EN" (rect 0 0 42 12)(font "Arial" )) - (text "LED_EN" (rect 184 43 219 55)(font "Arial" )) + (text "LED_EN" (rect 184 43 226 55)(font "Arial" )) (line (pt 240 48)(pt 224 48)) ) (port (pt 240 64) (output) (text "TIMER_EN" (rect 0 0 54 12)(font "Arial" )) - (text "TIMER_EN" (rect 174 59 219 71)(font "Arial" )) + (text "TIMER_EN" (rect 174 59 228 71)(font "Arial" )) (line (pt 240 64)(pt 224 64)) ) (port (pt 240 80) (output) (text "HEX0_EN" (rect 0 0 48 12)(font "Arial" )) - (text "HEX0_EN" (rect 179 75 219 87)(font "Arial" )) + (text "HEX0_EN" (rect 179 75 227 87)(font "Arial" )) (line (pt 240 80)(pt 224 80)) ) (port (pt 240 96) (output) (text "HEX1_EN" (rect 0 0 48 12)(font "Arial" )) - (text "HEX1_EN" (rect 179 91 219 103)(font "Arial" )) + (text "HEX1_EN" (rect 179 91 227 103)(font "Arial" )) (line (pt 240 96)(pt 224 96)) ) (port (pt 240 112) (output) (text "I2C_CMD_EN" (rect 0 0 69 12)(font "Arial" )) - (text "I2C_CMD_EN" (rect 161 107 219 119)(font "Arial" )) + (text "I2C_CMD_EN" (rect 161 107 230 119)(font "Arial" )) (line (pt 240 112)(pt 224 112)) ) (port (pt 240 128) (output) (text "I2C_DATA_EN" (rect 0 0 73 12)(font "Arial" )) - (text "I2C_DATA_EN" (rect 158 123 219 135)(font "Arial" )) + (text "I2C_DATA_EN" (rect 158 123 231 135)(font "Arial" )) (line (pt 240 128)(pt 224 128)) ) (port (pt 240 144) (output) (text "I2C_RDY_EN" (rect 0 0 69 12)(font "Arial" )) - (text "I2C_RDY_EN" (rect 161 139 219 151)(font "Arial" )) + (text "I2C_RDY_EN" (rect 161 139 230 151)(font "Arial" )) (line (pt 240 144)(pt 224 144)) ) (port (pt 240 160) (output) (text "DP_EN" (rect 0 0 36 12)(font "Arial" )) - (text "DP_EN" (rect 189 155 219 167)(font "Arial" )) + (text "DP_EN" (rect 189 155 225 167)(font "Arial" )) (line (pt 240 160)(pt 224 160)) ) (port (pt 240 176) (output) (text "INC_EN" (rect 0 0 41 12)(font "Arial" )) - (text "INC_EN" (rect 185 171 219 183)(font "Arial" )) + (text "INC_EN" (rect 185 171 226 183)(font "Arial" )) (line (pt 240 176)(pt 224 176)) ) (port (pt 240 192) (output) (text "QUAD_EN" (rect 0 0 53 12)(font "Arial" )) - (text "QUAD_EN" (rect 175 187 219 199)(font "Arial" )) + (text "QUAD_EN" (rect 175 187 228 199)(font "Arial" )) (line (pt 240 192)(pt 224 192)) ) (port (pt 240 208) (output) (text "PWM_EN" (rect 0 0 47 12)(font "Arial" )) - (text "PWM_EN" (rect 180 203 219 215)(font "Arial" )) + (text "PWM_EN" (rect 180 203 227 215)(font "Arial" )) (line (pt 240 208)(pt 224 208)) ) (drawing (rectangle (rect 16 16 224 224)) ) ) +(symbol + (rect 792 32 1000 208) + (text "clk_div" (rect 5 0 40 12)(font "Arial" )) + (text "inst5" (rect 8 160 31 172)(font "Arial" )) + (port + (pt 0 32) + (input) + (text "clock_10MHz" (rect 0 0 64 12)(font "Arial" )) + (text "clock_10MHz" (rect 21 27 85 39)(font "Arial" )) + (line (pt 0 32)(pt 16 32)) + ) + (port + (pt 208 32) + (output) + (text "clock_100kHz" (rect 0 0 68 12)(font "Arial" )) + (text "clock_100kHz" (rect 130 27 187 39)(font "Arial" )) + (line (pt 208 32)(pt 192 32)) + ) + (port + (pt 208 48) + (output) + (text "clock_25kHz" (rect 0 0 62 12)(font "Arial" )) + (text "clock_25kHz" (rect 135 43 187 55)(font "Arial" )) + (line (pt 208 48)(pt 192 48)) + ) + (port + (pt 208 64) + (output) + (text "clock_10kHz" (rect 0 0 62 12)(font "Arial" )) + (text "clock_10kHz" (rect 135 59 187 71)(font "Arial" )) + (line (pt 208 64)(pt 192 64)) + ) + (port + (pt 208 80) + (output) + (text "clock_100Hz" (rect 0 0 62 12)(font "Arial" )) + (text "clock_100Hz" (rect 135 75 187 87)(font "Arial" )) + (line (pt 208 80)(pt 192 80)) + ) + (port + (pt 208 96) + (output) + (text "clock_32Hz" (rect 0 0 56 12)(font "Arial" )) + (text "clock_32Hz" (rect 140 91 187 103)(font "Arial" )) + (line (pt 208 96)(pt 192 96)) + ) + (port + (pt 208 112) + (output) + (text "clock_10Hz" (rect 0 0 56 12)(font "Arial" )) + (text "clock_10Hz" (rect 140 107 187 119)(font "Arial" )) + (line (pt 208 112)(pt 192 112)) + ) + (port + (pt 208 128) + (output) + (text "clock_4Hz" (rect 0 0 50 12)(font "Arial" )) + (text "clock_4Hz" (rect 145 123 187 135)(font "Arial" )) + (line (pt 208 128)(pt 192 128)) + ) + (drawing + (rectangle (rect 16 16 192 160)) + ) +) (connector (pt 304 96) (pt 304 104) @@ -1508,11 +1515,6 @@ https://fpgasoftware.intel.com/eula. (pt 1088 896) (pt 1208 896) ) -(connector - (text "clock_10kHz" (rect 794 880 854 897)(font "Intel Clear" )) - (pt 784 896) - (pt 864 896) -) (connector (text "clk_10MHz" (rect 722 48 775 65)(font "Intel Clear" )) (pt 712 64) @@ -1523,16 +1525,6 @@ https://fpgasoftware.intel.com/eula. (pt 1000 64) (pt 1080 64) ) -(connector - (text "clock_10kHz" (rect 1018 64 1078 81)(font "Intel Clear" )) - (pt 1000 80) - (pt 1088 80) -) -(connector - (text "clock_10Hz" (rect 1010 112 1064 129)(font "Intel Clear" )) - (pt 1000 128) - (pt 1080 128) -) (connector (pt 1448 360) (pt 1544 360) @@ -1614,6 +1606,26 @@ https://fpgasoftware.intel.com/eula. (pt 1096 704) (bus) ) +(connector + (text "clock_10kHz" (rect 1010 80 1070 97)(font "Intel Clear" )) + (pt 1000 96) + (pt 1080 96) +) +(connector + (text "clock_25kHz" (rect 1008 64 1068 81)(font "Intel Clear" )) + (pt 1000 80) + (pt 1080 80) +) +(connector + (text "clock_25kHz" (rect 794 880 854 897)(font "Intel Clear" )) + (pt 784 896) + (pt 864 896) +) +(connector + (text "clock_10Hz" (rect 1010 128 1064 145)(font "Intel Clear" )) + (pt 1000 144) + (pt 1080 144) +) (junction (pt 488 952)) (junction (pt 248 80)) (title_block @@ -1623,7 +1635,7 @@ https://fpgasoftware.intel.com/eula. (section (rect 0 48 368 72)(text "DESIGNER" (rect 2 0 59 12)(font "Arial" ))(text "ECE 2031" (rect 56 2 146 20)(font "Arial" (font_size 12)))(border)) (section (rect 0 72 280 96)(text "NUMBER" (rect 2 0 49 12)(font "Arial" ))(text "1.00" (rect 56 1 85 17)(font "Arial" (font_size 10)))(border)) (section (rect 280 72 368 96)(text "REV" (rect 2 1 25 13)(font "Arial" ))(text "A" (rect 43 1 53 17)(font "Arial" (font_size 10)))(border)) - (section (rect 0 96 240 120)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "Tue Apr 06 22:24:54 2021" (rect 56 3 231 19)(font "Arial" (font_size 10)))(date)(border)) + (section (rect 0 96 240 120)(text "DATE" (rect 2 0 30 12)(font "Arial" ))(text "Sun Apr 11 14:57:05 2021" (rect 56 3 234 19)(font "Arial" (font_size 10)))(date)(border)) (section (rect 240 96 310 120)(text "SHEET" (rect 2 0 37 12)(font "Arial" ))(text "1" (rect 55 5 63 21)(font "Arial" (font_size 10)))) (section (rect 310 96 368 120)(text "OF" (rect 10 0 25 12)(font "Arial" ))(text "1" (rect 34 4 42 20)(font "Arial" (font_size 10)))) (drawing diff --git a/VelocityControl.asm b/VelocityControl.asm index d753bb6..929ddbd 100644 --- a/VelocityControl.asm +++ b/VelocityControl.asm @@ -83,4 +83,4 @@ VelControl: DW &B01111 PosControlSpeed: DW &B11001 PosControl: DW 540 Countprev: DW 0 -OldPos: DW 0 +OldPos: DW 0 \ No newline at end of file diff --git a/clk_div.bsf b/clk_div.bsf index 391b8e5..f00d86c 100644 --- a/clk_div.bsf +++ b/clk_div.bsf @@ -21,9 +21,9 @@ https://fpgasoftware.intel.com/eula. */ (header "symbol" (version "1.1")) (symbol - (rect 16 16 224 160) + (rect 16 16 224 192) (text "clk_div" (rect 5 0 33 12)(font "Arial" )) - (text "inst" (rect 8 128 20 140)(font "Arial" )) + (text "inst" (rect 8 160 20 172)(font "Arial" )) (port (pt 0 32) (input) @@ -41,39 +41,46 @@ https://fpgasoftware.intel.com/eula. (port (pt 208 48) (output) - (text "clock_10kHz" (rect 0 0 49 12)(font "Arial" )) - (text "clock_10kHz" (rect 138 43 187 55)(font "Arial" )) + (text "clock_25kHz" (rect 0 0 50 12)(font "Arial" )) + (text "clock_25kHz" (rect 137 43 187 55)(font "Arial" )) (line (pt 208 48)(pt 192 48)(line_width 1)) ) (port (pt 208 64) (output) - (text "clock_100Hz" (rect 0 0 49 12)(font "Arial" )) - (text "clock_100Hz" (rect 138 59 187 71)(font "Arial" )) + (text "clock_10kHz" (rect 0 0 49 12)(font "Arial" )) + (text "clock_10kHz" (rect 138 59 187 71)(font "Arial" )) (line (pt 208 64)(pt 192 64)(line_width 1)) ) (port (pt 208 80) (output) - (text "clock_32Hz" (rect 0 0 46 12)(font "Arial" )) - (text "clock_32Hz" (rect 141 75 187 87)(font "Arial" )) + (text "clock_100Hz" (rect 0 0 49 12)(font "Arial" )) + (text "clock_100Hz" (rect 138 75 187 87)(font "Arial" )) (line (pt 208 80)(pt 192 80)(line_width 1)) ) (port (pt 208 96) (output) - (text "clock_10Hz" (rect 0 0 44 12)(font "Arial" )) - (text "clock_10Hz" (rect 143 91 187 103)(font "Arial" )) + (text "clock_32Hz" (rect 0 0 46 12)(font "Arial" )) + (text "clock_32Hz" (rect 141 91 187 103)(font "Arial" )) (line (pt 208 96)(pt 192 96)(line_width 1)) ) (port (pt 208 112) (output) - (text "clock_4Hz" (rect 0 0 42 12)(font "Arial" )) - (text "clock_4Hz" (rect 145 107 187 119)(font "Arial" )) + (text "clock_10Hz" (rect 0 0 44 12)(font "Arial" )) + (text "clock_10Hz" (rect 143 107 187 119)(font "Arial" )) (line (pt 208 112)(pt 192 112)(line_width 1)) ) + (port + (pt 208 128) + (output) + (text "clock_4Hz" (rect 0 0 42 12)(font "Arial" )) + (text "clock_4Hz" (rect 145 123 187 135)(font "Arial" )) + (line (pt 208 128)(pt 192 128)(line_width 1)) + ) (drawing - (rectangle (rect 16 16 192 128)(line_width 1)) + (rectangle (rect 16 16 192 160)(line_width 1)) ) ) diff --git a/clk_div.vhd b/clk_div.vhd index db8ead4..0940692 100644 --- a/clk_div.vhd +++ b/clk_div.vhd @@ -9,6 +9,7 @@ ENTITY clk_div IS ( clock_10MHz : IN STD_LOGIC; clock_100kHz : OUT STD_LOGIC; + clock_25kHz : OUT STD_LOGIC; clock_10kHz : OUT STD_LOGIC; clock_100Hz : OUT STD_LOGIC; clock_32Hz : OUT STD_LOGIC; @@ -24,13 +25,15 @@ ARCHITECTURE a OF clk_div IS CONSTANT half_freq : INTEGER := clk_freq/2; SIGNAL count_100kHz : INTEGER RANGE 0 TO half_freq/100000; + SIGNAL count_25kHz : INTEGER RANGE 0 TO half_freq/25000; SIGNAL count_10kHz : INTEGER RANGE 0 TO half_freq/10000; SIGNAL count_100Hz : INTEGER RANGE 0 TO half_freq/100; SIGNAL count_32Hz : INTEGER RANGE 0 TO half_freq/32; SIGNAL count_10Hz : INTEGER RANGE 0 TO half_freq/10; SIGNAL count_4Hz : INTEGER RANGE 0 TO half_freq/4; - SIGNAL clock_100kHz_int : STD_LOGIC; + SIGNAL clock_100kHz_int : STD_LOGIC; + SIGNAL clock_25kHz_int : STD_LOGIC; SIGNAL clock_10kHz_int : STD_LOGIC; SIGNAL clock_100Hz_int : STD_LOGIC; SIGNAL clock_32Hz_int : STD_LOGIC; @@ -43,6 +46,7 @@ BEGIN WAIT UNTIL RISING_EDGE(clock_10MHz); clock_100kHz <= clock_100kHz_int; + clock_25kHz <= clock_25kHZ_int; clock_10kHz <= clock_10kHz_int; clock_100Hz <= clock_100Hz_int; clock_32Hz <= clock_32Hz_int; @@ -56,6 +60,15 @@ BEGIN count_100kHz <= 0; clock_100kHz_int <= NOT(clock_100kHz_int); END IF; + + -- + IF count_25kHz < (half_freq/25000-1) THEN + count_25kHz <= count_25kHz + 1; + ELSE + count_25kHz <= 0; + clock_25kHz_int <= NOT(clock_25kHz_int); + END IF; + -- IF count_10kHz < (half_freq/10000-1) THEN count_10kHz <= count_10kHz + 1; diff --git a/clk_div.vhd.bak b/clk_div.vhd.bak new file mode 100644 index 0000000..db8ead4 --- /dev/null +++ b/clk_div.vhd.bak @@ -0,0 +1,98 @@ +LIBRARY IEEE; +USE IEEE.STD_LOGIC_1164.all; +USE IEEE.STD_LOGIC_ARITH.all; +USE IEEE.STD_LOGIC_UNSIGNED.all; + +ENTITY clk_div IS + + PORT + ( + clock_10MHz : IN STD_LOGIC; + clock_100kHz : OUT STD_LOGIC; + clock_10kHz : OUT STD_LOGIC; + clock_100Hz : OUT STD_LOGIC; + clock_32Hz : OUT STD_LOGIC; + clock_10Hz : OUT STD_LOGIC; + clock_4Hz : OUT STD_LOGIC + ); + +END clk_div; + +ARCHITECTURE a OF clk_div IS + + CONSTANT clk_freq : INTEGER := 10000000; + CONSTANT half_freq : INTEGER := clk_freq/2; + + SIGNAL count_100kHz : INTEGER RANGE 0 TO half_freq/100000; + SIGNAL count_10kHz : INTEGER RANGE 0 TO half_freq/10000; + SIGNAL count_100Hz : INTEGER RANGE 0 TO half_freq/100; + SIGNAL count_32Hz : INTEGER RANGE 0 TO half_freq/32; + SIGNAL count_10Hz : INTEGER RANGE 0 TO half_freq/10; + SIGNAL count_4Hz : INTEGER RANGE 0 TO half_freq/4; + + SIGNAL clock_100kHz_int : STD_LOGIC; + SIGNAL clock_10kHz_int : STD_LOGIC; + SIGNAL clock_100Hz_int : STD_LOGIC; + SIGNAL clock_32Hz_int : STD_LOGIC; + SIGNAL clock_10Hz_int : STD_LOGIC; + SIGNAL clock_4Hz_int : STD_LOGIC; + +BEGIN + PROCESS + BEGIN + WAIT UNTIL RISING_EDGE(clock_10MHz); + + clock_100kHz <= clock_100kHz_int; + clock_10kHz <= clock_10kHz_int; + clock_100Hz <= clock_100Hz_int; + clock_32Hz <= clock_32Hz_int; + clock_10Hz <= clock_10Hz_int; + clock_4Hz <= clock_4Hz_int; + + -- + IF count_100kHz < (half_freq/100000-1) THEN + count_100kHz <= count_100kHz + 1; + ELSE + count_100kHz <= 0; + clock_100kHz_int <= NOT(clock_100kHz_int); + END IF; + -- + IF count_10kHz < (half_freq/10000-1) THEN + count_10kHz <= count_10kHz + 1; + ELSE + count_10kHz <= 0; + clock_10kHz_int <= NOT(clock_10kHz_int); + END IF; + -- + IF count_100Hz < (half_freq/100-1) THEN + count_100Hz <= count_100Hz + 1; + ELSE + count_100Hz <= 0; + clock_100Hz_int <= NOT(clock_100Hz_int); + END IF; + -- + IF count_32Hz < (half_freq/32-1) THEN + count_32Hz <= count_32Hz + 1; + ELSE + count_32Hz <= 0; + clock_32Hz_int <= NOT(clock_32Hz_int); + END IF; + -- + IF count_10Hz < (half_freq/10-1) THEN + count_10Hz <= count_10Hz + 1; + ELSE + count_10Hz <= 0; + clock_10Hz_int <= NOT(clock_10Hz_int); + END IF; + -- + IF count_4Hz < (half_freq/4-1) THEN + count_4Hz <= count_4Hz + 1; + ELSE + count_4Hz <= 0; + clock_4Hz_int <= NOT(clock_4Hz_int); + END IF; + -- + + END PROCESS; +END a; + diff --git a/db/SCOMP.(0).cnf.cdb b/db/SCOMP.(0).cnf.cdb index 54489c6..c8a9535 100644 Binary files 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1618167603331 ""} +{ "Info" "IWSC_DONE_HDL_GENERATION" "SCOMP.vo C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/simulation/modelsim/ simulation " "Generated file SCOMP.vo in folder \"C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1618167604043 ""} +{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4661 " "Peak virtual memory: 4661 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167604076 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 15:00:04 2021 " "Processing ended: Sun Apr 11 15:00:04 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167604076 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167604076 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167604076 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1618167604076 ""} diff --git a/db/SCOMP.fit.qmsg b/db/SCOMP.fit.qmsg index 4c33952..962f891 100644 --- a/db/SCOMP.fit.qmsg +++ b/db/SCOMP.fit.qmsg @@ -1,66 +1,66 @@ -{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1617762337852 ""} -{ "Info" "IMPP_MPP_USER_DEVICE" "SCOMP 10M50DAF484C7G " "Selected device 10M50DAF484C7G for design \"SCOMP\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1617762337896 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1617762338035 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1617762338035 ""} -{ "Info" "ICUT_CUT_PLL_COMPUTATION_SUCCESS" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|pll1 MAX 10 PLL " "Implemented PLL \"PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|pll1\" as MAX 10 PLL type" { { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] 1 5 0 0 " "Implementing clock multiplication of 1, clock division of 5, and phase shift of 0 degrees (0 ps) for PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] port" { } { { "db/pll_main_altpll.v" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v" 51 -1 0 } } { "" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 15099 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "Design Software" 0 -1 1617762338234 ""} } { { "db/pll_main_altpll.v" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v" 51 -1 0 } } { "" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 15535 "Implemented %3!s! \"%1!s!\" as %2!s! PLL type" 0 0 "Fitter" 0 -1 1617762338234 ""} -{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1617762338651 ""} -{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1617762338687 ""} -{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M08DAF484I7G " "Device 10M08DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M08DAF484I7P " "Device 10M08DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484A7G " "Device 10M16DAF484A7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484C7G " "Device 10M16DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484I7G " "Device 10M16DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484I7P " "Device 10M16DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484A7G " "Device 10M25DAF484A7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484C7G " "Device 10M25DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484I7G " "Device 10M25DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M50DAF484I7G " "Device 10M50DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M50DAF484I7P " "Device 10M50DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M40DAF484C7G " "Device 10M40DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M40DAF484I7G " "Device 10M40DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1617762339208 ""} } { } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1617762339208 ""} -{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "8 " "Fitter converted 8 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TMS~ H2 " "Pin ~ALTERA_TMS~ is reserved at location H2" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_TMS~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2429 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TCK~ G2 " "Pin ~ALTERA_TCK~ is reserved at location G2" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_TCK~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2431 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TDI~ L4 " "Pin ~ALTERA_TDI~ is reserved at location L4" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_TDI~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2433 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TDO~ M5 " "Pin ~ALTERA_TDO~ is reserved at location M5" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_TDO~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2435 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_CONFIG_SEL~ H10 " "Pin ~ALTERA_CONFIG_SEL~ is reserved at location H10" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_CONFIG_SEL~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2437 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nCONFIG~ H9 " "Pin ~ALTERA_nCONFIG~ is reserved at location H9" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_nCONFIG~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2439 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nSTATUS~ G9 " "Pin ~ALTERA_nSTATUS~ is reserved at location G9" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_nSTATUS~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2441 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_CONF_DONE~ F8 " "Pin ~ALTERA_CONF_DONE~ is reserved at location F8" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ~ALTERA_CONF_DONE~ } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 2443 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1617762339242 ""} } { } 0 169124 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "Fitter" 0 -1 1617762339242 ""} -{ "Info" "IFIOMGR_RESERVE_PIN_NO_DATA0" "" "DATA\[0\] dual-purpose pin not reserved" { } { } 0 169141 "DATA\[0\] dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1617762339244 ""} -{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "Data\[1\]/ASDO " "Data\[1\]/ASDO dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1617762339244 ""} -{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "nCSO " "nCSO dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1617762339244 ""} -{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "DCLK " "DCLK dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1617762339244 ""} -{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1617762339253 ""} -{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1617762339483 ""} -{ "Info" "ISTA_SDC_FOUND" "SCOMP.sdc " "Reading SDC File: 'SCOMP.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Fitter" 0 -1 1617762342007 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "generated clocks " "No user constrained generated clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1617762342012 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1617762342021 ""} -{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1617762342052 ""} -{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1617762342056 ""} -{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1617762342059 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_4) " "Automatically promoted node PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_4)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G8 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G8" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342379 ""} } { { "db/pll_main_altpll.v" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v" 93 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342379 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " "Automatically promoted node I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342380 ""} } { { "i2c_master.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd" 53 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 369 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342380 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_100kHz " "Automatically promoted node clk_div:inst5\|clock_100kHz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342380 ""} } { { "clk_div.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd" 11 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 930 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342380 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_10Hz " "Automatically promoted node clk_div:inst5\|clock_10Hz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342380 ""} } { { "clk_div.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd" 15 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 928 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342380 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|inst13 " "Automatically promoted node I2C_INTERFACE:inst13\|inst13 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342380 ""} } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 24 304 368 72 "inst13" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 406 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342380 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|HEX0_EN " "Automatically promoted node IO_DECODER:inst3\|HEX0_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342380 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 18 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 858 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342380 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|inst12 " "Automatically promoted node I2C_INTERFACE:inst13\|inst12 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { -40 304 368 8 "inst12" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 405 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342381 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|LED_EN " "Automatically promoted node IO_DECODER:inst3\|LED_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 16 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 856 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342381 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|SWITCH_EN " "Automatically promoted node IO_DECODER:inst3\|SWITCH_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[0\]~18 " "Destination node I2C_INTERFACE:inst13\|inst1\[0\]~18" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1119 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[1\]~21 " "Destination node I2C_INTERFACE:inst13\|inst1\[1\]~21" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1123 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[3\]~31 " "Destination node I2C_INTERFACE:inst13\|inst1\[3\]~31" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1133 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[4\]~36 " "Destination node I2C_INTERFACE:inst13\|inst1\[4\]~36" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1138 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[6\]~46 " "Destination node I2C_INTERFACE:inst13\|inst1\[6\]~46" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1148 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[10\]~65 " "Destination node I2C_INTERFACE:inst13\|inst1\[10\]~65" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1167 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[11\]~69 " "Destination node I2C_INTERFACE:inst13\|inst1\[11\]~69" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1171 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[12\]~74 " "Destination node I2C_INTERFACE:inst13\|inst1\[12\]~74" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1176 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[13\]~77 " "Destination node I2C_INTERFACE:inst13\|inst1\[13\]~77" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1179 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[14\]~81 " "Destination node I2C_INTERFACE:inst13\|inst1\[14\]~81" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1183 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342381 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Non-global destination nodes limited to 10 nodes" { } { } 0 176358 "Non-global destination nodes limited to %1!d! nodes" 0 0 "Design Software" 0 -1 1617762342381 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Design Software" 0 -1 1617762342381 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 15 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 855 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342381 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|HEX1_EN " "Automatically promoted node IO_DECODER:inst3\|HEX1_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 19 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 859 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342383 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_10kHz " "Automatically promoted node clk_div:inst5\|clock_10kHz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} } { { "clk_div.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd" 12 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 929 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342383 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|PWM_EN " "Automatically promoted node IO_DECODER:inst3\|PWM_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 26 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 862 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342383 ""} -{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_out\[7\]~0 " "Automatically promoted node I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_out\[7\]~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|IO_WRITE_int " "Destination node SCOMP:inst\|IO_WRITE_int" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 56 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 723 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|IO_CYCLE " "Destination node SCOMP:inst\|IO_CYCLE" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 21 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 725 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[0\] " "Destination node SCOMP:inst\|AC\[0\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 676 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[1\] " "Destination node SCOMP:inst\|AC\[1\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 675 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[2\] " "Destination node SCOMP:inst\|AC\[2\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 674 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[3\] " "Destination node SCOMP:inst\|AC\[3\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 673 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[4\] " "Destination node SCOMP:inst\|AC\[4\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 672 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[5\] " "Destination node SCOMP:inst\|AC\[5\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 671 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[6\] " "Destination node SCOMP:inst\|AC\[6\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 670 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[7\] " "Destination node SCOMP:inst\|AC\[7\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 669 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1617762342383 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Non-global destination nodes limited to 10 nodes" { } { } 0 176358 "Non-global destination nodes limited to %1!d! nodes" 0 0 "Design Software" 0 -1 1617762342383 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Design Software" 0 -1 1617762342383 ""} } { { "i2c_ctrl.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd" 84 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 1121 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1617762342383 ""} -{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1617762343641 ""} -{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Performing register packing on registers with non-logic cell location assignments" { } { } 1 176273 "Performing register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1617762343646 ""} -{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Completed register packing on registers with non-logic cell location assignments" { } { } 1 176274 "Completed register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1617762343647 ""} -{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1617762343655 ""} -{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1617762343664 ""} -{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1617762343674 ""} -{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1617762343674 ""} -{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" { } { } 1 176248 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1617762343679 ""} -{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" { } { } 1 176249 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1617762343874 ""} -{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1617762343879 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1617762343879 ""} -{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[0\] " "Node \"DP\[0\]\" is assigned to location or region, but does not exist in design" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[0\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1617762344372 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[1\] " "Node \"DP\[1\]\" is assigned to location or region, but does not exist in design" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[1\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1617762344372 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[2\] " "Node \"DP\[2\]\" is assigned to location or region, but does not exist in design" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[2\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1617762344372 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[3\] " "Node \"DP\[3\]\" is assigned to location or region, but does not exist in design" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[3\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1617762344372 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[4\] " "Node \"DP\[4\]\" is assigned to location or region, but does not exist in design" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[4\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1617762344372 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[5\] " "Node \"DP\[5\]\" is assigned to location or region, but does not exist in design" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[5\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1617762344372 ""} } { } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1617762344372 ""} -{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:05 " "Fitter preparation operations ending: elapsed time is 00:00:05" { } { } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1617762344373 ""} -{ "Info" "IVPR20K_VPR_FAMILY_APL_ERROR" "" "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." { } { } 0 14896 "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." 0 0 "Fitter" 0 -1 1617762344399 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1617762349488 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:01 " "Fitter placement preparation operations ending: elapsed time is 00:00:01" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1617762350176 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1617762350268 ""} -{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1617762358740 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:09 " "Fitter placement operations ending: elapsed time is 00:00:09" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1617762358742 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1617762360826 ""} -{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Router estimated average interconnect usage is 1% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "19 X45_Y33 X55_Y43 " "Router estimated peak interconnect usage is 19% of the available device resources in the region that extends from location X45_Y33 to location X55_Y43" { } { { "loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 1 { 0 "Router estimated peak interconnect usage is 19% of the available device resources in the region that extends from location X45_Y33 to location X55_Y43"} { { 12 { 0 ""} 45 33 11 11 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1617762369146 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1617762369146 ""} -{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1617762413998 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1617762413998 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:50 " "Fitter routing operations ending: elapsed time is 00:00:50" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1617762414006 ""} -{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 4.52 " "Total time spent on timing analysis during the Fitter is 4.52 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1617762414515 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1617762414553 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1617762416588 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1617762416589 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1617762419313 ""} -{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:07 " "Fitter post-fit operations ending: elapsed time is 00:00:07" { } { } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1617762421299 ""} -{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1617762422222 ""} -{ "Warning" "WFIOMGR_FIOMGR_REFER_APPNOTE_447_TOP_LEVEL" "17 MAX 10 " "17 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing MAX 10 Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." { { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GSENSOR_SDI 3.3-V LVTTL V11 " "Pin GSENSOR_SDI uses I/O standard 3.3-V LVTTL at V11" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { GSENSOR_SDI } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GSENSOR_SDI" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 872 464 640 888 "GSENSOR_SDI" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 109 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GSENSOR_SCLK 3.3-V LVTTL AB15 " "Pin GSENSOR_SCLK uses I/O standard 3.3-V LVTTL at AB15" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { GSENSOR_SCLK } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GSENSOR_SCLK" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 888 464 640 904 "GSENSOR_SCLK" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 110 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[9\] 3.3-V LVTTL F15 " "Pin SW\[9\] uses I/O standard 3.3-V LVTTL at F15" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[9] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[9\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 42 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[8\] 3.3-V LVTTL B14 " "Pin SW\[8\] uses I/O standard 3.3-V LVTTL at B14" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[8] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[8\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 43 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[7\] 3.3-V LVTTL A14 " "Pin SW\[7\] uses I/O standard 3.3-V LVTTL at A14" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[7] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[7\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 44 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[0\] 3.3-V LVTTL C10 " "Pin SW\[0\] uses I/O standard 3.3-V LVTTL at C10" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[0] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[0\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 51 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY1 3.3 V Schmitt Trigger A7 " "Pin KEY1 uses I/O standard 3.3 V Schmitt Trigger at A7" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { KEY1 } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY1" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 208 72 248 224 "KEY1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 111 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY0 3.3 V Schmitt Trigger B8 " "Pin KEY0 uses I/O standard 3.3 V Schmitt Trigger at B8" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { KEY0 } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY0" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 96 72 248 112 "KEY0" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 108 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "clock_50 3.3-V LVTTL N14 " "Pin clock_50 uses I/O standard 3.3-V LVTTL at N14" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { clock_50 } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "clock_50" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 72 72 248 88 "clock_50" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 107 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[1\] 3.3-V LVTTL C11 " "Pin SW\[1\] uses I/O standard 3.3-V LVTTL at C11" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[1] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[1\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 50 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[2\] 3.3-V LVTTL D12 " "Pin SW\[2\] uses I/O standard 3.3-V LVTTL at D12" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[2] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[2\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 49 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[3\] 3.3-V LVTTL C12 " "Pin SW\[3\] uses I/O standard 3.3-V LVTTL at C12" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[3] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[3\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 48 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[4\] 3.3-V LVTTL A12 " "Pin SW\[4\] uses I/O standard 3.3-V LVTTL at A12" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[4] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[4\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 47 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[5\] 3.3-V LVTTL B12 " "Pin SW\[5\] uses I/O standard 3.3-V LVTTL at B12" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[5] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[5\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 46 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[6\] 3.3-V LVTTL A13 " "Pin SW\[6\] uses I/O standard 3.3-V LVTTL at A13" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { SW[6] } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[6\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 45 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "ENCODER_H1 3.3-V LVTTL Y10 " "Pin ENCODER_H1 uses I/O standard 3.3-V LVTTL at Y10" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ENCODER_H1 } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "ENCODER_H1" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 320 1280 1456 336 "ENCODER_H1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 112 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "ENCODER_H2 3.3-V LVTTL AB9 " "Pin ENCODER_H2 uses I/O standard 3.3-V LVTTL at AB9" { } { { "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/users/ivanzou/quartuslite/quartus/bin64/pin_planner.ppl" { ENCODER_H2 } } } { "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/users/ivanzou/quartuslite/quartus/bin64/Assignment Editor.qase" 1 { { 0 "ENCODER_H2" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 352 1280 1448 368 "ENCODER_H2" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" { { 0 { 0 ""} 0 113 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1617762422271 ""} } { } 0 169177 "%1!d! pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing %2!s! Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." 0 0 "Fitter" 0 -1 1617762422271 ""} -{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.fit.smsg " "Generated suppressed messages file C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1617762422584 ""} -{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 11 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "5655 " "Peak virtual memory: 5655 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1617762424397 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Apr 06 22:27:04 2021 " "Processing ended: Tue Apr 06 22:27:04 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1617762424397 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:01:29 " "Elapsed time: 00:01:29" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1617762424397 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:01:48 " "Total CPU time (on all processors): 00:01:48" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1617762424397 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1617762424397 ""} +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1618167565406 ""} +{ "Info" "IMPP_MPP_USER_DEVICE" "SCOMP 10M50DAF484C7G " "Selected device 10M50DAF484C7G for design \"SCOMP\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1618167565433 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1618167565479 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1618167565479 ""} +{ "Info" "ICUT_CUT_PLL_COMPUTATION_SUCCESS" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|pll1 MAX 10 PLL " "Implemented PLL \"PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|pll1\" as MAX 10 PLL type" { { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] 1 5 0 0 " "Implementing clock multiplication of 1, clock division of 5, and phase shift of 0 degrees (0 ps) for PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] port" { } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 51 -1 0 } } { "" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 15099 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "Design Software" 0 -1 1618167565530 ""} } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 51 -1 0 } } { "" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 15535 "Implemented %3!s! \"%1!s!\" as %2!s! PLL type" 0 0 "Fitter" 0 -1 1618167565530 ""} +{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1618167565665 ""} +{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1618167565676 ""} +{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M08DAF484I7G " "Device 10M08DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M08DAF484I7P " "Device 10M08DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484A7G " "Device 10M16DAF484A7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484C7G " "Device 10M16DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484I7G " "Device 10M16DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484I7P " "Device 10M16DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484A7G " "Device 10M25DAF484A7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484C7G " "Device 10M25DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484I7G " "Device 10M25DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M50DAF484I7G " "Device 10M50DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M50DAF484I7P " "Device 10M50DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M40DAF484C7G " "Device 10M40DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M40DAF484I7G " "Device 10M40DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167565874 ""} } { } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1618167565874 ""} +{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "8 " "Fitter converted 8 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TMS~ H2 " "Pin ~ALTERA_TMS~ is reserved at location H2" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TMS~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2454 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TCK~ G2 " "Pin ~ALTERA_TCK~ is reserved at location G2" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TCK~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2456 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TDI~ L4 " "Pin ~ALTERA_TDI~ is reserved at location L4" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TDI~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2458 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TDO~ M5 " "Pin ~ALTERA_TDO~ is reserved at location M5" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TDO~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2460 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_CONFIG_SEL~ H10 " "Pin ~ALTERA_CONFIG_SEL~ is reserved at location H10" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_CONFIG_SEL~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2462 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nCONFIG~ H9 " "Pin ~ALTERA_nCONFIG~ is reserved at location H9" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_nCONFIG~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2464 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nSTATUS~ G9 " "Pin ~ALTERA_nSTATUS~ is reserved at location G9" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_nSTATUS~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2466 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_CONF_DONE~ F8 " "Pin ~ALTERA_CONF_DONE~ is reserved at location F8" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_CONF_DONE~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2468 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167565874 ""} } { } 0 169124 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "Fitter" 0 -1 1618167565874 ""} +{ "Info" "IFIOMGR_RESERVE_PIN_NO_DATA0" "" "DATA\[0\] dual-purpose pin not reserved" { } { } 0 169141 "DATA\[0\] dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167565874 ""} +{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "Data\[1\]/ASDO " "Data\[1\]/ASDO dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167565874 ""} +{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "nCSO " "nCSO dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167565874 ""} +{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "DCLK " "DCLK dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167565874 ""} +{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1618167565881 ""} +{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1618167565954 ""} +{ "Info" "ISTA_SDC_FOUND" "SCOMP.sdc " "Reading SDC File: 'SCOMP.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Fitter" 0 -1 1618167566739 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "generated clocks " "No user constrained generated clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1618167566741 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1618167566743 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1618167566745 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1618167566745 ""} +{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1618167566754 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_4) " "Automatically promoted node PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_4)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G8 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G8" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566833 ""} } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 93 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566833 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " "Automatically promoted node I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566833 ""} } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 53 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 369 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566833 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_100kHz " "Automatically promoted node clk_div:inst5\|clock_100kHz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566833 ""} } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 11 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 929 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566833 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_10Hz " "Automatically promoted node clk_div:inst5\|clock_10Hz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566833 ""} } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 16 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 927 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566833 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|inst13 " "Automatically promoted node I2C_INTERFACE:inst13\|inst13 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 24 304 368 72 "inst13" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 406 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|HEX0_EN " "Automatically promoted node IO_DECODER:inst3\|HEX0_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 18 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 858 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|inst12 " "Automatically promoted node I2C_INTERFACE:inst13\|inst12 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { -40 304 368 8 "inst12" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 405 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|LED_EN " "Automatically promoted node IO_DECODER:inst3\|LED_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 16 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 856 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|SWITCH_EN " "Automatically promoted node IO_DECODER:inst3\|SWITCH_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[0\]~24 " "Destination node I2C_INTERFACE:inst13\|inst1\[0\]~24" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1132 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[1\]~27 " "Destination node I2C_INTERFACE:inst13\|inst1\[1\]~27" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1136 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[2\]~32 " "Destination node I2C_INTERFACE:inst13\|inst1\[2\]~32" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1142 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[3\]~36 " "Destination node I2C_INTERFACE:inst13\|inst1\[3\]~36" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1147 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[4\]~40 " "Destination node I2C_INTERFACE:inst13\|inst1\[4\]~40" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1151 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[5\]~45 " "Destination node I2C_INTERFACE:inst13\|inst1\[5\]~45" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1156 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[6\]~50 " "Destination node I2C_INTERFACE:inst13\|inst1\[6\]~50" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1161 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[8\]~59 " "Destination node I2C_INTERFACE:inst13\|inst1\[8\]~59" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1171 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[9\]~64 " "Destination node I2C_INTERFACE:inst13\|inst1\[9\]~64" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1177 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[10\]~67 " "Destination node I2C_INTERFACE:inst13\|inst1\[10\]~67" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1180 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Non-global destination nodes limited to 10 nodes" { } { } 0 176358 "Non-global destination nodes limited to %1!d! nodes" 0 0 "Design Software" 0 -1 1618167566841 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 15 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 855 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_25kHz " "Automatically promoted node clk_div:inst5\|clock_25kHz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 12 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 928 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|HEX1_EN " "Automatically promoted node IO_DECODER:inst3\|HEX1_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566841 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 19 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 859 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566841 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|PWM_EN " "Automatically promoted node IO_DECODER:inst3\|PWM_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 26 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 862 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167566842 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_out\[7\]~0 " "Automatically promoted node I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_out\[7\]~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|IO_WRITE_int " "Destination node SCOMP:inst\|IO_WRITE_int" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 56 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 723 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|IO_CYCLE " "Destination node SCOMP:inst\|IO_CYCLE" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 21 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 725 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[0\] " "Destination node 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"C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 674 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[3\] " "Destination node SCOMP:inst\|AC\[3\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 673 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[4\] " "Destination node SCOMP:inst\|AC\[4\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 672 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[5\] " "Destination node SCOMP:inst\|AC\[5\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 671 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[6\] " "Destination node SCOMP:inst\|AC\[6\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 670 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[7\] " "Destination node SCOMP:inst\|AC\[7\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 669 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167566842 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Non-global destination nodes limited to 10 nodes" { } { } 0 176358 "Non-global destination nodes limited to %1!d! nodes" 0 0 "Design Software" 0 -1 1618167566842 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Design Software" 0 -1 1618167566842 ""} } { { "i2c_ctrl.vhd" "" { Text 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location assignments" 1 0 "Fitter" 0 -1 1618167567304 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1618167567305 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1618167567309 ""} +{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1618167567310 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1618167567310 ""} +{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" { } { } 1 176248 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1618167567312 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" { } { } 1 176249 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1618167567368 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1618167567368 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1618167567368 ""} +{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[0\] " "Node \"DP\[0\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[0\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167567509 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[1\] " "Node \"DP\[1\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[1\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167567509 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[2\] " "Node \"DP\[2\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[2\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167567509 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[3\] " "Node \"DP\[3\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[3\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167567509 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[4\] " "Node \"DP\[4\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[4\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167567509 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[5\] " "Node \"DP\[5\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[5\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167567509 ""} } { } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1618167567509 ""} +{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:02 " "Fitter preparation operations ending: elapsed time is 00:00:02" { } { } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167567509 ""} +{ "Info" "IVPR20K_VPR_FAMILY_APL_ERROR" "" "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." { } { } 0 14896 "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." 0 0 "Fitter" 0 -1 1618167567526 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1618167568718 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167568942 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1618167568972 ""} +{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1618167572044 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:03 " "Fitter placement operations ending: elapsed time is 00:00:03" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167572044 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1618167572706 ""} +{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Router estimated average interconnect usage is 1% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "19 X56_Y33 X66_Y43 " "Router estimated peak interconnect usage is 19% of the available device resources in the region that extends from location X56_Y33 to location X66_Y43" { } { { "loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 1 { 0 "Router estimated peak interconnect usage is 19% of the available device resources in the region that extends from location X56_Y33 to location X66_Y43"} { { 12 { 0 ""} 56 33 11 11 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1618167575013 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1618167575013 ""} +{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1618167590490 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1618167590490 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:17 " "Fitter routing operations ending: elapsed time is 00:00:17" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167590493 ""} +{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 1.41 " "Total time spent on timing analysis during the Fitter is 1.41 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1618167590691 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1618167590700 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1618167591262 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1618167591262 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1618167592086 ""} +{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:02 " "Fitter post-fit operations ending: elapsed time is 00:00:02" { } { } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167592825 ""} +{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1618167593131 ""} +{ "Warning" "WFIOMGR_FIOMGR_REFER_APPNOTE_447_TOP_LEVEL" "17 MAX 10 " "17 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing MAX 10 Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." { { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GSENSOR_SDI 3.3-V LVTTL V11 " "Pin GSENSOR_SDI uses I/O standard 3.3-V LVTTL at V11" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { GSENSOR_SDI } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GSENSOR_SDI" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 872 464 640 888 "GSENSOR_SDI" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 109 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GSENSOR_SCLK 3.3-V LVTTL AB15 " "Pin GSENSOR_SCLK uses I/O standard 3.3-V LVTTL at AB15" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { GSENSOR_SCLK } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GSENSOR_SCLK" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 888 464 640 904 "GSENSOR_SCLK" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 110 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[9\] 3.3-V LVTTL F15 " "Pin SW\[9\] uses I/O standard 3.3-V LVTTL at F15" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[9] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[9\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 42 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[8\] 3.3-V LVTTL B14 " "Pin SW\[8\] uses I/O standard 3.3-V LVTTL at B14" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[8] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[8\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 43 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[7\] 3.3-V LVTTL A14 " "Pin SW\[7\] uses I/O standard 3.3-V LVTTL at A14" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[7] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[7\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 44 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[0\] 3.3-V LVTTL C10 " "Pin SW\[0\] uses I/O standard 3.3-V LVTTL at C10" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[0] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[0\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 51 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY1 3.3 V Schmitt Trigger A7 " "Pin KEY1 uses I/O standard 3.3 V Schmitt Trigger at A7" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { KEY1 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY1" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 208 72 248 224 "KEY1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 111 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY0 3.3 V Schmitt Trigger B8 " "Pin KEY0 uses I/O standard 3.3 V Schmitt Trigger at B8" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { KEY0 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY0" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 96 72 248 112 "KEY0" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 108 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "clock_50 3.3-V LVTTL N14 " "Pin clock_50 uses I/O standard 3.3-V LVTTL at N14" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { clock_50 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "clock_50" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 72 72 248 88 "clock_50" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 107 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[1\] 3.3-V LVTTL C11 " "Pin SW\[1\] uses I/O standard 3.3-V LVTTL at C11" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[1] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[1\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 50 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[2\] 3.3-V LVTTL D12 " "Pin SW\[2\] uses I/O standard 3.3-V LVTTL at D12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[2] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[2\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 49 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[3\] 3.3-V LVTTL C12 " "Pin SW\[3\] uses I/O standard 3.3-V LVTTL at C12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[3] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[3\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 48 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[4\] 3.3-V LVTTL A12 " "Pin SW\[4\] uses I/O standard 3.3-V LVTTL at A12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[4] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[4\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 47 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[5\] 3.3-V LVTTL B12 " "Pin SW\[5\] uses I/O standard 3.3-V LVTTL at B12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[5] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[5\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 46 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[6\] 3.3-V LVTTL A13 " "Pin SW\[6\] uses I/O standard 3.3-V LVTTL at A13" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[6] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[6\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 45 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "ENCODER_H1 3.3-V LVTTL Y10 " "Pin ENCODER_H1 uses I/O standard 3.3-V LVTTL at Y10" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ENCODER_H1 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "ENCODER_H1" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 320 1280 1456 336 "ENCODER_H1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 112 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "ENCODER_H2 3.3-V LVTTL AB9 " "Pin ENCODER_H2 uses I/O standard 3.3-V LVTTL at AB9" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ENCODER_H2 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "ENCODER_H2" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 352 1280 1448 368 "ENCODER_H2" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 113 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167593151 ""} } { } 0 169177 "%1!d! pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing %2!s! Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." 0 0 "Fitter" 0 -1 1618167593151 ""} +{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.fit.smsg " "Generated suppressed messages file C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1618167593269 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 11 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "5832 " "Peak virtual memory: 5832 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167593869 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:59:53 2021 " "Processing ended: Sun Apr 11 14:59:53 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167593869 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:29 " "Elapsed time: 00:00:29" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167593869 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:41 " "Total CPU time (on all processors): 00:00:41" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167593869 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1618167593869 ""} diff --git a/db/SCOMP.hier_info b/db/SCOMP.hier_info index e57ba3b..ff925f6 100644 --- a/db/SCOMP.hier_info +++ b/db/SCOMP.hier_info @@ -86,23 +86,29 @@ PWMCLOCK => COUNT[1].CLK PWMCLOCK => COUNT[2].CLK PWMCLOCK => COUNT[3].CLK PWMCLOCK => COUNT[4].CLK +PWMCLOCK => COUNT[5].CLK +PWMCLOCK => COUNT[6].CLK RESETN => COMPARE[0].ACLR RESETN => COMPARE[1].ACLR RESETN => COMPARE[2].ACLR RESETN => COMPARE[3].ACLR RESETN => COMPARE[4].ACLR +RESETN => COMPARE[5].ACLR +RESETN => COMPARE[6].ACLR CS => COMPARE[0].CLK CS => COMPARE[1].CLK CS => COMPARE[2].CLK CS => COMPARE[3].CLK CS => COMPARE[4].CLK +CS => COMPARE[5].CLK +CS => COMPARE[6].CLK IO_DATA[0] => COMPARE[0].DATAIN IO_DATA[1] => COMPARE[1].DATAIN IO_DATA[2] => COMPARE[2].DATAIN IO_DATA[3] => COMPARE[3].DATAIN IO_DATA[4] => COMPARE[4].DATAIN -IO_DATA[5] => ~NO_FANOUT~ -IO_DATA[6] => ~NO_FANOUT~ +IO_DATA[5] => COMPARE[5].DATAIN +IO_DATA[6] => COMPARE[6].DATAIN IO_DATA[7] => ~NO_FANOUT~ IO_DATA[8] => ~NO_FANOUT~ IO_DATA[9] => ~NO_FANOUT~ @@ -204,6 +210,15 @@ clock_10MHz => count_10kHz[5].CLK clock_10MHz => count_10kHz[6].CLK clock_10MHz => count_10kHz[7].CLK clock_10MHz => count_10kHz[8].CLK +clock_10MHz => clock_25kHz_int.CLK +clock_10MHz => count_25kHz[0].CLK +clock_10MHz => count_25kHz[1].CLK +clock_10MHz => count_25kHz[2].CLK +clock_10MHz => count_25kHz[3].CLK +clock_10MHz => count_25kHz[4].CLK +clock_10MHz => count_25kHz[5].CLK +clock_10MHz => count_25kHz[6].CLK +clock_10MHz => count_25kHz[7].CLK clock_10MHz => clock_100kHz_int.CLK clock_10MHz => count_100kHz[0].CLK clock_10MHz => count_100kHz[1].CLK @@ -216,8 +231,10 @@ clock_10MHz => clock_10Hz~reg0.CLK clock_10MHz => clock_32Hz~reg0.CLK clock_10MHz => clock_100Hz~reg0.CLK clock_10MHz => clock_10kHz~reg0.CLK +clock_10MHz => clock_25kHz~reg0.CLK clock_10MHz => clock_100kHz~reg0.CLK clock_100kHz <= clock_100kHz~reg0.DB_MAX_OUTPUT_PORT_TYPE +clock_25kHz <= clock_25kHz~reg0.DB_MAX_OUTPUT_PORT_TYPE clock_10kHz <= clock_10kHz~reg0.DB_MAX_OUTPUT_PORT_TYPE clock_100Hz <= clock_100Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE clock_32Hz <= clock_32Hz~reg0.DB_MAX_OUTPUT_PORT_TYPE diff --git a/db/SCOMP.hif b/db/SCOMP.hif index 6d700f2..571c16b 100644 Binary files a/db/SCOMP.hif and b/db/SCOMP.hif differ diff --git a/db/SCOMP.lpc.html b/db/SCOMP.lpc.html index 5aebc67..cb97972 100644 --- a/db/SCOMP.lpc.html +++ b/db/SCOMP.lpc.html @@ -354,13 +354,13 @@ inst5 1 -3 +4 0 -3 -6 -3 -3 -3 +4 +7 +4 +4 +4 0 0 0 @@ -371,7 +371,7 @@ inst14 19 0 -11 +9 0 1 0 diff --git a/db/SCOMP.lpc.rdb b/db/SCOMP.lpc.rdb index e281424..317cd5a 100644 Binary files a/db/SCOMP.lpc.rdb and b/db/SCOMP.lpc.rdb differ diff --git a/db/SCOMP.lpc.txt b/db/SCOMP.lpc.txt index 1ac8037..4bae0fe 100644 --- a/db/SCOMP.lpc.txt +++ b/db/SCOMP.lpc.txt @@ -24,6 +24,6 @@ ; inst3 ; 12 ; 1 ; 0 ; 1 ; 12 ; 1 ; 1 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; inst1|altpll_component|auto_generated ; 3 ; 0 ; 0 ; 0 ; 6 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; inst1 ; 2 ; 0 ; 0 ; 0 ; 2 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; inst5 ; 1 ; 3 ; 0 ; 3 ; 6 ; 3 ; 3 ; 3 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; inst14 ; 19 ; 0 ; 11 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; inst5 ; 1 ; 4 ; 0 ; 4 ; 7 ; 4 ; 4 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; inst14 ; 19 ; 0 ; 9 ; 0 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +------------------------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+ diff --git a/db/SCOMP.map.bpm b/db/SCOMP.map.bpm index 6307c2a..d68abdf 100644 Binary files a/db/SCOMP.map.bpm and b/db/SCOMP.map.bpm differ diff --git a/db/SCOMP.map.cdb b/db/SCOMP.map.cdb index 43394b1..3143bef 100644 Binary files a/db/SCOMP.map.cdb and b/db/SCOMP.map.cdb differ diff --git a/db/SCOMP.map.hdb b/db/SCOMP.map.hdb index f98a673..0f24166 100644 Binary files a/db/SCOMP.map.hdb and b/db/SCOMP.map.hdb differ diff --git a/db/SCOMP.map.kpt b/db/SCOMP.map.kpt index 708a166..2a63091 100644 Binary files a/db/SCOMP.map.kpt and b/db/SCOMP.map.kpt differ diff --git a/db/SCOMP.map.qmsg b/db/SCOMP.map.qmsg index 83726f6..13acaaf 100644 --- a/db/SCOMP.map.qmsg +++ b/db/SCOMP.map.qmsg @@ -1,65 +1,66 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1617762298349 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1617762298366 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 06 22:24:58 2021 " "Processing started: Tue Apr 06 22:24:58 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1617762298366 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762298366 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP " "Command: quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762298366 ""} -{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1617762299606 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_interface.bdf 1 1 " "Found 1 design units, including 1 entities, in source file i2c_interface.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 I2C_INTERFACE " "Found entity 1: I2C_INTERFACE" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762322410 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762322410 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_master.vhd 2 1 " "Found 2 design units, including 1 entities, in source file i2c_master.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 i2c_master-logic " "Found design unit 1: i2c_master-logic" { } { { "i2c_master.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd" 49 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323623 ""} { "Info" "ISGN_ENTITY_NAME" "1 i2c_master " "Found entity 1: i2c_master" { } { { "i2c_master.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd" 31 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323623 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323623 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_ctrl.vhd 2 1 " "Found 2 design units, including 1 entities, in source file i2c_ctrl.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 i2c_ctrl-main " "Found design unit 1: i2c_ctrl-main" { } { { "i2c_ctrl.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd" 32 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323629 ""} { "Info" "ISGN_ENTITY_NAME" "1 i2c_ctrl " "Found entity 1: i2c_ctrl" { } { { "i2c_ctrl.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd" 11 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323629 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323629 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hex_disp.vhd 2 1 " "Found 2 design units, including 1 entities, in source file hex_disp.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HEX_DISP-a " "Found design unit 1: HEX_DISP-a" { } { { "HEX_DISP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP.vhd" 17 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323634 ""} { "Info" "ISGN_ENTITY_NAME" "1 HEX_DISP " "Found entity 1: HEX_DISP" { } { { "HEX_DISP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP.vhd" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323634 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323634 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dig_out.vhd 2 1 " "Found 2 design units, including 1 entities, in source file dig_out.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIG_OUT-a " "Found design unit 1: DIG_OUT-a" { } { { "DIG_OUT.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_OUT.vhd" 26 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323640 ""} { "Info" "ISGN_ENTITY_NAME" "1 DIG_OUT " "Found entity 1: DIG_OUT" { } { { "DIG_OUT.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_OUT.vhd" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323640 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323640 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dig_in.vhd 2 1 " "Found 2 design units, including 1 entities, in source file dig_in.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIG_IN-a " "Found design unit 1: DIG_IN-a" { } { { "DIG_IN.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_IN.vhd" 18 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323645 ""} { "Info" "ISGN_ENTITY_NAME" "1 DIG_IN " "Found entity 1: DIG_IN" { } { { "DIG_IN.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_IN.vhd" 10 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323645 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323645 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clk_div.vhd 2 1 " "Found 2 design units, including 1 entities, in source file clk_div.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clk_div-a " "Found design unit 1: clk_div-a" { } { { "clk_div.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd" 21 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323651 ""} { "Info" "ISGN_ENTITY_NAME" "1 clk_div " "Found entity 1: clk_div" { } { { "clk_div.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd" 6 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323651 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323651 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file timer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 TIMER-a " "Found design unit 1: TIMER-a" { } { { "TIMER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd" 27 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323657 ""} { "Info" "ISGN_ENTITY_NAME" "1 TIMER " "Found entity 1: TIMER" { } { { "TIMER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd" 17 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323657 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323657 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "io_decoder.vhd 2 1 " "Found 2 design units, including 1 entities, in source file io_decoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 IO_DECODER-a " "Found design unit 1: IO_DECODER-a" { } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 31 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323663 ""} { "Info" "ISGN_ENTITY_NAME" "1 IO_DECODER " "Found entity 1: IO_DECODER" { } { { "IO_DECODER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323663 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323663 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "scomp.vhd 2 1 " "Found 2 design units, including 1 entities, in source file scomp.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 SCOMP-a " "Found design unit 1: SCOMP-a" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 33 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323670 ""} { "Info" "ISGN_ENTITY_NAME" "1 SCOMP " "Found entity 1: SCOMP" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323670 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323670 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "scomp_system.bdf 1 1 " "Found 1 design units, including 1 entities, in source file scomp_system.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 SCOMP_System " "Found entity 1: SCOMP_System" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323674 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323674 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pll_main.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pll_main.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pll_main-SYN " "Found design unit 1: pll_main-SYN" { } { { "PLL_main.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd" 54 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323682 ""} { "Info" "ISGN_ENTITY_NAME" "1 PLL_main " "Found entity 1: PLL_main" { } { { "PLL_main.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd" 43 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323682 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323682 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hex_disp_6.bdf 1 1 " "Found 1 design units, including 1 entities, in source file hex_disp_6.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 HEX_DISP_6 " "Found entity 1: HEX_DISP_6" { } { { "HEX_DISP_6.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP_6.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323685 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323685 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "incrementer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file incrementer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Incrementer-a " "Found design unit 1: Incrementer-a" { } { { "Incrementer.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/Incrementer.vhd" 27 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323692 ""} { "Info" "ISGN_ENTITY_NAME" "1 Incrementer " "Found entity 1: Incrementer" { } { { "Incrementer.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/Incrementer.vhd" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323692 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323692 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "quadraturedecoder.vhd 2 1 " "Found 2 design units, including 1 entities, in source file quadraturedecoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 QuadratureDecoder-a " "Found design unit 1: QuadratureDecoder-a" { } { { "QuadratureDecoder.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/QuadratureDecoder.vhd" 28 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323697 ""} { "Info" "ISGN_ENTITY_NAME" "1 QuadratureDecoder " "Found entity 1: QuadratureDecoder" { } { { "QuadratureDecoder.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/QuadratureDecoder.vhd" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323697 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323697 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pwmgenerator.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pwmgenerator.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 PWM_GEN-a " "Found design unit 1: PWM_GEN-a" { } { { "PWMGenerator.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PWMGenerator.vhd" 24 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323703 ""} { "Info" "ISGN_ENTITY_NAME" "1 PWM_GEN " "Found entity 1: PWM_GEN" { } { { "PWMGenerator.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PWMGenerator.vhd" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762323703 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762323703 ""} -{ "Warning" "WSGN_FILE_IS_MISSING" "output_files/PositionControl.vhd " "Can't analyze file -- file output_files/PositionControl.vhd is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1617762323712 ""} -{ "Info" "ISGN_START_ELABORATION_TOP" "SCOMP_System " "Elaborating entity \"SCOMP_System\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1617762324547 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PWM_GEN PWM_GEN:inst14 " "Elaborating entity \"PWM_GEN\" for hierarchy \"PWM_GEN:inst14\"" { } { { "SCOMP_System.bdf" "inst14" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 864 864 1088 976 "inst14" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324589 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clk_div clk_div:inst5 " "Elaborating entity \"clk_div\" for hierarchy \"clk_div:inst5\"" { } { { "SCOMP_System.bdf" "inst5" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 32 792 1000 176 "inst5" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324593 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_main PLL_main:inst1 " "Elaborating entity \"PLL_main\" for hierarchy \"PLL_main:inst1\"" { } { { "SCOMP_System.bdf" "inst1" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 16 312 576 168 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324615 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll PLL_main:inst1\|altpll:altpll_component " "Elaborating entity \"altpll\" for hierarchy \"PLL_main:inst1\|altpll:altpll_component\"" { } { { "PLL_main.vhd" "altpll_component" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324718 ""} -{ "Info" "ISGN_ELABORATION_HEADER" "PLL_main:inst1\|altpll:altpll_component " "Elaborated megafunction instantiation \"PLL_main:inst1\|altpll:altpll_component\"" { } { { "PLL_main.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324721 ""} -{ "Info" "ISGN_MEGAFN_PARAM_TOP" "PLL_main:inst1\|altpll:altpll_component " "Instantiated megafunction \"PLL_main:inst1\|altpll:altpll_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "bandwidth_type AUTO " "Parameter \"bandwidth_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_divide_by 5 " "Parameter \"clk0_divide_by\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_duty_cycle 50 " "Parameter \"clk0_duty_cycle\" = \"50\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_multiply_by 1 " "Parameter \"clk0_multiply_by\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_phase_shift 0 " "Parameter \"clk0_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "compensate_clock CLK0 " "Parameter \"compensate_clock\" = \"CLK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "inclk0_input_frequency 20000 " "Parameter \"inclk0_input_frequency\" = \"20000\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family MAX 10 " "Parameter \"intended_device_family\" = \"MAX 10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint CBX_MODULE_PREFIX=PLL_main " "Parameter \"lpm_hint\" = \"CBX_MODULE_PREFIX=PLL_main\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altpll " "Parameter \"lpm_type\" = \"altpll\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode NORMAL " "Parameter \"operation_mode\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "pll_type AUTO " "Parameter \"pll_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_activeclock PORT_UNUSED " "Parameter \"port_activeclock\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_areset PORT_USED " "Parameter \"port_areset\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad0 PORT_UNUSED " "Parameter \"port_clkbad0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad1 PORT_UNUSED " "Parameter \"port_clkbad1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkloss PORT_UNUSED " "Parameter \"port_clkloss\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkswitch PORT_UNUSED " "Parameter \"port_clkswitch\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_configupdate PORT_UNUSED " "Parameter \"port_configupdate\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_fbin PORT_UNUSED " "Parameter \"port_fbin\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk0 PORT_USED " "Parameter \"port_inclk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk1 PORT_UNUSED " "Parameter \"port_inclk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_locked PORT_USED " "Parameter \"port_locked\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pfdena PORT_UNUSED " "Parameter \"port_pfdena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasecounterselect PORT_UNUSED " "Parameter \"port_phasecounterselect\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasedone PORT_UNUSED " "Parameter \"port_phasedone\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasestep PORT_UNUSED " "Parameter \"port_phasestep\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phaseupdown PORT_UNUSED " "Parameter \"port_phaseupdown\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pllena PORT_UNUSED " "Parameter \"port_pllena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanaclr PORT_UNUSED " "Parameter \"port_scanaclr\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclk PORT_UNUSED " "Parameter \"port_scanclk\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclkena PORT_UNUSED " "Parameter \"port_scanclkena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandata PORT_UNUSED " "Parameter \"port_scandata\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandataout PORT_UNUSED " "Parameter \"port_scandataout\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandone PORT_UNUSED " "Parameter \"port_scandone\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanread PORT_UNUSED " "Parameter \"port_scanread\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanwrite PORT_UNUSED " "Parameter \"port_scanwrite\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk0 PORT_USED " "Parameter \"port_clk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk1 PORT_UNUSED " "Parameter \"port_clk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk2 PORT_UNUSED " "Parameter \"port_clk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk3 PORT_UNUSED " "Parameter \"port_clk3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk4 PORT_UNUSED " "Parameter \"port_clk4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk5 PORT_UNUSED " "Parameter \"port_clk5\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena0 PORT_UNUSED " "Parameter \"port_clkena0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena1 PORT_UNUSED " "Parameter \"port_clkena1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena2 PORT_UNUSED " "Parameter \"port_clkena2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena3 PORT_UNUSED " "Parameter \"port_clkena3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena4 PORT_UNUSED " "Parameter \"port_clkena4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena5 PORT_UNUSED " "Parameter \"port_clkena5\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk0 PORT_UNUSED " "Parameter \"port_extclk0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk1 PORT_UNUSED " "Parameter \"port_extclk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk2 PORT_UNUSED " "Parameter \"port_extclk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk3 PORT_UNUSED " "Parameter \"port_extclk3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "self_reset_on_loss_lock OFF " "Parameter \"self_reset_on_loss_lock\" = \"OFF\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_clock 5 " "Parameter \"width_clock\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762324722 ""} } { { "PLL_main.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1617762324722 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/pll_main_altpll.v 1 1 " "Found 1 design units, including 1 entities, in source file db/pll_main_altpll.v" { { "Info" "ISGN_ENTITY_NAME" "1 PLL_main_altpll " "Found entity 1: PLL_main_altpll" { } { { "db/pll_main_altpll.v" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v" 31 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762324846 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762324846 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_main_altpll PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated " "Elaborating entity \"PLL_main_altpll\" for hierarchy \"PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\"" { } { { "altpll.tdf" "auto_generated" { Text "c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altpll.tdf" 898 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324847 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "IO_DECODER IO_DECODER:inst3 " "Elaborating entity \"IO_DECODER\" for hierarchy \"IO_DECODER:inst3\"" { } { { "SCOMP_System.bdf" "inst3" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 256 856 1096 496 "inst3" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324855 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SCOMP SCOMP:inst " "Elaborating entity \"SCOMP\" for hierarchy \"SCOMP:inst\"" { } { { "SCOMP_System.bdf" "inst" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 256 96 288 464 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762324891 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram SCOMP:inst\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"SCOMP:inst\|altsyncram:altsyncram_component\"" { } { { "SCOMP.vhd" "altsyncram_component" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325004 ""} -{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"SCOMP:inst\|altsyncram:altsyncram_component\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325043 ""} -{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|altsyncram:altsyncram_component " "Instantiated megafunction \"SCOMP:inst\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a UNUSED " "Parameter \"address_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_b NONE " "Parameter \"address_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_reg_b CLOCK1 " "Parameter \"address_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byte_size 8 " "Parameter \"byte_size\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_a UNUSED " "Parameter \"byteena_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_b NONE " "Parameter \"byteena_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_reg_b CLOCK1 " "Parameter \"byteena_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_a USE_INPUT_CLKEN " "Parameter \"clock_enable_core_a\" = \"USE_INPUT_CLKEN\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_b USE_INPUT_CLKEN " "Parameter \"clock_enable_core_b\" = \"USE_INPUT_CLKEN\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_b NORMAL " "Parameter \"clock_enable_input_b\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_b NORMAL " "Parameter \"clock_enable_output_b\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family MAX 10 " "Parameter \"intended_device_family\" = \"MAX 10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ecc_pipeline_stage_enabled FALSE " "Parameter \"ecc_pipeline_stage_enabled\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "enable_ecc FALSE " "Parameter \"enable_ecc\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "implement_in_les OFF " "Parameter \"implement_in_les\" = \"OFF\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_a UNUSED " "Parameter \"indata_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_b NONE " "Parameter \"indata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg_b CLOCK1 " "Parameter \"indata_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file VelocityControl.mif " "Parameter \"init_file\" = \"VelocityControl.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file_layout PORT_A " "Parameter \"init_file_layout\" = \"PORT_A\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "maximum_depth 0 " "Parameter \"maximum_depth\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 2048 " "Parameter \"numwords_a\" = \"2048\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_b 0 " "Parameter \"numwords_b\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode SINGLE_PORT " "Parameter \"operation_mode\" = \"SINGLE_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_b NONE " "Parameter \"outdata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a UNREGISTERED " "Parameter \"outdata_reg_a\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_b UNREGISTERED " "Parameter \"outdata_reg_b\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ram_block_type AUTO " "Parameter \"ram_block_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr_b NONE " "Parameter \"rdcontrol_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg_b CLOCK1 " "Parameter \"rdcontrol_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_mixed_ports DONT_CARE " "Parameter \"read_during_write_mode_mixed_ports\" = \"DONT_CARE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_a NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_a\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_b NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_b\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "stratixiv_m144k_allow_dual_clocks ON " "Parameter \"stratixiv_m144k_allow_dual_clocks\" = \"ON\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 16 " "Parameter \"width_a\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_b 1 " "Parameter \"width_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_b 1 " "Parameter \"width_byteena_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_eccstatus 3 " "Parameter \"width_eccstatus\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 11 " "Parameter \"widthad_a\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_b 1 " "Parameter \"widthad_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_a UNUSED " "Parameter \"wrcontrol_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_b NONE " "Parameter \"wrcontrol_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_wraddress_reg_b CLOCK1 " "Parameter \"wrcontrol_wraddress_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325044 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1617762325044 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_efs3.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_efs3.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_efs3 " "Found entity 1: altsyncram_efs3" { } { { "db/altsyncram_efs3.tdf" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/altsyncram_efs3.tdf" 28 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762325166 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762325166 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_efs3 SCOMP:inst\|altsyncram:altsyncram_component\|altsyncram_efs3:auto_generated " "Elaborating entity \"altsyncram_efs3\" for hierarchy \"SCOMP:inst\|altsyncram:altsyncram_component\|altsyncram_efs3:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325167 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_CLSHIFT SCOMP:inst\|LPM_CLSHIFT:shifter " "Elaborating entity \"LPM_CLSHIFT\" for hierarchy \"SCOMP:inst\|LPM_CLSHIFT:shifter\"" { } { { "SCOMP.vhd" "shifter" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325225 ""} -{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|LPM_CLSHIFT:shifter " "Elaborated megafunction instantiation \"SCOMP:inst\|LPM_CLSHIFT:shifter\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325226 ""} -{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|LPM_CLSHIFT:shifter " "Instantiated megafunction \"SCOMP:inst\|LPM_CLSHIFT:shifter\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Parameter \"LPM_WIDTH\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325227 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHDIST 4 " "Parameter \"LPM_WIDTHDIST\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325227 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_SHIFTTYPE arithmetic " "Parameter \"LPM_SHIFTTYPE\" = \"arithmetic\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325227 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_CLSHIFT " "Parameter \"LPM_TYPE\" = \"LPM_CLSHIFT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325227 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT UNUSED " "Parameter \"LPM_HINT\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325227 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1617762325227 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_clshift_fuc.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_clshift_fuc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_clshift_fuc " "Found entity 1: lpm_clshift_fuc" { } { { "db/lpm_clshift_fuc.tdf" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/lpm_clshift_fuc.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1617762325263 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762325263 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_clshift_fuc SCOMP:inst\|LPM_CLSHIFT:shifter\|lpm_clshift_fuc:auto_generated " "Elaborating entity \"lpm_clshift_fuc\" for hierarchy \"SCOMP:inst\|LPM_CLSHIFT:shifter\|lpm_clshift_fuc:auto_generated\"" { } { { "lpm_clshift.tdf" "auto_generated" { Text "c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_clshift.tdf" 54 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325264 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_BUSTRI SCOMP:inst\|LPM_BUSTRI:io_bus " "Elaborating entity \"LPM_BUSTRI\" for hierarchy \"SCOMP:inst\|LPM_BUSTRI:io_bus\"" { } { { "SCOMP.vhd" "io_bus" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325315 ""} -{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|LPM_BUSTRI:io_bus " "Elaborated megafunction instantiation \"SCOMP:inst\|LPM_BUSTRI:io_bus\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325317 ""} -{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|LPM_BUSTRI:io_bus " "Instantiated megafunction \"SCOMP:inst\|LPM_BUSTRI:io_bus\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Parameter \"LPM_WIDTH\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325317 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_BUSTRI " "Parameter \"LPM_TYPE\" = \"LPM_BUSTRI\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325317 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT UNUSED " "Parameter \"LPM_HINT\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1617762325317 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1617762325317 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "TIMER TIMER:inst4 " "Elaborating entity \"TIMER\" for hierarchy \"TIMER:inst4\"" { } { { "SCOMP_System.bdf" "inst4" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 528 312 528 640 "inst4" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325319 ""} -{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "IO_COUNT TIMER.vhd(59) " "VHDL Process Statement warning at TIMER.vhd(59): inferring latch(es) for signal or variable \"IO_COUNT\", which holds its previous value in one or more paths through the process" { } { { "TIMER.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd" 59 0 0 } } } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "Analysis & Synthesis" 0 -1 1617762325321 "|SCOMP_System|TIMER:inst4"} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DIG_IN DIG_IN:inst7 " "Elaborating entity \"DIG_IN\" for hierarchy \"DIG_IN:inst7\"" { } { { "SCOMP_System.bdf" "inst7" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 680 312 512 760 "inst7" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325326 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "I2C_INTERFACE I2C_INTERFACE:inst13 " "Elaborating entity \"I2C_INTERFACE\" for hierarchy \"I2C_INTERFACE:inst13\"" { } { { "SCOMP_System.bdf" "inst13" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 832 256 464 992 "inst13" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325332 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_master I2C_INTERFACE:inst13\|i2c_master:inst " "Elaborating entity \"i2c_master\" for hierarchy \"I2C_INTERFACE:inst13\|i2c_master:inst\"" { } { { "I2C_INTERFACE.bdf" "inst" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 120 552 728 280 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325335 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_ctrl I2C_INTERFACE:inst13\|i2c_ctrl:inst14 " "Elaborating entity \"i2c_ctrl\" for hierarchy \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\"" { } { { "I2C_INTERFACE.bdf" "inst14" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { -72 536 744 120 "inst14" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325340 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Incrementer Incrementer:inst10 " "Elaborating entity \"Incrementer\" for hierarchy \"Incrementer:inst10\"" { } { { "SCOMP_System.bdf" "inst10" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 336 488 704 480 "inst10" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325344 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "QuadratureDecoder QuadratureDecoder:inst11 " "Elaborating entity \"QuadratureDecoder\" for hierarchy \"QuadratureDecoder:inst11\"" { } { { "SCOMP_System.bdf" "inst11" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 320 1544 1760 464 "inst11" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325350 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "HEX_DISP_6 HEX_DISP_6:inst9 " "Elaborating entity \"HEX_DISP_6\" for hierarchy \"HEX_DISP_6:inst9\"" { } { { "SCOMP_System.bdf" "inst9" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 672 768 1008 800 "inst9" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325358 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "HEX_DISP HEX_DISP_6:inst9\|HEX_DISP:inst1 " "Elaborating entity \"HEX_DISP\" for hierarchy \"HEX_DISP_6:inst9\|HEX_DISP:inst1\"" { } { { "HEX_DISP_6.bdf" "inst1" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP_6.bdf" { { 64 536 752 176 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325360 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DIG_OUT DIG_OUT:inst6 " "Elaborating entity \"DIG_OUT\" for hierarchy \"DIG_OUT:inst6\"" { } { { "SCOMP_System.bdf" "inst6" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 528 792 1016 640 "inst6" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762325366 ""} -{ "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR_HDR" "" "Tri-state node(s) do not directly drive top-level pin(s)" { { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[0\] PWM_GEN:inst14\|COMPARE\[0\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[0\]\" to the node \"PWM_GEN:inst14\|COMPARE\[0\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[1\] PWM_GEN:inst14\|COMPARE\[1\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[1\]\" to the node \"PWM_GEN:inst14\|COMPARE\[1\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[2\] PWM_GEN:inst14\|COMPARE\[2\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[2\]\" to the node \"PWM_GEN:inst14\|COMPARE\[2\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[3\] PWM_GEN:inst14\|COMPARE\[3\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[3\]\" to the node \"PWM_GEN:inst14\|COMPARE\[3\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[4\] PWM_GEN:inst14\|COMPARE\[4\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[4\]\" to the node \"PWM_GEN:inst14\|COMPARE\[4\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[5\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[5\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[5\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[5\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[6\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[6\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[6\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[6\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[7\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[7\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[7\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[7\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[8\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[8\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[8\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[8\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[9\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[9\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[9\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[9\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[10\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[10\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[10\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[10\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[11\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[11\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[11\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[11\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[12\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[12\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[12\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[12\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[13\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[13\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[13\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[13\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328679 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[14\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[14\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[14\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[14\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328680 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[15\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[15\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[15\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[15\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1617762328680 ""} } { } 0 13046 "Tri-state node(s) do not directly drive top-level pin(s)" 0 0 "Analysis & Synthesis" 0 -1 1617762328679 ""} -{ "Info" "IMLS_MLS_PRESET_POWER_UP" "" "Registers with preset signals will power-up high" { } { { "i2c_master.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd" 57 -1 0 } } { "i2c_master.vhd" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd" 111 -1 0 } } } 0 13000 "Registers with preset signals will power-up high" 0 0 "Analysis & Synthesis" 0 -1 1617762328695 ""} -{ "Info" "IMLS_MLS_DEV_CLRN_SETS_REGISTERS" "" "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" { } { } 0 13003 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "Analysis & Synthesis" 0 -1 1617762328695 ""} -{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "GSENSOR_CS_n VCC " "Pin \"GSENSOR_CS_n\" is stuck at VCC" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 944 520 696 960 "GSENSOR_CS_n" "" } } } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1617762329887 "|SCOMP_System|GSENSOR_CS_n"} { "Warning" "WMLS_MLS_STUCK_PIN" "GSENSOR_SDO VCC " "Pin \"GSENSOR_SDO\" is stuck at VCC" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf" { { 968 520 696 984 "GSENSOR_SDO" "" } } } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1617762329887 "|SCOMP_System|GSENSOR_SDO"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1617762329887 ""} -{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1617762330203 ""} -{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "2 " "2 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1617762332744 ""} -{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "1 0 1 0 0 " "Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1617762333337 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1617762333337 ""} -{ "Info" "ICUT_CUT_TM_SUMMARY" "1184 " "Implemented 1184 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1617762333707 ""} { "Info" "ICUT_CUT_TM_OPINS" "58 " "Implemented 58 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1617762333707 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "2 " "Implemented 2 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Design Software" 0 -1 1617762333707 ""} { "Info" "ICUT_CUT_TM_LCELLS" "1092 " "Implemented 1092 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1617762333707 ""} { "Info" "ICUT_CUT_TM_RAMS" "16 " "Implemented 16 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1617762333707 ""} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Implemented 1 PLLs" { } { } 0 21065 "Implemented %1!d! PLLs" 0 0 "Design Software" 0 -1 1617762333707 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1617762333707 ""} -{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 22 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 22 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4822 " "Peak virtual memory: 4822 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1617762333764 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Apr 06 22:25:33 2021 " "Processing ended: Tue Apr 06 22:25:33 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1617762333764 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:35 " "Elapsed time: 00:00:35" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1617762333764 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:01:06 " "Total CPU time (on all processors): 00:01:06" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1617762333764 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1617762333764 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1618167552889 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167552898 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:59:12 2021 " "Processing started: Sun Apr 11 14:59:12 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167552898 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167552898 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP " "Command: quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167552898 ""} +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1618167553383 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_interface.bdf 1 1 " "Found 1 design units, including 1 entities, in source file i2c_interface.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 I2C_INTERFACE " "Found entity 1: I2C_INTERFACE" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560204 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560204 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_master.vhd 2 1 " "Found 2 design units, including 1 entities, in source file i2c_master.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 i2c_master-logic " "Found design unit 1: i2c_master-logic" { } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 49 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560561 ""} { "Info" "ISGN_ENTITY_NAME" "1 i2c_master " "Found entity 1: i2c_master" { } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 31 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560561 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560561 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_ctrl.vhd 2 1 " "Found 2 design units, including 1 entities, in source file i2c_ctrl.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 i2c_ctrl-main " "Found design unit 1: i2c_ctrl-main" { } { { "i2c_ctrl.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd" 32 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560561 ""} { "Info" "ISGN_ENTITY_NAME" "1 i2c_ctrl " "Found entity 1: i2c_ctrl" { } { { "i2c_ctrl.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd" 11 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560561 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560561 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hex_disp.vhd 2 1 " "Found 2 design units, including 1 entities, in source file hex_disp.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HEX_DISP-a " "Found design unit 1: HEX_DISP-a" { } { { "HEX_DISP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd" 17 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560565 ""} { "Info" "ISGN_ENTITY_NAME" "1 HEX_DISP " "Found entity 1: HEX_DISP" { } { { "HEX_DISP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560565 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560565 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dig_out.vhd 2 1 " "Found 2 design units, including 1 entities, in source file dig_out.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIG_OUT-a " "Found design unit 1: DIG_OUT-a" { } { { "DIG_OUT.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd" 26 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560567 ""} { "Info" "ISGN_ENTITY_NAME" "1 DIG_OUT " "Found entity 1: DIG_OUT" { } { { "DIG_OUT.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560567 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560567 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dig_in.vhd 2 1 " "Found 2 design units, including 1 entities, in source file dig_in.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIG_IN-a " "Found design unit 1: DIG_IN-a" { } { { "DIG_IN.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd" 18 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560567 ""} { "Info" "ISGN_ENTITY_NAME" "1 DIG_IN " "Found entity 1: DIG_IN" { } { { "DIG_IN.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd" 10 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560567 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560567 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clk_div.vhd 2 1 " "Found 2 design units, including 1 entities, in source file clk_div.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clk_div-a " "Found design unit 1: clk_div-a" { } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 22 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560570 ""} { "Info" "ISGN_ENTITY_NAME" "1 clk_div " "Found entity 1: clk_div" { } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 6 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560570 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560570 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file timer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 TIMER-a " "Found design unit 1: TIMER-a" { } { { "TIMER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd" 27 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560572 ""} { "Info" "ISGN_ENTITY_NAME" "1 TIMER " "Found entity 1: TIMER" { } { { "TIMER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd" 17 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560572 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560572 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "io_decoder.vhd 2 1 " "Found 2 design units, including 1 entities, in source file io_decoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 IO_DECODER-a " "Found design unit 1: IO_DECODER-a" { } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 31 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560573 ""} { "Info" "ISGN_ENTITY_NAME" "1 IO_DECODER " "Found entity 1: IO_DECODER" { } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560573 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560573 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "scomp.vhd 2 1 " "Found 2 design units, including 1 entities, in source file scomp.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 SCOMP-a " "Found design unit 1: SCOMP-a" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 33 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560575 ""} { "Info" "ISGN_ENTITY_NAME" "1 SCOMP " "Found entity 1: SCOMP" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560575 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560575 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "scomp_system.bdf 1 1 " "Found 1 design units, including 1 entities, in source file scomp_system.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 SCOMP_System " "Found entity 1: SCOMP_System" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560577 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560577 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pll_main.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pll_main.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pll_main-SYN " "Found design unit 1: pll_main-SYN" { } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 54 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560578 ""} { "Info" "ISGN_ENTITY_NAME" "1 PLL_main " "Found entity 1: PLL_main" { } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 43 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560578 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560578 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hex_disp_6.bdf 1 1 " "Found 1 design units, including 1 entities, in source file hex_disp_6.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 HEX_DISP_6 " "Found entity 1: HEX_DISP_6" { } { { "HEX_DISP_6.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP_6.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560580 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560580 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "incrementer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file incrementer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Incrementer-a " "Found design unit 1: Incrementer-a" { } { { "Incrementer.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd" 27 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560582 ""} { "Info" "ISGN_ENTITY_NAME" "1 Incrementer " "Found entity 1: Incrementer" { } { { "Incrementer.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560582 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560582 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "quadraturedecoder.vhd 2 1 " "Found 2 design units, including 1 entities, in source file quadraturedecoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 QuadratureDecoder-a " "Found design unit 1: QuadratureDecoder-a" { } { { "QuadratureDecoder.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd" 28 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560583 ""} { "Info" "ISGN_ENTITY_NAME" "1 QuadratureDecoder " "Found entity 1: QuadratureDecoder" { } { { "QuadratureDecoder.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560583 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560583 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pwmgenerator.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pwmgenerator.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 PWM_GEN-a " "Found design unit 1: PWM_GEN-a" { } { { "PWMGenerator.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd" 24 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560585 ""} { "Info" "ISGN_ENTITY_NAME" "1 PWM_GEN " "Found entity 1: PWM_GEN" { } { { "PWMGenerator.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167560585 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167560585 ""} +{ "Warning" "WSGN_FILE_IS_MISSING" "output_files/PositionControl.vhd " "Can't analyze file -- file output_files/PositionControl.vhd is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1618167560586 ""} +{ "Warning" "WSGN_FILE_IS_MISSING" "VelocityControl.vhd " "Can't analyze file -- file VelocityControl.vhd is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1618167560589 ""} +{ "Info" "ISGN_START_ELABORATION_TOP" "SCOMP_System " "Elaborating entity \"SCOMP_System\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1618167560962 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PWM_GEN PWM_GEN:inst14 " "Elaborating entity \"PWM_GEN\" for hierarchy \"PWM_GEN:inst14\"" { } { { "SCOMP_System.bdf" "inst14" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 864 864 1088 976 "inst14" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167560962 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clk_div clk_div:inst5 " "Elaborating entity \"clk_div\" for hierarchy \"clk_div:inst5\"" { } { { "SCOMP_System.bdf" "inst5" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 32 792 1000 208 "inst5" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167560982 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_main PLL_main:inst1 " "Elaborating entity \"PLL_main\" for hierarchy \"PLL_main:inst1\"" { } { { "SCOMP_System.bdf" "inst1" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 16 312 576 168 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167560992 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll PLL_main:inst1\|altpll:altpll_component " "Elaborating entity \"altpll\" for hierarchy \"PLL_main:inst1\|altpll:altpll_component\"" { } { { "PLL_main.vhd" "altpll_component" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561021 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "PLL_main:inst1\|altpll:altpll_component " "Elaborated megafunction instantiation \"PLL_main:inst1\|altpll:altpll_component\"" { } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561021 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "PLL_main:inst1\|altpll:altpll_component " "Instantiated megafunction \"PLL_main:inst1\|altpll:altpll_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "bandwidth_type AUTO " "Parameter \"bandwidth_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_divide_by 5 " "Parameter \"clk0_divide_by\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_duty_cycle 50 " "Parameter \"clk0_duty_cycle\" = \"50\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_multiply_by 1 " "Parameter \"clk0_multiply_by\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_phase_shift 0 " "Parameter \"clk0_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "compensate_clock CLK0 " "Parameter \"compensate_clock\" = \"CLK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "inclk0_input_frequency 20000 " "Parameter \"inclk0_input_frequency\" = \"20000\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family MAX 10 " "Parameter \"intended_device_family\" = \"MAX 10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint CBX_MODULE_PREFIX=PLL_main " "Parameter \"lpm_hint\" = \"CBX_MODULE_PREFIX=PLL_main\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altpll " "Parameter \"lpm_type\" = \"altpll\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode NORMAL " "Parameter \"operation_mode\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "pll_type AUTO " "Parameter \"pll_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_activeclock PORT_UNUSED " "Parameter \"port_activeclock\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_areset PORT_USED " "Parameter \"port_areset\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad0 PORT_UNUSED " "Parameter \"port_clkbad0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad1 PORT_UNUSED " "Parameter \"port_clkbad1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkloss PORT_UNUSED " "Parameter \"port_clkloss\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkswitch PORT_UNUSED " "Parameter \"port_clkswitch\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_configupdate PORT_UNUSED " "Parameter \"port_configupdate\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_fbin PORT_UNUSED " "Parameter \"port_fbin\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk0 PORT_USED " "Parameter \"port_inclk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk1 PORT_UNUSED " "Parameter \"port_inclk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_locked PORT_USED " "Parameter \"port_locked\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pfdena PORT_UNUSED " "Parameter \"port_pfdena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasecounterselect PORT_UNUSED " "Parameter \"port_phasecounterselect\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasedone PORT_UNUSED " "Parameter \"port_phasedone\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasestep PORT_UNUSED " "Parameter \"port_phasestep\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phaseupdown PORT_UNUSED " "Parameter \"port_phaseupdown\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pllena PORT_UNUSED " "Parameter \"port_pllena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanaclr PORT_UNUSED " "Parameter \"port_scanaclr\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclk PORT_UNUSED " "Parameter \"port_scanclk\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclkena PORT_UNUSED " "Parameter \"port_scanclkena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandata PORT_UNUSED " "Parameter \"port_scandata\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandataout PORT_UNUSED " "Parameter \"port_scandataout\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandone PORT_UNUSED " "Parameter \"port_scandone\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanread PORT_UNUSED " "Parameter \"port_scanread\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanwrite PORT_UNUSED " "Parameter \"port_scanwrite\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk0 PORT_USED " "Parameter \"port_clk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk1 PORT_UNUSED " "Parameter \"port_clk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk2 PORT_UNUSED " "Parameter \"port_clk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk3 PORT_UNUSED " "Parameter \"port_clk3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk4 PORT_UNUSED " "Parameter \"port_clk4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk5 PORT_UNUSED " "Parameter \"port_clk5\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena0 PORT_UNUSED " "Parameter \"port_clkena0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena1 PORT_UNUSED " "Parameter \"port_clkena1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena2 PORT_UNUSED " "Parameter \"port_clkena2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena3 PORT_UNUSED " "Parameter \"port_clkena3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena4 PORT_UNUSED " "Parameter \"port_clkena4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena5 PORT_UNUSED " "Parameter \"port_clkena5\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk0 PORT_UNUSED " "Parameter \"port_extclk0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk1 PORT_UNUSED " "Parameter \"port_extclk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk2 PORT_UNUSED " "Parameter \"port_extclk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk3 PORT_UNUSED " "Parameter \"port_extclk3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "self_reset_on_loss_lock OFF " "Parameter \"self_reset_on_loss_lock\" = \"OFF\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_clock 5 " "Parameter \"width_clock\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561028 ""} } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167561028 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/pll_main_altpll.v 1 1 " "Found 1 design units, including 1 entities, in source file db/pll_main_altpll.v" { { "Info" "ISGN_ENTITY_NAME" "1 PLL_main_altpll " "Found entity 1: PLL_main_altpll" { } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 31 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167561068 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167561068 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_main_altpll PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated " "Elaborating entity \"PLL_main_altpll\" for hierarchy \"PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\"" { } { { "altpll.tdf" "auto_generated" { Text "c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altpll.tdf" 898 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561068 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "IO_DECODER IO_DECODER:inst3 " "Elaborating entity \"IO_DECODER\" for hierarchy \"IO_DECODER:inst3\"" { } { { "SCOMP_System.bdf" "inst3" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 256 856 1096 496 "inst3" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561080 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SCOMP SCOMP:inst " "Elaborating entity \"SCOMP\" for hierarchy \"SCOMP:inst\"" { } { { "SCOMP_System.bdf" "inst" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 256 96 288 464 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561080 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram SCOMP:inst\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"SCOMP:inst\|altsyncram:altsyncram_component\"" { } { { "SCOMP.vhd" "altsyncram_component" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561117 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"SCOMP:inst\|altsyncram:altsyncram_component\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561133 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|altsyncram:altsyncram_component " "Instantiated megafunction \"SCOMP:inst\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a UNUSED " "Parameter \"address_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_b NONE " "Parameter \"address_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_reg_b CLOCK1 " "Parameter \"address_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byte_size 8 " "Parameter \"byte_size\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_a UNUSED " "Parameter \"byteena_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_b NONE " "Parameter \"byteena_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_reg_b CLOCK1 " "Parameter \"byteena_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_a USE_INPUT_CLKEN " "Parameter \"clock_enable_core_a\" = \"USE_INPUT_CLKEN\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_b USE_INPUT_CLKEN " "Parameter \"clock_enable_core_b\" = \"USE_INPUT_CLKEN\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_b NORMAL " "Parameter \"clock_enable_input_b\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_b NORMAL " "Parameter \"clock_enable_output_b\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family MAX 10 " "Parameter \"intended_device_family\" = \"MAX 10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ecc_pipeline_stage_enabled FALSE " "Parameter \"ecc_pipeline_stage_enabled\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "enable_ecc FALSE " "Parameter \"enable_ecc\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "implement_in_les OFF " "Parameter \"implement_in_les\" = \"OFF\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_a UNUSED " "Parameter \"indata_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_b NONE " "Parameter \"indata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg_b CLOCK1 " "Parameter \"indata_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file VelocityControl.mif " "Parameter \"init_file\" = \"VelocityControl.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file_layout PORT_A " "Parameter \"init_file_layout\" = \"PORT_A\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "maximum_depth 0 " "Parameter \"maximum_depth\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 2048 " "Parameter \"numwords_a\" = \"2048\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_b 0 " "Parameter \"numwords_b\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode SINGLE_PORT " "Parameter \"operation_mode\" = \"SINGLE_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_b NONE " "Parameter \"outdata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a UNREGISTERED " "Parameter \"outdata_reg_a\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_b UNREGISTERED " "Parameter \"outdata_reg_b\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ram_block_type AUTO " "Parameter \"ram_block_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr_b NONE " "Parameter \"rdcontrol_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg_b CLOCK1 " "Parameter \"rdcontrol_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_mixed_ports DONT_CARE " "Parameter \"read_during_write_mode_mixed_ports\" = \"DONT_CARE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_a NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_a\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_b NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_b\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "stratixiv_m144k_allow_dual_clocks ON " "Parameter \"stratixiv_m144k_allow_dual_clocks\" = \"ON\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 16 " "Parameter \"width_a\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_b 1 " "Parameter \"width_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_b 1 " "Parameter \"width_byteena_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_eccstatus 3 " "Parameter \"width_eccstatus\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 11 " "Parameter \"widthad_a\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_b 1 " "Parameter \"widthad_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_a UNUSED " "Parameter \"wrcontrol_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_b NONE " "Parameter \"wrcontrol_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_wraddress_reg_b CLOCK1 " "Parameter \"wrcontrol_wraddress_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561133 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167561133 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_efs3.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_efs3.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_efs3 " "Found entity 1: altsyncram_efs3" { } { { "db/altsyncram_efs3.tdf" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/altsyncram_efs3.tdf" 28 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167561169 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167561169 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_efs3 SCOMP:inst\|altsyncram:altsyncram_component\|altsyncram_efs3:auto_generated " "Elaborating entity \"altsyncram_efs3\" for hierarchy \"SCOMP:inst\|altsyncram:altsyncram_component\|altsyncram_efs3:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561169 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_CLSHIFT SCOMP:inst\|LPM_CLSHIFT:shifter " "Elaborating entity \"LPM_CLSHIFT\" for hierarchy \"SCOMP:inst\|LPM_CLSHIFT:shifter\"" { } { { "SCOMP.vhd" "shifter" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561191 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|LPM_CLSHIFT:shifter " "Elaborated megafunction instantiation \"SCOMP:inst\|LPM_CLSHIFT:shifter\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561191 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|LPM_CLSHIFT:shifter " "Instantiated megafunction \"SCOMP:inst\|LPM_CLSHIFT:shifter\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Parameter \"LPM_WIDTH\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561191 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHDIST 4 " "Parameter \"LPM_WIDTHDIST\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561191 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_SHIFTTYPE arithmetic " "Parameter \"LPM_SHIFTTYPE\" = \"arithmetic\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561191 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_CLSHIFT " "Parameter \"LPM_TYPE\" = \"LPM_CLSHIFT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561191 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT UNUSED " "Parameter \"LPM_HINT\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561191 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167561191 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_clshift_fuc.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_clshift_fuc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_clshift_fuc " "Found entity 1: lpm_clshift_fuc" { } { { "db/lpm_clshift_fuc.tdf" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/lpm_clshift_fuc.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167561211 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167561211 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_clshift_fuc SCOMP:inst\|LPM_CLSHIFT:shifter\|lpm_clshift_fuc:auto_generated " "Elaborating entity \"lpm_clshift_fuc\" for hierarchy \"SCOMP:inst\|LPM_CLSHIFT:shifter\|lpm_clshift_fuc:auto_generated\"" { } { { "lpm_clshift.tdf" "auto_generated" { Text "c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_clshift.tdf" 54 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561212 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_BUSTRI SCOMP:inst\|LPM_BUSTRI:io_bus " "Elaborating entity \"LPM_BUSTRI\" for hierarchy \"SCOMP:inst\|LPM_BUSTRI:io_bus\"" { } { { "SCOMP.vhd" "io_bus" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561228 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|LPM_BUSTRI:io_bus " "Elaborated megafunction instantiation \"SCOMP:inst\|LPM_BUSTRI:io_bus\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561228 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|LPM_BUSTRI:io_bus " "Instantiated megafunction \"SCOMP:inst\|LPM_BUSTRI:io_bus\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Parameter \"LPM_WIDTH\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561228 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_BUSTRI " "Parameter \"LPM_TYPE\" = \"LPM_BUSTRI\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561228 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT UNUSED " "Parameter \"LPM_HINT\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167561228 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167561228 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "TIMER TIMER:inst4 " "Elaborating entity \"TIMER\" for hierarchy \"TIMER:inst4\"" { } { { "SCOMP_System.bdf" "inst4" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 528 312 528 640 "inst4" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561230 ""} +{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "IO_COUNT TIMER.vhd(59) " "VHDL Process Statement warning at TIMER.vhd(59): inferring latch(es) for signal or variable \"IO_COUNT\", which holds its previous value in one or more paths through the process" { } { { "TIMER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd" 59 0 0 } } } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "Analysis & Synthesis" 0 -1 1618167561231 "|SCOMP_System|TIMER:inst4"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DIG_IN DIG_IN:inst7 " "Elaborating entity \"DIG_IN\" for hierarchy \"DIG_IN:inst7\"" { } { { "SCOMP_System.bdf" "inst7" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 680 312 512 760 "inst7" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561232 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "I2C_INTERFACE I2C_INTERFACE:inst13 " "Elaborating entity \"I2C_INTERFACE\" for hierarchy \"I2C_INTERFACE:inst13\"" { } { { "SCOMP_System.bdf" "inst13" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 832 256 464 992 "inst13" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561235 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_master I2C_INTERFACE:inst13\|i2c_master:inst " "Elaborating entity \"i2c_master\" for hierarchy \"I2C_INTERFACE:inst13\|i2c_master:inst\"" { } { { "I2C_INTERFACE.bdf" "inst" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 120 552 728 280 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561235 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_ctrl I2C_INTERFACE:inst13\|i2c_ctrl:inst14 " "Elaborating entity \"i2c_ctrl\" for hierarchy \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\"" { } { { "I2C_INTERFACE.bdf" "inst14" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { -72 536 744 120 "inst14" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561236 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Incrementer Incrementer:inst10 " "Elaborating entity \"Incrementer\" for hierarchy \"Incrementer:inst10\"" { } { { "SCOMP_System.bdf" "inst10" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 336 488 704 480 "inst10" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561238 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "QuadratureDecoder QuadratureDecoder:inst11 " "Elaborating entity \"QuadratureDecoder\" for hierarchy \"QuadratureDecoder:inst11\"" { } { { "SCOMP_System.bdf" "inst11" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 320 1544 1760 464 "inst11" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561240 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "HEX_DISP_6 HEX_DISP_6:inst9 " "Elaborating entity \"HEX_DISP_6\" for hierarchy \"HEX_DISP_6:inst9\"" { } { { "SCOMP_System.bdf" "inst9" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 768 1008 800 "inst9" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561242 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "HEX_DISP HEX_DISP_6:inst9\|HEX_DISP:inst1 " "Elaborating entity \"HEX_DISP\" for hierarchy \"HEX_DISP_6:inst9\|HEX_DISP:inst1\"" { } { { "HEX_DISP_6.bdf" "inst1" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP_6.bdf" { { 64 536 752 176 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561244 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DIG_OUT DIG_OUT:inst6 " "Elaborating entity \"DIG_OUT\" for hierarchy \"DIG_OUT:inst6\"" { } { { "SCOMP_System.bdf" "inst6" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 528 792 1016 640 "inst6" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167561245 ""} +{ "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR_HDR" "" "Tri-state node(s) do not directly drive top-level pin(s)" { { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[0\] PWM_GEN:inst14\|COMPARE\[0\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[0\]\" to the node \"PWM_GEN:inst14\|COMPARE\[0\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[1\] PWM_GEN:inst14\|COMPARE\[1\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[1\]\" to the node \"PWM_GEN:inst14\|COMPARE\[1\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[2\] PWM_GEN:inst14\|COMPARE\[2\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[2\]\" to the node \"PWM_GEN:inst14\|COMPARE\[2\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[3\] PWM_GEN:inst14\|COMPARE\[3\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[3\]\" to the node \"PWM_GEN:inst14\|COMPARE\[3\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[4\] PWM_GEN:inst14\|COMPARE\[4\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[4\]\" to the node \"PWM_GEN:inst14\|COMPARE\[4\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[5\] PWM_GEN:inst14\|COMPARE\[5\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[5\]\" to the node \"PWM_GEN:inst14\|COMPARE\[5\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[6\] PWM_GEN:inst14\|COMPARE\[6\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[6\]\" to the node \"PWM_GEN:inst14\|COMPARE\[6\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[7\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[7\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[7\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[7\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[8\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[8\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[8\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[8\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[9\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[9\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[9\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[9\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[10\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[10\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[10\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[10\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[11\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[11\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[11\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[11\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[12\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[12\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[12\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[12\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[13\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[13\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[13\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[13\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[14\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[14\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[14\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[14\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[15\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[15\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[15\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[15\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167562176 ""} } { } 0 13046 "Tri-state node(s) do not directly drive top-level pin(s)" 0 0 "Analysis & Synthesis" 0 -1 1618167562176 ""} +{ "Info" "IMLS_MLS_PRESET_POWER_UP" "" "Registers with preset signals will power-up high" { } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 57 -1 0 } } { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 111 -1 0 } } } 0 13000 "Registers with preset signals will power-up high" 0 0 "Analysis & Synthesis" 0 -1 1618167562182 ""} +{ "Info" "IMLS_MLS_DEV_CLRN_SETS_REGISTERS" "" "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" { } { } 0 13003 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "Analysis & Synthesis" 0 -1 1618167562182 ""} +{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "GSENSOR_CS_n VCC " "Pin \"GSENSOR_CS_n\" is stuck at VCC" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 944 520 696 960 "GSENSOR_CS_n" "" } } } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1618167562509 "|SCOMP_System|GSENSOR_CS_n"} { "Warning" "WMLS_MLS_STUCK_PIN" "GSENSOR_SDO VCC " "Pin \"GSENSOR_SDO\" is stuck at VCC" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 968 520 696 984 "GSENSOR_SDO" "" } } } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1618167562509 "|SCOMP_System|GSENSOR_SDO"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1618167562509 ""} +{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1618167562602 ""} +{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "2 " "2 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1618167563466 ""} +{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "1 0 1 0 0 " "Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1618167563673 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167563673 ""} +{ "Info" "ICUT_CUT_TM_SUMMARY" "1200 " "Implemented 1200 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1618167563786 ""} { "Info" "ICUT_CUT_TM_OPINS" "58 " "Implemented 58 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1618167563786 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "2 " "Implemented 2 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Design Software" 0 -1 1618167563786 ""} { "Info" "ICUT_CUT_TM_LCELLS" "1108 " "Implemented 1108 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1618167563786 ""} { "Info" "ICUT_CUT_TM_RAMS" "16 " "Implemented 16 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1618167563786 ""} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Implemented 1 PLLs" { } { } 0 21065 "Implemented %1!d! PLLs" 0 0 "Design Software" 0 -1 1618167563786 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1618167563786 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 23 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 23 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4824 " "Peak virtual memory: 4824 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167563805 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:59:23 2021 " "Processing ended: Sun Apr 11 14:59:23 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167563805 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:11 " "Elapsed time: 00:00:11" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167563805 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:21 " "Total CPU time (on all processors): 00:00:21" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167563805 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167563805 ""} diff --git a/db/SCOMP.map.rdb b/db/SCOMP.map.rdb index 69d6107..46a914d 100644 Binary files a/db/SCOMP.map.rdb and b/db/SCOMP.map.rdb differ diff --git a/db/SCOMP.map_bb.cdb b/db/SCOMP.map_bb.cdb index 0670fe9..6658d4e 100644 Binary files a/db/SCOMP.map_bb.cdb and b/db/SCOMP.map_bb.cdb differ diff --git a/db/SCOMP.map_bb.hdb b/db/SCOMP.map_bb.hdb index 8b9a84c..94cc5e3 100644 Binary files a/db/SCOMP.map_bb.hdb and b/db/SCOMP.map_bb.hdb differ diff --git a/db/SCOMP.mif_update.qmsg b/db/SCOMP.mif_update.qmsg index a7807a6..aea40bb 100644 --- a/db/SCOMP.mif_update.qmsg +++ b/db/SCOMP.mif_update.qmsg @@ -1,6 +1,6 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1617766020953 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "MIF/HEX Update Quartus Prime " "Running Quartus Prime MIF/HEX Update" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1617766020969 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 06 23:26:59 2021 " "Processing started: Tue Apr 06 23:26:59 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1617766020969 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Design Software" 0 -1 1617766020969 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_cdb SCOMP -c SCOMP --update_mif " "Command: quartus_cdb SCOMP -c SCOMP --update_mif" { } { } 0 0 "Command: %1!s!" 0 0 "Design Software" 0 -1 1617766020970 ""} -{ "Warning" "WMIO_MIO_MIF_REINITIALIZED_WARNING" "45 2048 45 10 " "45 out of 2048 addresses are reinitialized. The latest initialized data will replace the existing data. There are 45 warnings found, and 10 warnings are reported." { { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "0 " "Memory Initialization File address 0 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 13 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "1 " "Memory Initialization File address 1 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 14 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "2 " "Memory Initialization File address 2 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 15 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "3 " "Memory Initialization File address 3 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 16 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "4 " "Memory Initialization File address 4 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 17 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "5 " "Memory Initialization File address 5 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 18 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "6 " "Memory Initialization File address 6 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 19 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "7 " "Memory Initialization File address 7 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 20 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "8 " "Memory Initialization File address 8 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 21 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "9 " "Memory Initialization File address 9 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 22 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} } { { "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" 1 -1 0 } } } 0 113031 "%1!u! out of %2!d! addresses are reinitialized. The latest initialized data will replace the existing data. There are %3!u! warnings found, and %4!u! warnings are reported." 0 0 "Design Software" 0 -1 1617766021801 ""} -{ "Info" "IQATM_MIFS_PROCESSED" "" "Processed the following Memory Initialization File(s)" { { "Info" "IQATM_PROCESSED_MIF_CONTENT" "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif " "Processed Memory Initialization File C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" { } { { "velocitycontrol.mif" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" 0 0 0 } } } 0 39025 "Processed Memory Initialization File %1!s!" 0 0 "Design Software" 0 -1 1617766021985 ""} } { } 0 39024 "Processed the following Memory Initialization File(s)" 0 0 "Design Software" 0 -1 1617766021985 ""} -{ "Info" "IQEXE_ERROR_COUNT" "MIF/HEX Update 0 s 11 s Quartus Prime " "Quartus Prime MIF/HEX Update was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4726 " "Peak virtual memory: 4726 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1617766022130 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Apr 06 23:27:02 2021 " "Processing ended: Tue Apr 06 23:27:02 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1618167378976 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "MIF/HEX Update Quartus Prime " "Running Quartus Prime MIF/HEX Update" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167378986 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:56:18 2021 " "Processing started: Sun Apr 11 14:56:18 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167378986 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Design Software" 0 -1 1618167378986 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_cdb SCOMP -c SCOMP --update_mif " "Command: quartus_cdb SCOMP -c SCOMP --update_mif" { } { } 0 0 "Command: %1!s!" 0 0 "Design Software" 0 -1 1618167378986 ""} +{ "Warning" "WMIO_MIO_MIF_REINITIALIZED_WARNING" "45 2048 45 10 " "45 out of 2048 addresses are reinitialized. The latest initialized data will replace the existing data. There are 45 warnings found, and 10 warnings are reported." { { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "0 " "Memory Initialization File address 0 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 13 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "1 " "Memory Initialization File address 1 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 14 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "2 " "Memory Initialization File address 2 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 15 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "3 " "Memory Initialization File address 3 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 16 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "4 " "Memory Initialization File address 4 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 17 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "5 " "Memory Initialization File address 5 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 18 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "6 " "Memory Initialization File address 6 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 19 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "7 " "Memory Initialization File address 7 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 20 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "8 " "Memory Initialization File address 8 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 21 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "9 " "Memory Initialization File address 9 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 22 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167379302 ""} } { { "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif" 1 -1 0 } } } 0 113031 "%1!u! out of %2!d! addresses are reinitialized. The latest initialized data will replace the existing data. There are %3!u! warnings found, and %4!u! warnings are reported." 0 0 "Design Software" 0 -1 1618167379302 ""} +{ "Info" "IQATM_MIFS_PROCESSED" "" "Processed the following Memory Initialization File(s)" { { "Info" "IQATM_PROCESSED_MIF_CONTENT" "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif " "Processed Memory Initialization File C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif" { } { { "velocitycontrol.mif" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif" 0 0 0 } } } 0 39025 "Processed Memory Initialization File %1!s!" 0 0 "Design Software" 0 -1 1618167379367 ""} } { } 0 39024 "Processed the following Memory Initialization File(s)" 0 0 "Design Software" 0 -1 1618167379367 ""} +{ "Info" "IQEXE_ERROR_COUNT" "MIF/HEX Update 0 s 11 s Quartus Prime " "Quartus Prime MIF/HEX Update was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4728 " "Peak virtual memory: 4728 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167379399 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:56:19 2021 " "Processing ended: Sun Apr 11 14:56:19 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167379399 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167379399 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167379399 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Design Software" 0 -1 1618167379399 ""} diff --git a/db/SCOMP.pre_map.hdb b/db/SCOMP.pre_map.hdb index ae76904..c71404e 100644 Binary files a/db/SCOMP.pre_map.hdb and b/db/SCOMP.pre_map.hdb differ diff --git a/db/SCOMP.root_partition.map.reg_db.cdb b/db/SCOMP.root_partition.map.reg_db.cdb index 8c5385a..748e5f6 100644 Binary files a/db/SCOMP.root_partition.map.reg_db.cdb and b/db/SCOMP.root_partition.map.reg_db.cdb differ diff --git a/db/SCOMP.routing.rdb b/db/SCOMP.routing.rdb index 89fb89c..88433b3 100644 Binary files a/db/SCOMP.routing.rdb and b/db/SCOMP.routing.rdb differ diff --git a/db/SCOMP.rtlv.hdb b/db/SCOMP.rtlv.hdb index cd23525..1311fb9 100644 Binary files a/db/SCOMP.rtlv.hdb and b/db/SCOMP.rtlv.hdb differ diff --git a/db/SCOMP.rtlv_sg.cdb b/db/SCOMP.rtlv_sg.cdb index e0722a7..4bae606 100644 Binary files a/db/SCOMP.rtlv_sg.cdb and b/db/SCOMP.rtlv_sg.cdb differ diff --git a/db/SCOMP.rtlv_sg_swap.cdb b/db/SCOMP.rtlv_sg_swap.cdb index b5828ef..7c64769 100644 Binary files a/db/SCOMP.rtlv_sg_swap.cdb and b/db/SCOMP.rtlv_sg_swap.cdb differ diff --git a/db/SCOMP.smart_action.txt b/db/SCOMP.smart_action.txt index 11b531f..c8e8a13 100644 --- a/db/SCOMP.smart_action.txt +++ b/db/SCOMP.smart_action.txt @@ -1 +1 @@ -SOURCE +DONE diff --git a/db/SCOMP.sta.qmsg b/db/SCOMP.sta.qmsg index b07d8df..da8475c 100644 --- a/db/SCOMP.sta.qmsg +++ b/db/SCOMP.sta.qmsg @@ -1,47 +1,47 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1617762437355 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1617762437371 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 06 22:27:16 2021 " "Processing started: Tue Apr 06 22:27:16 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1617762437371 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1617762437371 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta SCOMP -c SCOMP " "Command: quartus_sta SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1617762437372 ""} -{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1617762437726 ""} -{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1617762438325 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762438423 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762438424 ""} -{ "Info" "ISTA_SDC_FOUND" "SCOMP.sdc " "Reading SDC File: 'SCOMP.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Timing Analyzer" 0 -1 1617762439159 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "generated clocks \"derive_pll_clocks -create_base_clocks\" " "No user constrained generated clocks found in the design. Calling \"derive_pll_clocks -create_base_clocks\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439169 ""} -{ "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL clocks " "Deriving PLL clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_clock -period 20.000 -waveform \{0.000 10.000\} -name clock_50 clock_50 " "create_clock -period 20.000 -waveform \{0.000 10.000\} -name clock_50 clock_50" { } { } 0 332110 "%1!s!" 0 0 "Design Software" 0 -1 1617762439176 ""} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{inst1\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -duty_cycle 50.00 -name \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} " "create_generated_clock -source \{inst1\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -duty_cycle 50.00 -name \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\}" { } { } 0 332110 "%1!s!" 0 0 "Design Software" 0 -1 1617762439176 ""} } { } 0 332110 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762439176 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439177 ""} -{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_10kHz clk_div:inst5\|clock_10kHz " "create_clock -period 1.000 -name clk_div:inst5\|clock_10kHz clk_div:inst5\|clock_10kHz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1617762439180 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_10Hz clk_div:inst5\|clock_10Hz " "create_clock -period 1.000 -name clk_div:inst5\|clock_10Hz clk_div:inst5\|clock_10Hz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1617762439180 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_100kHz clk_div:inst5\|clock_100kHz " "create_clock -period 1.000 -name clk_div:inst5\|clock_100kHz clk_div:inst5\|clock_100kHz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1617762439180 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name SCOMP:inst\|IO_CYCLE SCOMP:inst\|IO_CYCLE " "create_clock -period 1.000 -name SCOMP:inst\|IO_CYCLE SCOMP:inst\|IO_CYCLE" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1617762439180 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " "create_clock -period 1.000 -name I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1617762439180 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762439180 ""} -{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1617762439224 ""} -{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762439229 ""} -{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1617762439234 ""} -{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Timing Analyzer" 0 0 1617762439266 ""} -{ "Info" "0" "" "Can't run Report Timing Closure Recommendations. The current device family is not supported." { } { } 0 0 "Can't run Report Timing Closure Recommendations. The current device family is not supported." 0 0 "Timing Analyzer" 0 0 1617762439312 ""} -{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1617762439342 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "setup -10.238 " "Worst-case setup slack is -10.238" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -10.238 -135.565 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -10.238 -135.565 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.094 -389.281 SCOMP:inst\|IO_CYCLE " " -7.094 -389.281 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.710 -124.461 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -4.710 -124.461 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.669 -163.643 clk_div:inst5\|clock_100kHz " " -4.669 -163.643 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.272 -6.146 clk_div:inst5\|clock_10kHz " " -3.272 -6.146 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.648 -17.083 clk_div:inst5\|clock_10Hz " " -1.648 -17.083 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439347 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439347 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "hold -1.780 " "Worst-case hold slack is -1.780" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.780 -3.970 SCOMP:inst\|IO_CYCLE " " -1.780 -3.970 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.490 -0.975 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.490 -0.975 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.329 0.000 clk_div:inst5\|clock_10kHz " " 0.329 0.000 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.340 0.000 clk_div:inst5\|clock_100kHz " " 0.340 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.362 0.000 clk_div:inst5\|clock_10Hz " " 0.362 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.411 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.411 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439386 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439386 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.559 " "Worst-case recovery slack is -4.559" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439420 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439420 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.559 -72.944 clk_div:inst5\|clock_10Hz " " -4.559 -72.944 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439420 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.130 0.000 SCOMP:inst\|IO_CYCLE " " 0.130 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439420 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439420 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.149 " "Worst-case removal slack is 0.149" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439437 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439437 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.149 0.000 SCOMP:inst\|IO_CYCLE " " 0.149 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439437 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 3.511 0.000 clk_div:inst5\|clock_10Hz " " 3.511 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439437 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439437 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.403 " "Worst-case minimum pulse width slack is -1.403" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -108.031 SCOMP:inst\|IO_CYCLE " " -1.403 -108.031 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -65.941 clk_div:inst5\|clock_100kHz " " -1.403 -65.941 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -22.448 clk_div:inst5\|clock_10Hz " " -1.403 -22.448 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -8.418 clk_div:inst5\|clock_10kHz " " -1.403 -8.418 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.844 0.000 clock_50 " " 9.844 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.672 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.672 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762439470 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762439470 ""} -{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762439512 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762439512 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762439512 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762439512 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 192.734 ns " "Worst Case Available Settling Time: 192.734 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762439512 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762439512 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762439512 ""} -{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1617762439533 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1617762439596 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1617762442802 ""} -{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762443206 ""} -{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1617762443259 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "setup -9.171 " "Worst-case setup slack is -9.171" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -9.171 -118.778 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -9.171 -118.778 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -6.534 -362.714 SCOMP:inst\|IO_CYCLE " " -6.534 -362.714 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.257 -151.063 clk_div:inst5\|clock_100kHz " " -4.257 -151.063 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.216 -111.980 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -4.216 -111.980 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.978 -5.224 clk_div:inst5\|clock_10kHz " " -2.978 -5.224 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.381 -13.986 clk_div:inst5\|clock_10Hz " " -1.381 -13.986 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443264 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443264 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "hold -1.472 " "Worst-case hold slack is -1.472" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.472 -2.843 SCOMP:inst\|IO_CYCLE " " -1.472 -2.843 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.478 -0.950 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.478 -0.950 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.295 0.000 clk_div:inst5\|clock_10kHz " " 0.295 0.000 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.304 0.000 clk_div:inst5\|clock_100kHz " " 0.304 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.328 0.000 clk_div:inst5\|clock_10Hz " " 0.328 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.342 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.342 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443293 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443293 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.515 " "Worst-case recovery slack is -4.515" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443311 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443311 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.515 -72.240 clk_div:inst5\|clock_10Hz " " -4.515 -72.240 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443311 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.350 0.000 SCOMP:inst\|IO_CYCLE " " 0.350 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443311 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443311 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.029 " "Worst-case removal slack is 0.029" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443322 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443322 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.029 0.000 SCOMP:inst\|IO_CYCLE " " 0.029 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443322 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 3.343 0.000 clk_div:inst5\|clock_10Hz " " 3.343 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443322 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443322 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.403 " "Worst-case minimum pulse width slack is -1.403" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -108.031 SCOMP:inst\|IO_CYCLE " " -1.403 -108.031 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -65.941 clk_div:inst5\|clock_100kHz " " -1.403 -65.941 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -22.448 clk_div:inst5\|clock_10Hz " " -1.403 -22.448 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -8.418 clk_div:inst5\|clock_10kHz " " -1.403 -8.418 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.857 0.000 clock_50 " " 9.857 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.688 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.688 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443342 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443342 ""} -{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443385 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443385 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443385 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443385 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 193.269 ns " "Worst Case Available Settling Time: 193.269 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443385 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443385 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762443385 ""} -{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1617762443396 ""} -{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762443843 ""} -{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1617762443861 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "setup -4.258 " "Worst-case setup slack is -4.258" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.258 -57.599 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -4.258 -57.599 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.809 -155.387 SCOMP:inst\|IO_CYCLE " " -2.809 -155.387 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.430 -32.444 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.430 -32.444 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.371 -41.952 clk_div:inst5\|clock_100kHz " " -1.371 -41.952 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.799 -0.799 clk_div:inst5\|clock_10kHz " " -0.799 -0.799 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.052 -0.058 clk_div:inst5\|clock_10Hz " " -0.052 -0.058 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443867 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443867 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "hold -0.935 " "Worst-case hold slack is -0.935" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.935 -2.855 SCOMP:inst\|IO_CYCLE " " -0.935 -2.855 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.272 -0.541 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.272 -0.541 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.144 0.000 clk_div:inst5\|clock_10kHz " " 0.144 0.000 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.148 0.000 clk_div:inst5\|clock_100kHz " " 0.148 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.156 0.000 clk_div:inst5\|clock_10Hz " " 0.156 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.201 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.201 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443895 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443895 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -1.885 " "Worst-case recovery slack is -1.885" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443908 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443908 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.885 -30.160 clk_div:inst5\|clock_10Hz " " -1.885 -30.160 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443908 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.237 0.000 SCOMP:inst\|IO_CYCLE " " 0.237 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443908 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443908 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.339 " "Worst-case removal slack is 0.339" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443921 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443921 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.339 0.000 SCOMP:inst\|IO_CYCLE " " 0.339 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443921 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 1.320 0.000 clk_div:inst5\|clock_10Hz " " 1.320 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443921 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443921 ""} -{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.000 " "Worst-case minimum pulse width slack is -1.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -77.000 SCOMP:inst\|IO_CYCLE " " -1.000 -77.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -50.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.000 -50.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -47.000 clk_div:inst5\|clock_100kHz " " -1.000 -47.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -16.000 clk_div:inst5\|clock_10Hz " " -1.000 -16.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -6.000 clk_div:inst5\|clock_10kHz " " -1.000 -6.000 clk_div:inst5\|clock_10kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.532 0.000 clock_50 " " 9.532 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.715 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.715 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1617762443940 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1617762443940 ""} -{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443976 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443976 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443976 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443976 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 196.865 ns " "Worst Case Available Settling Time: 196.865 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443976 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1617762443976 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1617762443976 ""} -{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1617762446370 ""} -{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1617762446374 ""} -{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4855 " "Peak virtual memory: 4855 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1617762446559 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Apr 06 22:27:26 2021 " "Processing ended: Tue Apr 06 22:27:26 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1617762446559 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Elapsed time: 00:00:10" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1617762446559 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:12 " "Total CPU time (on all processors): 00:00:12" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1617762446559 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1617762446559 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1618167599106 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167599115 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:59:58 2021 " "Processing started: Sun Apr 11 14:59:58 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167599115 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599115 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta SCOMP -c SCOMP " "Command: quartus_sta SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599115 ""} +{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1618167599251 ""} +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1618167599496 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599536 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599536 ""} +{ "Info" "ISTA_SDC_FOUND" "SCOMP.sdc " "Reading SDC File: 'SCOMP.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Timing Analyzer" 0 -1 1618167599869 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "generated clocks \"derive_pll_clocks -create_base_clocks\" " "No user constrained generated clocks found in the design. Calling \"derive_pll_clocks -create_base_clocks\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599873 ""} +{ "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL clocks " "Deriving PLL clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_clock -period 20.000 -waveform \{0.000 10.000\} -name clock_50 clock_50 " "create_clock -period 20.000 -waveform \{0.000 10.000\} -name clock_50 clock_50" { } { } 0 332110 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{inst1\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -duty_cycle 50.00 -name \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} " "create_generated_clock -source \{inst1\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -duty_cycle 50.00 -name \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\}" { } { } 0 332110 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} } { } 0 332110 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599874 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599874 ""} +{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_25kHz clk_div:inst5\|clock_25kHz " "create_clock -period 1.000 -name clk_div:inst5\|clock_25kHz clk_div:inst5\|clock_25kHz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_10Hz clk_div:inst5\|clock_10Hz " "create_clock -period 1.000 -name clk_div:inst5\|clock_10Hz clk_div:inst5\|clock_10Hz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_100kHz clk_div:inst5\|clock_100kHz " "create_clock -period 1.000 -name clk_div:inst5\|clock_100kHz clk_div:inst5\|clock_100kHz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " "create_clock -period 1.000 -name I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name SCOMP:inst\|IO_CYCLE SCOMP:inst\|IO_CYCLE " "create_clock -period 1.000 -name SCOMP:inst\|IO_CYCLE SCOMP:inst\|IO_CYCLE" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167599874 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599874 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599880 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599880 ""} +{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1618167599886 ""} +{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Timing Analyzer" 0 0 1618167599895 ""} +{ "Info" "0" "" "Can't run Report Timing Closure Recommendations. The current device family is not supported." { } { } 0 0 "Can't run Report Timing Closure Recommendations. The current device family is not supported." 0 0 "Timing Analyzer" 0 0 1618167599907 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1618167599914 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -9.989 " "Worst-case setup slack is -9.989" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -9.989 -142.472 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -9.989 -142.472 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.400 -431.406 SCOMP:inst\|IO_CYCLE " " -7.400 -431.406 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -6.310 -218.144 clk_div:inst5\|clock_100kHz " " -6.310 -218.144 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.091 -97.456 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -4.091 -97.456 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.916 -8.872 clk_div:inst5\|clock_25kHz " " -3.916 -8.872 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.646 -16.621 clk_div:inst5\|clock_10Hz " " -1.646 -16.621 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599917 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599917 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold -1.648 " "Worst-case hold slack is -1.648" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.648 -1.648 SCOMP:inst\|IO_CYCLE " " -1.648 -1.648 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.400 -0.400 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.400 -0.400 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.330 0.000 clk_div:inst5\|clock_25kHz " " 0.330 0.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.340 0.000 clk_div:inst5\|clock_100kHz " " 0.340 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.364 0.000 clk_div:inst5\|clock_10Hz " " 0.364 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.421 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.421 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599927 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599927 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -5.082 " "Worst-case recovery slack is -5.082" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599929 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599929 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -5.082 -80.880 clk_div:inst5\|clock_10Hz " " -5.082 -80.880 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599929 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.648 0.000 SCOMP:inst\|IO_CYCLE " " 0.648 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599929 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599929 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "removal -0.377 " "Worst-case removal slack is -0.377" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.377 -0.377 SCOMP:inst\|IO_CYCLE " " -0.377 -0.377 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599933 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 3.353 0.000 clk_div:inst5\|clock_10Hz " " 3.353 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599933 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599933 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.403 " "Worst-case minimum pulse width slack is -1.403" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -110.837 SCOMP:inst\|IO_CYCLE " " -1.403 -110.837 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -65.941 clk_div:inst5\|clock_100kHz " " -1.403 -65.941 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -22.448 clk_div:inst5\|clock_10Hz " " -1.403 -22.448 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -11.224 clk_div:inst5\|clock_25kHz " " -1.403 -11.224 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.844 0.000 clock_50 " " 9.844 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.672 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.672 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167599935 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167599935 ""} +{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167599951 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167599951 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167599951 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167599951 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 192.500 ns " "Worst Case Available Settling Time: 192.500 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167599951 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167599951 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167599951 ""} +{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1618167599955 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1618167599985 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1618167600851 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167600981 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1618167601002 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -8.990 " "Worst-case setup slack is -8.990" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -8.990 -125.018 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -8.990 -125.018 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -6.939 -402.066 SCOMP:inst\|IO_CYCLE " " -6.939 -402.066 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -5.796 -201.562 clk_div:inst5\|clock_100kHz " " -5.796 -201.562 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.734 -87.535 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -3.734 -87.535 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.571 -7.522 clk_div:inst5\|clock_25kHz " " -3.571 -7.522 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.381 -13.590 clk_div:inst5\|clock_10Hz " " -1.381 -13.590 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601004 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601004 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold -1.598 " "Worst-case hold slack is -1.598" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.598 -1.718 SCOMP:inst\|IO_CYCLE " " -1.598 -1.718 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.407 -0.407 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.407 -0.407 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.296 0.000 clk_div:inst5\|clock_25kHz " " 0.296 0.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.305 0.000 clk_div:inst5\|clock_100kHz " " 0.305 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.328 0.000 clk_div:inst5\|clock_10Hz " " 0.328 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.341 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.341 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601013 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601013 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.502 " "Worst-case recovery slack is -4.502" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601017 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601017 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.502 -71.636 clk_div:inst5\|clock_10Hz " " -4.502 -71.636 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601017 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.847 0.000 SCOMP:inst\|IO_CYCLE " " 0.847 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601017 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601017 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "removal -0.458 " "Worst-case removal slack is -0.458" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601019 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601019 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.458 -0.458 SCOMP:inst\|IO_CYCLE " " -0.458 -0.458 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601019 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 3.258 0.000 clk_div:inst5\|clock_10Hz " " 3.258 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601019 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601019 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.403 " "Worst-case minimum pulse width slack is -1.403" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -110.837 SCOMP:inst\|IO_CYCLE " " -1.403 -110.837 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -65.941 clk_div:inst5\|clock_100kHz " " -1.403 -65.941 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -22.448 clk_div:inst5\|clock_10Hz " " -1.403 -22.448 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -11.224 clk_div:inst5\|clock_25kHz " " -1.403 -11.224 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.857 0.000 clock_50 " " 9.857 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.684 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.684 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601022 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601022 ""} +{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601035 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601035 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601035 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601035 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 192.987 ns " "Worst Case Available Settling Time: 192.987 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601035 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601035 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167601035 ""} +{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1618167601040 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167601215 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1618167601225 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -4.392 " "Worst-case setup slack is -4.392" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.392 -62.461 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -4.392 -62.461 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.204 -176.720 SCOMP:inst\|IO_CYCLE " " -3.204 -176.720 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.994 -63.168 clk_div:inst5\|clock_100kHz " " -1.994 -63.168 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.229 -23.041 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.229 -23.041 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.991 -0.991 clk_div:inst5\|clock_25kHz " " -0.991 -0.991 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.051 -0.056 clk_div:inst5\|clock_10Hz " " -0.051 -0.056 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601228 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601228 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold -0.763 " "Worst-case hold slack is -0.763" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.763 -0.763 SCOMP:inst\|IO_CYCLE " " -0.763 -0.763 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.290 -0.290 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.290 -0.290 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.145 0.000 clk_div:inst5\|clock_25kHz " " 0.145 0.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.148 0.000 clk_div:inst5\|clock_100kHz " " 0.148 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.157 0.000 clk_div:inst5\|clock_10Hz " " 0.157 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.212 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.212 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601237 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601237 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -2.210 " "Worst-case recovery slack is -2.210" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601241 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601241 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.210 -35.177 clk_div:inst5\|clock_10Hz " " -2.210 -35.177 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601241 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.517 0.000 SCOMP:inst\|IO_CYCLE " " 0.517 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601241 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601241 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.075 " "Worst-case removal slack is 0.075" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601243 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601243 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.075 0.000 SCOMP:inst\|IO_CYCLE " " 0.075 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601243 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 1.317 0.000 clk_div:inst5\|clock_10Hz " " 1.317 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601243 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601243 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.000 " "Worst-case minimum pulse width slack is -1.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -79.128 SCOMP:inst\|IO_CYCLE " " -1.000 -79.128 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -50.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.000 -50.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -47.000 clk_div:inst5\|clock_100kHz " " -1.000 -47.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -16.000 clk_div:inst5\|clock_10Hz " " -1.000 -16.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -8.000 clk_div:inst5\|clock_25kHz " " -1.000 -8.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.532 0.000 clock_50 " " 9.532 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.713 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.713 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167601247 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167601247 ""} +{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601258 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601258 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601258 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601258 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 196.760 ns " "Worst Case Available Settling Time: 196.760 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601258 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167601258 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167601258 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1618167602103 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1618167602103 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4868 " "Peak virtual memory: 4868 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167602190 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 15:00:02 2021 " "Processing ended: Sun Apr 11 15:00:02 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167602190 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Elapsed time: 00:00:04" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167602190 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167602190 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1618167602190 ""} diff --git a/db/SCOMP.sta.rdb b/db/SCOMP.sta.rdb index 5076216..116b25d 100644 Binary files a/db/SCOMP.sta.rdb and b/db/SCOMP.sta.rdb differ diff --git a/db/SCOMP.sta_cmp.7_slow_1200mv_85c.tdb b/db/SCOMP.sta_cmp.7_slow_1200mv_85c.tdb index ebfa877..e14336a 100644 Binary files a/db/SCOMP.sta_cmp.7_slow_1200mv_85c.tdb and b/db/SCOMP.sta_cmp.7_slow_1200mv_85c.tdb differ diff --git a/db/SCOMP.tiscmp.fast_1200mv_0c.ddb b/db/SCOMP.tiscmp.fast_1200mv_0c.ddb index aa7ef1d..18c7e6b 100644 Binary files a/db/SCOMP.tiscmp.fast_1200mv_0c.ddb and b/db/SCOMP.tiscmp.fast_1200mv_0c.ddb differ diff --git a/db/SCOMP.tiscmp.fastest_slow_1200mv_0c.ddb b/db/SCOMP.tiscmp.fastest_slow_1200mv_0c.ddb index b9cd833..8740e4b 100644 Binary files a/db/SCOMP.tiscmp.fastest_slow_1200mv_0c.ddb and b/db/SCOMP.tiscmp.fastest_slow_1200mv_0c.ddb differ diff --git a/db/SCOMP.tiscmp.fastest_slow_1200mv_85c.ddb b/db/SCOMP.tiscmp.fastest_slow_1200mv_85c.ddb index 6584542..26e9a61 100644 Binary files a/db/SCOMP.tiscmp.fastest_slow_1200mv_85c.ddb and b/db/SCOMP.tiscmp.fastest_slow_1200mv_85c.ddb differ diff --git a/db/SCOMP.tiscmp.slow_1200mv_0c.ddb b/db/SCOMP.tiscmp.slow_1200mv_0c.ddb index 8f6b636..cae769e 100644 Binary files a/db/SCOMP.tiscmp.slow_1200mv_0c.ddb and b/db/SCOMP.tiscmp.slow_1200mv_0c.ddb differ diff --git a/db/SCOMP.tiscmp.slow_1200mv_85c.ddb b/db/SCOMP.tiscmp.slow_1200mv_85c.ddb index 77b524e..5df6695 100644 Binary files a/db/SCOMP.tiscmp.slow_1200mv_85c.ddb and b/db/SCOMP.tiscmp.slow_1200mv_85c.ddb differ diff --git a/db/SCOMP.tmw_info b/db/SCOMP.tmw_info index f39d2a6..4e13605 100644 --- a/db/SCOMP.tmw_info +++ b/db/SCOMP.tmw_info @@ -1,6 +1,7 @@ -start_analysis_synthesis:s:00:00:38-start_full_compilation +start_full_compilation:s:00:00:52 +start_analysis_synthesis:s:00:00:12-start_full_compilation start_analysis_elaboration:s-start_full_compilation -start_fitter:s:00:01:31-start_full_compilation -start_assembler:s:00:00:10 -start_timing_analyzer:s:00:00:12-start_full_compilation -start_eda_netlist_writer:s:00:00:04-start_full_compilation +start_fitter:s:00:00:30-start_full_compilation +start_assembler:s:00:00:04-start_full_compilation +start_timing_analyzer:s:00:00:04-start_full_compilation +start_eda_netlist_writer:s:00:00:02-start_full_compilation diff --git a/db/SCOMP.vpr.ammdb b/db/SCOMP.vpr.ammdb index 8a3a622..2662e2d 100644 Binary files a/db/SCOMP.vpr.ammdb and b/db/SCOMP.vpr.ammdb differ diff --git a/db/altsyncram_kfs3.tdf b/db/altsyncram_kfs3.tdf new file mode 100644 index 0000000..12547a3 --- /dev/null +++ b/db/altsyncram_kfs3.tdf @@ -0,0 +1,447 @@ +--altsyncram ADDRESS_ACLR_B="NONE" ADDRESS_REG_B="CLOCK1" BYTE_SIZE=8 BYTEENA_ACLR_B="NONE" BYTEENA_REG_B="CLOCK1" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" CLOCK_ENABLE_CORE_A="USE_INPUT_CLKEN" CLOCK_ENABLE_CORE_B="USE_INPUT_CLKEN" CLOCK_ENABLE_INPUT_A="BYPASS" CLOCK_ENABLE_INPUT_B="NORMAL" CLOCK_ENABLE_OUTPUT_A="BYPASS" CLOCK_ENABLE_OUTPUT_B="NORMAL" CYCLONEII_M4K_COMPATIBILITY="ON" DEVICE_FAMILY="MAX 10" ECC_PIPELINE_STAGE_ENABLED="FALSE" ENABLE_ECC="FALSE" ENABLE_RUNTIME_MOD="NO" IMPLEMENT_IN_LES="OFF" INDATA_ACLR_B="NONE" INDATA_REG_B="CLOCK1" INIT_FILE="PositionControl.mif" INIT_FILE_LAYOUT="PORT_A" LOW_POWER_MODE="AUTO" MAXIMUM_DEPTH=0 NUMWORDS_A=2048 NUMWORDS_B=0 OPERATION_MODE="SINGLE_PORT" OUTDATA_ACLR_A="NONE" OUTDATA_ACLR_B="NONE" OUTDATA_REG_A="UNREGISTERED" OUTDATA_REG_B="UNREGISTERED" POWER_UP_UNINITIALIZED="FALSE" RAM_BLOCK_TYPE="AUTO" RDCONTROL_ACLR_B="NONE" RDCONTROL_REG_B="CLOCK1" READ_DURING_WRITE_MODE_MIXED_PORTS="DONT_CARE" read_during_write_mode_port_a="NEW_DATA_NO_NBE_READ" read_during_write_mode_port_b="NEW_DATA_NO_NBE_READ" stratixiv_m144k_allow_dual_clocks="ON" WIDTH_A=16 WIDTH_B=1 WIDTH_BYTEENA_A=1 WIDTH_BYTEENA_B=1 WIDTH_ECCSTATUS=3 WIDTHAD_A=11 WIDTHAD_B=1 WRCONTROL_ACLR_B="NONE" WRCONTROL_WRADDRESS_REG_B="CLOCK1" address_a clock0 data_a q_a wren_a CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 +--VERSION_BEGIN 19.1 cbx_altera_syncram_nd_impl 2019:09:22:11:00:28:SJ cbx_altsyncram 2019:09:22:11:00:28:SJ cbx_cycloneii 2019:09:22:11:00:28:SJ cbx_lpm_add_sub 2019:09:22:11:00:28:SJ cbx_lpm_compare 2019:09:22:11:00:28:SJ cbx_lpm_decode 2019:09:22:11:00:28:SJ cbx_lpm_mux 2019:09:22:11:00:28:SJ cbx_mgl 2019:09:22:11:02:15:SJ cbx_nadder 2019:09:22:11:00:28:SJ cbx_stratix 2019:09:22:11:00:28:SJ cbx_stratixii 2019:09:22:11:00:28:SJ cbx_stratixiii 2019:09:22:11:00:28:SJ cbx_stratixv 2019:09:22:11:00:28:SJ cbx_util_mgl 2019:09:22:11:00:28:SJ VERSION_END + + +-- Copyright (C) 2019 Intel Corporation. All rights reserved. +-- Your use of Intel Corporation's design tools, logic functions +-- and other software and tools, and any partner logic +-- functions, and any output files from any of the foregoing +-- (including device programming or simulation files), and any +-- associated documentation or information are expressly subject +-- to the terms and conditions of the Intel Program License +-- Subscription Agreement, the Intel Quartus Prime License Agreement, +-- the Intel FPGA IP License Agreement, or other applicable license +-- agreement, including, without limitation, that your use is for +-- the sole purpose of programming logic devices manufactured by +-- Intel and sold by Intel or its authorized distributors. Please +-- refer to the applicable agreement for further details, at +-- https://fpgasoftware.intel.com/eula. + + +FUNCTION fiftyfivenm_ram_block (clk0, clk1, clr0, clr1, ena0, ena1, ena2, ena3, portaaddr[PORT_A_ADDRESS_WIDTH-1..0], portaaddrstall, portabyteenamasks[PORT_A_BYTE_ENABLE_MASK_WIDTH-1..0], portadatain[PORT_A_DATA_WIDTH-1..0], portare, portawe, portbaddr[PORT_B_ADDRESS_WIDTH-1..0], portbaddrstall, portbbyteenamasks[PORT_B_BYTE_ENABLE_MASK_WIDTH-1..0], portbdatain[PORT_B_DATA_WIDTH-1..0], portbre, portbwe) +WITH ( CLK0_CORE_CLOCK_ENABLE, CLK0_INPUT_CLOCK_ENABLE, CLK0_OUTPUT_CLOCK_ENABLE, CLK1_CORE_CLOCK_ENABLE, CLK1_INPUT_CLOCK_ENABLE, CLK1_OUTPUT_CLOCK_ENABLE, CONNECTIVITY_CHECKING, DATA_INTERLEAVE_OFFSET_IN_BITS, DATA_INTERLEAVE_WIDTH_IN_BITS, DONT_POWER_OPTIMIZE, INIT_FILE, INIT_FILE_LAYOUT, init_file_restructured, LOGICAL_RAM_NAME, mem_init0, mem_init1, mem_init2, mem_init3, mem_init4, MIXED_PORT_FEED_THROUGH_MODE, OPERATION_MODE, PORT_A_ADDRESS_CLEAR, PORT_A_ADDRESS_WIDTH = 1, PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, PORT_A_BYTE_SIZE, PORT_A_DATA_OUT_CLEAR, PORT_A_DATA_OUT_CLOCK, PORT_A_DATA_WIDTH = 1, PORT_A_FIRST_ADDRESS, PORT_A_FIRST_BIT_NUMBER, PORT_A_LAST_ADDRESS, PORT_A_LOGICAL_RAM_DEPTH, PORT_A_LOGICAL_RAM_WIDTH, PORT_A_READ_DURING_WRITE_MODE, PORT_B_ADDRESS_CLEAR, PORT_B_ADDRESS_CLOCK, PORT_B_ADDRESS_WIDTH = 1, PORT_B_BYTE_ENABLE_CLOCK, PORT_B_BYTE_ENABLE_MASK_WIDTH = 1, PORT_B_BYTE_SIZE, PORT_B_DATA_IN_CLOCK, PORT_B_DATA_OUT_CLEAR, PORT_B_DATA_OUT_CLOCK, PORT_B_DATA_WIDTH = 1, PORT_B_FIRST_ADDRESS, PORT_B_FIRST_BIT_NUMBER, PORT_B_LAST_ADDRESS, PORT_B_LOGICAL_RAM_DEPTH, PORT_B_LOGICAL_RAM_WIDTH, PORT_B_READ_DURING_WRITE_MODE, PORT_B_READ_ENABLE_CLOCK, PORT_B_WRITE_ENABLE_CLOCK, POWER_UP_UNINITIALIZED, RAM_BLOCK_TYPE, SAFE_WRITE, WIDTH_ECCSTATUS) +RETURNS ( portadataout[PORT_A_DATA_WIDTH-1..0], portbdataout[PORT_B_DATA_WIDTH-1..0]); + +--synthesis_resources = M9K 4 +OPTIONS ALTERA_INTERNAL_OPTION = "OPTIMIZE_POWER_DURING_SYNTHESIS=NORMAL_COMPILATION"; + +SUBDESIGN altsyncram_kfs3 +( + address_a[10..0] : input; + clock0 : input; + data_a[15..0] : input; + q_a[15..0] : output; + wren_a : input; +) +VARIABLE + ram_block1a0 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 0, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a1 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 1, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a2 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 2, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a3 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 3, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a4 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 4, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a5 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 5, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a6 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 6, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a7 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 7, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a8 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 8, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a9 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 9, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a10 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 10, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a11 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 11, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a12 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 12, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a13 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 13, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a14 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 14, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + ram_block1a15 : fiftyfivenm_ram_block + WITH ( + CLK0_CORE_CLOCK_ENABLE = "none", + CLK0_INPUT_CLOCK_ENABLE = "none", + CONNECTIVITY_CHECKING = "OFF", + INIT_FILE = "PositionControl.mif", + INIT_FILE_LAYOUT = "port_a", + LOGICAL_RAM_NAME = "ALTSYNCRAM", + OPERATION_MODE = "single_port", + PORT_A_ADDRESS_WIDTH = 11, + PORT_A_BYTE_ENABLE_MASK_WIDTH = 1, + PORT_A_BYTE_SIZE = 1, + PORT_A_DATA_OUT_CLEAR = "none", + PORT_A_DATA_OUT_CLOCK = "none", + PORT_A_DATA_WIDTH = 1, + PORT_A_FIRST_ADDRESS = 0, + PORT_A_FIRST_BIT_NUMBER = 15, + PORT_A_LAST_ADDRESS = 2047, + PORT_A_LOGICAL_RAM_DEPTH = 2048, + PORT_A_LOGICAL_RAM_WIDTH = 16, + PORT_A_READ_DURING_WRITE_MODE = "new_data_no_nbe_read", + POWER_UP_UNINITIALIZED = "false", + RAM_BLOCK_TYPE = "AUTO" + ); + address_a_wire[10..0] : WIRE; + +BEGIN + ram_block1a[15..0].clk0 = clock0; + ram_block1a[15..0].portaaddr[] = ( address_a_wire[10..0]); + ram_block1a[0].portadatain[] = ( data_a[0..0]); + ram_block1a[1].portadatain[] = ( data_a[1..1]); + ram_block1a[2].portadatain[] = ( data_a[2..2]); + ram_block1a[3].portadatain[] = ( data_a[3..3]); + ram_block1a[4].portadatain[] = ( data_a[4..4]); + ram_block1a[5].portadatain[] = ( data_a[5..5]); + ram_block1a[6].portadatain[] = ( data_a[6..6]); + ram_block1a[7].portadatain[] = ( data_a[7..7]); + ram_block1a[8].portadatain[] = ( data_a[8..8]); + ram_block1a[9].portadatain[] = ( data_a[9..9]); + ram_block1a[10].portadatain[] = ( data_a[10..10]); + ram_block1a[11].portadatain[] = ( data_a[11..11]); + ram_block1a[12].portadatain[] = ( data_a[12..12]); + ram_block1a[13].portadatain[] = ( data_a[13..13]); + ram_block1a[14].portadatain[] = ( data_a[14..14]); + ram_block1a[15].portadatain[] = ( data_a[15..15]); + ram_block1a[15..0].portare = B"1111111111111111"; + ram_block1a[15..0].portawe = wren_a; + address_a_wire[] = address_a[]; + q_a[] = ( ram_block1a[15..0].portadataout[0..0]); +END; +--VALID FILE diff --git a/db/prev_cmp_SCOMP.qmsg b/db/prev_cmp_SCOMP.qmsg index a7807a6..ed3d595 100644 --- a/db/prev_cmp_SCOMP.qmsg +++ b/db/prev_cmp_SCOMP.qmsg @@ -1,6 +1,199 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1617766020953 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "MIF/HEX Update Quartus Prime " "Running Quartus Prime MIF/HEX Update" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1617766020969 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 06 23:26:59 2021 " "Processing started: Tue Apr 06 23:26:59 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1617766020969 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Design Software" 0 -1 1617766020969 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_cdb SCOMP -c SCOMP --update_mif " "Command: quartus_cdb SCOMP -c SCOMP --update_mif" { } { } 0 0 "Command: %1!s!" 0 0 "Design Software" 0 -1 1617766020970 ""} -{ "Warning" "WMIO_MIO_MIF_REINITIALIZED_WARNING" "45 2048 45 10 " "45 out of 2048 addresses are reinitialized. The latest initialized data will replace the existing data. There are 45 warnings found, and 10 warnings are reported." { { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "0 " "Memory Initialization File address 0 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 13 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "1 " "Memory Initialization File address 1 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 14 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "2 " "Memory Initialization File address 2 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 15 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "3 " "Memory Initialization File address 3 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 16 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "4 " "Memory Initialization File address 4 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 17 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "5 " "Memory Initialization File address 5 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 18 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "6 " "Memory Initialization File address 6 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 19 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "7 " "Memory Initialization File address 7 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 20 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "8 " "Memory Initialization File address 8 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 21 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "9 " "Memory Initialization File address 9 is reinitialized" { } { { "" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/" 22 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1617766021801 ""} } { { "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" 1 -1 0 } } } 0 113031 "%1!u! out of %2!d! addresses are reinitialized. The latest initialized data will replace the existing data. There are %3!u! warnings found, and %4!u! warnings are reported." 0 0 "Design Software" 0 -1 1617766021801 ""} -{ "Info" "IQATM_MIFS_PROCESSED" "" "Processed the following Memory Initialization File(s)" { { "Info" "IQATM_PROCESSED_MIF_CONTENT" "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif " "Processed Memory Initialization File C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" { } { { "velocitycontrol.mif" "" { Text "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif" 0 0 0 } } } 0 39025 "Processed Memory Initialization File %1!s!" 0 0 "Design Software" 0 -1 1617766021985 ""} } { } 0 39024 "Processed the following Memory Initialization File(s)" 0 0 "Design Software" 0 -1 1617766021985 ""} -{ "Info" "IQEXE_ERROR_COUNT" "MIF/HEX Update 0 s 11 s Quartus Prime " "Quartus Prime MIF/HEX Update was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4726 " "Peak virtual memory: 4726 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1617766022130 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Apr 06 23:27:02 2021 " "Processing ended: Tue Apr 06 23:27:02 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Design Software" 0 -1 1617766022130 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1618167441992 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167442001 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:57:21 2021 " "Processing started: Sun Apr 11 14:57:21 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167442001 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167442001 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP " "Command: quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167442001 ""} +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1618167442458 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_interface.bdf 1 1 " "Found 1 design units, including 1 entities, in source file i2c_interface.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 I2C_INTERFACE " "Found entity 1: I2C_INTERFACE" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449399 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449399 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_master.vhd 2 1 " "Found 2 design units, including 1 entities, in source file i2c_master.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 i2c_master-logic " "Found design unit 1: i2c_master-logic" { } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 49 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449780 ""} { "Info" "ISGN_ENTITY_NAME" "1 i2c_master " "Found entity 1: i2c_master" { } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 31 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449780 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449780 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "i2c_ctrl.vhd 2 1 " "Found 2 design units, including 1 entities, in source file i2c_ctrl.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 i2c_ctrl-main " "Found design unit 1: i2c_ctrl-main" { } { { "i2c_ctrl.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd" 32 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449780 ""} { "Info" "ISGN_ENTITY_NAME" "1 i2c_ctrl " "Found entity 1: i2c_ctrl" { } { { "i2c_ctrl.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd" 11 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449780 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449780 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hex_disp.vhd 2 1 " "Found 2 design units, including 1 entities, in source file hex_disp.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 HEX_DISP-a " "Found design unit 1: HEX_DISP-a" { } { { "HEX_DISP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd" 17 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449787 ""} { "Info" "ISGN_ENTITY_NAME" "1 HEX_DISP " "Found entity 1: HEX_DISP" { } { { "HEX_DISP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449787 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449787 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dig_out.vhd 2 1 " "Found 2 design units, including 1 entities, in source file dig_out.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIG_OUT-a " "Found design unit 1: DIG_OUT-a" { } { { "DIG_OUT.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd" 26 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449788 ""} { "Info" "ISGN_ENTITY_NAME" "1 DIG_OUT " "Found entity 1: DIG_OUT" { } { { "DIG_OUT.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449788 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449788 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dig_in.vhd 2 1 " "Found 2 design units, including 1 entities, in source file dig_in.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DIG_IN-a " "Found design unit 1: DIG_IN-a" { } { { "DIG_IN.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd" 18 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449790 ""} { "Info" "ISGN_ENTITY_NAME" "1 DIG_IN " "Found entity 1: DIG_IN" { } { { "DIG_IN.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd" 10 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449790 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449790 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clk_div.vhd 2 1 " "Found 2 design units, including 1 entities, in source file clk_div.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clk_div-a " "Found design unit 1: clk_div-a" { } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 22 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449791 ""} { "Info" "ISGN_ENTITY_NAME" "1 clk_div " "Found entity 1: clk_div" { } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 6 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449791 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449791 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file timer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 TIMER-a " "Found design unit 1: TIMER-a" { } { { "TIMER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd" 27 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449793 ""} { "Info" "ISGN_ENTITY_NAME" "1 TIMER " "Found entity 1: TIMER" { } { { "TIMER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd" 17 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449793 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449793 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "io_decoder.vhd 2 1 " "Found 2 design units, including 1 entities, in source file io_decoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 IO_DECODER-a " "Found design unit 1: IO_DECODER-a" { } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 31 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449795 ""} { "Info" "ISGN_ENTITY_NAME" "1 IO_DECODER " "Found entity 1: IO_DECODER" { } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449795 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449795 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "scomp.vhd 2 1 " "Found 2 design units, including 1 entities, in source file scomp.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 SCOMP-a " "Found design unit 1: SCOMP-a" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 33 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449797 ""} { "Info" "ISGN_ENTITY_NAME" "1 SCOMP " "Found entity 1: SCOMP" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 16 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449797 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449797 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "scomp_system.bdf 1 1 " "Found 1 design units, including 1 entities, in source file scomp_system.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 SCOMP_System " "Found entity 1: SCOMP_System" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449799 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449799 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pll_main.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pll_main.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pll_main-SYN " "Found design unit 1: pll_main-SYN" { } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 54 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449801 ""} { "Info" "ISGN_ENTITY_NAME" "1 PLL_main " "Found entity 1: PLL_main" { } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 43 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449801 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449801 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hex_disp_6.bdf 1 1 " "Found 1 design units, including 1 entities, in source file hex_disp_6.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 HEX_DISP_6 " "Found entity 1: HEX_DISP_6" { } { { "HEX_DISP_6.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP_6.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449802 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449802 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "incrementer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file incrementer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 Incrementer-a " "Found design unit 1: Incrementer-a" { } { { "Incrementer.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd" 27 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449804 ""} { "Info" "ISGN_ENTITY_NAME" "1 Incrementer " "Found entity 1: Incrementer" { } { { "Incrementer.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449804 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449804 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "quadraturedecoder.vhd 2 1 " "Found 2 design units, including 1 entities, in source file quadraturedecoder.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 QuadratureDecoder-a " "Found design unit 1: QuadratureDecoder-a" { } { { "QuadratureDecoder.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd" 28 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449805 ""} { "Info" "ISGN_ENTITY_NAME" "1 QuadratureDecoder " "Found entity 1: QuadratureDecoder" { } { { "QuadratureDecoder.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd" 13 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449805 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449805 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pwmgenerator.vhd 2 1 " "Found 2 design units, including 1 entities, in source file pwmgenerator.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 PWM_GEN-a " "Found design unit 1: PWM_GEN-a" { } { { "PWMGenerator.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd" 24 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449808 ""} { "Info" "ISGN_ENTITY_NAME" "1 PWM_GEN " "Found entity 1: PWM_GEN" { } { { "PWMGenerator.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167449808 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167449808 ""} +{ "Warning" "WSGN_FILE_IS_MISSING" "output_files/PositionControl.vhd " "Can't analyze file -- file output_files/PositionControl.vhd is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1618167449811 ""} +{ "Warning" "WSGN_FILE_IS_MISSING" "VelocityControl.vhd " "Can't analyze file -- file VelocityControl.vhd is missing" { } { } 0 12019 "Can't analyze file -- file %1!s! is missing" 0 0 "Analysis & Synthesis" 0 -1 1618167449815 ""} +{ "Info" "ISGN_START_ELABORATION_TOP" "SCOMP_System " "Elaborating entity \"SCOMP_System\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1618167450190 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PWM_GEN PWM_GEN:inst14 " "Elaborating entity \"PWM_GEN\" for hierarchy \"PWM_GEN:inst14\"" { } { { "SCOMP_System.bdf" "inst14" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 864 864 1088 976 "inst14" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450209 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clk_div clk_div:inst5 " "Elaborating entity \"clk_div\" for hierarchy \"clk_div:inst5\"" { } { { "SCOMP_System.bdf" "inst5" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 32 792 1000 208 "inst5" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450210 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_main PLL_main:inst1 " "Elaborating entity \"PLL_main\" for hierarchy \"PLL_main:inst1\"" { } { { "SCOMP_System.bdf" "inst1" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 16 312 576 168 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450210 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altpll PLL_main:inst1\|altpll:altpll_component " "Elaborating entity \"altpll\" for hierarchy \"PLL_main:inst1\|altpll:altpll_component\"" { } { { "PLL_main.vhd" "altpll_component" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450250 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "PLL_main:inst1\|altpll:altpll_component " "Elaborated megafunction instantiation \"PLL_main:inst1\|altpll:altpll_component\"" { } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450250 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "PLL_main:inst1\|altpll:altpll_component " "Instantiated megafunction \"PLL_main:inst1\|altpll:altpll_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "bandwidth_type AUTO " "Parameter \"bandwidth_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_divide_by 5 " "Parameter \"clk0_divide_by\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_duty_cycle 50 " "Parameter \"clk0_duty_cycle\" = \"50\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_multiply_by 1 " "Parameter \"clk0_multiply_by\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clk0_phase_shift 0 " "Parameter \"clk0_phase_shift\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "compensate_clock CLK0 " "Parameter \"compensate_clock\" = \"CLK0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "inclk0_input_frequency 20000 " "Parameter \"inclk0_input_frequency\" = \"20000\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family MAX 10 " "Parameter \"intended_device_family\" = \"MAX 10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint CBX_MODULE_PREFIX=PLL_main " "Parameter \"lpm_hint\" = \"CBX_MODULE_PREFIX=PLL_main\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altpll " "Parameter \"lpm_type\" = \"altpll\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode NORMAL " "Parameter \"operation_mode\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "pll_type AUTO " "Parameter \"pll_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_activeclock PORT_UNUSED " "Parameter \"port_activeclock\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_areset PORT_USED " "Parameter \"port_areset\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad0 PORT_UNUSED " "Parameter \"port_clkbad0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkbad1 PORT_UNUSED " "Parameter \"port_clkbad1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkloss PORT_UNUSED " "Parameter \"port_clkloss\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkswitch PORT_UNUSED " "Parameter \"port_clkswitch\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_configupdate PORT_UNUSED " "Parameter \"port_configupdate\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_fbin PORT_UNUSED " "Parameter \"port_fbin\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk0 PORT_USED " "Parameter \"port_inclk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_inclk1 PORT_UNUSED " "Parameter \"port_inclk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_locked PORT_USED " "Parameter \"port_locked\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pfdena PORT_UNUSED " "Parameter \"port_pfdena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasecounterselect PORT_UNUSED " "Parameter \"port_phasecounterselect\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasedone PORT_UNUSED " "Parameter \"port_phasedone\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phasestep PORT_UNUSED " "Parameter \"port_phasestep\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_phaseupdown PORT_UNUSED " "Parameter \"port_phaseupdown\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_pllena PORT_UNUSED " "Parameter \"port_pllena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanaclr PORT_UNUSED " "Parameter \"port_scanaclr\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclk PORT_UNUSED " "Parameter \"port_scanclk\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanclkena PORT_UNUSED " "Parameter \"port_scanclkena\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandata PORT_UNUSED " "Parameter \"port_scandata\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandataout PORT_UNUSED " "Parameter \"port_scandataout\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scandone PORT_UNUSED " "Parameter \"port_scandone\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanread PORT_UNUSED " "Parameter \"port_scanread\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_scanwrite PORT_UNUSED " "Parameter \"port_scanwrite\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk0 PORT_USED " "Parameter \"port_clk0\" = \"PORT_USED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk1 PORT_UNUSED " "Parameter \"port_clk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk2 PORT_UNUSED " "Parameter \"port_clk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk3 PORT_UNUSED " "Parameter \"port_clk3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk4 PORT_UNUSED " "Parameter \"port_clk4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clk5 PORT_UNUSED " "Parameter \"port_clk5\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena0 PORT_UNUSED " "Parameter \"port_clkena0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena1 PORT_UNUSED " "Parameter \"port_clkena1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena2 PORT_UNUSED " "Parameter \"port_clkena2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena3 PORT_UNUSED " "Parameter \"port_clkena3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena4 PORT_UNUSED " "Parameter \"port_clkena4\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_clkena5 PORT_UNUSED " "Parameter \"port_clkena5\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk0 PORT_UNUSED " "Parameter \"port_extclk0\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk1 PORT_UNUSED " "Parameter \"port_extclk1\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk2 PORT_UNUSED " "Parameter \"port_extclk2\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "port_extclk3 PORT_UNUSED " "Parameter \"port_extclk3\" = \"PORT_UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "self_reset_on_loss_lock OFF " "Parameter \"self_reset_on_loss_lock\" = \"OFF\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_clock 5 " "Parameter \"width_clock\" = \"5\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450255 ""} } { { "PLL_main.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd" 141 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167450255 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/pll_main_altpll.v 1 1 " "Found 1 design units, including 1 entities, in source file db/pll_main_altpll.v" { { "Info" "ISGN_ENTITY_NAME" "1 PLL_main_altpll " "Found entity 1: PLL_main_altpll" { } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 31 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167450299 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167450299 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "PLL_main_altpll PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated " "Elaborating entity \"PLL_main_altpll\" for hierarchy \"PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\"" { } { { "altpll.tdf" "auto_generated" { Text "c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altpll.tdf" 898 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450299 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "IO_DECODER IO_DECODER:inst3 " "Elaborating entity \"IO_DECODER\" for hierarchy \"IO_DECODER:inst3\"" { } { { "SCOMP_System.bdf" "inst3" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 256 856 1096 496 "inst3" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450303 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SCOMP SCOMP:inst " "Elaborating entity \"SCOMP\" for hierarchy \"SCOMP:inst\"" { } { { "SCOMP_System.bdf" "inst" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 256 96 288 464 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450304 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram SCOMP:inst\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"SCOMP:inst\|altsyncram:altsyncram_component\"" { } { { "SCOMP.vhd" "altsyncram_component" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450340 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"SCOMP:inst\|altsyncram:altsyncram_component\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450358 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|altsyncram:altsyncram_component " "Instantiated megafunction \"SCOMP:inst\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a UNUSED " "Parameter \"address_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_b NONE " "Parameter \"address_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_reg_b CLOCK1 " "Parameter \"address_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byte_size 8 " "Parameter \"byte_size\" = \"8\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_a UNUSED " "Parameter \"byteena_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_aclr_b NONE " "Parameter \"byteena_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "byteena_reg_b CLOCK1 " "Parameter \"byteena_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_a USE_INPUT_CLKEN " "Parameter \"clock_enable_core_a\" = \"USE_INPUT_CLKEN\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_core_b USE_INPUT_CLKEN " "Parameter \"clock_enable_core_b\" = \"USE_INPUT_CLKEN\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_b NORMAL " "Parameter \"clock_enable_input_b\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_b NORMAL " "Parameter \"clock_enable_output_b\" = \"NORMAL\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family MAX 10 " "Parameter \"intended_device_family\" = \"MAX 10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ecc_pipeline_stage_enabled FALSE " "Parameter \"ecc_pipeline_stage_enabled\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "enable_ecc FALSE " "Parameter \"enable_ecc\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "implement_in_les OFF " "Parameter \"implement_in_les\" = \"OFF\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_a UNUSED " "Parameter \"indata_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_aclr_b NONE " "Parameter \"indata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "indata_reg_b CLOCK1 " "Parameter \"indata_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file VelocityControl.mif " "Parameter \"init_file\" = \"VelocityControl.mif\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file_layout PORT_A " "Parameter \"init_file_layout\" = \"PORT_A\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "maximum_depth 0 " "Parameter \"maximum_depth\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 2048 " "Parameter \"numwords_a\" = \"2048\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_b 0 " "Parameter \"numwords_b\" = \"0\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode SINGLE_PORT " "Parameter \"operation_mode\" = \"SINGLE_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_b NONE " "Parameter \"outdata_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a UNREGISTERED " "Parameter \"outdata_reg_a\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_b UNREGISTERED " "Parameter \"outdata_reg_b\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "power_up_uninitialized FALSE " "Parameter \"power_up_uninitialized\" = \"FALSE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ram_block_type AUTO " "Parameter \"ram_block_type\" = \"AUTO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_aclr_b NONE " "Parameter \"rdcontrol_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "rdcontrol_reg_b CLOCK1 " "Parameter \"rdcontrol_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_mixed_ports DONT_CARE " "Parameter \"read_during_write_mode_mixed_ports\" = \"DONT_CARE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_a NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_a\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "read_during_write_mode_port_b NEW_DATA_NO_NBE_READ " "Parameter \"read_during_write_mode_port_b\" = \"NEW_DATA_NO_NBE_READ\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "stratixiv_m144k_allow_dual_clocks ON " "Parameter \"stratixiv_m144k_allow_dual_clocks\" = \"ON\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 16 " "Parameter \"width_a\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_b 1 " "Parameter \"width_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_b 1 " "Parameter \"width_byteena_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_eccstatus 3 " "Parameter \"width_eccstatus\" = \"3\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 11 " "Parameter \"widthad_a\" = \"11\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_b 1 " "Parameter \"widthad_b\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_a UNUSED " "Parameter \"wrcontrol_aclr_a\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_aclr_b NONE " "Parameter \"wrcontrol_aclr_b\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "wrcontrol_wraddress_reg_b CLOCK1 " "Parameter \"wrcontrol_wraddress_reg_b\" = \"CLOCK1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450358 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 61 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167450358 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_efs3.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_efs3.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_efs3 " "Found entity 1: altsyncram_efs3" { } { { "db/altsyncram_efs3.tdf" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/altsyncram_efs3.tdf" 28 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167450394 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167450394 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_efs3 SCOMP:inst\|altsyncram:altsyncram_component\|altsyncram_efs3:auto_generated " "Elaborating entity \"altsyncram_efs3\" for hierarchy \"SCOMP:inst\|altsyncram:altsyncram_component\|altsyncram_efs3:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altsyncram.tdf" 792 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450394 ""} +{ "Warning" "WMIO_MIO_MIF_REINITIALIZED_WARNING" "45 2048 45 10 " "45 out of 2048 addresses are reinitialized. The latest initialized data will replace the existing data. There are 45 warnings found, and 10 warnings are reported." { { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "0 " "Memory Initialization File address 0 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 13 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "1 " "Memory Initialization File address 1 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 14 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "2 " "Memory Initialization File address 2 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 15 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "3 " "Memory Initialization File address 3 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 16 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "4 " "Memory Initialization File address 4 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 17 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "5 " "Memory Initialization File address 5 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 18 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "6 " "Memory Initialization File address 6 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 19 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "7 " "Memory Initialization File address 7 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 20 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "8 " "Memory Initialization File address 8 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 21 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} { "Warning" "WMIO_MIO_MIF_REINITIALIZED_ADDRESS" "9 " "Memory Initialization File address 9 is reinitialized" { } { { "" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" 22 -1 0 } } } 0 113030 "Memory Initialization File address %1!u! is reinitialized" 0 0 "Design Software" 0 -1 1618167450406 ""} } { { "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/VelocityControl.mif" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/VelocityControl.mif" 1 -1 0 } } } 0 113031 "%1!u! out of %2!d! addresses are reinitialized. The latest initialized data will replace the existing data. There are %3!u! warnings found, and %4!u! warnings are reported." 0 0 "Analysis & Synthesis" 0 -1 1618167450406 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_CLSHIFT SCOMP:inst\|LPM_CLSHIFT:shifter " "Elaborating entity \"LPM_CLSHIFT\" for hierarchy \"SCOMP:inst\|LPM_CLSHIFT:shifter\"" { } { { "SCOMP.vhd" "shifter" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450439 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|LPM_CLSHIFT:shifter " "Elaborated megafunction instantiation \"SCOMP:inst\|LPM_CLSHIFT:shifter\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450439 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|LPM_CLSHIFT:shifter " "Instantiated megafunction \"SCOMP:inst\|LPM_CLSHIFT:shifter\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Parameter \"LPM_WIDTH\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450439 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHDIST 4 " "Parameter \"LPM_WIDTHDIST\" = \"4\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450439 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_SHIFTTYPE arithmetic " "Parameter \"LPM_SHIFTTYPE\" = \"arithmetic\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450439 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_CLSHIFT " "Parameter \"LPM_TYPE\" = \"LPM_CLSHIFT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450439 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT UNUSED " "Parameter \"LPM_HINT\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450439 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 88 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167450439 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/lpm_clshift_fuc.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/lpm_clshift_fuc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_clshift_fuc " "Found entity 1: lpm_clshift_fuc" { } { { "db/lpm_clshift_fuc.tdf" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/lpm_clshift_fuc.tdf" 23 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1618167450460 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167450460 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_clshift_fuc SCOMP:inst\|LPM_CLSHIFT:shifter\|lpm_clshift_fuc:auto_generated " "Elaborating entity \"lpm_clshift_fuc\" for hierarchy \"SCOMP:inst\|LPM_CLSHIFT:shifter\|lpm_clshift_fuc:auto_generated\"" { } { { "lpm_clshift.tdf" "auto_generated" { Text "c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_clshift.tdf" 54 3 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450460 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LPM_BUSTRI SCOMP:inst\|LPM_BUSTRI:io_bus " "Elaborating entity \"LPM_BUSTRI\" for hierarchy \"SCOMP:inst\|LPM_BUSTRI:io_bus\"" { } { { "SCOMP.vhd" "io_bus" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450477 ""} +{ "Info" "ISGN_ELABORATION_HEADER" "SCOMP:inst\|LPM_BUSTRI:io_bus " "Elaborated megafunction instantiation \"SCOMP:inst\|LPM_BUSTRI:io_bus\"" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450477 ""} +{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SCOMP:inst\|LPM_BUSTRI:io_bus " "Instantiated megafunction \"SCOMP:inst\|LPM_BUSTRI:io_bus\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 16 " "Parameter \"LPM_WIDTH\" = \"16\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450477 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_BUSTRI " "Parameter \"LPM_TYPE\" = \"LPM_BUSTRI\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450477 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_HINT UNUSED " "Parameter \"LPM_HINT\" = \"UNUSED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1618167450477 ""} } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 115 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1618167450477 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "TIMER TIMER:inst4 " "Elaborating entity \"TIMER\" for hierarchy \"TIMER:inst4\"" { } { { "SCOMP_System.bdf" "inst4" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 528 312 528 640 "inst4" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450479 ""} +{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "IO_COUNT TIMER.vhd(59) " "VHDL Process Statement warning at TIMER.vhd(59): inferring latch(es) for signal or variable \"IO_COUNT\", which holds its previous value in one or more paths through the process" { } { { "TIMER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd" 59 0 0 } } } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "Analysis & Synthesis" 0 -1 1618167450480 "|SCOMP_System|TIMER:inst4"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DIG_IN DIG_IN:inst7 " "Elaborating entity \"DIG_IN\" for hierarchy \"DIG_IN:inst7\"" { } { { "SCOMP_System.bdf" "inst7" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 680 312 512 760 "inst7" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450481 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "I2C_INTERFACE I2C_INTERFACE:inst13 " "Elaborating entity \"I2C_INTERFACE\" for hierarchy \"I2C_INTERFACE:inst13\"" { } { { "SCOMP_System.bdf" "inst13" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 832 256 464 992 "inst13" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450484 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_master I2C_INTERFACE:inst13\|i2c_master:inst " "Elaborating entity \"i2c_master\" for hierarchy \"I2C_INTERFACE:inst13\|i2c_master:inst\"" { } { { "I2C_INTERFACE.bdf" "inst" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 120 552 728 280 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450485 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "i2c_ctrl I2C_INTERFACE:inst13\|i2c_ctrl:inst14 " "Elaborating entity \"i2c_ctrl\" for hierarchy \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\"" { } { { "I2C_INTERFACE.bdf" "inst14" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { -72 536 744 120 "inst14" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450487 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Incrementer Incrementer:inst10 " "Elaborating entity \"Incrementer\" for hierarchy \"Incrementer:inst10\"" { } { { "SCOMP_System.bdf" "inst10" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 336 488 704 480 "inst10" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450488 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "QuadratureDecoder QuadratureDecoder:inst11 " "Elaborating entity \"QuadratureDecoder\" for hierarchy \"QuadratureDecoder:inst11\"" { } { { "SCOMP_System.bdf" "inst11" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 320 1544 1760 464 "inst11" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450491 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "HEX_DISP_6 HEX_DISP_6:inst9 " "Elaborating entity \"HEX_DISP_6\" for hierarchy \"HEX_DISP_6:inst9\"" { } { { "SCOMP_System.bdf" "inst9" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 768 1008 800 "inst9" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450493 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "HEX_DISP HEX_DISP_6:inst9\|HEX_DISP:inst1 " "Elaborating entity \"HEX_DISP\" for hierarchy \"HEX_DISP_6:inst9\|HEX_DISP:inst1\"" { } { { "HEX_DISP_6.bdf" "inst1" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP_6.bdf" { { 64 536 752 176 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450494 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "DIG_OUT DIG_OUT:inst6 " "Elaborating entity \"DIG_OUT\" for hierarchy \"DIG_OUT:inst6\"" { } { { "SCOMP_System.bdf" "inst6" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 528 792 1016 640 "inst6" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167450494 ""} +{ "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR_HDR" "" "Tri-state node(s) do not directly drive top-level pin(s)" { { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[0\] PWM_GEN:inst14\|COMPARE\[0\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[0\]\" to the node \"PWM_GEN:inst14\|COMPARE\[0\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[1\] PWM_GEN:inst14\|COMPARE\[1\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[1\]\" to the node \"PWM_GEN:inst14\|COMPARE\[1\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[2\] PWM_GEN:inst14\|COMPARE\[2\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[2\]\" to the node \"PWM_GEN:inst14\|COMPARE\[2\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[3\] PWM_GEN:inst14\|COMPARE\[3\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[3\]\" to the node \"PWM_GEN:inst14\|COMPARE\[3\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[4\] PWM_GEN:inst14\|COMPARE\[4\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[4\]\" to the node \"PWM_GEN:inst14\|COMPARE\[4\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[5\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[5\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[5\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[5\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[6\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[6\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[6\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[6\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[7\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[7\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[7\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[7\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[8\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[8\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[8\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[8\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[9\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[9\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[9\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[9\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[10\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[10\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[10\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[10\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[11\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[11\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[11\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[11\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[12\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[12\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[12\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[12\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[13\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[13\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[13\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[13\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[14\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[14\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[14\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[14\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR" "I2C_INTERFACE:inst13\|inst1\[15\] I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[15\] " "Converted the fan-out from the tri-state buffer \"I2C_INTERFACE:inst13\|inst1\[15\]\" to the node \"I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_in\[15\]\" into an OR gate" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } } 0 13047 "Converted the fan-out from the tri-state buffer \"%1!s!\" to the node \"%2!s!\" into an OR gate" 0 0 "Design Software" 0 -1 1618167451412 ""} } { } 0 13046 "Tri-state node(s) do not directly drive top-level pin(s)" 0 0 "Analysis & Synthesis" 0 -1 1618167451412 ""} +{ "Info" "IMLS_MLS_PRESET_POWER_UP" "" "Registers with preset signals will power-up high" { } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 57 -1 0 } } { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 111 -1 0 } } } 0 13000 "Registers with preset signals will power-up high" 0 0 "Analysis & Synthesis" 0 -1 1618167451419 ""} +{ "Info" "IMLS_MLS_DEV_CLRN_SETS_REGISTERS" "" "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" { } { } 0 13003 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "Analysis & Synthesis" 0 -1 1618167451419 ""} +{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "GSENSOR_CS_n VCC " "Pin \"GSENSOR_CS_n\" is stuck at VCC" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 944 520 696 960 "GSENSOR_CS_n" "" } } } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1618167451772 "|SCOMP_System|GSENSOR_CS_n"} { "Warning" "WMLS_MLS_STUCK_PIN" "GSENSOR_SDO VCC " "Pin \"GSENSOR_SDO\" is stuck at VCC" { } { { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 968 520 696 984 "GSENSOR_SDO" "" } } } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1618167451772 "|SCOMP_System|GSENSOR_SDO"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1618167451772 ""} +{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1618167451858 ""} +{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "2 " "2 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1618167452732 ""} +{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "1 0 1 0 0 " "Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1618167452925 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1618167452925 ""} +{ "Info" "ICUT_CUT_TM_SUMMARY" "1184 " "Implemented 1184 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1618167453030 ""} { "Info" "ICUT_CUT_TM_OPINS" "58 " "Implemented 58 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1618167453030 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "2 " "Implemented 2 bidirectional pins" { } { } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Design Software" 0 -1 1618167453030 ""} { "Info" "ICUT_CUT_TM_LCELLS" "1092 " "Implemented 1092 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1618167453030 ""} { "Info" "ICUT_CUT_TM_RAMS" "16 " "Implemented 16 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1618167453030 ""} { "Info" "ICUT_CUT_TM_PLLS" "1 " "Implemented 1 PLLs" { } { } 0 21065 "Implemented %1!d! PLLs" 0 0 "Design Software" 0 -1 1618167453030 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1618167453030 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 34 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 34 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4847 " "Peak virtual memory: 4847 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167453055 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:57:33 2021 " "Processing ended: Sun Apr 11 14:57:33 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167453055 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:12 " "Elapsed time: 00:00:12" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167453055 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:20 " "Total CPU time (on all processors): 00:00:20" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167453055 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1618167453055 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Analysis & Synthesis" 0 -1 1618167454393 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus Prime " "Running Quartus Prime Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167454403 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:57:34 2021 " "Processing started: Sun Apr 11 14:57:34 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167454403 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Fitter" 0 -1 1618167454403 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP " "Command: quartus_fit --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Fitter" 0 -1 1618167454403 ""} +{ "Info" "0" "" "qfit2_default_script.tcl version: #1" { } { } 0 0 "qfit2_default_script.tcl version: #1" 0 0 "Fitter" 0 0 1618167454556 ""} +{ "Info" "0" "" "Project = SCOMP" { } { } 0 0 "Project = SCOMP" 0 0 "Fitter" 0 0 1618167454557 ""} +{ "Info" "0" "" "Revision = SCOMP" { } { } 0 0 "Revision = SCOMP" 0 0 "Fitter" 0 0 1618167454557 ""} +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Fitter" 0 -1 1618167454688 ""} +{ "Info" "IMPP_MPP_USER_DEVICE" "SCOMP 10M50DAF484C7G " "Selected device 10M50DAF484C7G for design \"SCOMP\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1618167454712 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1618167454765 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1618167454765 ""} +{ "Info" "ICUT_CUT_PLL_COMPUTATION_SUCCESS" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|pll1 MAX 10 PLL " "Implemented PLL \"PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|pll1\" as MAX 10 PLL type" { { "Info" "ICUT_CUT_YGR_PLL_PARAMETERS_FACTORS" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] 1 5 0 0 " "Implementing clock multiplication of 1, clock division of 5, and phase shift of 0 degrees (0 ps) for PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] port" { } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 51 -1 0 } } { "" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 15099 "Implementing clock multiplication of %2!d!, clock division of %3!d!, and phase shift of %4!d! degrees (%5!d! ps) for %1!s! port" 0 0 "Design Software" 0 -1 1618167454824 ""} } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 51 -1 0 } } { "" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 15535 "Implemented %3!s! \"%1!s!\" as %2!s! PLL type" 0 0 "Fitter" 0 -1 1618167454824 ""} +{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1618167454960 ""} +{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1618167454971 ""} +{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M08DAF484I7G " "Device 10M08DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M08DAF484I7P " "Device 10M08DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484A7G " "Device 10M16DAF484A7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484C7G " "Device 10M16DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484I7G " "Device 10M16DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M16DAF484I7P " "Device 10M16DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484A7G " "Device 10M25DAF484A7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484C7G " "Device 10M25DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M25DAF484I7G " "Device 10M25DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M50DAF484I7G " "Device 10M50DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M50DAF484I7P " "Device 10M50DAF484I7P is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M40DAF484C7G " "Device 10M40DAF484C7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "10M40DAF484I7G " "Device 10M40DAF484I7G is compatible" { } { } 2 176445 "Device %1!s! is compatible" 0 0 "Design Software" 0 -1 1618167455171 ""} } { } 2 176444 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "Fitter" 0 -1 1618167455171 ""} +{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "8 " "Fitter converted 8 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TMS~ H2 " "Pin ~ALTERA_TMS~ is reserved at location H2" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TMS~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2427 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TCK~ G2 " "Pin ~ALTERA_TCK~ is reserved at location G2" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TCK~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2429 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TDI~ L4 " "Pin ~ALTERA_TDI~ is reserved at location L4" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TDI~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2431 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_TDO~ M5 " "Pin ~ALTERA_TDO~ is reserved at location M5" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_TDO~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2433 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_CONFIG_SEL~ H10 " "Pin ~ALTERA_CONFIG_SEL~ is reserved at location H10" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_CONFIG_SEL~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2435 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nCONFIG~ H9 " "Pin ~ALTERA_nCONFIG~ is reserved at location H9" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_nCONFIG~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2437 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_nSTATUS~ G9 " "Pin ~ALTERA_nSTATUS~ is reserved at location G9" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_nSTATUS~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2439 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ALTERA_CONF_DONE~ F8 " "Pin ~ALTERA_CONF_DONE~ is reserved at location F8" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ~ALTERA_CONF_DONE~ } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 2441 14177 15141 0 0 "" 0 "" "" } } } } } 0 169125 "Pin %1!s! is reserved at location %2!s!" 0 0 "Design Software" 0 -1 1618167455181 ""} } { } 0 169124 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "Fitter" 0 -1 1618167455181 ""} +{ "Info" "IFIOMGR_RESERVE_PIN_NO_DATA0" "" "DATA\[0\] dual-purpose pin not reserved" { } { } 0 169141 "DATA\[0\] dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167455181 ""} +{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "Data\[1\]/ASDO " "Data\[1\]/ASDO dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167455181 ""} +{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "nCSO " "nCSO dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167455181 ""} +{ "Info" "IFIOMGR_PIN_NOT_RESERVE" "DCLK " "DCLK dual-purpose pin not reserved" { } { } 0 12825 "%1!s! dual-purpose pin not reserved" 0 0 "Fitter" 0 -1 1618167455181 ""} +{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1618167455183 ""} +{ "Info" "IFSAC_FSAC_RAM_METASTABILITY_INFO" "" "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." { } { } 0 176045 "Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements." 0 0 "Fitter" 0 -1 1618167455262 ""} +{ "Info" "ISTA_SDC_FOUND" "SCOMP.sdc " "Reading SDC File: 'SCOMP.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Fitter" 0 -1 1618167456047 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "generated clocks " "No user constrained generated clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1618167456049 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1618167456050 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1618167456053 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1618167456053 ""} +{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1618167456062 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_4) " "Automatically promoted node PLL_main:inst1\|altpll:altpll_component\|PLL_main_altpll:auto_generated\|wire_pll1_clk\[0\] (placed in counter C0 of PLL_4)" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G8 " "Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G8" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456147 ""} } { { "db/pll_main_altpll.v" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v" 93 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 864 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456147 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " "Automatically promoted node I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456147 ""} } { { "i2c_master.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd" 53 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 369 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456147 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_100kHz " "Automatically promoted node clk_div:inst5\|clock_100kHz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456147 ""} } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 11 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 929 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456147 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_10Hz " "Automatically promoted node clk_div:inst5\|clock_10Hz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456147 ""} } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 16 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 927 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456147 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|inst13 " "Automatically promoted node I2C_INTERFACE:inst13\|inst13 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456147 ""} } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 24 304 368 72 "inst13" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 406 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456147 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|HEX0_EN " "Automatically promoted node IO_DECODER:inst3\|HEX0_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 18 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 858 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456149 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|inst12 " "Automatically promoted node I2C_INTERFACE:inst13\|inst12 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { -40 304 368 8 "inst12" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 405 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456149 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|LED_EN " "Automatically promoted node IO_DECODER:inst3\|LED_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 16 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 856 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456149 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|SWITCH_EN " "Automatically promoted node IO_DECODER:inst3\|SWITCH_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[0\]~20 " "Destination node I2C_INTERFACE:inst13\|inst1\[0\]~20" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1118 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[1\]~23 " "Destination node I2C_INTERFACE:inst13\|inst1\[1\]~23" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1122 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[3\]~33 " "Destination node I2C_INTERFACE:inst13\|inst1\[3\]~33" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1132 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[4\]~38 " "Destination node I2C_INTERFACE:inst13\|inst1\[4\]~38" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1137 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[6\]~48 " "Destination node I2C_INTERFACE:inst13\|inst1\[6\]~48" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1147 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[7\]~53 " "Destination node I2C_INTERFACE:inst13\|inst1\[7\]~53" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1152 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[10\]~67 " "Destination node I2C_INTERFACE:inst13\|inst1\[10\]~67" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1166 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[11\]~71 " "Destination node I2C_INTERFACE:inst13\|inst1\[11\]~71" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1170 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[12\]~76 " "Destination node I2C_INTERFACE:inst13\|inst1\[12\]~76" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1175 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "I2C_INTERFACE:inst13\|inst1\[13\]~79 " "Destination node I2C_INTERFACE:inst13\|inst1\[13\]~79" { } { { "I2C_INTERFACE.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf" { { 360 552 600 392 "inst1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1178 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Non-global destination nodes limited to 10 nodes" { } { } 0 176358 "Non-global destination nodes limited to %1!d! nodes" 0 0 "Design Software" 0 -1 1618167456149 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Design Software" 0 -1 1618167456149 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 15 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 855 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456149 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|HEX1_EN " "Automatically promoted node IO_DECODER:inst3\|HEX1_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456149 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 19 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 859 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456149 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk_div:inst5\|clock_25kHz " "Automatically promoted node clk_div:inst5\|clock_25kHz " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} } { { "clk_div.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd" 12 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 928 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456150 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "IO_DECODER:inst3\|PWM_EN " "Automatically promoted node IO_DECODER:inst3\|PWM_EN " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} } { { "IO_DECODER.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd" 26 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 862 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456150 ""} +{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_out\[7\]~0 " "Automatically promoted node I2C_INTERFACE:inst13\|i2c_ctrl:inst14\|data_out\[7\]~0 " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Automatically promoted destinations to use location or clock signal Global Clock" { } { } 0 176355 "Automatically promoted %1!s! to use location or clock signal %2!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|IO_WRITE_int " "Destination node SCOMP:inst\|IO_WRITE_int" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 56 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 723 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|IO_CYCLE " "Destination node SCOMP:inst\|IO_CYCLE" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 21 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 725 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[0\] " "Destination node SCOMP:inst\|AC\[0\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 676 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[1\] " "Destination node SCOMP:inst\|AC\[1\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 675 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[2\] " "Destination node SCOMP:inst\|AC\[2\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 674 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[3\] " "Destination node SCOMP:inst\|AC\[3\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 673 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[4\] " "Destination node SCOMP:inst\|AC\[4\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 672 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[5\] " "Destination node SCOMP:inst\|AC\[5\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 671 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[6\] " "Destination node SCOMP:inst\|AC\[6\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 670 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "SCOMP:inst\|AC\[7\] " "Destination node SCOMP:inst\|AC\[7\]" { } { { "SCOMP.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd" 130 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 669 14177 15141 0 0 "" 0 "" "" } } } } } 0 176357 "Destination node %1!s!" 0 0 "Design Software" 0 -1 1618167456150 ""} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_LIMITED_TO_SUB" "10 " "Non-global destination nodes limited to 10 nodes" { } { } 0 176358 "Non-global destination nodes limited to %1!d! nodes" 0 0 "Design Software" 0 -1 1618167456150 ""} } { } 0 176356 "Following destination nodes may be non-global or may not use global or regional clocks" 0 0 "Design Software" 0 -1 1618167456150 ""} } { { "i2c_ctrl.vhd" "" { Text "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd" 84 -1 0 } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 1120 14177 15141 0 0 "" 0 "" "" } } } } } 0 176353 "Automatically promoted node %1!s! %2!s!" 0 0 "Fitter" 0 -1 1618167456150 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1618167456590 ""} +{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Performing register packing on registers with non-logic cell location assignments" { } { } 1 176273 "Performing register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1618167456590 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Completed register packing on registers with non-logic cell location assignments" { } { } 1 176274 "Completed register packing on registers with non-logic cell location assignments" 1 0 "Fitter" 0 -1 1618167456599 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1618167456600 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1618167456602 ""} +{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1618167456605 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1618167456605 ""} +{ "Extra Info" "IFSAC_FSAC_START_IO_MULT_RAM_PACKING" "" "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" { } { } 1 176248 "Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1618167456606 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MULT_RAM_PACKING" "" "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" { } { } 1 176249 "Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1618167456663 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1618167456663 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1618167456663 ""} +{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[0\] " "Node \"DP\[0\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[0\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167456810 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[1\] " "Node \"DP\[1\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[1\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167456810 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[2\] " "Node \"DP\[2\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[2\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167456810 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[3\] " "Node \"DP\[3\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[3\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167456810 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[4\] " "Node \"DP\[4\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[4\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167456810 ""} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "DP\[5\] " "Node \"DP\[5\]\" is assigned to location or region, but does not exist in design" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "DP\[5\]" } } } } } 0 15706 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0 "Design Software" 0 -1 1618167456810 ""} } { } 0 15705 "Ignored locations or region assignments to the following nodes" 0 0 "Fitter" 0 -1 1618167456810 ""} +{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:01 " "Fitter preparation operations ending: elapsed time is 00:00:01" { } { } 0 171121 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167456810 ""} +{ "Info" "IVPR20K_VPR_FAMILY_APL_ERROR" "" "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." { } { } 0 14896 "Fitter has disabled Advanced Physical Optimization because it is not supported for the current family." 0 0 "Fitter" 0 -1 1618167456815 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1618167458078 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167458324 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1618167458353 ""} +{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1618167461496 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:03 " "Fitter placement operations ending: elapsed time is 00:00:03" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167461497 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1618167462165 ""} +{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "1 " "Router estimated average interconnect usage is 1% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "20 X45_Y33 X55_Y43 " "Router estimated peak interconnect usage is 20% of the available device resources in the region that extends from location X45_Y33 to location X55_Y43" { } { { "loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 1 { 0 "Router estimated peak interconnect usage is 20% of the available device resources in the region that extends from location X45_Y33 to location X55_Y43"} { { 12 { 0 ""} 45 33 11 11 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1618167464351 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1618167464351 ""} +{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1618167471300 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1618167471300 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:08 " "Fitter routing operations ending: elapsed time is 00:00:08" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167471309 ""} +{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 1.41 " "Total time spent on timing analysis during the Fitter is 1.41 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1618167471521 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1618167471530 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1618167472106 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1618167472107 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1618167472906 ""} +{ "Info" "IFITCC_FITTER_POST_OPERATION_END" "00:00:02 " "Fitter post-fit operations ending: elapsed time is 00:00:02" { } { } 0 11218 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1618167473668 ""} +{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1618167473973 ""} +{ "Warning" "WFIOMGR_FIOMGR_REFER_APPNOTE_447_TOP_LEVEL" "17 MAX 10 " "17 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing MAX 10 Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." { { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GSENSOR_SDI 3.3-V LVTTL V11 " "Pin GSENSOR_SDI uses I/O standard 3.3-V LVTTL at V11" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { GSENSOR_SDI } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GSENSOR_SDI" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 872 464 640 888 "GSENSOR_SDI" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 109 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "GSENSOR_SCLK 3.3-V LVTTL AB15 " "Pin GSENSOR_SCLK uses I/O standard 3.3-V LVTTL at AB15" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { GSENSOR_SCLK } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "GSENSOR_SCLK" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 888 464 640 904 "GSENSOR_SCLK" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 110 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[9\] 3.3-V LVTTL F15 " "Pin SW\[9\] uses I/O standard 3.3-V LVTTL at F15" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[9] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[9\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 42 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[8\] 3.3-V LVTTL B14 " "Pin SW\[8\] uses I/O standard 3.3-V LVTTL at B14" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[8] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[8\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 43 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[7\] 3.3-V LVTTL A14 " "Pin SW\[7\] uses I/O standard 3.3-V LVTTL at A14" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[7] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[7\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 44 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[0\] 3.3-V LVTTL C10 " "Pin SW\[0\] uses I/O standard 3.3-V LVTTL at C10" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[0] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[0\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 51 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY1 3.3 V Schmitt Trigger A7 " "Pin KEY1 uses I/O standard 3.3 V Schmitt Trigger at A7" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { KEY1 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY1" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 208 72 248 224 "KEY1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 111 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "KEY0 3.3 V Schmitt Trigger B8 " "Pin KEY0 uses I/O standard 3.3 V Schmitt Trigger at B8" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { KEY0 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "KEY0" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 96 72 248 112 "KEY0" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 108 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "clock_50 3.3-V LVTTL N14 " "Pin clock_50 uses I/O standard 3.3-V LVTTL at N14" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { clock_50 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "clock_50" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 72 72 248 88 "clock_50" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 107 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[1\] 3.3-V LVTTL C11 " "Pin SW\[1\] uses I/O standard 3.3-V LVTTL at C11" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[1] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[1\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 50 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[2\] 3.3-V LVTTL D12 " "Pin SW\[2\] uses I/O standard 3.3-V LVTTL at D12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[2] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[2\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 49 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[3\] 3.3-V LVTTL C12 " "Pin SW\[3\] uses I/O standard 3.3-V LVTTL at C12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[3] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[3\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 48 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[4\] 3.3-V LVTTL A12 " "Pin SW\[4\] uses I/O standard 3.3-V LVTTL at A12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[4] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[4\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 47 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[5\] 3.3-V LVTTL B12 " "Pin SW\[5\] uses I/O standard 3.3-V LVTTL at B12" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[5] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[5\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 46 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "SW\[6\] 3.3-V LVTTL A13 " "Pin SW\[6\] uses I/O standard 3.3-V LVTTL at A13" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { SW[6] } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "SW\[6\]" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 672 64 232 688 "SW" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 45 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "ENCODER_H1 3.3-V LVTTL Y10 " "Pin ENCODER_H1 uses I/O standard 3.3-V LVTTL at Y10" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ENCODER_H1 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "ENCODER_H1" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 320 1280 1456 336 "ENCODER_H1" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 112 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} { "Info" "IFIOMGR_PIN_IO_STANDARD_LOCATION" "ENCODER_H2 3.3-V LVTTL AB9 " "Pin ENCODER_H2 uses I/O standard 3.3-V LVTTL at AB9" { } { { "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" "" { PinPlanner "c:/intelfpga_lite/19.1/quartus/bin64/pin_planner.ppl" { ENCODER_H2 } } } { "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" "" { Assignment "c:/intelfpga_lite/19.1/quartus/bin64/Assignment Editor.qase" 1 { { 0 "ENCODER_H2" } } } } { "SCOMP_System.bdf" "" { Schematic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf" { { 352 1280 1448 368 "ENCODER_H2" "" } } } } { "temporary_test_loc" "" { Generic "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/" { { 0 { 0 ""} 0 113 14177 15141 0 0 "" 0 "" "" } } } } } 0 169178 "Pin %1!s! uses I/O standard %2!s! at %3!s!" 0 0 "Design Software" 0 -1 1618167473987 ""} } { } 0 169177 "%1!d! pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing %2!s! Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems." 0 0 "Fitter" 0 -1 1618167473987 ""} +{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.fit.smsg " "Generated suppressed messages file C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.fit.smsg" { } { } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Fitter" 0 -1 1618167474086 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 11 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 11 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "5795 " "Peak virtual memory: 5795 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167474627 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:57:54 2021 " "Processing ended: Sun Apr 11 14:57:54 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167474627 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:20 " "Elapsed time: 00:00:20" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167474627 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:32 " "Total CPU time (on all processors): 00:00:32" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167474627 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1618167474627 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Fitter" 0 -1 1618167475718 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167475730 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:57:55 2021 " "Processing started: Sun Apr 11 14:57:55 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167475730 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1618167475730 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP " "Command: quartus_asm --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1618167475730 ""} +{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1618167477667 ""} +{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1618167477785 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4695 " "Peak virtual memory: 4695 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167478666 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:57:58 2021 " "Processing ended: Sun Apr 11 14:57:58 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167478666 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167478666 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167478666 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1618167478666 ""} +{ "Info" "IFLOW_DISABLED_MODULE" "Power Analyzer FLOW_ENABLE_POWER_ANALYZER " "Skipped module Power Analyzer due to the assignment FLOW_ENABLE_POWER_ANALYZER" { } { } 0 293026 "Skipped module %1!s! due to the assignment %2!s!" 0 0 "Assembler" 0 -1 1618167479376 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Assembler" 0 -1 1618167479995 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167480005 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:57:59 2021 " "Processing started: Sun Apr 11 14:57:59 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167480005 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480005 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta SCOMP -c SCOMP " "Command: quartus_sta SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480005 ""} +{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1618167480150 ""} +{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Timing Analyzer" 0 -1 1618167480367 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480406 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480406 ""} +{ "Info" "ISTA_SDC_FOUND" "SCOMP.sdc " "Reading SDC File: 'SCOMP.sdc'" { } { } 0 332104 "Reading SDC File: '%1!s!'" 0 0 "Timing Analyzer" 0 -1 1618167480742 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "generated clocks \"derive_pll_clocks -create_base_clocks\" " "No user constrained generated clocks found in the design. Calling \"derive_pll_clocks -create_base_clocks\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480745 ""} +{ "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "Deriving PLL clocks " "Deriving PLL clocks" { { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_clock -period 20.000 -waveform \{0.000 10.000\} -name clock_50 clock_50 " "create_clock -period 20.000 -waveform \{0.000 10.000\} -name clock_50 clock_50" { } { } 0 332110 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} { "Info" "ISTA_DERIVE_PLL_CLOCKS_INFO" "create_generated_clock -source \{inst1\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -duty_cycle 50.00 -name \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} " "create_generated_clock -source \{inst1\|altpll_component\|auto_generated\|pll1\|inclk\[0\]\} -divide_by 5 -duty_cycle 50.00 -name \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\} \{inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\]\}" { } { } 0 332110 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} } { } 0 332110 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480746 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480746 ""} +{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_25kHz clk_div:inst5\|clock_25kHz " "create_clock -period 1.000 -name clk_div:inst5\|clock_25kHz clk_div:inst5\|clock_25kHz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_10Hz clk_div:inst5\|clock_10Hz " "create_clock -period 1.000 -name clk_div:inst5\|clock_10Hz clk_div:inst5\|clock_10Hz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name SCOMP:inst\|IO_CYCLE SCOMP:inst\|IO_CYCLE " "create_clock -period 1.000 -name SCOMP:inst\|IO_CYCLE SCOMP:inst\|IO_CYCLE" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk_div:inst5\|clock_100kHz clk_div:inst5\|clock_100kHz " "create_clock -period 1.000 -name clk_div:inst5\|clock_100kHz clk_div:inst5\|clock_100kHz" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " "create_clock -period 1.000 -name I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1618167480746 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480746 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480750 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480750 ""} +{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1618167480757 ""} +{ "Info" "0" "" "Analyzing Slow 1200mV 85C Model" { } { } 0 0 "Analyzing Slow 1200mV 85C Model" 0 0 "Timing Analyzer" 0 0 1618167480766 ""} +{ "Info" "0" "" "Can't run Report Timing Closure Recommendations. The current device family is not supported." { } { } 0 0 "Can't run Report Timing Closure Recommendations. The current device family is not supported." 0 0 "Timing Analyzer" 0 0 1618167480777 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1618167480784 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -9.765 " "Worst-case setup slack is -9.765" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -9.765 -136.214 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -9.765 -136.214 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.571 -411.526 SCOMP:inst\|IO_CYCLE " " -7.571 -411.526 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -5.104 -193.955 clk_div:inst5\|clock_100kHz " " -5.104 -193.955 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.795 -116.425 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -4.795 -116.425 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.102 -5.942 clk_div:inst5\|clock_25kHz " " -3.102 -5.942 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.655 -17.188 clk_div:inst5\|clock_10Hz " " -1.655 -17.188 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480786 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480786 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold -0.622 " "Worst-case hold slack is -0.622" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.622 -0.622 SCOMP:inst\|IO_CYCLE " " -0.622 -0.622 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.021 0.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " 0.021 0.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.323 0.000 clk_div:inst5\|clock_100kHz " " 0.323 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.329 0.000 clk_div:inst5\|clock_25kHz " " 0.329 0.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.355 0.000 clk_div:inst5\|clock_10Hz " " 0.355 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.421 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.421 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480794 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480794 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.157 " "Worst-case recovery slack is -4.157" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480797 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480797 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.157 -66.512 clk_div:inst5\|clock_10Hz " " -4.157 -66.512 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480797 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.090 0.000 SCOMP:inst\|IO_CYCLE " " 0.090 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480797 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480797 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.114 " "Worst-case removal slack is 0.114" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480799 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480799 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.114 0.000 SCOMP:inst\|IO_CYCLE " " 0.114 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480799 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 3.081 0.000 clk_div:inst5\|clock_10Hz " " 3.081 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480799 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480799 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.403 " "Worst-case minimum pulse width slack is -1.403" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -108.031 SCOMP:inst\|IO_CYCLE " " -1.403 -108.031 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -65.941 clk_div:inst5\|clock_100kHz " " -1.403 -65.941 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -22.448 clk_div:inst5\|clock_10Hz " " -1.403 -22.448 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -8.418 clk_div:inst5\|clock_25kHz " " -1.403 -8.418 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.844 0.000 clock_50 " " 9.844 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.672 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.672 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167480802 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167480802 ""} +{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167480814 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167480814 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167480814 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167480814 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 194.109 ns " "Worst Case Available Settling Time: 194.109 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167480814 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167480814 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167480814 ""} +{ "Info" "0" "" "Analyzing Slow 1200mV 0C Model" { } { } 0 0 "Analyzing Slow 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1618167480818 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1618167480832 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1618167481735 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167481851 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1618167481876 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -8.748 " "Worst-case setup slack is -8.748" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -8.748 -119.404 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -8.748 -119.404 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.002 -383.453 SCOMP:inst\|IO_CYCLE " " -7.002 -383.453 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.762 -179.432 clk_div:inst5\|clock_100kHz " " -4.762 -179.432 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.385 -104.822 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -4.385 -104.822 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.806 -5.029 clk_div:inst5\|clock_25kHz " " -2.806 -5.029 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.388 -14.091 clk_div:inst5\|clock_10Hz " " -1.388 -14.091 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481878 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167481878 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold -0.401 " "Worst-case hold slack is -0.401" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.401 -0.401 SCOMP:inst\|IO_CYCLE " " -0.401 -0.401 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.003 0.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " 0.003 0.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.291 0.000 clk_div:inst5\|clock_100kHz " " 0.291 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.295 0.000 clk_div:inst5\|clock_25kHz " " 0.295 0.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.321 0.000 clk_div:inst5\|clock_10Hz " " 0.321 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.342 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.342 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481888 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167481888 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -4.125 " "Worst-case recovery slack is -4.125" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481891 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481891 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -4.125 -66.000 clk_div:inst5\|clock_10Hz " " -4.125 -66.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481891 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.322 0.000 SCOMP:inst\|IO_CYCLE " " 0.322 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481891 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167481891 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "removal -0.026 " "Worst-case removal slack is -0.026" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.026 -0.026 SCOMP:inst\|IO_CYCLE " " -0.026 -0.026 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481895 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 3.021 0.000 clk_div:inst5\|clock_10Hz " " 3.021 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481895 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167481895 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.403 " "Worst-case minimum pulse width slack is -1.403" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -108.055 SCOMP:inst\|IO_CYCLE " " -1.403 -108.055 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.403 -70.150 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -65.941 clk_div:inst5\|clock_100kHz " " -1.403 -65.941 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -22.448 clk_div:inst5\|clock_10Hz " " -1.403 -22.448 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.403 -8.418 clk_div:inst5\|clock_25kHz " " -1.403 -8.418 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.857 0.000 clock_50 " " 9.857 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.685 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.685 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167481898 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167481898 ""} +{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167481910 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167481910 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167481910 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167481910 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 194.529 ns " "Worst Case Available Settling Time: 194.529 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167481910 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167481910 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167481910 ""} +{ "Info" "0" "" "Analyzing Fast 1200mV 0C Model" { } { } 0 0 "Analyzing Fast 1200mV 0C Model" 0 0 "Timing Analyzer" 0 0 1618167481915 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167482085 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1618167482098 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -3.987 " "Worst-case setup slack is -3.987" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -3.987 -57.626 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " -3.987 -57.626 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -2.992 -159.857 SCOMP:inst\|IO_CYCLE " " -2.992 -159.857 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.687 -51.862 clk_div:inst5\|clock_100kHz " " -1.687 -51.862 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.527 -27.106 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.527 -27.106 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.716 -0.716 clk_div:inst5\|clock_25kHz " " -0.716 -0.716 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.056 -0.066 clk_div:inst5\|clock_10Hz " " -0.056 -0.066 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482101 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167482101 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold -0.521 " "Worst-case hold slack is -0.521" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.521 -0.521 SCOMP:inst\|IO_CYCLE " " -0.521 -0.521 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.053 -0.101 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -0.053 -0.101 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.140 0.000 clk_div:inst5\|clock_100kHz " " 0.140 0.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.145 0.000 clk_div:inst5\|clock_25kHz " " 0.145 0.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.152 0.000 clk_div:inst5\|clock_10Hz " " 0.152 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.212 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 0.212 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482110 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167482110 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "recovery -1.493 " "Worst-case recovery slack is -1.493" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482112 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482112 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.493 -23.888 clk_div:inst5\|clock_10Hz " " -1.493 -23.888 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482112 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.218 0.000 SCOMP:inst\|IO_CYCLE " " 0.218 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482112 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167482112 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.303 " "Worst-case removal slack is 0.303" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482115 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482115 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.303 0.000 SCOMP:inst\|IO_CYCLE " " 0.303 0.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482115 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 1.150 0.000 clk_div:inst5\|clock_10Hz " " 1.150 0.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482115 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167482115 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -1.000 " "Worst-case minimum pulse width slack is -1.000" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -77.000 SCOMP:inst\|IO_CYCLE " " -1.000 -77.000 SCOMP:inst\|IO_CYCLE " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -50.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " " -1.000 -50.000 I2C_INTERFACE:inst13\|i2c_master:inst\|data_clk " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -47.000 clk_div:inst5\|clock_100kHz " " -1.000 -47.000 clk_div:inst5\|clock_100kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -16.000 clk_div:inst5\|clock_10Hz " " -1.000 -16.000 clk_div:inst5\|clock_10Hz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -1.000 -6.000 clk_div:inst5\|clock_25kHz " " -1.000 -6.000 clk_div:inst5\|clock_25kHz " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 9.532 0.000 clock_50 " " 9.532 0.000 clock_50 " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 49.715 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " " 49.715 0.000 inst1\|altpll_component\|auto_generated\|pll1\|clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1618167482117 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1618167482117 ""} +{ "Info" "ISTA_REPORT_METASTABILITY_INFO" "Report Metastability: Found 2 synchronizer chains. " "Report Metastability: Found 2 synchronizer chains." { { "Info" "ISTA_REPORT_METASTABILITY_INFO" "The design MTBF is not calculated because there are no specified synchronizers in the design. " "The design MTBF is not calculated because there are no specified synchronizers in the design." { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167482130 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Number of Synchronizer Chains Found: 2 " "Number of Synchronizer Chains Found: 2" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167482130 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Shortest Synchronizer Chain: 2 Registers " "Shortest Synchronizer Chain: 2 Registers" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167482130 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 " "Fraction of Chains for which MTBFs Could Not be Calculated: 1.000" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167482130 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" "Worst Case Available Settling Time: 197.590 ns " "Worst Case Available Settling Time: 197.590 ns" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167482130 ""} { "Info" "ISTA_REPORT_METASTABILITY_INFO" " " "" { } { } 0 332114 "%1!s!" 0 0 "Design Software" 0 -1 1618167482130 ""} } { } 0 332114 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1618167482130 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1618167483035 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1618167483035 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4869 " "Peak virtual memory: 4869 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167483090 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:58:03 2021 " "Processing ended: Sun Apr 11 14:58:03 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167483090 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Elapsed time: 00:00:04" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167483090 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Total CPU time (on all processors): 00:00:04" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167483090 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1618167483090 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Timing Analyzer" 0 -1 1618167484210 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1618167484218 ""} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 11 14:58:04 2021 " "Processing started: Sun Apr 11 14:58:04 2021" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1618167484218 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1618167484218 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP " "Command: quartus_eda --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1618167484218 ""} +{ "Info" "IWSC_DONE_HDL_GENERATION" "SCOMP.vo C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/simulation/modelsim/ simulation " "Generated file SCOMP.vo in folder \"C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/simulation/modelsim/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1618167484946 ""} +{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4661 " "Peak virtual memory: 4661 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1618167484978 ""} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 11 14:58:04 2021 " "Processing ended: Sun Apr 11 14:58:04 2021" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1618167484978 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1618167484978 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1618167484978 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1618167484978 ""} +{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 48 s " "Quartus Prime Full Compilation was successful. 0 errors, 48 warnings" { } { } 0 293000 "Quartus Prime %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1618167485691 ""} diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.ammdb b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.ammdb index 39c1e60..5b152f0 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.ammdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.ammdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.cdb b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.cdb index 9e30064..82834de 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.cdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.cdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.hdb b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.hdb index 4640d1b..a8170ab 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.hdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.hdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.rcfdb b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.rcfdb index c7d1e42..5470f50 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.rcfdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.cmp.rcfdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.cdb b/incremental_db/compiled_partitions/SCOMP.root_partition.map.cdb index 14a8704..fc0c8b7 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.cdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.cdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.dpi b/incremental_db/compiled_partitions/SCOMP.root_partition.map.dpi index c4ba1a4..0c03d36 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.dpi and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.dpi differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.cdb b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.cdb index 80532c2..0a556d1 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.cdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.cdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hb_info b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hb_info index 84722d9..b16b084 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hb_info and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hb_info differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hdb b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hdb index 7ddd7cb..f69c679 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hbdb.hdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hdb b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hdb index 98742b1..6793d09 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.hdb and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.hdb differ diff --git a/incremental_db/compiled_partitions/SCOMP.root_partition.map.kpt b/incremental_db/compiled_partitions/SCOMP.root_partition.map.kpt index 852e46f..2456b24 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.root_partition.map.kpt and b/incremental_db/compiled_partitions/SCOMP.root_partition.map.kpt differ diff --git a/incremental_db/compiled_partitions/SCOMP.rrp.hdb b/incremental_db/compiled_partitions/SCOMP.rrp.hdb index da8da40..65ad8e4 100644 Binary files a/incremental_db/compiled_partitions/SCOMP.rrp.hdb and b/incremental_db/compiled_partitions/SCOMP.rrp.hdb differ diff --git a/output_files/SCOMP.asm.rpt b/output_files/SCOMP.asm.rpt index 97cf13d..a18b520 100644 --- a/output_files/SCOMP.asm.rpt +++ b/output_files/SCOMP.asm.rpt @@ -1,5 +1,5 @@ Assembler report for SCOMP -Tue Apr 06 23:27:21 2021 +Sun Apr 11 14:59:57 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -10,7 +10,7 @@ Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition 2. Assembler Summary 3. Assembler Settings 4. Assembler Generated Files - 5. Assembler Device Options: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.sof + 5. Assembler Device Options: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.sof 6. Assembler Messages @@ -38,7 +38,7 @@ https://fpgasoftware.intel.com/eula. +---------------------------------------------------------------+ ; Assembler Summary ; +-----------------------+---------------------------------------+ -; Assembler Status ; Successful - Tue Apr 06 23:27:21 2021 ; +; Assembler Status ; Successful - Sun Apr 11 14:59:57 2021 ; ; Revision Name ; SCOMP ; ; Top-level Entity Name ; SCOMP_System ; ; Family ; MAX 10 ; @@ -46,62 +46,30 @@ https://fpgasoftware.intel.com/eula. +-----------------------+---------------------------------------+ -+---------------------------------------------------------------------------------------------------------------+ -; Assembler Settings ; -+-----------------------------------------------------------------------------+----------------+----------------+ -; Option ; Setting ; Default Value ; -+-----------------------------------------------------------------------------+----------------+----------------+ -; Maximum processors allowed for parallel compilation ; All ; ; -; Use smart compilation ; Off ; Off ; -; Enable parallel Assembler and Timing Analyzer during compilation ; On ; On ; -; Enable compact report table ; Off ; Off ; -; Use configuration device ; Off ; On ; -; Generate compressed bitstreams ; On ; On ; -; Compression mode ; Off ; Off ; -; Clock source for configuration device ; Internal ; Internal ; -; Clock frequency of the configuration device ; 10 MHZ ; 10 MHz ; -; Divide clock frequency by ; 1 ; 1 ; -; Auto user code ; On ; On ; -; Configuration device ; Auto ; Auto ; -; Voltage output format ; Auto discovery ; Auto discovery ; -; Configuration device auto user code ; Off ; Off ; -; Generate Tabular Text File (.ttf) For Target Device ; Off ; Off ; -; Generate Raw Binary File (.rbf) For Target Device ; Off ; Off ; -; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off ; Off ; -; Hexadecimal Output File start address ; 0 ; 0 ; -; Hexadecimal Output File count direction ; Up ; Up ; -; Release clears before tri-states ; Off ; Off ; -; Auto-restart configuration after error ; On ; On ; -; Enable OCT_DONE ; On ; On ; -; Power On Reset scheme ; Instant ON ; Instant ON ; -; Set IO to weak pull-up prior to usermode ; On ; On ; -; Set SPI IO pins to weak pull-up prior to usermode ; On ; On ; -; Verify protect ; Off ; Off ; -; Generate Serial Vector Format File (.svf) for Target Device ; Off ; Off ; -; Generate a JEDEC STAPL Format File (.jam) for Target Device ; Off ; Off ; -; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off ; Off ; -; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On ; On ; -; In-System Programming Default Clamp State ; Tri-state ; Tri-state ; -+-----------------------------------------------------------------------------+----------------+----------------+ - - -+------------------------------------------------------------------------------------------+ -; Assembler Generated Files ; -+------------------------------------------------------------------------------------------+ -; File Name ; -+------------------------------------------------------------------------------------------+ -; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.sof ; -+------------------------------------------------------------------------------------------+ - - -+--------------------------------------------------------------------------------------------------------------------+ -; Assembler Device Options: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.sof ; -+----------------+---------------------------------------------------------------------------------------------------+ -; Option ; Setting ; -+----------------+---------------------------------------------------------------------------------------------------+ -; JTAG usercode ; 0x00325D37 ; -; Checksum ; 0x00325D37 ; -+----------------+---------------------------------------------------------------------------------------------------+ ++----------------------------------+ +; Assembler Settings ; ++--------+---------+---------------+ +; Option ; Setting ; Default Value ; ++--------+---------+---------------+ + + ++-----------------------------------------------------------------------------+ +; Assembler Generated Files ; ++-----------------------------------------------------------------------------+ +; File Name ; ++-----------------------------------------------------------------------------+ +; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.sof ; ++-----------------------------------------------------------------------------+ + + ++-------------------------------------------------------------------------------------------------------+ +; Assembler Device Options: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.sof ; ++----------------+--------------------------------------------------------------------------------------+ +; Option ; Setting ; ++----------------+--------------------------------------------------------------------------------------+ +; JTAG usercode ; 0x0032896B ; +; Checksum ; 0x0032896B ; ++----------------+--------------------------------------------------------------------------------------+ +--------------------+ @@ -110,14 +78,14 @@ https://fpgasoftware.intel.com/eula. Info: ******************************************************************* Info: Running Quartus Prime Assembler Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition - Info: Processing started: Tue Apr 06 23:27:13 2021 -Info: Command: quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP + Info: Processing started: Sun Apr 11 14:59:54 2021 +Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP Info (115031): Writing out detailed assembly data for power analysis Info (115030): Assembler is generating device programming files Info: Quartus Prime Assembler was successful. 0 errors, 0 warnings - Info: Peak virtual memory: 4691 megabytes - Info: Processing ended: Tue Apr 06 23:27:21 2021 - Info: Elapsed time: 00:00:08 - Info: Total CPU time (on all processors): 00:00:08 + Info: Peak virtual memory: 4696 megabytes + Info: Processing ended: Sun Apr 11 14:59:57 2021 + Info: Elapsed time: 00:00:03 + Info: Total CPU time (on all processors): 00:00:03 diff --git a/output_files/SCOMP.cdf b/output_files/SCOMP.cdf index 52668b2..9ce53a8 100644 --- a/output_files/SCOMP.cdf +++ b/output_files/SCOMP.cdf @@ -4,7 +4,7 @@ JedecChain; DefaultMfr(6E); P ActionCode(Cfg) - Device PartName(10M50DAF484) Path("C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/") File("SCOMP.sof") MfrSpec(OpMask(1)); + Device PartName(10M50DAF484) Path("C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/") File("SCOMP.sof") MfrSpec(OpMask(1)); ChainEnd; diff --git a/output_files/SCOMP.done b/output_files/SCOMP.done index 95617eb..84c8c28 100644 --- a/output_files/SCOMP.done +++ b/output_files/SCOMP.done @@ -1 +1 @@ -Tue Apr 06 23:27:22 2021 +Sun Apr 11 15:00:04 2021 diff --git a/output_files/SCOMP.eda.rpt b/output_files/SCOMP.eda.rpt index c2b0388..0d33497 100644 --- a/output_files/SCOMP.eda.rpt +++ b/output_files/SCOMP.eda.rpt @@ -1,5 +1,5 @@ EDA Netlist Writer report for SCOMP -Tue Apr 06 22:27:30 2021 +Sun Apr 11 15:00:04 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -37,7 +37,7 @@ https://fpgasoftware.intel.com/eula. +-------------------------------------------------------------------+ ; EDA Netlist Writer Summary ; +---------------------------+---------------------------------------+ -; EDA Netlist Writer Status ; Successful - Tue Apr 06 22:27:30 2021 ; +; EDA Netlist Writer Status ; Successful - Sun Apr 11 15:00:04 2021 ; ; Revision Name ; SCOMP ; ; Top-level Entity Name ; SCOMP_System ; ; Family ; MAX 10 ; @@ -66,13 +66,13 @@ https://fpgasoftware.intel.com/eula. +---------------------------------------------------------------------------------------------------+---------------------------+ -+------------------------------------------------------------------------------------------------+ -; Simulation Generated Files ; -+------------------------------------------------------------------------------------------------+ -; Generated Files ; -+------------------------------------------------------------------------------------------------+ -; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/simulation/modelsim/SCOMP.vo ; -+------------------------------------------------------------------------------------------------+ ++-----------------------------------------------------------------------------------+ +; Simulation Generated Files ; ++-----------------------------------------------------------------------------------+ +; Generated Files ; ++-----------------------------------------------------------------------------------+ +; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/simulation/modelsim/SCOMP.vo ; ++-----------------------------------------------------------------------------------+ +-----------------------------+ @@ -81,13 +81,13 @@ https://fpgasoftware.intel.com/eula. Info: ******************************************************************* Info: Running Quartus Prime EDA Netlist Writer Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition - Info: Processing started: Tue Apr 06 22:27:28 2021 + Info: Processing started: Sun Apr 11 15:00:03 2021 Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP -Info (204019): Generated file SCOMP.vo in folder "C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/simulation/modelsim/" for EDA simulation tool +Info (204019): Generated file SCOMP.vo in folder "C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/simulation/modelsim/" for EDA simulation tool Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings Info: Peak virtual memory: 4661 megabytes - Info: Processing ended: Tue Apr 06 22:27:30 2021 - Info: Elapsed time: 00:00:02 - Info: Total CPU time (on all processors): 00:00:02 + Info: Processing ended: Sun Apr 11 15:00:04 2021 + Info: Elapsed time: 00:00:01 + Info: Total CPU time (on all processors): 00:00:01 diff --git a/output_files/SCOMP.fit.rpt b/output_files/SCOMP.fit.rpt index e4badc0..ed3f32f 100644 --- a/output_files/SCOMP.fit.rpt +++ b/output_files/SCOMP.fit.rpt @@ -1,5 +1,5 @@ Fitter report for SCOMP -Tue Apr 06 22:27:02 2021 +Sun Apr 11 14:59:53 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -74,17 +74,17 @@ https://fpgasoftware.intel.com/eula. +----------------------------------------------------------------------------------+ ; Fitter Summary ; +------------------------------------+---------------------------------------------+ -; Fitter Status ; Successful - Tue Apr 06 22:27:02 2021 ; +; Fitter Status ; Successful - Sun Apr 11 14:59:53 2021 ; ; Quartus Prime Version ; 19.1.0 Build 670 09/22/2019 SJ Lite Edition ; ; Revision Name ; SCOMP ; ; Top-level Entity Name ; SCOMP_System ; ; Family ; MAX 10 ; ; Device ; 10M50DAF484C7G ; ; Timing Models ; Final ; -; Total logic elements ; 1,026 / 49,760 ( 2 % ) ; -; Total combinational functions ; 945 / 49,760 ( 2 % ) ; -; Dedicated logic registers ; 456 / 49,760 ( < 1 % ) ; -; Total registers ; 456 ; +; Total logic elements ; 1,042 / 49,760 ( 2 % ) ; +; Total combinational functions ; 959 / 49,760 ( 2 % ) ; +; Dedicated logic registers ; 459 / 49,760 ( < 1 % ) ; +; Total registers ; 459 ; ; Total pins ; 75 / 360 ( 21 % ) ; ; Total virtual pins ; 0 ; ; Total memory bits ; 32,768 / 1,677,312 ( 2 % ) ; @@ -159,17 +159,19 @@ https://fpgasoftware.intel.com/eula. +----------------------------+-------------+ ; Processors ; Number ; +----------------------------+-------------+ -; Number detected on machine ; 4 ; -; Maximum allowed ; 4 ; +; Number detected on machine ; 12 ; +; Maximum allowed ; 6 ; ; ; ; -; Average used ; 1.12 ; -; Maximum used ; 4 ; +; Average used ; 1.13 ; +; Maximum used ; 6 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 4.5% ; -; Processor 3 ; 3.9% ; -; Processor 4 ; 3.8% ; +; Processor 2 ; 2.8% ; +; Processor 3 ; 2.7% ; +; Processor 4 ; 2.6% ; +; Processor 5 ; 2.6% ; +; Processor 6 ; 2.6% ; +----------------------------+-------------+ @@ -193,8 +195,8 @@ https://fpgasoftware.intel.com/eula. ; Type ; Total [A + B] ; From Design Partitions [A] ; From Rapid Recompile [B] ; +---------------------+---------------------+----------------------------+--------------------------+ ; Placement (by node) ; ; ; ; -; -- Requested ; 0.00 % ( 0 / 1599 ) ; 0.00 % ( 0 / 1599 ) ; 0.00 % ( 0 / 1599 ) ; -; -- Achieved ; 0.00 % ( 0 / 1599 ) ; 0.00 % ( 0 / 1599 ) ; 0.00 % ( 0 / 1599 ) ; +; -- Requested ; 0.00 % ( 0 / 1616 ) ; 0.00 % ( 0 / 1616 ) ; 0.00 % ( 0 / 1616 ) ; +; -- Achieved ; 0.00 % ( 0 / 1616 ) ; 0.00 % ( 0 / 1616 ) ; 0.00 % ( 0 / 1616 ) ; ; ; ; ; ; ; Routing (by net) ; ; ; ; ; -- Requested ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; @@ -217,7 +219,7 @@ https://fpgasoftware.intel.com/eula. +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ ; Partition Name ; Preservation Achieved ; Preservation Level Used ; Netlist Type Used ; Preservation Method ; Notes ; +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ -; Top ; 0.00 % ( 0 / 1581 ) ; N/A ; Source File ; N/A ; ; +; Top ; 0.00 % ( 0 / 1598 ) ; N/A ; Source File ; N/A ; ; ; hard_block:auto_generated_inst ; 0.00 % ( 0 / 18 ) ; N/A ; Source File ; N/A ; ; +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ @@ -225,7 +227,7 @@ https://fpgasoftware.intel.com/eula. +--------------+ ; Pin-Out File ; +--------------+ -The pin-out file can be found in C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.pin. +The pin-out file can be found in C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.pin. +--------------------------------------------------------------------------+ @@ -233,26 +235,26 @@ The pin-out file can be found in C:/Users/IvanZou/OneDrive/Documents/ECE2031/Mot +---------------------------------------------+----------------------------+ ; Resource ; Usage ; +---------------------------------------------+----------------------------+ -; Total logic elements ; 1,026 / 49,760 ( 2 % ) ; -; -- Combinational with no register ; 570 ; -; -- Register only ; 81 ; -; -- Combinational with a register ; 375 ; +; Total logic elements ; 1,042 / 49,760 ( 2 % ) ; +; -- Combinational with no register ; 583 ; +; -- Register only ; 83 ; +; -- Combinational with a register ; 376 ; ; ; ; ; Logic element usage by number of LUT inputs ; ; -; -- 4 input functions ; 507 ; -; -- 3 input functions ; 294 ; -; -- <=2 input functions ; 144 ; -; -- Register only ; 81 ; +; -- 4 input functions ; 509 ; +; -- 3 input functions ; 308 ; +; -- <=2 input functions ; 142 ; +; -- Register only ; 83 ; ; ; ; ; Logic elements by mode ; ; -; -- normal mode ; 841 ; -; -- arithmetic mode ; 104 ; +; -- normal mode ; 854 ; +; -- arithmetic mode ; 105 ; ; ; ; -; Total registers* ; 456 / 51,509 ( < 1 % ) ; -; -- Dedicated logic registers ; 456 / 49,760 ( < 1 % ) ; +; Total registers* ; 459 / 51,509 ( < 1 % ) ; +; -- Dedicated logic registers ; 459 / 49,760 ( < 1 % ) ; ; -- I/O registers ; 0 / 1,749 ( 0 % ) ; ; ; ; -; Total LABs: partially or completely used ; 77 / 3,110 ( 2 % ) ; +; Total LABs: partially or completely used ; 81 / 3,110 ( 3 % ) ; ; Virtual pins ; 0 ; ; I/O pins ; 75 / 360 ( 21 % ) ; ; -- Clock pins ; 1 / 8 ( 13 % ) ; @@ -272,12 +274,12 @@ The pin-out file can be found in C:/Users/IvanZou/OneDrive/Documents/ECE2031/Mot ; Remote update blocks ; 0 / 1 ( 0 % ) ; ; Oscillator blocks ; 0 / 1 ( 0 % ) ; ; Impedance control blocks ; 0 / 1 ( 0 % ) ; -; Average interconnect usage (total/H/V) ; 1.3% / 1.2% / 1.5% ; -; Peak interconnect usage (total/H/V) ; 23.8% / 21.3% / 27.4% ; -; Maximum fan-out ; 263 ; +; Average interconnect usage (total/H/V) ; 1.3% / 1.1% / 1.6% ; +; Peak interconnect usage (total/H/V) ; 22.9% / 20.5% / 26.3% ; +; Maximum fan-out ; 262 ; ; Highest non-global fan-out ; 112 ; -; Total fan-out ; 4836 ; -; Average fan-out ; 2.91 ; +; Total fan-out ; 4899 ; +; Average fan-out ; 2.90 ; +---------------------------------------------+----------------------------+ * Register count does not include registers inside RAM blocks or DSP blocks. @@ -290,26 +292,26 @@ The pin-out file can be found in C:/Users/IvanZou/OneDrive/Documents/ECE2031/Mot +---------------------------------------------+-----------------------+--------------------------------+ ; Difficulty Clustering Region ; Low ; Low ; ; ; ; ; -; Total logic elements ; 1026 / 49760 ( 2 % ) ; 0 / 49760 ( 0 % ) ; -; -- Combinational with no register ; 570 ; 0 ; -; -- Register only ; 81 ; 0 ; -; -- Combinational with a register ; 375 ; 0 ; +; Total logic elements ; 1042 / 49760 ( 2 % ) ; 0 / 49760 ( 0 % ) ; +; -- Combinational with no register ; 583 ; 0 ; +; -- Register only ; 83 ; 0 ; +; -- Combinational with a register ; 376 ; 0 ; ; ; ; ; ; Logic element usage by number of LUT inputs ; ; ; -; -- 4 input functions ; 507 ; 0 ; -; -- 3 input functions ; 294 ; 0 ; -; -- <=2 input functions ; 144 ; 0 ; -; -- Register only ; 81 ; 0 ; +; -- 4 input functions ; 509 ; 0 ; +; -- 3 input functions ; 308 ; 0 ; +; -- <=2 input functions ; 142 ; 0 ; +; -- Register only ; 83 ; 0 ; ; ; ; ; ; Logic elements by mode ; ; ; -; -- normal mode ; 841 ; 0 ; -; -- arithmetic mode ; 104 ; 0 ; +; -- normal mode ; 854 ; 0 ; +; -- arithmetic mode ; 105 ; 0 ; ; ; ; ; -; Total registers ; 456 ; 0 ; -; -- Dedicated logic registers ; 456 / 49760 ( < 1 % ) ; 0 / 49760 ( 0 % ) ; +; Total registers ; 459 ; 0 ; +; -- Dedicated logic registers ; 459 / 49760 ( < 1 % ) ; 0 / 49760 ( 0 % ) ; ; -- I/O registers ; 0 ; 0 ; ; ; ; ; -; Total LABs: partially or completely used ; 77 / 3110 ( 2 % ) ; 0 / 3110 ( 0 % ) ; +; Total LABs: partially or completely used ; 81 / 3110 ( 3 % ) ; 0 / 3110 ( 0 % ) ; ; ; ; ; ; Virtual pins ; 0 ; 0 ; ; I/O pins ; 75 ; 0 ; @@ -323,18 +325,18 @@ The pin-out file can be found in C:/Users/IvanZou/OneDrive/Documents/ECE2031/Mot ; Analog-to-Digital Converter ; 2 / 2 ( 100 % ) ; 0 / 2 ( 0 % ) ; ; ; ; ; ; Connections ; ; ; -; -- Input Connections ; 274 ; 2 ; -; -- Registered Input Connections ; 260 ; 0 ; -; -- Output Connections ; 4 ; 272 ; +; -- Input Connections ; 273 ; 2 ; +; -- Registered Input Connections ; 259 ; 0 ; +; -- Output Connections ; 4 ; 271 ; ; -- Registered Output Connections ; 0 ; 0 ; ; ; ; ; ; Internal Connections ; ; ; -; -- Total Connections ; 4863 ; 284 ; -; -- Registered Connections ; 2248 ; 0 ; +; -- Total Connections ; 4926 ; 283 ; +; -- Registered Connections ; 2268 ; 0 ; ; ; ; ; ; External Connections ; ; ; -; -- Top ; 4 ; 274 ; -; -- hard_block:auto_generated_inst ; 274 ; 0 ; +; -- Top ; 4 ; 273 ; +; -- hard_block:auto_generated_inst ; 273 ; 0 ; ; ; ; ; ; Partition Interface ; ; ; ; -- Input Ports ; 15 ; 2 ; @@ -1105,33 +1107,34 @@ Note: Pin directions (input, output or bidir) are based on device operating in u +-------------------------------------------+-------------+---------------------------+---------------+-------------+------+------------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+------------+-----------------------------------------------------------------------------------------+-------------------+--------------+ ; Compilation Hierarchy Node ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M9Ks ; UFM Blocks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; ADC blocks ; Full Hierarchy Name ; Entity Name ; Library Name ; +-------------------------------------------+-------------+---------------------------+---------------+-------------+------+------------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+------------+-----------------------------------------------------------------------------------------+-------------------+--------------+ -; |SCOMP_System ; 1026 (1) ; 456 (0) ; 0 (0) ; 32768 ; 4 ; 1 ; 0 ; 0 ; 0 ; 75 ; 0 ; 570 (1) ; 81 (0) ; 375 (0) ; 0 ; |SCOMP_System ; SCOMP_System ; work ; +; |SCOMP_System ; 1042 (1) ; 459 (0) ; 0 (0) ; 32768 ; 4 ; 1 ; 0 ; 0 ; 0 ; 75 ; 0 ; 583 (1) ; 83 (0) ; 376 (0) ; 0 ; |SCOMP_System ; SCOMP_System ; work ; ; |DIG_IN:inst7| ; 10 (10) ; 10 (10) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 10 (10) ; 0 ; |SCOMP_System|DIG_IN:inst7 ; DIG_IN ; work ; -; |DIG_OUT:inst6| ; 10 (10) ; 10 (10) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 9 (9) ; 1 (1) ; 0 ; |SCOMP_System|DIG_OUT:inst6 ; DIG_OUT ; work ; -; |HEX_DISP_6:inst9| ; 62 (0) ; 24 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 38 (0) ; 13 (0) ; 11 (0) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9 ; HEX_DISP_6 ; work ; +; |DIG_OUT:inst6| ; 10 (10) ; 10 (10) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 7 (7) ; 3 (3) ; 0 ; |SCOMP_System|DIG_OUT:inst6 ; DIG_OUT ; work ; +; |HEX_DISP_6:inst9| ; 63 (0) ; 24 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 39 (0) ; 15 (0) ; 9 (0) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9 ; HEX_DISP_6 ; work ; ; |HEX_DISP:inst1| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 4 (4) ; 0 (0) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst1 ; HEX_DISP ; work ; -; |HEX_DISP:inst2| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 4 (4) ; 0 (0) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst2 ; HEX_DISP ; work ; -; |HEX_DISP:inst3| ; 8 (8) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 4 (4) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst3 ; HEX_DISP ; work ; -; |HEX_DISP:inst4| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 4 (4) ; 0 (0) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst4 ; HEX_DISP ; work ; -; |HEX_DISP:inst5| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 0 (0) ; 4 (4) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst5 ; HEX_DISP ; work ; -; |HEX_DISP:inst6| ; 10 (10) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 1 (1) ; 3 (3) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst6 ; HEX_DISP ; work ; -; |I2C_INTERFACE:inst13| ; 287 (90) ; 125 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 148 (74) ; 37 (0) ; 102 (16) ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13 ; I2C_INTERFACE ; work ; -; |i2c_ctrl:inst14| ; 89 (89) ; 70 (70) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 18 (18) ; 28 (28) ; 43 (43) ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14 ; i2c_ctrl ; work ; -; |i2c_master:inst| ; 111 (111) ; 55 (55) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 56 (56) ; 9 (9) ; 46 (46) ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst ; i2c_master ; work ; -; |IO_DECODER:inst3| ; 18 (18) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 8 (8) ; 0 (0) ; 10 (10) ; 0 ; |SCOMP_System|IO_DECODER:inst3 ; IO_DECODER ; work ; -; |Incrementer:inst10| ; 19 (19) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 19 (19) ; 0 ; |SCOMP_System|Incrementer:inst10 ; Incrementer ; work ; +; |HEX_DISP:inst2| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 2 (2) ; 2 (2) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst2 ; HEX_DISP ; work ; +; |HEX_DISP:inst3| ; 9 (9) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (5) ; 0 (0) ; 4 (4) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst3 ; HEX_DISP ; work ; +; |HEX_DISP:inst4| ; 10 (10) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 6 (6) ; 2 (2) ; 2 (2) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst4 ; HEX_DISP ; work ; +; |HEX_DISP:inst5| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 4 (4) ; 0 (0) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst5 ; HEX_DISP ; work ; +; |HEX_DISP:inst6| ; 11 (11) ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 7 (7) ; 3 (3) ; 1 (1) ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst6 ; HEX_DISP ; work ; +; |I2C_INTERFACE:inst13| ; 296 (92) ; 125 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 154 (75) ; 42 (0) ; 100 (17) ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13 ; I2C_INTERFACE ; work ; +; |i2c_ctrl:inst14| ; 92 (92) ; 70 (70) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 21 (21) ; 30 (30) ; 41 (41) ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14 ; i2c_ctrl ; work ; +; |i2c_master:inst| ; 114 (114) ; 55 (55) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 58 (58) ; 12 (12) ; 44 (44) ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst ; i2c_master ; work ; +; |IO_DECODER:inst3| ; 17 (17) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 13 (13) ; 0 (0) ; 4 (4) ; 0 ; |SCOMP_System|IO_DECODER:inst3 ; IO_DECODER ; work ; +; |Incrementer:inst10| ; 20 (20) ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 1 (1) ; 19 (19) ; 0 ; |SCOMP_System|Incrementer:inst10 ; Incrementer ; work ; ; |PLL_main:inst1| ; 1 (0) ; 1 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (0) ; 0 ; |SCOMP_System|PLL_main:inst1 ; PLL_main ; work ; ; |altpll:altpll_component| ; 1 (0) ; 1 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (0) ; 0 ; |SCOMP_System|PLL_main:inst1|altpll:altpll_component ; altpll ; work ; ; |PLL_main_altpll:auto_generated| ; 1 (1) ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 1 (1) ; 0 ; |SCOMP_System|PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated ; PLL_main_altpll ; work ; -; |PWM_GEN:inst14| ; 15 (15) ; 11 (11) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 5 (5) ; 6 (6) ; 0 ; |SCOMP_System|PWM_GEN:inst14 ; PWM_GEN ; work ; -; |QuadratureDecoder:inst11| ; 57 (57) ; 24 (24) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 30 (30) ; 2 (2) ; 25 (25) ; 0 ; |SCOMP_System|QuadratureDecoder:inst11 ; QuadratureDecoder ; work ; -; |SCOMP:inst| ; 506 (430) ; 177 (177) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 328 (252) ; 12 (12) ; 166 (166) ; 0 ; |SCOMP_System|SCOMP:inst ; SCOMP ; work ; +; |PWM_GEN:inst14| ; 17 (17) ; 15 (15) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 2 (2) ; 2 (2) ; 13 (13) ; 0 ; |SCOMP_System|PWM_GEN:inst14 ; PWM_GEN ; work ; +; |QuadratureDecoder:inst11| ; 57 (57) ; 24 (24) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 31 (31) ; 2 (2) ; 24 (24) ; 0 ; |SCOMP_System|QuadratureDecoder:inst11 ; QuadratureDecoder ; work ; +; |SCOMP:inst| ; 507 (429) ; 177 (177) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 326 (250) ; 11 (11) ; 170 (168) ; 0 ; |SCOMP_System|SCOMP:inst ; SCOMP ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; |SCOMP_System|SCOMP:inst|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_efs3:auto_generated| ; 0 (0) ; 0 (0) ; 0 (0) ; 32768 ; 4 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 (0) ; 0 (0) ; 0 (0) ; 0 ; |SCOMP_System|SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated ; altsyncram_efs3 ; work ; -; |lpm_clshift:shifter| ; 76 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 76 (0) ; 0 (0) ; 0 (0) ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter ; lpm_clshift ; work ; -; |lpm_clshift_fuc:auto_generated| ; 76 (76) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 76 (76) ; 0 (0) ; 0 (0) ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter|lpm_clshift_fuc:auto_generated ; lpm_clshift_fuc ; work ; -; |TIMER:inst4| ; 18 (18) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 1 (1) ; 0 (0) ; 17 (17) ; 0 ; |SCOMP_System|TIMER:inst4 ; TIMER ; work ; -; |clk_div:inst5| ; 52 (52) ; 40 (40) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 12 (12) ; 3 (3) ; 37 (37) ; 0 ; |SCOMP_System|clk_div:inst5 ; clk_div ; work ; +; |lpm_clshift:shifter| ; 78 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 76 (0) ; 0 (0) ; 2 (0) ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter ; lpm_clshift ; work ; +; |lpm_clshift_fuc:auto_generated| ; 78 (78) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 76 (76) ; 0 (0) ; 2 (2) ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter|lpm_clshift_fuc:auto_generated ; lpm_clshift_fuc ; work ; +; |TIMER:inst4| ; 22 (18) ; 16 (16) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 5 (1) ; 0 (0) ; 17 (17) ; 0 ; |SCOMP_System|TIMER:inst4 ; TIMER ; work ; +; |lpm_bustri:IO_BUS| ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 4 (4) ; 0 (0) ; 0 (0) ; 0 ; |SCOMP_System|TIMER:inst4|lpm_bustri:IO_BUS ; lpm_bustri ; work ; +; |clk_div:inst5| ; 51 (51) ; 39 (39) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 12 (12) ; 3 (3) ; 36 (36) ; 0 ; |SCOMP_System|clk_div:inst5 ; clk_div ; work ; +-------------------------------------------+-------------+---------------------------+---------------+-------------+------+------------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+------------+-----------------------------------------------------------------------------------------+-------------------+--------------+ Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy. @@ -1199,22 +1202,22 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; LEDR[2] ; Output ; -- ; -- ; -- ; -- ; -- ; ; LEDR[1] ; Output ; -- ; -- ; -- ; -- ; -- ; ; LEDR[0] ; Output ; -- ; -- ; -- ; -- ; -- ; -; GSENSOR_SDI ; Bidir ; -- ; (6) 868 ps ; -- ; -- ; -- ; +; GSENSOR_SDI ; Bidir ; (6) 868 ps ; -- ; -- ; -- ; -- ; ; GSENSOR_SCLK ; Bidir ; -- ; (6) 868 ps ; -- ; -- ; -- ; ; SW[9] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; ; SW[8] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; ; SW[7] ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; -; SW[0] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; -; KEY1 ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; +; SW[0] ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; +; KEY1 ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; ; KEY0 ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; ; clock_50 ; Input ; -- ; -- ; -- ; -- ; -- ; -; SW[1] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; +; SW[1] ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; ; SW[2] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; -; SW[3] ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; +; SW[3] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; ; SW[4] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; -; SW[5] ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; -; SW[6] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; -; ENCODER_H1 ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; +; SW[5] ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; +; SW[6] ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; +; ENCODER_H1 ; Input ; (6) 868 ps ; -- ; -- ; -- ; -- ; ; ENCODER_H2 ; Input ; -- ; (6) 868 ps ; -- ; -- ; -- ; +--------------+----------+---------------+---------------+-----------------------+-----+------+ @@ -1225,15 +1228,15 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; Source Pin / Fanout ; Pad To Core Index ; Setting ; +--------------------------------------------------------------------------------------------+-------------------+---------+ ; GSENSOR_SDI ; ; ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[0]~0 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|Selector29~0 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[1]~1 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[2]~2 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[3]~3 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[4]~4 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[5]~5 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[6]~6 ; 1 ; 6 ; -; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[7]~7 ; 1 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[0]~0 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|Selector29~0 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[1]~1 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[2]~2 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[3]~3 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[4]~4 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[5]~5 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[6]~6 ; 0 ; 6 ; +; - I2C_INTERFACE:inst13|i2c_master:inst|data_rx[7]~7 ; 0 ; 6 ; ; GSENSOR_SCLK ; ; ; ; - I2C_INTERFACE:inst13|i2c_master:inst|stretch~0 ; 1 ; 6 ; ; SW[9] ; ; ; @@ -1246,30 +1249,30 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; - DIG_IN:inst7|B_DI[7] ; 0 ; 6 ; ; - IN2~output ; 0 ; 6 ; ; SW[0] ; ; ; -; - DIG_IN:inst7|B_DI[0] ; 1 ; 6 ; +; - DIG_IN:inst7|B_DI[0] ; 0 ; 6 ; ; KEY1 ; ; ; -; - Incrementer:inst10|state.BTN_high ; 0 ; 6 ; -; - Incrementer:inst10|count[15]~18 ; 0 ; 6 ; +; - Incrementer:inst10|state.BTN_high ; 1 ; 6 ; +; - Incrementer:inst10|count[9]~18 ; 1 ; 6 ; ; KEY0 ; ; ; ; - PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|pll_lock_sync ; 1 ; 6 ; ; - PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|pll1 ; 1 ; 6 ; ; clock_50 ; ; ; ; SW[1] ; ; ; -; - DIG_IN:inst7|B_DI[1] ; 1 ; 6 ; +; - DIG_IN:inst7|B_DI[1] ; 0 ; 6 ; ; SW[2] ; ; ; ; - DIG_IN:inst7|B_DI[2] ; 1 ; 6 ; ; SW[3] ; ; ; -; - DIG_IN:inst7|B_DI[3] ; 0 ; 6 ; +; - DIG_IN:inst7|B_DI[3] ; 1 ; 6 ; ; SW[4] ; ; ; ; - DIG_IN:inst7|B_DI[4] ; 1 ; 6 ; ; SW[5] ; ; ; -; - DIG_IN:inst7|B_DI[5] ; 0 ; 6 ; +; - DIG_IN:inst7|B_DI[5] ; 1 ; 6 ; ; SW[6] ; ; ; -; - DIG_IN:inst7|B_DI[6] ; 1 ; 6 ; +; - DIG_IN:inst7|B_DI[6] ; 0 ; 6 ; ; ENCODER_H1 ; ; ; -; - QuadratureDecoder:inst11|AB1[1]~feeder ; 1 ; 6 ; +; - QuadratureDecoder:inst11|AB1[1]~feeder ; 0 ; 6 ; ; ENCODER_H2 ; ; ; -; - QuadratureDecoder:inst11|AB1[0] ; 1 ; 6 ; +; - QuadratureDecoder:inst11|AB1[0]~feeder ; 1 ; 6 ; +--------------------------------------------------------------------------------------------+-------------------+---------+ @@ -1278,42 +1281,42 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +----------------------------------------------------------------------------------------+--------------------+---------+--------------+--------+----------------------+------------------+---------------------------+ ; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ; +----------------------------------------------------------------------------------------+--------------------+---------+--------------+--------+----------------------+------------------+---------------------------+ -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[15]~11 ; LCCOMB_X50_Y38_N6 ; 8 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 ; LCCOMB_X49_Y38_N10 ; 38 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 ; LCCOMB_X49_Y38_N10 ; 163 ; Async. clear ; yes ; Global Clock ; GCLK2 ; -- ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~2 ; LCCOMB_X50_Y38_N12 ; 8 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|latch_rdy~0 ; LCCOMB_X49_Y38_N4 ; 1 ; Async. clear ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|tx_addr[7]~1 ; LCCOMB_X51_Y35_N28 ; 7 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|tx_byte[7]~1 ; LCCOMB_X51_Y37_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_master:inst|WideOr12~0 ; LCCOMB_X46_Y35_N0 ; 3 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_master:inst|addr_rw[7]~3 ; LCCOMB_X50_Y35_N10 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; FF_X49_Y38_N13 ; 50 ; Clock ; yes ; Global Clock ; GCLK9 ; -- ; -; I2C_INTERFACE:inst13|i2c_master:inst|state~14 ; LCCOMB_X46_Y35_N26 ; 9 ; Clock enable ; no ; -- ; -- ; -- ; -; I2C_INTERFACE:inst13|inst12 ; LCCOMB_X51_Y43_N22 ; 11 ; Clock ; yes ; Global Clock ; GCLK5 ; -- ; -; I2C_INTERFACE:inst13|inst13 ; LCCOMB_X51_Y39_N8 ; 16 ; Clock ; yes ; Global Clock ; GCLK7 ; -- ; -; I2C_INTERFACE:inst13|inst6 ; LCCOMB_X51_Y43_N18 ; 1 ; Clock ; no ; -- ; -- ; -- ; -; IO_DECODER:inst3|HEX0_EN ; LCCOMB_X50_Y43_N28 ; 16 ; Clock ; yes ; Global Clock ; GCLK11 ; -- ; -; IO_DECODER:inst3|HEX1_EN ; LCCOMB_X50_Y43_N30 ; 8 ; Clock ; yes ; Global Clock ; GCLK14 ; -- ; -; IO_DECODER:inst3|LED_EN ; LCCOMB_X50_Y43_N2 ; 10 ; Clock ; yes ; Global Clock ; GCLK10 ; -- ; -; IO_DECODER:inst3|PWM_EN ; LCCOMB_X50_Y43_N12 ; 5 ; Clock ; yes ; Global Clock ; GCLK13 ; -- ; -; IO_DECODER:inst3|SWITCH_EN ; LCCOMB_X50_Y43_N0 ; 10 ; Clock ; yes ; Global Clock ; GCLK12 ; -- ; -; Incrementer:inst10|count[15]~18 ; LCCOMB_X49_Y46_N18 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[15]~11 ; LCCOMB_X60_Y36_N14 ; 8 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 ; LCCOMB_X56_Y38_N28 ; 38 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 ; LCCOMB_X56_Y38_N28 ; 165 ; Async. clear ; yes ; Global Clock ; GCLK12 ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~2 ; LCCOMB_X61_Y36_N28 ; 8 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|latch_rdy~0 ; LCCOMB_X56_Y38_N6 ; 1 ; Async. clear ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|tx_addr[7]~1 ; LCCOMB_X58_Y36_N12 ; 7 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|tx_byte[7]~1 ; LCCOMB_X62_Y36_N10 ; 8 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_master:inst|WideOr12~0 ; LCCOMB_X56_Y35_N24 ; 3 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_master:inst|addr_rw[7]~3 ; LCCOMB_X55_Y36_N10 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; FF_X56_Y38_N3 ; 50 ; Clock ; yes ; Global Clock ; GCLK14 ; -- ; +; I2C_INTERFACE:inst13|i2c_master:inst|state~14 ; LCCOMB_X56_Y35_N12 ; 9 ; Clock enable ; no ; -- ; -- ; -- ; +; I2C_INTERFACE:inst13|inst12 ; LCCOMB_X58_Y38_N18 ; 11 ; Clock ; yes ; Global Clock ; GCLK6 ; -- ; +; I2C_INTERFACE:inst13|inst13 ; LCCOMB_X58_Y38_N28 ; 16 ; Clock ; yes ; Global Clock ; GCLK11 ; -- ; +; I2C_INTERFACE:inst13|inst6 ; LCCOMB_X57_Y38_N2 ; 1 ; Clock ; no ; -- ; -- ; -- ; +; IO_DECODER:inst3|HEX0_EN ; LCCOMB_X57_Y38_N16 ; 16 ; Clock ; yes ; Global Clock ; GCLK10 ; -- ; +; IO_DECODER:inst3|HEX1_EN ; LCCOMB_X57_Y38_N12 ; 8 ; Clock ; yes ; Global Clock ; GCLK13 ; -- ; +; IO_DECODER:inst3|LED_EN ; LCCOMB_X58_Y38_N26 ; 10 ; Clock ; yes ; Global Clock ; GCLK9 ; -- ; +; IO_DECODER:inst3|PWM_EN ; LCCOMB_X58_Y38_N4 ; 7 ; Clock ; yes ; Global Clock ; GCLK5 ; -- ; +; IO_DECODER:inst3|SWITCH_EN ; LCCOMB_X58_Y38_N22 ; 10 ; Clock ; yes ; Global Clock ; GCLK7 ; -- ; +; Incrementer:inst10|count[9]~18 ; LCCOMB_X57_Y39_N12 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; ; KEY0 ; PIN_B8 ; 2 ; Async. clear ; no ; -- ; -- ; -- ; -; PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 263 ; Clock ; yes ; Global Clock ; GCLK8 ; -- ; +; PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 262 ; Clock ; yes ; Global Clock ; GCLK8 ; -- ; ; PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_locked ; PLL_4 ; 9 ; Clock ; no ; -- ; -- ; -- ; -; QuadratureDecoder:inst11|count[9]~18 ; LCCOMB_X51_Y46_N8 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; -; SCOMP:inst|IR[0]~0 ; LCCOMB_X49_Y42_N0 ; 11 ; Clock enable ; no ; -- ; -- ; -- ; -; SCOMP:inst|MW ; FF_X49_Y40_N3 ; 5 ; Write enable ; no ; -- ; -- ; -- ; -; SCOMP:inst|PC[0]~2 ; LCCOMB_X45_Y42_N6 ; 11 ; Clock enable ; no ; -- ; -- ; -- ; -; SCOMP:inst|PC_stack[0][0]~0 ; LCCOMB_X55_Y43_N16 ; 99 ; Clock enable ; no ; -- ; -- ; -- ; -; SCOMP:inst|PC_stack[9][0]~1 ; LCCOMB_X55_Y43_N20 ; 11 ; Clock enable ; no ; -- ; -- ; -- ; -; TIMER:inst4|process_0~0 ; LCCOMB_X51_Y43_N6 ; 16 ; Async. clear ; no ; -- ; -- ; -- ; -; clk_div:inst5|LessThan0~1 ; LCCOMB_X2_Y38_N28 ; 6 ; Sync. clear ; no ; -- ; -- ; -- ; -; clk_div:inst5|LessThan1~2 ; LCCOMB_X44_Y1_N24 ; 9 ; Sync. clear ; no ; -- ; -- ; -- ; -; clk_div:inst5|LessThan4~6 ; LCCOMB_X1_Y37_N24 ; 19 ; Sync. clear ; no ; -- ; -- ; -- ; -; clk_div:inst5|clock_100kHz ; FF_X1_Y38_N7 ; 47 ; Clock ; yes ; Global Clock ; GCLK1 ; -- ; -; clk_div:inst5|clock_10Hz ; FF_X1_Y38_N9 ; 16 ; Clock ; yes ; Global Clock ; GCLK0 ; -- ; -; clk_div:inst5|clock_10kHz ; FF_X45_Y1_N1 ; 6 ; Clock ; yes ; Global Clock ; GCLK16 ; -- ; +; QuadratureDecoder:inst11|count[7]~18 ; LCCOMB_X51_Y38_N26 ; 16 ; Clock enable ; no ; -- ; -- ; -- ; +; SCOMP:inst|IR[0]~0 ; LCCOMB_X56_Y38_N18 ; 11 ; Clock enable ; no ; -- ; -- ; -- ; +; SCOMP:inst|MW ; FF_X54_Y38_N23 ; 5 ; Write enable ; no ; -- ; -- ; -- ; +; SCOMP:inst|PC[0]~2 ; LCCOMB_X58_Y39_N14 ; 11 ; Clock enable ; no ; -- ; -- ; -- ; +; SCOMP:inst|PC_stack[0][0]~0 ; LCCOMB_X55_Y42_N10 ; 99 ; Clock enable ; no ; -- ; -- ; -- ; +; SCOMP:inst|PC_stack[9][0]~1 ; LCCOMB_X55_Y42_N8 ; 11 ; Clock enable ; no ; -- ; -- ; -- ; +; TIMER:inst4|process_0~0 ; LCCOMB_X59_Y40_N26 ; 16 ; Async. clear ; no ; -- ; -- ; -- ; +; clk_div:inst5|LessThan0~1 ; LCCOMB_X1_Y38_N24 ; 6 ; Sync. clear ; no ; -- ; -- ; -- ; +; clk_div:inst5|LessThan1~2 ; LCCOMB_X45_Y1_N24 ; 9 ; Sync. clear ; no ; -- ; -- ; -- ; +; clk_div:inst5|LessThan5~6 ; LCCOMB_X1_Y36_N20 ; 19 ; Sync. clear ; no ; -- ; -- ; -- ; +; clk_div:inst5|clock_100kHz ; FF_X1_Y38_N15 ; 47 ; Clock ; yes ; Global Clock ; GCLK0 ; -- ; +; clk_div:inst5|clock_10Hz ; FF_X2_Y38_N3 ; 16 ; Clock ; yes ; Global Clock ; GCLK2 ; -- ; +; clk_div:inst5|clock_25kHz ; FF_X45_Y1_N23 ; 8 ; Clock ; yes ; Global Clock ; GCLK19 ; -- ; ; clock_50 ; PIN_N14 ; 1 ; Clock ; no ; -- ; -- ; -- ; +----------------------------------------------------------------------------------------+--------------------+---------+--------------+--------+----------------------+------------------+---------------------------+ @@ -1323,19 +1326,19 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +----------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ ; Name ; Location ; Fan-Out ; Fan-Out Using Intentional Clock Skew ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ; +----------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 ; LCCOMB_X49_Y38_N10 ; 163 ; 0 ; Global Clock ; GCLK2 ; -- ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; FF_X49_Y38_N13 ; 50 ; 17 ; Global Clock ; GCLK9 ; -- ; -; I2C_INTERFACE:inst13|inst12 ; LCCOMB_X51_Y43_N22 ; 11 ; 0 ; Global Clock ; GCLK5 ; -- ; -; I2C_INTERFACE:inst13|inst13 ; LCCOMB_X51_Y39_N8 ; 16 ; 0 ; Global Clock ; GCLK7 ; -- ; -; IO_DECODER:inst3|HEX0_EN ; LCCOMB_X50_Y43_N28 ; 16 ; 0 ; Global Clock ; GCLK11 ; -- ; -; IO_DECODER:inst3|HEX1_EN ; LCCOMB_X50_Y43_N30 ; 8 ; 0 ; Global Clock ; GCLK14 ; -- ; -; IO_DECODER:inst3|LED_EN ; LCCOMB_X50_Y43_N2 ; 10 ; 0 ; Global Clock ; GCLK10 ; -- ; -; IO_DECODER:inst3|PWM_EN ; LCCOMB_X50_Y43_N12 ; 5 ; 0 ; Global Clock ; GCLK13 ; -- ; -; IO_DECODER:inst3|SWITCH_EN ; LCCOMB_X50_Y43_N0 ; 10 ; 0 ; Global Clock ; GCLK12 ; -- ; -; PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 263 ; 14 ; Global Clock ; GCLK8 ; -- ; -; clk_div:inst5|clock_100kHz ; FF_X1_Y38_N7 ; 47 ; 8 ; Global Clock ; GCLK1 ; -- ; -; clk_div:inst5|clock_10Hz ; FF_X1_Y38_N9 ; 16 ; 0 ; Global Clock ; GCLK0 ; -- ; -; clk_div:inst5|clock_10kHz ; FF_X45_Y1_N1 ; 6 ; 6 ; Global Clock ; GCLK16 ; -- ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 ; LCCOMB_X56_Y38_N28 ; 165 ; 0 ; Global Clock ; GCLK12 ; -- ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; FF_X56_Y38_N3 ; 50 ; 9 ; Global Clock ; GCLK14 ; -- ; +; I2C_INTERFACE:inst13|inst12 ; LCCOMB_X58_Y38_N18 ; 11 ; 0 ; Global Clock ; GCLK6 ; -- ; +; I2C_INTERFACE:inst13|inst13 ; LCCOMB_X58_Y38_N28 ; 16 ; 0 ; Global Clock ; GCLK11 ; -- ; +; IO_DECODER:inst3|HEX0_EN ; LCCOMB_X57_Y38_N16 ; 16 ; 0 ; Global Clock ; GCLK10 ; -- ; +; IO_DECODER:inst3|HEX1_EN ; LCCOMB_X57_Y38_N12 ; 8 ; 0 ; Global Clock ; GCLK13 ; -- ; +; IO_DECODER:inst3|LED_EN ; LCCOMB_X58_Y38_N26 ; 10 ; 0 ; Global Clock ; GCLK9 ; -- ; +; IO_DECODER:inst3|PWM_EN ; LCCOMB_X58_Y38_N4 ; 7 ; 0 ; Global Clock ; GCLK5 ; -- ; +; IO_DECODER:inst3|SWITCH_EN ; LCCOMB_X58_Y38_N22 ; 10 ; 0 ; Global Clock ; GCLK7 ; -- ; +; PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] ; PLL_4 ; 262 ; 28 ; Global Clock ; GCLK8 ; -- ; +; clk_div:inst5|clock_100kHz ; FF_X1_Y38_N15 ; 47 ; 3 ; Global Clock ; GCLK0 ; -- ; +; clk_div:inst5|clock_10Hz ; FF_X2_Y38_N3 ; 16 ; 1 ; Global Clock ; GCLK2 ; -- ; +; clk_div:inst5|clock_25kHz ; FF_X45_Y1_N23 ; 8 ; 8 ; Global Clock ; GCLK19 ; -- ; +----------------------------------------------------------------------------------------+--------------------+---------+--------------------------------------+----------------------+------------------+---------------------------+ @@ -1344,7 +1347,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +--------------------------------------------------------------------------------------+------+-------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+---------------------+----------------------------------------------------------------+----------------------+------------------------+------------------------+----------+------------------------+---------------+ ; Name ; Type ; Mode ; Clock Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M9Ks ; MIF ; Location ; Mixed Width RDW Mode ; Port A RDW Mode ; Port B RDW Mode ; ECC Mode ; ECC Pipeline Registers ; Fits in MLABs ; +--------------------------------------------------------------------------------------+------+-------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+---------------------+----------------------------------------------------------------+----------------------+------------------------+------------------------+----------+------------------------+---------------+ -; SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM ; AUTO ; Single Port ; Single Clock ; 2048 ; 16 ; -- ; -- ; yes ; no ; -- ; -- ; 32768 ; 2048 ; 16 ; -- ; -- ; 32768 ; 4 ; VelocityControl.mif ; M9K_X53_Y39_N0, M9K_X53_Y42_N0, M9K_X53_Y40_N0, M9K_X53_Y41_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +; SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM ; AUTO ; Single Port ; Single Clock ; 2048 ; 16 ; -- ; -- ; yes ; no ; -- ; -- ; 32768 ; 2048 ; 16 ; -- ; -- ; 32768 ; 4 ; VelocityControl.mif ; M9K_X53_Y41_N0, M9K_X53_Y40_N0, M9K_X53_Y38_N0, M9K_X53_Y39_N0 ; Don't care ; New data with NBE Read ; New data with NBE Read ; Off ; No ; No - Unknown ; +--------------------------------------------------------------------------------------+------+-------------+--------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+---------------------+----------------------------------------------------------------+----------------------+------------------------+------------------------+----------+------------------------+---------------+ Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section. @@ -1355,12 +1358,12 @@ RAM content values are presented in the following format: (Binary) (Octal) (Deci +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ ; Addr ; +0 ; +1 ; +2 ; +3 ; +4 ; +5 ; +6 ; +7 ; +----------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+------------------------------+ -;0;(0000100000101000) (4050) (2088) (828) ;(0011100000000100) (34004) (14340) (3804) ;(0000100000101001) (4051) (2089) (829) ;(0011100000010111) (34027) (14359) (3817) ;(1001000000000000) (110000) (36864) (9000) ;(1001100000100001) (114041) (38945) (9821) ;(1001000011110001) (110361) (37105) (90F1) ;(1001100000000100) (114004) (38916) (9804) ; -;8;(1000000000001010) (100012) (32778) (800A) ;(0010100000000100) (24004) (10244) (2804) ;(1000000000010010) (100022) (32786) (8012) ;(1001000011110001) (110361) (37105) (90F1) ;(0010000000101101) (20055) (8237) (202D) ;(0110000000000001) (60001) (24577) (6001) ;(1001100000000101) (114005) (38917) (9805) ;(1001000011110001) (110361) (37105) (90F1) ; -;16;(0001000000101101) (10055) (4141) (102D) ;(1000100000000000) (104000) (34816) (8800) ;(1001100000000010) (114002) (38914) (9802) ;(1001000000000010) (110002) (36866) (9002) ;(0110111111111110) (67776) (28670) (6FFE) ;(0011000000010011) (30023) (12307) (3013) ;(1000100000000000) (104000) (34816) (8800) ;(1001000000000000) (110000) (36864) (9000) ; -;24;(1001100000100001) (114041) (38945) (9821) ;(1001000011110001) (110361) (37105) (90F1) ;(1000000000100010) (100042) (32802) (8022) ;(1001100000000100) (114004) (38916) (9804) ;(0010000000101100) (20054) (8236) (202C) ;(0100000000011111) (40037) (16415) (401F) ;(0010100000010111) (24027) (10263) (2817) ;(0000100000100110) (4046) (2086) (826) ; -;32;(1001100000100001) (114041) (38945) (9821) ;(0010100000011111) (24037) (10271) (281F) ;(0011100000100101) (34045) (14373) (3825) ;(0101100000100111) (54047) (22567) (5827) ;(0110100000000001) (64001) (26625) (6801) ;(1000100000000000) (104000) (34816) (8800) ;(0000000000000000) (0) (0) (00) ;(1111111111111111) (177777) (65535) (FFFF) ; -;40;(0000000000000001) (1) (1) (01) ;(0000000000000000) (0) (0) (00) ;(0000000000001111) (17) (15) (0F) ;(0000000000011001) (31) (25) (19) ;(0000001000011100) (1034) (540) (21C) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ; +;0;(0000100000100110) (4046) (2086) (826) ;(0011100000000100) (34004) (14340) (3804) ;(0000100000100111) (4047) (2087) (827) ;(0011100000010101) (34025) (14357) (3815) ;(1001000000000000) (110000) (36864) (9000) ;(1001100000100001) (114041) (38945) (9821) ;(1000000000001000) (100010) (32776) (8008) ;(0010100000000100) (24004) (10244) (2804) ; +;8;(1000000000010000) (100020) (32784) (8010) ;(1001000011110001) (110361) (37105) (90F1) ;(1001100000000100) (114004) (38916) (9804) ;(0010000000101100) (20054) (8236) (202C) ;(1001100000000101) (114005) (38917) (9805) ;(1001000011110001) (110361) (37105) (90F1) ;(0001000000101100) (10054) (4140) (102C) ;(1000100000000000) (104000) (34816) (8800) ; +;16;(1001100000000010) (114002) (38914) (9802) ;(1001000000000010) (110002) (36866) (9002) ;(0110111111111111) (67777) (28671) (6FFF) ;(0011000000010001) (30021) (12305) (3011) ;(1000100000000000) (104000) (34816) (8800) ;(1001000000000000) (110000) (36864) (9000) ;(1001100000100001) (114041) (38945) (9821) ;(1001000011110001) (110361) (37105) (90F1) ; +;24;(1000000000100000) (100040) (32800) (8020) ;(1001100000000100) (114004) (38916) (9804) ;(0010000000101010) (20052) (8234) (202A) ;(0100000000011101) (40035) (16413) (401D) ;(0010100000010101) (24025) (10261) (2815) ;(0000100000100100) (4044) (2084) (824) ;(1001100000100001) (114041) (38945) (9821) ;(0010100000011101) (24035) (10269) (281D) ; +;32;(0011100000100011) (34043) (14371) (3823) ;(0101100000100101) (54045) (22565) (5825) ;(0110100000000001) (64001) (26625) (6801) ;(1000100000000000) (104000) (34816) (8800) ;(0000000000000000) (0) (0) (00) ;(1111111111111111) (177777) (65535) (FFFF) ;(0000000000000001) (1) (1) (01) ;(0000000000000000) (0) (0) (00) ; +;40;(0000000000001111) (17) (15) (0F) ;(0000000000011001) (31) (25) (19) ;(0000001000011100) (1034) (540) (21C) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ; ;48;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ; ;56;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ; ;64;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ; @@ -1613,173 +1616,177 @@ RAM content values are presented in the following format: (Binary) (Octal) (Deci ;2040;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ;(0000000000000000) (0) (0) (00) ; -+-------------------------------------------------+ -; Routing Usage Summary ; -+-----------------------+-------------------------+ -; Routing Resource Type ; Usage ; -+-----------------------+-------------------------+ -; Block interconnects ; 1,495 / 148,641 ( 1 % ) ; -; C16 interconnects ; 105 / 5,382 ( 2 % ) ; -; C4 interconnects ; 1,393 / 106,704 ( 1 % ) ; -; Direct links ; 161 / 148,641 ( < 1 % ) ; -; Global clocks ; 13 / 20 ( 65 % ) ; -; Local interconnects ; 562 / 49,760 ( 1 % ) ; -; NSLEEPs ; 0 / 500 ( 0 % ) ; -; R24 interconnects ; 81 / 5,406 ( 1 % ) ; -; R4 interconnects ; 1,510 / 147,764 ( 1 % ) ; -+-----------------------+-------------------------+ ++---------------------------------------------------+ +; Routing Usage Summary ; ++-----------------------+---------------------------+ +; Routing Resource Type ; Usage ; ++-----------------------+---------------------------+ +; Block interconnects ; 1,521 / 148,641 ( 1 % ) ; +; C16 interconnects ; 119 / 5,382 ( 2 % ) ; +; C4 interconnects ; 1,451 / 106,704 ( 1 % ) ; +; Direct links ; 187 / 148,641 ( < 1 % ) ; +; Global clocks ; 13 / 20 ( 65 % ) ; +; Local interconnects ; 569 / 49,760 ( 1 % ) ; +; NSLEEPs ; 0 / 500 ( 0 % ) ; +; R24 interconnects ; 88 / 5,406 ( 2 % ) ; +; R4 interconnects ; 1,426 / 147,764 ( < 1 % ) ; ++-----------------------+---------------------------+ +----------------------------------------------------------------------------+ ; LAB Logic Elements ; +---------------------------------------------+------------------------------+ -; Number of Logic Elements (Average = 13.32) ; Number of LABs (Total = 77) ; +; Number of Logic Elements (Average = 12.86) ; Number of LABs (Total = 81) ; +---------------------------------------------+------------------------------+ -; 1 ; 4 ; -; 2 ; 4 ; +; 1 ; 8 ; +; 2 ; 1 ; ; 3 ; 1 ; ; 4 ; 0 ; ; 5 ; 0 ; ; 6 ; 0 ; -; 7 ; 2 ; -; 8 ; 0 ; -; 9 ; 1 ; -; 10 ; 0 ; +; 7 ; 1 ; +; 8 ; 2 ; +; 9 ; 0 ; +; 10 ; 2 ; ; 11 ; 3 ; -; 12 ; 1 ; -; 13 ; 3 ; -; 14 ; 7 ; -; 15 ; 10 ; -; 16 ; 41 ; +; 12 ; 5 ; +; 13 ; 4 ; +; 14 ; 8 ; +; 15 ; 7 ; +; 16 ; 39 ; +---------------------------------------------+------------------------------+ +-------------------------------------------------------------------+ ; LAB-wide Signals ; +------------------------------------+------------------------------+ -; LAB-wide Signals (Average = 1.61) ; Number of LABs (Total = 77) ; +; LAB-wide Signals (Average = 1.75) ; Number of LABs (Total = 81) ; +------------------------------------+------------------------------+ ; 1 Async. clear ; 38 ; -; 1 Clock ; 40 ; -; 1 Clock enable ; 15 ; +; 1 Clock ; 44 ; +; 1 Clock enable ; 26 ; ; 1 Sync. clear ; 1 ; -; 2 Clock enables ; 11 ; -; 2 Clocks ; 19 ; +; 2 Clock enables ; 10 ; +; 2 Clocks ; 23 ; +------------------------------------+------------------------------+ +-----------------------------------------------------------------------------+ ; LAB Signals Sourced ; +----------------------------------------------+------------------------------+ -; Number of Signals Sourced (Average = 19.10) ; Number of LABs (Total = 77) ; +; Number of Signals Sourced (Average = 18.49) ; Number of LABs (Total = 81) ; +----------------------------------------------+------------------------------+ ; 0 ; 0 ; -; 1 ; 1 ; -; 2 ; 4 ; -; 3 ; 2 ; -; 4 ; 2 ; +; 1 ; 3 ; +; 2 ; 5 ; +; 3 ; 0 ; +; 4 ; 1 ; ; 5 ; 0 ; -; 6 ; 0 ; -; 7 ; 1 ; +; 6 ; 1 ; +; 7 ; 0 ; ; 8 ; 0 ; ; 9 ; 0 ; -; 10 ; 0 ; +; 10 ; 1 ; ; 11 ; 0 ; -; 12 ; 1 ; +; 12 ; 2 ; ; 13 ; 1 ; -; 14 ; 0 ; -; 15 ; 7 ; -; 16 ; 12 ; +; 14 ; 3 ; +; 15 ; 4 ; +; 16 ; 11 ; ; 17 ; 3 ; -; 18 ; 2 ; -; 19 ; 2 ; -; 20 ; 5 ; -; 21 ; 5 ; -; 22 ; 4 ; +; 18 ; 3 ; +; 19 ; 7 ; +; 20 ; 3 ; +; 21 ; 6 ; +; 22 ; 6 ; ; 23 ; 3 ; ; 24 ; 1 ; -; 25 ; 2 ; -; 26 ; 3 ; +; 25 ; 0 ; +; 26 ; 2 ; ; 27 ; 1 ; -; 28 ; 2 ; -; 29 ; 3 ; +; 28 ; 3 ; +; 29 ; 1 ; ; 30 ; 5 ; -; 31 ; 0 ; -; 32 ; 5 ; +; 31 ; 1 ; +; 32 ; 4 ; +----------------------------------------------+------------------------------+ +--------------------------------------------------------------------------------+ ; LAB Signals Sourced Out ; +-------------------------------------------------+------------------------------+ -; Number of Signals Sourced Out (Average = 7.84) ; Number of LABs (Total = 77) ; +; Number of Signals Sourced Out (Average = 7.64) ; Number of LABs (Total = 81) ; +-------------------------------------------------+------------------------------+ ; 0 ; 0 ; -; 1 ; 7 ; -; 2 ; 7 ; -; 3 ; 1 ; -; 4 ; 5 ; -; 5 ; 4 ; -; 6 ; 9 ; -; 7 ; 9 ; -; 8 ; 3 ; -; 9 ; 5 ; -; 10 ; 5 ; +; 1 ; 12 ; +; 2 ; 3 ; +; 3 ; 3 ; +; 4 ; 3 ; +; 5 ; 3 ; +; 6 ; 12 ; +; 7 ; 4 ; +; 8 ; 6 ; +; 9 ; 8 ; +; 10 ; 8 ; ; 11 ; 6 ; -; 12 ; 4 ; -; 13 ; 3 ; -; 14 ; 1 ; +; 12 ; 3 ; +; 13 ; 0 ; +; 14 ; 3 ; ; 15 ; 2 ; -; 16 ; 4 ; -; 17 ; 0 ; +; 16 ; 2 ; +; 17 ; 2 ; ; 18 ; 0 ; ; 19 ; 0 ; -; 20 ; 1 ; +; 20 ; 0 ; ; 21 ; 0 ; ; 22 ; 0 ; -; 23 ; 1 ; +; 23 ; 0 ; +; 24 ; 0 ; +; 25 ; 1 ; +-------------------------------------------------+------------------------------+ +-----------------------------------------------------------------------------+ ; LAB Distinct Inputs ; +----------------------------------------------+------------------------------+ -; Number of Distinct Inputs (Average = 15.49) ; Number of LABs (Total = 77) ; +; Number of Distinct Inputs (Average = 15.47) ; Number of LABs (Total = 81) ; +----------------------------------------------+------------------------------+ ; 0 ; 0 ; ; 1 ; 2 ; -; 2 ; 3 ; +; 2 ; 4 ; ; 3 ; 5 ; -; 4 ; 3 ; -; 5 ; 0 ; +; 4 ; 1 ; +; 5 ; 1 ; ; 6 ; 3 ; -; 7 ; 0 ; +; 7 ; 3 ; ; 8 ; 4 ; -; 9 ; 4 ; -; 10 ; 0 ; -; 11 ; 4 ; -; 12 ; 2 ; -; 13 ; 2 ; -; 14 ; 2 ; -; 15 ; 3 ; -; 16 ; 3 ; -; 17 ; 4 ; -; 18 ; 5 ; +; 9 ; 3 ; +; 10 ; 1 ; +; 11 ; 3 ; +; 12 ; 3 ; +; 13 ; 3 ; +; 14 ; 4 ; +; 15 ; 2 ; +; 16 ; 1 ; +; 17 ; 1 ; +; 18 ; 7 ; ; 19 ; 2 ; ; 20 ; 2 ; -; 21 ; 1 ; -; 22 ; 2 ; +; 21 ; 2 ; +; 22 ; 3 ; ; 23 ; 1 ; -; 24 ; 3 ; -; 25 ; 2 ; +; 24 ; 0 ; +; 25 ; 4 ; ; 26 ; 2 ; -; 27 ; 0 ; -; 28 ; 3 ; -; 29 ; 3 ; -; 30 ; 1 ; -; 31 ; 3 ; +; 27 ; 3 ; +; 28 ; 0 ; +; 29 ; 2 ; +; 30 ; 2 ; +; 31 ; 1 ; ; 32 ; 1 ; -; 33 ; 1 ; +; 33 ; 2 ; +; 34 ; 1 ; +; 35 ; 1 ; +----------------------------------------------+------------------------------+ @@ -1963,137 +1970,138 @@ RAM content values are presented in the following format: (Binary) (Octal) (Deci +---------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------+-------------------+ ; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ; +---------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------+-------------------+ -; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; 445.9 ; -; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_10Hz,clk_div:inst5|clock_100kHz,SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; 87.8 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; SCOMP:inst|IO_CYCLE ; 38.8 ; -; clk_div:inst5|clock_100kHz ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; 37.2 ; -; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_10Hz,clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 23.7 ; -; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_100kHz ; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; 15.3 ; -; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 12.3 ; -; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; 11.0 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; 484.4 ; +; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_10Hz,clk_div:inst5|clock_100kHz,SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; 109.5 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; SCOMP:inst|IO_CYCLE ; 67.2 ; +; clk_div:inst5|clock_100kHz ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; 41.6 ; +; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_10Hz,clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 23.4 ; +; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_10Hz ; SCOMP:inst|IO_CYCLE ; 17.1 ; +; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; inst1|altpll_component|auto_generated|pll1|clk[0],SCOMP:inst|IO_CYCLE ; 11.4 ; +; inst1|altpll_component|auto_generated|pll1|clk[0],clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 10.9 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; clk_div:inst5|clock_10Hz ; 8.9 ; +---------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------+-------------------+ Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off. This will disable optimization of problematic paths and expose them for further analysis using the Timing Analyzer. -+--------------------------------------------------------------------------------------------------------------------------+ -; Estimated Delay Added for Hold Timing Details ; -+---------------------------------------------------+--------------------------------------------------+-------------------+ -; Source Register ; Destination Register ; Delay Added in ns ; -+---------------------------------------------------+--------------------------------------------------+-------------------+ -; SCOMP:inst|AC[13] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 8.782 ; -; SCOMP:inst|AC[10] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 8.673 ; -; SCOMP:inst|AC[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[12] ; 8.546 ; -; SCOMP:inst|IO_WRITE_int ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 8.325 ; -; QuadratureDecoder:inst11|count[13] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 8.323 ; -; Incrementer:inst10|count[13] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 8.296 ; -; SCOMP:inst|AC[8] ; DIG_OUT:inst6|DATA[8] ; 8.274 ; -; SCOMP:inst|IR[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 8.215 ; -; SCOMP:inst|AC[14] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[14] ; 8.091 ; -; SCOMP:inst|AC[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 8.037 ; -; SCOMP:inst|AC[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9] ; 7.962 ; -; SCOMP:inst|AC[11] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[11] ; 7.926 ; -; SCOMP:inst|AC[15] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[15] ; 7.825 ; -; SCOMP:inst|IR[1] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 7.820 ; -; Incrementer:inst10|count[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 7.816 ; -; SCOMP:inst|AC[5] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[1] ; 7.803 ; -; Incrementer:inst10|count[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[12] ; 7.777 ; -; Incrementer:inst10|count[6] ; DIG_OUT:inst6|DATA[6] ; 7.765 ; -; QuadratureDecoder:inst11|count[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 7.721 ; -; SCOMP:inst|AC[7] ; DIG_OUT:inst6|DATA[7] ; 7.717 ; -; SCOMP:inst|AC[2] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 7.668 ; -; SCOMP:inst|IR[7] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 7.630 ; -; SCOMP:inst|AC[6] ; DIG_OUT:inst6|DATA[6] ; 7.622 ; -; SCOMP:inst|AC[1] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[1] ; 7.614 ; -; SCOMP:inst|AC[3] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[3] ; 7.612 ; -; Incrementer:inst10|count[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9] ; 7.590 ; -; Incrementer:inst10|count[10] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.583 ; -; QuadratureDecoder:inst11|count[10] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.533 ; -; QuadratureDecoder:inst11|count[1] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[1] ; 7.471 ; -; QuadratureDecoder:inst11|count[2] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 7.453 ; -; QuadratureDecoder:inst11|count[3] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[3] ; 7.422 ; -; SCOMP:inst|IR[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.402 ; -; QuadratureDecoder:inst11|count[7] ; DIG_OUT:inst6|DATA[7] ; 7.386 ; -; QuadratureDecoder:inst11|count[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9] ; 7.385 ; -; SCOMP:inst|IR[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.381 ; -; QuadratureDecoder:inst11|count[6] ; DIG_OUT:inst6|DATA[6] ; 7.375 ; -; SCOMP:inst|IR[2] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.330 ; -; SCOMP:inst|IR[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.330 ; -; Incrementer:inst10|count[4] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[0] ; 7.316 ; -; Incrementer:inst10|count[1] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[1] ; 7.310 ; -; SCOMP:inst|IO_CYCLE ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.305 ; -; SCOMP:inst|IR[10] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.305 ; -; SCOMP:inst|IR[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.305 ; -; SCOMP:inst|IR[8] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.305 ; -; SCOMP:inst|IR[4] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 7.305 ; -; Incrementer:inst10|count[7] ; DIG_OUT:inst6|DATA[7] ; 7.291 ; -; QuadratureDecoder:inst11|count[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[12] ; 7.276 ; -; QuadratureDecoder:inst11|count[5] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[1] ; 7.273 ; -; QuadratureDecoder:inst11|count[14] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[14] ; 7.235 ; -; SCOMP:inst|AC[4] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[0] ; 7.212 ; -; Incrementer:inst10|count[14] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[14] ; 7.204 ; -; Incrementer:inst10|count[8] ; DIG_OUT:inst6|DATA[8] ; 7.199 ; -; QuadratureDecoder:inst11|count[4] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[0] ; 7.145 ; -; Incrementer:inst10|count[11] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[11] ; 7.106 ; -; Incrementer:inst10|count[3] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[3] ; 7.020 ; -; QuadratureDecoder:inst11|count[11] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[11] ; 6.979 ; -; Incrementer:inst10|count[2] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 6.916 ; -; QuadratureDecoder:inst11|count[8] ; DIG_OUT:inst6|DATA[8] ; 6.899 ; -; Incrementer:inst10|count[5] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[1] ; 6.798 ; -; Incrementer:inst10|count[15] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[15] ; 6.465 ; -; QuadratureDecoder:inst11|count[15] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[15] ; 6.322 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9] ; 5.318 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 5.113 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[3] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[3] ; 5.069 ; -; DIG_IN:inst7|B_DI[3] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[3] ; 5.056 ; -; DIG_IN:inst7|B_DI[1] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[1] ; 5.053 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[1] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[1] ; 5.053 ; -; DIG_IN:inst7|B_DI[6] ; DIG_OUT:inst6|DATA[6] ; 5.040 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[6] ; DIG_OUT:inst6|DATA[6] ; 4.921 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7] ; DIG_OUT:inst6|DATA[7] ; 4.877 ; -; DIG_IN:inst7|B_DI[4] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[0] ; 4.864 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[4] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[0] ; 4.735 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[13] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 4.716 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[5] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[1] ; 4.711 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[10] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 4.681 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[2] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 4.661 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[8] ; DIG_OUT:inst6|DATA[8] ; 4.635 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[12] ; 4.559 ; -; DIG_IN:inst7|B_DI[8] ; DIG_OUT:inst6|DATA[8] ; 4.532 ; -; DIG_IN:inst7|B_DI[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9] ; 4.487 ; -; DIG_IN:inst7|B_DI[7] ; DIG_OUT:inst6|DATA[7] ; 4.112 ; -; DIG_IN:inst7|B_DI[2] ; HEX_DISP_6:inst9|HEX_DISP:inst5|latched_hex[2] ; 3.983 ; -; DIG_IN:inst7|B_DI[5] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[1] ; 3.935 ; -; TIMER:inst4|COUNT[11] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[11] ; 3.905 ; -; TIMER:inst4|COUNT[10] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[10] ; 3.722 ; -; DIG_IN:inst7|B_DI[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 3.704 ; -; TIMER:inst4|COUNT[13] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13] ; 3.644 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[15] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[15] ; 3.466 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[11] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[11] ; 3.453 ; -; TIMER:inst4|COUNT[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[12] ; 3.437 ; -; TIMER:inst4|COUNT[15] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[15] ; 3.423 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[14] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[14] ; 3.398 ; -; TIMER:inst4|COUNT[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9] ; 3.342 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|running ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 3.332 ; -; I2C_INTERFACE:inst13|i2c_ctrl:inst14|go ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 3.332 ; -; TIMER:inst4|COUNT[0] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[0] ; 3.332 ; -; TIMER:inst4|COUNT[14] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[14] ; 3.273 ; -; TIMER:inst4|COUNT[7] ; DIG_OUT:inst6|DATA[7] ; 3.019 ; -; TIMER:inst4|COUNT[6] ; DIG_OUT:inst6|DATA[6] ; 2.887 ; -; TIMER:inst4|COUNT[5] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[1] ; 2.833 ; -+---------------------------------------------------+--------------------------------------------------+-------------------+ ++-------------------------------------------------------------------------------------------------------------------------+ +; Estimated Delay Added for Hold Timing Details ; ++---------------------------------------------------+-------------------------------------------------+-------------------+ +; Source Register ; Destination Register ; Delay Added in ns ; ++---------------------------------------------------+-------------------------------------------------+-------------------+ +; SCOMP:inst|AC[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[1] ; 9.018 ; +; SCOMP:inst|AC[10] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 8.884 ; +; Incrementer:inst10|count[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[1] ; 8.850 ; +; SCOMP:inst|IO_WRITE_int ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 8.836 ; +; SCOMP:inst|AC[2] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[2] ; 8.713 ; +; SCOMP:inst|IR[0] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 8.655 ; +; SCOMP:inst|AC[7] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 8.536 ; +; Incrementer:inst10|count[2] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[2] ; 8.494 ; +; Incrementer:inst10|count[7] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 8.465 ; +; SCOMP:inst|AC[8] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[0] ; 8.449 ; +; SCOMP:inst|AC[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[6] ; 8.321 ; +; Incrementer:inst10|count[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[3] ; 8.243 ; +; SCOMP:inst|IR[6] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 8.226 ; +; Incrementer:inst10|count[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[6] ; 8.152 ; +; SCOMP:inst|AC[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[5] ; 8.138 ; +; SCOMP:inst|AC[4] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[4] ; 8.137 ; +; SCOMP:inst|IR[5] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 8.132 ; +; SCOMP:inst|AC[0] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 8.129 ; +; SCOMP:inst|IR[3] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 8.111 ; +; Incrementer:inst10|count[4] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[4] ; 8.106 ; +; Incrementer:inst10|count[1] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[1] ; 8.086 ; +; Incrementer:inst10|count[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[5] ; 8.082 ; +; Incrementer:inst10|count[8] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[0] ; 8.073 ; +; SCOMP:inst|IR[2] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 8.061 ; +; QuadratureDecoder:inst11|count[7] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 8.024 ; +; Incrementer:inst10|count[10] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 8.022 ; +; QuadratureDecoder:inst11|count[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[1] ; 8.011 ; +; SCOMP:inst|IR[1] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 7.992 ; +; SCOMP:inst|IO_CYCLE ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.963 ; +; SCOMP:inst|IR[10] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.963 ; +; SCOMP:inst|IR[9] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.963 ; +; SCOMP:inst|IR[8] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.963 ; +; SCOMP:inst|IR[7] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.963 ; +; SCOMP:inst|IR[4] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.963 ; +; QuadratureDecoder:inst11|count[1] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[1] ; 7.954 ; +; Incrementer:inst10|count[0] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 7.949 ; +; SCOMP:inst|AC[11] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[3] ; 7.941 ; +; SCOMP:inst|AC[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[4] ; 7.898 ; +; QuadratureDecoder:inst11|count[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[3] ; 7.844 ; +; QuadratureDecoder:inst11|count[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[6] ; 7.842 ; +; QuadratureDecoder:inst11|count[2] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[2] ; 7.824 ; +; SCOMP:inst|AC[15] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[3] ; 7.793 ; +; SCOMP:inst|AC[1] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[1] ; 7.727 ; +; SCOMP:inst|AC[13] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[1] ; 7.686 ; +; QuadratureDecoder:inst11|count[0] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 7.677 ; +; Incrementer:inst10|count[11] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[3] ; 7.599 ; +; SCOMP:inst|AC[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[3] ; 7.566 ; +; Incrementer:inst10|count[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[4] ; 7.562 ; +; QuadratureDecoder:inst11|count[10] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 7.556 ; +; QuadratureDecoder:inst11|count[8] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[0] ; 7.527 ; +; QuadratureDecoder:inst11|count[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[5] ; 7.448 ; +; QuadratureDecoder:inst11|count[4] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[4] ; 7.421 ; +; Incrementer:inst10|count[15] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[3] ; 7.319 ; +; Incrementer:inst10|count[13] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[1] ; 7.181 ; +; QuadratureDecoder:inst11|count[15] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[3] ; 7.148 ; +; QuadratureDecoder:inst11|count[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[4] ; 7.124 ; +; SCOMP:inst|AC[14] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[2] ; 7.083 ; +; QuadratureDecoder:inst11|count[11] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[3] ; 6.966 ; +; QuadratureDecoder:inst11|count[13] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[1] ; 6.899 ; +; Incrementer:inst10|count[14] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[2] ; 6.576 ; +; QuadratureDecoder:inst11|count[14] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[2] ; 6.294 ; +; DIG_IN:inst7|B_DI[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[6] ; 5.988 ; +; DIG_IN:inst7|B_DI[2] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[2] ; 5.806 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[6] ; 5.749 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[1] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[1] ; 5.734 ; +; DIG_IN:inst7|B_DI[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[5] ; 5.631 ; +; DIG_IN:inst7|B_DI[1] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[1] ; 5.619 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[5] ; 5.618 ; +; DIG_IN:inst7|B_DI[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[1] ; 5.519 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[4] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[4] ; 5.489 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[0] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 5.466 ; +; DIG_IN:inst7|B_DI[4] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[4] ; 5.450 ; +; DIG_IN:inst7|B_DI[7] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 5.443 ; +; DIG_IN:inst7|B_DI[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[3] ; 5.231 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 5.189 ; +; DIG_IN:inst7|B_DI[8] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[0] ; 5.038 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[8] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[0] ; 4.980 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[10] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 4.831 ; +; TIMER:inst4|COUNT[2] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[2] ; 4.808 ; +; TIMER:inst4|COUNT[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[3] ; 4.791 ; +; TIMER:inst4|COUNT[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[1] ; 4.676 ; +; TIMER:inst4|COUNT[7] ; HEX_DISP_6:inst9|HEX_DISP:inst6|latched_hex[3] ; 4.393 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[2] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[2] ; 4.392 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[9] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[1] ; 4.158 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[3] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[3] ; 4.024 ; +; DIG_IN:inst7|B_DI[0] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 4.019 ; +; TIMER:inst4|COUNT[10] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[2] ; 3.959 ; +; TIMER:inst4|COUNT[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[4] ; 3.796 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|running ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 3.755 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|go ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 3.755 ; +; TIMER:inst4|COUNT[0] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[0] ; 3.755 ; +; TIMER:inst4|COUNT[15] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[3] ; 3.667 ; +; TIMER:inst4|COUNT[6] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[6] ; 3.665 ; +; TIMER:inst4|COUNT[11] ; HEX_DISP_6:inst9|HEX_DISP:inst3|latched_hex[3] ; 3.595 ; +; TIMER:inst4|COUNT[13] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[1] ; 3.549 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[12] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|cmd_in[4] ; 3.483 ; +; TIMER:inst4|COUNT[1] ; HEX_DISP_6:inst9|HEX_DISP:inst1|latched_hex[1] ; 3.470 ; +; TIMER:inst4|COUNT[5] ; I2C_INTERFACE:inst13|i2c_ctrl:inst14|addr_in[5] ; 3.468 ; +; TIMER:inst4|COUNT[14] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[2] ; 3.397 ; +; I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[15] ; HEX_DISP_6:inst9|HEX_DISP:inst4|latched_hex[3] ; 3.381 ; ++---------------------------------------------------+-------------------------------------------------+-------------------+ Note: This table only shows the top 100 path(s) that have the largest delay added for hold. +-----------------+ ; Fitter Messages ; +-----------------+ -Info (20030): Parallel compilation is enabled and will use 4 of the 4 processors detected +Info (20030): Parallel compilation is enabled and will use 6 of the 6 processors detected Info (119006): Selected device 10M50DAF484C7G for design "SCOMP" Info (21077): Low junction temperature is 0 degrees C Info (21077): High junction temperature is 85 degrees C -Info (15535): Implemented PLL "PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|pll1" as MAX 10 PLL type File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v Line: 51 - Info (15099): Implementing clock multiplication of 1, clock division of 5, and phase shift of 0 degrees (0 ps) for PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] port File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v Line: 51 +Info (15535): Implemented PLL "PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|pll1" as MAX 10 PLL type File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v Line: 51 + Info (15099): Implementing clock multiplication of 1, clock division of 5, and phase shift of 0 degrees (0 ps) for PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] port File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v Line: 51 Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature. Info (176444): Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices @@ -2131,55 +2139,55 @@ Info (332144): No user constrained base clocks found in the design Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty" Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. Info (332130): Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time. -Info (176353): Automatically promoted node PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] (placed in counter C0 of PLL_4) File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v Line: 93 +Info (176353): Automatically promoted node PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] (placed in counter C0 of PLL_4) File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v Line: 93 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G8 -Info (176353): Automatically promoted node I2C_INTERFACE:inst13|i2c_master:inst|data_clk File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd Line: 53 +Info (176353): Automatically promoted node I2C_INTERFACE:inst13|i2c_master:inst|data_clk File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd Line: 53 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node clk_div:inst5|clock_100kHz File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd Line: 11 +Info (176353): Automatically promoted node clk_div:inst5|clock_100kHz File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd Line: 11 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node clk_div:inst5|clock_10Hz File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd Line: 15 +Info (176353): Automatically promoted node clk_div:inst5|clock_10Hz File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd Line: 16 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock Info (176353): Automatically promoted node I2C_INTERFACE:inst13|inst13 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node IO_DECODER:inst3|HEX0_EN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 18 +Info (176353): Automatically promoted node IO_DECODER:inst3|HEX0_EN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 18 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock Info (176353): Automatically promoted node I2C_INTERFACE:inst13|inst12 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node IO_DECODER:inst3|LED_EN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 16 +Info (176353): Automatically promoted node IO_DECODER:inst3|LED_EN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 16 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node IO_DECODER:inst3|SWITCH_EN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 15 +Info (176353): Automatically promoted node IO_DECODER:inst3|SWITCH_EN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 15 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock Info (176356): Following destination nodes may be non-global or may not use global or regional clocks - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[0]~18 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[1]~21 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[3]~31 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[4]~36 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[6]~46 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[10]~65 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[11]~69 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[12]~74 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[13]~77 - Info (176357): Destination node I2C_INTERFACE:inst13|inst1[14]~81 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[0]~24 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[1]~27 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[2]~32 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[3]~36 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[4]~40 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[5]~45 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[6]~50 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[8]~59 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[9]~64 + Info (176357): Destination node I2C_INTERFACE:inst13|inst1[10]~67 Info (176358): Non-global destination nodes limited to 10 nodes -Info (176353): Automatically promoted node IO_DECODER:inst3|HEX1_EN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 19 +Info (176353): Automatically promoted node clk_div:inst5|clock_25kHz File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd Line: 12 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node clk_div:inst5|clock_10kHz File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd Line: 12 +Info (176353): Automatically promoted node IO_DECODER:inst3|HEX1_EN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 19 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node IO_DECODER:inst3|PWM_EN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 26 +Info (176353): Automatically promoted node IO_DECODER:inst3|PWM_EN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 26 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock -Info (176353): Automatically promoted node I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd Line: 84 +Info (176353): Automatically promoted node I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[7]~0 File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd Line: 84 Info (176355): Automatically promoted destinations to use location or clock signal Global Clock Info (176356): Following destination nodes may be non-global or may not use global or regional clocks - Info (176357): Destination node SCOMP:inst|IO_WRITE_int File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 56 - Info (176357): Destination node SCOMP:inst|IO_CYCLE File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 21 - Info (176357): Destination node SCOMP:inst|AC[0] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[1] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[2] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[3] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[4] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[5] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[6] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 - Info (176357): Destination node SCOMP:inst|AC[7] File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|IO_WRITE_int File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 56 + Info (176357): Destination node SCOMP:inst|IO_CYCLE File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 21 + Info (176357): Destination node SCOMP:inst|AC[0] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[1] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[2] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[3] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[4] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[5] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[6] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 + Info (176357): Destination node SCOMP:inst|AC[7] File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 130 Info (176358): Non-global destination nodes limited to 10 nodes Info (176233): Starting register packing Info (176235): Finished register packing @@ -2191,25 +2199,25 @@ Warning (15705): Ignored locations or region assignments to the following nodes Warning (15706): Node "DP[3]" is assigned to location or region, but does not exist in design Warning (15706): Node "DP[4]" is assigned to location or region, but does not exist in design Warning (15706): Node "DP[5]" is assigned to location or region, but does not exist in design -Info (171121): Fitter preparation operations ending: elapsed time is 00:00:05 +Info (171121): Fitter preparation operations ending: elapsed time is 00:00:02 Info (14896): Fitter has disabled Advanced Physical Optimization because it is not supported for the current family. Info (170189): Fitter placement preparation operations beginning -Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:01 +Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00 Info (170191): Fitter placement operations beginning Info (170137): Fitter placement was successful -Info (170192): Fitter placement operations ending: elapsed time is 00:00:09 +Info (170192): Fitter placement operations ending: elapsed time is 00:00:03 Info (170193): Fitter routing operations beginning Info (170195): Router estimated average interconnect usage is 1% of the available device resources - Info (170196): Router estimated peak interconnect usage is 19% of the available device resources in the region that extends from location X45_Y33 to location X55_Y43 + Info (170196): Router estimated peak interconnect usage is 19% of the available device resources in the region that extends from location X56_Y33 to location X66_Y43 Info (170199): The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time. Info (170201): Optimizations that may affect the design's routability were skipped -Info (170194): Fitter routing operations ending: elapsed time is 00:00:50 -Info (11888): Total time spent on timing analysis during the Fitter is 4.52 seconds. +Info (170194): Fitter routing operations ending: elapsed time is 00:00:17 +Info (11888): Total time spent on timing analysis during the Fitter is 1.41 seconds. Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully -Info (11218): Fitter post-fit operations ending: elapsed time is 00:00:07 +Info (11218): Fitter post-fit operations ending: elapsed time is 00:00:02 Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information. Warning (169177): 17 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing MAX 10 Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems. Info (169178): Pin GSENSOR_SDI uses I/O standard 3.3-V LVTTL at V11 @@ -2229,17 +2237,17 @@ Warning (169177): 17 pins must meet Intel FPGA requirements for 3.3-, 3.0-, and Info (169178): Pin SW[6] uses I/O standard 3.3-V LVTTL at A13 Info (169178): Pin ENCODER_H1 uses I/O standard 3.3-V LVTTL at Y10 Info (169178): Pin ENCODER_H2 uses I/O standard 3.3-V LVTTL at AB9 -Info (144001): Generated suppressed messages file C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.fit.smsg +Info (144001): Generated suppressed messages file C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.fit.smsg Info: Quartus Prime Fitter was successful. 0 errors, 11 warnings - Info: Peak virtual memory: 5655 megabytes - Info: Processing ended: Tue Apr 06 22:27:04 2021 - Info: Elapsed time: 00:01:29 - Info: Total CPU time (on all processors): 00:01:48 + Info: Peak virtual memory: 5832 megabytes + Info: Processing ended: Sun Apr 11 14:59:53 2021 + Info: Elapsed time: 00:00:29 + Info: Total CPU time (on all processors): 00:00:41 +----------------------------+ ; Fitter Suppressed Messages ; +----------------------------+ -The suppressed messages can be found in C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/output_files/SCOMP.fit.smsg. +The suppressed messages can be found in C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/output_files/SCOMP.fit.smsg. diff --git a/output_files/SCOMP.fit.summary b/output_files/SCOMP.fit.summary index dfcf95c..df2d234 100644 --- a/output_files/SCOMP.fit.summary +++ b/output_files/SCOMP.fit.summary @@ -1,14 +1,14 @@ -Fitter Status : Successful - Tue Apr 06 22:27:02 2021 +Fitter Status : Successful - Sun Apr 11 14:59:53 2021 Quartus Prime Version : 19.1.0 Build 670 09/22/2019 SJ Lite Edition Revision Name : SCOMP Top-level Entity Name : SCOMP_System Family : MAX 10 Device : 10M50DAF484C7G Timing Models : Final -Total logic elements : 1,026 / 49,760 ( 2 % ) - Total combinational functions : 945 / 49,760 ( 2 % ) - Dedicated logic registers : 456 / 49,760 ( < 1 % ) -Total registers : 456 +Total logic elements : 1,042 / 49,760 ( 2 % ) + Total combinational functions : 959 / 49,760 ( 2 % ) + Dedicated logic registers : 459 / 49,760 ( < 1 % ) +Total registers : 459 Total pins : 75 / 360 ( 21 % ) Total virtual pins : 0 Total memory bits : 32,768 / 1,677,312 ( 2 % ) diff --git a/output_files/SCOMP.flow.rpt b/output_files/SCOMP.flow.rpt index 8e825cf..fd7bbaf 100644 --- a/output_files/SCOMP.flow.rpt +++ b/output_files/SCOMP.flow.rpt @@ -1,5 +1,5 @@ Flow report for SCOMP -Tue Apr 06 23:27:21 2021 +Sun Apr 11 15:00:04 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -41,17 +41,17 @@ https://fpgasoftware.intel.com/eula. +----------------------------------------------------------------------------------+ ; Flow Summary ; +------------------------------------+---------------------------------------------+ -; Flow Status ; Successful - Tue Apr 06 23:27:21 2021 ; +; Flow Status ; Successful - Sun Apr 11 15:00:04 2021 ; ; Quartus Prime Version ; 19.1.0 Build 670 09/22/2019 SJ Lite Edition ; ; Revision Name ; SCOMP ; ; Top-level Entity Name ; SCOMP_System ; ; Family ; MAX 10 ; ; Device ; 10M50DAF484C7G ; ; Timing Models ; Final ; -; Total logic elements ; 1,026 / 49,760 ( 2 % ) ; -; Total combinational functions ; 945 / 49,760 ( 2 % ) ; -; Dedicated logic registers ; 456 / 49,760 ( < 1 % ) ; -; Total registers ; 456 ; +; Total logic elements ; 1,042 / 49,760 ( 2 % ) ; +; Total combinational functions ; 959 / 49,760 ( 2 % ) ; +; Dedicated logic registers ; 459 / 49,760 ( < 1 % ) ; +; Total registers ; 459 ; ; Total pins ; 75 / 360 ( 21 % ) ; ; Total virtual pins ; 0 ; ; Total memory bits ; 32,768 / 1,677,312 ( 2 % ) ; @@ -67,7 +67,7 @@ https://fpgasoftware.intel.com/eula. +-------------------+---------------------+ ; Option ; Setting ; +-------------------+---------------------+ -; Start date & time ; 04/06/2021 22:24:59 ; +; Start date & time ; 04/11/2021 14:59:13 ; ; Main task ; Compilation ; ; Revision Name ; SCOMP ; +-------------------+---------------------+ @@ -78,7 +78,7 @@ https://fpgasoftware.intel.com/eula. +-------------------------------------+----------------------------------------+---------------+--------------+-----------------------------------+ ; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ; +-------------------------------------+----------------------------------------+---------------+--------------+-----------------------------------+ -; COMPILER_SIGNATURE_ID ; 79349036411806.161776229910372 ; -- ; -- ; -- ; +; COMPILER_SIGNATURE_ID ; 220669430212914.161816755302872 ; -- ; -- ; -- ; ; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_timing ; ; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_boundary_scan ; ; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_signal_integrity ; @@ -111,28 +111,12 @@ https://fpgasoftware.intel.com/eula. +----------------------+--------------+-------------------------+---------------------+------------------------------------+ ; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ; +----------------------+--------------+-------------------------+---------------------+------------------------------------+ -; Analysis & Synthesis ; 00:00:34 ; 1.0 ; 4822 MB ; 00:01:05 ; -; Fitter ; 00:01:27 ; 1.1 ; 5655 MB ; 00:01:46 ; -; Assembler ; 00:00:08 ; 1.0 ; 4695 MB ; 00:00:07 ; -; Timing Analyzer ; 00:00:10 ; 1.5 ; 4855 MB ; 00:00:12 ; -; EDA Netlist Writer ; 00:00:02 ; 1.0 ; 4661 MB ; 00:00:02 ; -; MIF/HEX Update ; 00:00:03 ; 1.0 ; 4726 MB ; 00:00:03 ; -; MIF/HEX Update ; 00:00:02 ; 1.0 ; 4726 MB ; 00:00:02 ; -; Assembler ; 00:00:08 ; 1.0 ; 4691 MB ; 00:00:08 ; -; MIF/HEX Update ; 00:00:02 ; 1.0 ; 4726 MB ; 00:00:02 ; -; Assembler ; 00:00:08 ; 1.0 ; 4691 MB ; 00:00:08 ; -; Assembler ; 00:00:08 ; 1.0 ; 4691 MB ; 00:00:08 ; -; MIF/HEX Update ; 00:00:05 ; 1.0 ; 4726 MB ; 00:00:02 ; -; Assembler ; 00:00:08 ; 1.0 ; 4691 MB ; 00:00:08 ; -; MIF/HEX Update ; 00:00:02 ; 1.0 ; 4726 MB ; 00:00:02 ; -; Assembler ; 00:00:07 ; 1.0 ; 4691 MB ; 00:00:08 ; -; MIF/HEX Update ; 00:00:02 ; 1.0 ; 4727 MB ; 00:00:02 ; -; Assembler ; 00:00:08 ; 1.0 ; 4693 MB ; 00:00:08 ; -; MIF/HEX Update ; 00:00:02 ; 1.0 ; 4726 MB ; 00:00:02 ; -; Assembler ; 00:00:08 ; 1.0 ; 4691 MB ; 00:00:08 ; -; MIF/HEX Update ; 00:00:02 ; 1.0 ; 4726 MB ; 00:00:02 ; -; Assembler ; 00:00:08 ; 1.0 ; 4691 MB ; 00:00:08 ; -; Total ; 00:03:44 ; -- ; -- ; 00:04:33 ; +; Analysis & Synthesis ; 00:00:11 ; 1.0 ; 4824 MB ; 00:00:21 ; +; Fitter ; 00:00:29 ; 1.1 ; 5832 MB ; 00:00:40 ; +; Assembler ; 00:00:03 ; 1.0 ; 4696 MB ; 00:00:03 ; +; Timing Analyzer ; 00:00:04 ; 1.5 ; 4868 MB ; 00:00:05 ; +; EDA Netlist Writer ; 00:00:01 ; 1.0 ; 4661 MB ; 00:00:01 ; +; Total ; 00:00:48 ; -- ; -- ; 00:01:10 ; +----------------------+--------------+-------------------------+---------------------+------------------------------------+ @@ -141,27 +125,11 @@ https://fpgasoftware.intel.com/eula. +----------------------+------------------+------------+------------+----------------+ ; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ; +----------------------+------------------+------------+------------+----------------+ -; Analysis & Synthesis ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Fitter ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Timing Analyzer ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; EDA Netlist Writer ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; MIF/HEX Update ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; -; Assembler ; LAPTOP-9G4PETQB ; Windows 10 ; 10.0 ; x86_64 ; +; Analysis & Synthesis ; DESKTOP-VI7VSA0 ; Windows 10 ; 10.0 ; x86_64 ; +; Fitter ; DESKTOP-VI7VSA0 ; Windows 10 ; 10.0 ; x86_64 ; +; Assembler ; DESKTOP-VI7VSA0 ; Windows 10 ; 10.0 ; x86_64 ; +; Timing Analyzer ; DESKTOP-VI7VSA0 ; Windows 10 ; 10.0 ; x86_64 ; +; EDA Netlist Writer ; DESKTOP-VI7VSA0 ; Windows 10 ; 10.0 ; x86_64 ; +----------------------+------------------+------------+------------+----------------+ @@ -173,22 +141,6 @@ quartus_fit --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP quartus_asm --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP quartus_sta SCOMP -c SCOMP quartus_eda --read_settings_files=off --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -quartus_cdb SCOMP -c SCOMP --update_mif -quartus_asm --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP diff --git a/output_files/SCOMP.jdi b/output_files/SCOMP.jdi index 3495f38..b50c8a7 100644 --- a/output_files/SCOMP.jdi +++ b/output_files/SCOMP.jdi @@ -1,6 +1,6 @@ - + diff --git a/output_files/SCOMP.map.rpt b/output_files/SCOMP.map.rpt index 6c99f6c..93c190a 100644 --- a/output_files/SCOMP.map.rpt +++ b/output_files/SCOMP.map.rpt @@ -1,5 +1,5 @@ Analysis & Synthesis report for SCOMP -Tue Apr 06 22:25:33 2021 +Sun Apr 11 14:59:23 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -65,15 +65,15 @@ https://fpgasoftware.intel.com/eula. +----------------------------------------------------------------------------------+ ; Analysis & Synthesis Summary ; +------------------------------------+---------------------------------------------+ -; Analysis & Synthesis Status ; Successful - Tue Apr 06 22:25:33 2021 ; +; Analysis & Synthesis Status ; Successful - Sun Apr 11 14:59:23 2021 ; ; Quartus Prime Version ; 19.1.0 Build 670 09/22/2019 SJ Lite Edition ; ; Revision Name ; SCOMP ; ; Top-level Entity Name ; SCOMP_System ; ; Family ; MAX 10 ; -; Total logic elements ; 1,072 ; -; Total combinational functions ; 941 ; -; Dedicated logic registers ; 456 ; -; Total registers ; 456 ; +; Total logic elements ; 1,088 ; +; Total combinational functions ; 955 ; +; Dedicated logic registers ; 459 ; +; Total registers ; 459 ; ; Total pins ; 75 ; ; Total virtual pins ; 0 ; ; Total memory bits ; 32,768 ; @@ -176,61 +176,63 @@ https://fpgasoftware.intel.com/eula. +----------------------------+-------------+ ; Processors ; Number ; +----------------------------+-------------+ -; Number detected on machine ; 4 ; -; Maximum allowed ; 4 ; +; Number detected on machine ; 12 ; +; Maximum allowed ; 6 ; ; ; ; ; Average used ; 1.00 ; -; Maximum used ; 4 ; +; Maximum used ; 6 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 0.2% ; -; Processor 3 ; 0.0% ; -; Processor 4 ; 0.0% ; +; Processor 2 ; 0.1% ; +; Processor 3 ; 0.1% ; +; Processor 4 ; 0.1% ; +; Processor 5 ; 0.1% ; +; Processor 6 ; 0.1% ; +----------------------------+-------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Analysis & Synthesis Source Files Read ; -+----------------------------------+-----------------+----------------------------------------+------------------------------------------------------------------------------------------+---------+ -; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ; -+----------------------------------+-----------------+----------------------------------------+------------------------------------------------------------------------------------------+---------+ -; I2C_INTERFACE.bdf ; yes ; User Block Diagram/Schematic File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf ; ; -; i2c_master.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd ; ; -; i2c_ctrl.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd ; ; -; HEX_DISP.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP.vhd ; ; -; DIG_OUT.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_OUT.vhd ; ; -; DIG_IN.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_IN.vhd ; ; -; clk_div.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd ; ; -; TIMER.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd ; ; -; IO_DECODER.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd ; ; -; SCOMP.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd ; ; -; SCOMP_System.bdf ; yes ; User Block Diagram/Schematic File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf ; ; -; PLL_main.vhd ; yes ; User Wizard-Generated File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd ; ; -; HEX_DISP_6.bdf ; yes ; User Block Diagram/Schematic File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP_6.bdf ; ; -; Incrementer.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/Incrementer.vhd ; ; -; QuadratureDecoder.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/QuadratureDecoder.vhd ; ; -; PWMGenerator.vhd ; yes ; User VHDL File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PWMGenerator.vhd ; ; -; altpll.tdf ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altpll.tdf ; ; -; aglobal191.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/aglobal191.inc ; ; -; stratix_pll.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/stratix_pll.inc ; ; -; stratixii_pll.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/stratixii_pll.inc ; ; -; cycloneii_pll.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/cycloneii_pll.inc ; ; -; db/pll_main_altpll.v ; yes ; Auto-Generated Megafunction ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v ; ; -; altsyncram.tdf ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altsyncram.tdf ; ; -; stratix_ram_block.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/stratix_ram_block.inc ; ; -; lpm_mux.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_mux.inc ; ; -; lpm_decode.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_decode.inc ; ; -; a_rdenreg.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/a_rdenreg.inc ; ; -; altrom.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altrom.inc ; ; -; altram.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altram.inc ; ; -; altdpram.inc ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altdpram.inc ; ; -; db/altsyncram_efs3.tdf ; yes ; Auto-Generated Megafunction ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/altsyncram_efs3.tdf ; ; -; velocitycontrol.mif ; yes ; Auto-Found Memory Initialization File ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif ; ; -; lpm_clshift.tdf ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_clshift.tdf ; ; -; db/lpm_clshift_fuc.tdf ; yes ; Auto-Generated Megafunction ; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/lpm_clshift_fuc.tdf ; ; -; lpm_bustri.tdf ; yes ; Megafunction ; c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_bustri.tdf ; ; -+----------------------------------+-----------------+----------------------------------------+------------------------------------------------------------------------------------------+---------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Analysis & Synthesis Source Files Read ; ++----------------------------------+-----------------+----------------------------------------+------------------------------------------------------------------------------+---------+ +; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ; ++----------------------------------+-----------------+----------------------------------------+------------------------------------------------------------------------------+---------+ +; I2C_INTERFACE.bdf ; yes ; User Block Diagram/Schematic File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf ; ; +; i2c_master.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd ; ; +; i2c_ctrl.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd ; ; +; HEX_DISP.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd ; ; +; DIG_OUT.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd ; ; +; DIG_IN.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd ; ; +; clk_div.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd ; ; +; TIMER.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd ; ; +; IO_DECODER.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd ; ; +; SCOMP.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd ; ; +; SCOMP_System.bdf ; yes ; User Block Diagram/Schematic File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf ; ; +; PLL_main.vhd ; yes ; User Wizard-Generated File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd ; ; +; HEX_DISP_6.bdf ; yes ; User Block Diagram/Schematic File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP_6.bdf ; ; +; Incrementer.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd ; ; +; QuadratureDecoder.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd ; ; +; PWMGenerator.vhd ; yes ; User VHDL File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd ; ; +; altpll.tdf ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altpll.tdf ; ; +; aglobal191.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/aglobal191.inc ; ; +; stratix_pll.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/stratix_pll.inc ; ; +; stratixii_pll.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/stratixii_pll.inc ; ; +; cycloneii_pll.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/cycloneii_pll.inc ; ; +; db/pll_main_altpll.v ; yes ; Auto-Generated Megafunction ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v ; ; +; altsyncram.tdf ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altsyncram.tdf ; ; +; stratix_ram_block.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/stratix_ram_block.inc ; ; +; lpm_mux.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_mux.inc ; ; +; lpm_decode.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_decode.inc ; ; +; a_rdenreg.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/a_rdenreg.inc ; ; +; altrom.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altrom.inc ; ; +; altram.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altram.inc ; ; +; altdpram.inc ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altdpram.inc ; ; +; db/altsyncram_efs3.tdf ; yes ; Auto-Generated Megafunction ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/altsyncram_efs3.tdf ; ; +; velocitycontrol.mif ; yes ; Auto-Found Memory Initialization File ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif ; ; +; lpm_clshift.tdf ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_clshift.tdf ; ; +; db/lpm_clshift_fuc.tdf ; yes ; Auto-Generated Megafunction ; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/lpm_clshift_fuc.tdf ; ; +; lpm_bustri.tdf ; yes ; Megafunction ; c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_bustri.tdf ; ; ++----------------------------------+-----------------+----------------------------------------+------------------------------------------------------------------------------+---------+ +--------------------------------------------------------------------------------------------------------------------------------------+ @@ -238,20 +240,20 @@ https://fpgasoftware.intel.com/eula. +---------------------------------------------+----------------------------------------------------------------------------------------+ ; Resource ; Usage ; +---------------------------------------------+----------------------------------------------------------------------------------------+ -; Estimated Total logic elements ; 1,072 ; +; Estimated Total logic elements ; 1,088 ; ; ; ; -; Total combinational functions ; 941 ; +; Total combinational functions ; 955 ; ; Logic element usage by number of LUT inputs ; ; -; -- 4 input functions ; 507 ; -; -- 3 input functions ; 294 ; -; -- <=2 input functions ; 140 ; +; -- 4 input functions ; 509 ; +; -- 3 input functions ; 308 ; +; -- <=2 input functions ; 138 ; ; ; ; ; Logic elements by mode ; ; -; -- normal mode ; 837 ; -; -- arithmetic mode ; 104 ; +; -- normal mode ; 850 ; +; -- arithmetic mode ; 105 ; ; ; ; -; Total registers ; 456 ; -; -- Dedicated logic registers ; 456 ; +; Total registers ; 459 ; +; -- Dedicated logic registers ; 459 ; ; -- I/O registers ; 0 ; ; ; ; ; I/O pins ; 75 ; @@ -263,8 +265,8 @@ https://fpgasoftware.intel.com/eula. ; -- PLLs ; 1 ; ; ; ; ; Maximum fan-out node ; PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated|wire_pll1_clk[0] ; -; Maximum fan-out ; 285 ; -; Total fan-out ; 4917 ; +; Maximum fan-out ; 284 ; +; Total fan-out ; 4970 ; ; Average fan-out ; 3.14 ; +---------------------------------------------+----------------------------------------------------------------------------------------+ @@ -274,7 +276,7 @@ https://fpgasoftware.intel.com/eula. +-------------------------------------------+---------------------+---------------------------+-------------+------------+--------------+---------+-----------+------+--------------+------------+-----------------------------------------------------------------------------------------+-------------------+--------------+ ; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Memory Bits ; UFM Blocks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; ADC blocks ; Full Hierarchy Name ; Entity Name ; Library Name ; +-------------------------------------------+---------------------+---------------------------+-------------+------------+--------------+---------+-----------+------+--------------+------------+-----------------------------------------------------------------------------------------+-------------------+--------------+ -; |SCOMP_System ; 941 (0) ; 456 (0) ; 32768 ; 0 ; 0 ; 0 ; 0 ; 75 ; 0 ; 0 ; |SCOMP_System ; SCOMP_System ; work ; +; |SCOMP_System ; 955 (0) ; 459 (0) ; 32768 ; 0 ; 0 ; 0 ; 0 ; 75 ; 0 ; 0 ; |SCOMP_System ; SCOMP_System ; work ; ; |DIG_IN:inst7| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|DIG_IN:inst7 ; DIG_IN ; work ; ; |DIG_OUT:inst6| ; 0 (0) ; 10 (10) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|DIG_OUT:inst6 ; DIG_OUT ; work ; ; |HEX_DISP_6:inst9| ; 42 (0) ; 24 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|HEX_DISP_6:inst9 ; HEX_DISP_6 ; work ; @@ -284,23 +286,24 @@ https://fpgasoftware.intel.com/eula. ; |HEX_DISP:inst4| ; 7 (7) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst4 ; HEX_DISP ; work ; ; |HEX_DISP:inst5| ; 7 (7) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst5 ; HEX_DISP ; work ; ; |HEX_DISP:inst6| ; 7 (7) ; 4 (4) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|HEX_DISP_6:inst9|HEX_DISP:inst6 ; HEX_DISP ; work ; -; |I2C_INTERFACE:inst13| ; 249 (90) ; 125 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13 ; I2C_INTERFACE ; work ; +; |I2C_INTERFACE:inst13| ; 251 (92) ; 125 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13 ; I2C_INTERFACE ; work ; ; |i2c_ctrl:inst14| ; 58 (58) ; 70 (70) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14 ; i2c_ctrl ; work ; ; |i2c_master:inst| ; 101 (101) ; 55 (55) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst ; i2c_master ; work ; -; |IO_DECODER:inst3| ; 18 (18) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|IO_DECODER:inst3 ; IO_DECODER ; work ; +; |IO_DECODER:inst3| ; 17 (17) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|IO_DECODER:inst3 ; IO_DECODER ; work ; ; |Incrementer:inst10| ; 18 (18) ; 18 (18) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|Incrementer:inst10 ; Incrementer ; work ; ; |PLL_main:inst1| ; 0 (0) ; 1 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|PLL_main:inst1 ; PLL_main ; work ; ; |altpll:altpll_component| ; 0 (0) ; 1 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|PLL_main:inst1|altpll:altpll_component ; altpll ; work ; ; |PLL_main_altpll:auto_generated| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated ; PLL_main_altpll ; work ; -; |PWM_GEN:inst14| ; 10 (10) ; 11 (11) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|PWM_GEN:inst14 ; PWM_GEN ; work ; +; |PWM_GEN:inst14| ; 15 (15) ; 15 (15) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|PWM_GEN:inst14 ; PWM_GEN ; work ; ; |QuadratureDecoder:inst11| ; 55 (55) ; 24 (24) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|QuadratureDecoder:inst11 ; QuadratureDecoder ; work ; -; |SCOMP:inst| ; 482 (406) ; 177 (177) ; 32768 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst ; SCOMP ; work ; +; |SCOMP:inst| ; 487 (409) ; 177 (177) ; 32768 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst ; SCOMP ; work ; ; |altsyncram:altsyncram_component| ; 0 (0) ; 0 (0) ; 32768 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst|altsyncram:altsyncram_component ; altsyncram ; work ; ; |altsyncram_efs3:auto_generated| ; 0 (0) ; 0 (0) ; 32768 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated ; altsyncram_efs3 ; work ; -; |lpm_clshift:shifter| ; 76 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter ; lpm_clshift ; work ; -; |lpm_clshift_fuc:auto_generated| ; 76 (76) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter|lpm_clshift_fuc:auto_generated ; lpm_clshift_fuc ; work ; -; |TIMER:inst4| ; 18 (18) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|TIMER:inst4 ; TIMER ; work ; -; |clk_div:inst5| ; 49 (49) ; 40 (40) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|clk_div:inst5 ; clk_div ; work ; +; |lpm_clshift:shifter| ; 78 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter ; lpm_clshift ; work ; +; |lpm_clshift_fuc:auto_generated| ; 78 (78) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|SCOMP:inst|lpm_clshift:shifter|lpm_clshift_fuc:auto_generated ; lpm_clshift_fuc ; work ; +; |TIMER:inst4| ; 22 (18) ; 16 (16) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|TIMER:inst4 ; TIMER ; work ; +; |lpm_bustri:IO_BUS| ; 4 (4) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|TIMER:inst4|lpm_bustri:IO_BUS ; lpm_bustri ; work ; +; |clk_div:inst5| ; 48 (48) ; 39 (39) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |SCOMP_System|clk_div:inst5 ; clk_div ; work ; +-------------------------------------------+---------------------+---------------------------+-------------+------------+--------------+---------+-----------+------+--------------+------------+-----------------------------------------------------------------------------------------+-------------------+--------------+ Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy. @@ -442,10 +445,10 @@ Encoding Type: One-Hot +----------------------------------------------+-------+ ; Statistic ; Value ; +----------------------------------------------+-------+ -; Total registers ; 456 ; -; Number of registers using Synchronous Clear ; 34 ; +; Total registers ; 459 ; +; Number of registers using Synchronous Clear ; 33 ; ; Number of registers using Synchronous Load ; 0 ; -; Number of registers using Asynchronous Clear ; 181 ; +; Number of registers using Asynchronous Clear ; 183 ; ; Number of registers using Asynchronous Load ; 0 ; ; Number of registers using Clock Enable ; 253 ; ; Number of registers using Preset ; 0 ; @@ -470,21 +473,21 @@ Encoding Type: One-Hot +--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------+ ; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ; +--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------+ -; 3:1 ; 99 bits ; 198 LEs ; 99 LEs ; 99 LEs ; Yes ; |SCOMP_System|SCOMP:inst|PC_stack[8][2] ; -; 4:1 ; 16 bits ; 32 LEs ; 0 LEs ; 32 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst|data_tx[4] ; -; 7:1 ; 8 bits ; 32 LEs ; 8 LEs ; 24 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14|tx_byte[6] ; -; 11:1 ; 11 bits ; 77 LEs ; 22 LEs ; 55 LEs ; Yes ; |SCOMP_System|SCOMP:inst|PC[4] ; -; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst|bit_cnt[2] ; +; 3:1 ; 99 bits ; 198 LEs ; 99 LEs ; 99 LEs ; Yes ; |SCOMP_System|SCOMP:inst|PC_stack[8][4] ; +; 4:1 ; 16 bits ; 32 LEs ; 0 LEs ; 32 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst|addr_rw[4] ; +; 7:1 ; 8 bits ; 32 LEs ; 8 LEs ; 24 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14|tx_byte[1] ; +; 11:1 ; 11 bits ; 77 LEs ; 22 LEs ; 55 LEs ; Yes ; |SCOMP_System|SCOMP:inst|PC[1] ; +; 3:1 ; 3 bits ; 6 LEs ; 3 LEs ; 3 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst|bit_cnt[1] ; ; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[12] ; -; 5:1 ; 16 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |SCOMP_System|Incrementer:inst10|count[15] ; -; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[5] ; -; 5:1 ; 16 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |SCOMP_System|QuadratureDecoder:inst11|count[9] ; -; 12:1 ; 16 bits ; 128 LEs ; 96 LEs ; 32 LEs ; Yes ; |SCOMP_System|SCOMP:inst|AC[2] ; +; 5:1 ; 16 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |SCOMP_System|Incrementer:inst10|count[9] ; +; 5:1 ; 8 bits ; 24 LEs ; 16 LEs ; 8 LEs ; Yes ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_out[0] ; +; 5:1 ; 16 bits ; 48 LEs ; 16 LEs ; 32 LEs ; Yes ; |SCOMP_System|QuadratureDecoder:inst11|count[7] ; +; 12:1 ; 16 bits ; 128 LEs ; 96 LEs ; 32 LEs ; Yes ; |SCOMP_System|SCOMP:inst|AC[3] ; ; 3:1 ; 3 bits ; 6 LEs ; 6 LEs ; 0 LEs ; No ; |SCOMP_System|I2C_INTERFACE:inst13|i2c_master:inst|count ; -; 5:1 ; 2 bits ; 6 LEs ; 4 LEs ; 2 LEs ; No ; |SCOMP_System|Incrementer:inst10|Selector1 ; +; 5:1 ; 2 bits ; 6 LEs ; 4 LEs ; 2 LEs ; No ; |SCOMP_System|Incrementer:inst10|Selector2 ; ; 5:1 ; 2 bits ; 6 LEs ; 4 LEs ; 2 LEs ; No ; |SCOMP_System|QuadratureDecoder:inst11|Selector0 ; ; 12:1 ; 16 bits ; 128 LEs ; 64 LEs ; 64 LEs ; No ; |SCOMP_System|SCOMP:inst|Add1 ; -; 9:1 ; 2 bits ; 12 LEs ; 10 LEs ; 2 LEs ; No ; |SCOMP_System|QuadratureDecoder:inst11|Selector2 ; +; 9:1 ; 2 bits ; 12 LEs ; 10 LEs ; 2 LEs ; No ; |SCOMP_System|QuadratureDecoder:inst11|Selector4 ; +--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------------------------------+ @@ -1050,28 +1053,28 @@ Note: In order to hide this table in the UI and the text report file, please set ; Type ; Count ; +-----------------------+-----------------------------+ ; boundary_port ; 75 ; -; cycloneiii_ff ; 456 ; -; CLR ; 138 ; +; cycloneiii_ff ; 459 ; +; CLR ; 140 ; ; ENA ; 210 ; ; ENA CLR ; 43 ; -; SCLR ; 34 ; -; plain ; 31 ; +; SCLR ; 33 ; +; plain ; 33 ; ; cycloneiii_io_obuf ; 2 ; -; cycloneiii_lcell_comb ; 948 ; -; arith ; 104 ; -; 2 data inputs ; 72 ; +; cycloneiii_lcell_comb ; 962 ; +; arith ; 105 ; +; 2 data inputs ; 73 ; ; 3 data inputs ; 32 ; -; normal ; 844 ; +; normal ; 857 ; ; 0 data inputs ; 1 ; ; 1 data inputs ; 18 ; -; 2 data inputs ; 56 ; -; 3 data inputs ; 262 ; -; 4 data inputs ; 507 ; +; 2 data inputs ; 53 ; +; 3 data inputs ; 276 ; +; 4 data inputs ; 509 ; ; cycloneiii_pll ; 1 ; ; cycloneiii_ram_block ; 16 ; ; ; ; ; Max LUT depth ; 11.00 ; -; Average LUT depth ; 4.05 ; +; Average LUT depth ; 4.01 ; +-----------------------+-----------------------------+ @@ -1080,7 +1083,7 @@ Note: In order to hide this table in the UI and the text report file, please set +----------------+--------------+ ; Partition Name ; Elapsed Time ; +----------------+--------------+ -; Top ; 00:00:06 ; +; Top ; 00:00:01 ; +----------------+--------------+ @@ -1090,62 +1093,63 @@ Note: In order to hide this table in the UI and the text report file, please set Info: ******************************************************************* Info: Running Quartus Prime Analysis & Synthesis Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition - Info: Processing started: Tue Apr 06 22:24:58 2021 + Info: Processing started: Sun Apr 11 14:59:12 2021 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off SCOMP -c SCOMP -Info (20030): Parallel compilation is enabled and will use 4 of the 4 processors detected +Info (20030): Parallel compilation is enabled and will use 6 of the 6 processors detected Info (12021): Found 1 design units, including 1 entities, in source file i2c_interface.bdf Info (12023): Found entity 1: I2C_INTERFACE Info (12021): Found 2 design units, including 1 entities, in source file i2c_master.vhd - Info (12022): Found design unit 1: i2c_master-logic File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd Line: 49 - Info (12023): Found entity 1: i2c_master File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd Line: 31 + Info (12022): Found design unit 1: i2c_master-logic File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd Line: 49 + Info (12023): Found entity 1: i2c_master File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd Line: 31 Info (12021): Found 2 design units, including 1 entities, in source file i2c_ctrl.vhd - Info (12022): Found design unit 1: i2c_ctrl-main File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd Line: 32 - Info (12023): Found entity 1: i2c_ctrl File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd Line: 11 + Info (12022): Found design unit 1: i2c_ctrl-main File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd Line: 32 + Info (12023): Found entity 1: i2c_ctrl File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd Line: 11 Info (12021): Found 2 design units, including 1 entities, in source file hex_disp.vhd - Info (12022): Found design unit 1: HEX_DISP-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP.vhd Line: 17 - Info (12023): Found entity 1: HEX_DISP File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP.vhd Line: 9 + Info (12022): Found design unit 1: HEX_DISP-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd Line: 17 + Info (12023): Found entity 1: HEX_DISP File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd Line: 9 Info (12021): Found 2 design units, including 1 entities, in source file dig_out.vhd - Info (12022): Found design unit 1: DIG_OUT-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_OUT.vhd Line: 26 - Info (12023): Found entity 1: DIG_OUT File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_OUT.vhd Line: 16 + Info (12022): Found design unit 1: DIG_OUT-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd Line: 26 + Info (12023): Found entity 1: DIG_OUT File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd Line: 16 Info (12021): Found 2 design units, including 1 entities, in source file dig_in.vhd - Info (12022): Found design unit 1: DIG_IN-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_IN.vhd Line: 18 - Info (12023): Found entity 1: DIG_IN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_IN.vhd Line: 10 + Info (12022): Found design unit 1: DIG_IN-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd Line: 18 + Info (12023): Found entity 1: DIG_IN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd Line: 10 Info (12021): Found 2 design units, including 1 entities, in source file clk_div.vhd - Info (12022): Found design unit 1: clk_div-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd Line: 21 - Info (12023): Found entity 1: clk_div File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd Line: 6 + Info (12022): Found design unit 1: clk_div-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd Line: 22 + Info (12023): Found entity 1: clk_div File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd Line: 6 Info (12021): Found 2 design units, including 1 entities, in source file timer.vhd - Info (12022): Found design unit 1: TIMER-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd Line: 27 - Info (12023): Found entity 1: TIMER File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd Line: 17 + Info (12022): Found design unit 1: TIMER-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd Line: 27 + Info (12023): Found entity 1: TIMER File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd Line: 17 Info (12021): Found 2 design units, including 1 entities, in source file io_decoder.vhd - Info (12022): Found design unit 1: IO_DECODER-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 31 - Info (12023): Found entity 1: IO_DECODER File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd Line: 9 + Info (12022): Found design unit 1: IO_DECODER-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 31 + Info (12023): Found entity 1: IO_DECODER File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd Line: 9 Info (12021): Found 2 design units, including 1 entities, in source file scomp.vhd - Info (12022): Found design unit 1: SCOMP-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 33 - Info (12023): Found entity 1: SCOMP File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 16 + Info (12022): Found design unit 1: SCOMP-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 33 + Info (12023): Found entity 1: SCOMP File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 16 Info (12021): Found 1 design units, including 1 entities, in source file scomp_system.bdf Info (12023): Found entity 1: SCOMP_System Info (12021): Found 2 design units, including 1 entities, in source file pll_main.vhd - Info (12022): Found design unit 1: pll_main-SYN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd Line: 54 - Info (12023): Found entity 1: PLL_main File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd Line: 43 + Info (12022): Found design unit 1: pll_main-SYN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd Line: 54 + Info (12023): Found entity 1: PLL_main File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd Line: 43 Info (12021): Found 1 design units, including 1 entities, in source file hex_disp_6.bdf Info (12023): Found entity 1: HEX_DISP_6 Info (12021): Found 2 design units, including 1 entities, in source file incrementer.vhd - Info (12022): Found design unit 1: Incrementer-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/Incrementer.vhd Line: 27 - Info (12023): Found entity 1: Incrementer File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/Incrementer.vhd Line: 13 + Info (12022): Found design unit 1: Incrementer-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd Line: 27 + Info (12023): Found entity 1: Incrementer File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd Line: 13 Info (12021): Found 2 design units, including 1 entities, in source file quadraturedecoder.vhd - Info (12022): Found design unit 1: QuadratureDecoder-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/QuadratureDecoder.vhd Line: 28 - Info (12023): Found entity 1: QuadratureDecoder File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/QuadratureDecoder.vhd Line: 13 + Info (12022): Found design unit 1: QuadratureDecoder-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd Line: 28 + Info (12023): Found entity 1: QuadratureDecoder File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd Line: 13 Info (12021): Found 2 design units, including 1 entities, in source file pwmgenerator.vhd - Info (12022): Found design unit 1: PWM_GEN-a File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PWMGenerator.vhd Line: 24 - Info (12023): Found entity 1: PWM_GEN File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PWMGenerator.vhd Line: 15 + Info (12022): Found design unit 1: PWM_GEN-a File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd Line: 24 + Info (12023): Found entity 1: PWM_GEN File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd Line: 15 Warning (12019): Can't analyze file -- file output_files/PositionControl.vhd is missing +Warning (12019): Can't analyze file -- file VelocityControl.vhd is missing Info (12127): Elaborating entity "SCOMP_System" for the top level hierarchy Info (12128): Elaborating entity "PWM_GEN" for hierarchy "PWM_GEN:inst14" Info (12128): Elaborating entity "clk_div" for hierarchy "clk_div:inst5" Info (12128): Elaborating entity "PLL_main" for hierarchy "PLL_main:inst1" -Info (12128): Elaborating entity "altpll" for hierarchy "PLL_main:inst1|altpll:altpll_component" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd Line: 141 -Info (12130): Elaborated megafunction instantiation "PLL_main:inst1|altpll:altpll_component" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd Line: 141 -Info (12133): Instantiated megafunction "PLL_main:inst1|altpll:altpll_component" with the following parameter: File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd Line: 141 +Info (12128): Elaborating entity "altpll" for hierarchy "PLL_main:inst1|altpll:altpll_component" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd Line: 141 +Info (12130): Elaborated megafunction instantiation "PLL_main:inst1|altpll:altpll_component" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd Line: 141 +Info (12133): Instantiated megafunction "PLL_main:inst1|altpll:altpll_component" with the following parameter: File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd Line: 141 Info (12134): Parameter "bandwidth_type" = "AUTO" Info (12134): Parameter "clk0_divide_by" = "5" Info (12134): Parameter "clk0_duty_cycle" = "50" @@ -1202,13 +1206,13 @@ Info (12133): Instantiated megafunction "PLL_main:inst1|altpll:altpll_component" Info (12134): Parameter "self_reset_on_loss_lock" = "OFF" Info (12134): Parameter "width_clock" = "5" Info (12021): Found 1 design units, including 1 entities, in source file db/pll_main_altpll.v - Info (12023): Found entity 1: PLL_main_altpll File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v Line: 31 -Info (12128): Elaborating entity "PLL_main_altpll" for hierarchy "PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated" File: c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altpll.tdf Line: 898 + Info (12023): Found entity 1: PLL_main_altpll File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v Line: 31 +Info (12128): Elaborating entity "PLL_main_altpll" for hierarchy "PLL_main:inst1|altpll:altpll_component|PLL_main_altpll:auto_generated" File: c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altpll.tdf Line: 898 Info (12128): Elaborating entity "IO_DECODER" for hierarchy "IO_DECODER:inst3" Info (12128): Elaborating entity "SCOMP" for hierarchy "SCOMP:inst" -Info (12128): Elaborating entity "altsyncram" for hierarchy "SCOMP:inst|altsyncram:altsyncram_component" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 61 -Info (12130): Elaborated megafunction instantiation "SCOMP:inst|altsyncram:altsyncram_component" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 61 -Info (12133): Instantiated megafunction "SCOMP:inst|altsyncram:altsyncram_component" with the following parameter: File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 61 +Info (12128): Elaborating entity "altsyncram" for hierarchy "SCOMP:inst|altsyncram:altsyncram_component" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 61 +Info (12130): Elaborated megafunction instantiation "SCOMP:inst|altsyncram:altsyncram_component" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 61 +Info (12133): Instantiated megafunction "SCOMP:inst|altsyncram:altsyncram_component" with the following parameter: File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 61 Info (12134): Parameter "address_aclr_a" = "UNUSED" Info (12134): Parameter "address_aclr_b" = "NONE" Info (12134): Parameter "address_reg_b" = "CLOCK1" @@ -1260,27 +1264,27 @@ Info (12133): Instantiated megafunction "SCOMP:inst|altsyncram:altsyncram_compon Info (12134): Parameter "lpm_hint" = "ENABLE_RUNTIME_MOD=NO" Info (12134): Parameter "lpm_type" = "altsyncram" Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_efs3.tdf - Info (12023): Found entity 1: altsyncram_efs3 File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/altsyncram_efs3.tdf Line: 28 -Info (12128): Elaborating entity "altsyncram_efs3" for hierarchy "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated" File: c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altsyncram.tdf Line: 792 -Info (12128): Elaborating entity "LPM_CLSHIFT" for hierarchy "SCOMP:inst|LPM_CLSHIFT:shifter" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 88 -Info (12130): Elaborated megafunction instantiation "SCOMP:inst|LPM_CLSHIFT:shifter" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 88 -Info (12133): Instantiated megafunction "SCOMP:inst|LPM_CLSHIFT:shifter" with the following parameter: File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 88 + Info (12023): Found entity 1: altsyncram_efs3 File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/altsyncram_efs3.tdf Line: 28 +Info (12128): Elaborating entity "altsyncram_efs3" for hierarchy "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated" File: c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altsyncram.tdf Line: 792 +Info (12128): Elaborating entity "LPM_CLSHIFT" for hierarchy "SCOMP:inst|LPM_CLSHIFT:shifter" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 88 +Info (12130): Elaborated megafunction instantiation "SCOMP:inst|LPM_CLSHIFT:shifter" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 88 +Info (12133): Instantiated megafunction "SCOMP:inst|LPM_CLSHIFT:shifter" with the following parameter: File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 88 Info (12134): Parameter "LPM_WIDTH" = "16" Info (12134): Parameter "LPM_WIDTHDIST" = "4" Info (12134): Parameter "LPM_SHIFTTYPE" = "arithmetic" Info (12134): Parameter "LPM_TYPE" = "LPM_CLSHIFT" Info (12134): Parameter "LPM_HINT" = "UNUSED" Info (12021): Found 1 design units, including 1 entities, in source file db/lpm_clshift_fuc.tdf - Info (12023): Found entity 1: lpm_clshift_fuc File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/lpm_clshift_fuc.tdf Line: 23 -Info (12128): Elaborating entity "lpm_clshift_fuc" for hierarchy "SCOMP:inst|LPM_CLSHIFT:shifter|lpm_clshift_fuc:auto_generated" File: c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_clshift.tdf Line: 54 -Info (12128): Elaborating entity "LPM_BUSTRI" for hierarchy "SCOMP:inst|LPM_BUSTRI:io_bus" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 115 -Info (12130): Elaborated megafunction instantiation "SCOMP:inst|LPM_BUSTRI:io_bus" File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 115 -Info (12133): Instantiated megafunction "SCOMP:inst|LPM_BUSTRI:io_bus" with the following parameter: File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd Line: 115 + Info (12023): Found entity 1: lpm_clshift_fuc File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/lpm_clshift_fuc.tdf Line: 23 +Info (12128): Elaborating entity "lpm_clshift_fuc" for hierarchy "SCOMP:inst|LPM_CLSHIFT:shifter|lpm_clshift_fuc:auto_generated" File: c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_clshift.tdf Line: 54 +Info (12128): Elaborating entity "LPM_BUSTRI" for hierarchy "SCOMP:inst|LPM_BUSTRI:io_bus" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 115 +Info (12130): Elaborated megafunction instantiation "SCOMP:inst|LPM_BUSTRI:io_bus" File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 115 +Info (12133): Instantiated megafunction "SCOMP:inst|LPM_BUSTRI:io_bus" with the following parameter: File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd Line: 115 Info (12134): Parameter "LPM_WIDTH" = "16" Info (12134): Parameter "LPM_TYPE" = "LPM_BUSTRI" Info (12134): Parameter "LPM_HINT" = "UNUSED" Info (12128): Elaborating entity "TIMER" for hierarchy "TIMER:inst4" -Warning (10631): VHDL Process Statement warning at TIMER.vhd(59): inferring latch(es) for signal or variable "IO_COUNT", which holds its previous value in one or more paths through the process File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd Line: 59 +Warning (10631): VHDL Process Statement warning at TIMER.vhd(59): inferring latch(es) for signal or variable "IO_COUNT", which holds its previous value in one or more paths through the process File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd Line: 59 Info (12128): Elaborating entity "DIG_IN" for hierarchy "DIG_IN:inst7" Info (12128): Elaborating entity "I2C_INTERFACE" for hierarchy "I2C_INTERFACE:inst13" Info (12128): Elaborating entity "i2c_master" for hierarchy "I2C_INTERFACE:inst13|i2c_master:inst" @@ -1296,8 +1300,8 @@ Warning (13046): Tri-state node(s) do not directly drive top-level pin(s) Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[2]" to the node "PWM_GEN:inst14|COMPARE[2]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[3]" to the node "PWM_GEN:inst14|COMPARE[3]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[4]" to the node "PWM_GEN:inst14|COMPARE[4]" into an OR gate - Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[5]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[5]" into an OR gate - Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[6]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[6]" into an OR gate + Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[5]" to the node "PWM_GEN:inst14|COMPARE[5]" into an OR gate + Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[6]" to the node "PWM_GEN:inst14|COMPARE[6]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[7]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[7]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[8]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[8]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[9]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[9]" into an OR gate @@ -1307,7 +1311,7 @@ Warning (13046): Tri-state node(s) do not directly drive top-level pin(s) Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[13]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[13]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[14]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[14]" into an OR gate Warning (13047): Converted the fan-out from the tri-state buffer "I2C_INTERFACE:inst13|inst1[15]" to the node "I2C_INTERFACE:inst13|i2c_ctrl:inst14|data_in[15]" into an OR gate -Info (13000): Registers with preset signals will power-up high File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd Line: 57 +Info (13000): Registers with preset signals will power-up high File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd Line: 57 Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back Warning (13024): Output pins are stuck at VCC or GND Warning (13410): Pin "GSENSOR_CS_n" is stuck at VCC @@ -1316,17 +1320,17 @@ Info (286030): Timing-Driven Synthesis is running Info (17049): 2 registers lost all their fanouts during netlist optimizations. Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" Info (16011): Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL -Info (21057): Implemented 1184 device resources after synthesis - the final resource count might be different +Info (21057): Implemented 1200 device resources after synthesis - the final resource count might be different Info (21058): Implemented 15 input pins Info (21059): Implemented 58 output pins Info (21060): Implemented 2 bidirectional pins - Info (21061): Implemented 1092 logic cells + Info (21061): Implemented 1108 logic cells Info (21064): Implemented 16 RAM segments Info (21065): Implemented 1 PLLs -Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 22 warnings - Info: Peak virtual memory: 4822 megabytes - Info: Processing ended: Tue Apr 06 22:25:33 2021 - Info: Elapsed time: 00:00:35 - Info: Total CPU time (on all processors): 00:01:06 +Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 23 warnings + Info: Peak virtual memory: 4824 megabytes + Info: Processing ended: Sun Apr 11 14:59:23 2021 + Info: Elapsed time: 00:00:11 + Info: Total CPU time (on all processors): 00:00:21 diff --git a/output_files/SCOMP.map.summary b/output_files/SCOMP.map.summary index b1bfc18..43139e9 100644 --- a/output_files/SCOMP.map.summary +++ b/output_files/SCOMP.map.summary @@ -1,12 +1,12 @@ -Analysis & Synthesis Status : Successful - Tue Apr 06 22:25:33 2021 +Analysis & Synthesis Status : Successful - Sun Apr 11 14:59:23 2021 Quartus Prime Version : 19.1.0 Build 670 09/22/2019 SJ Lite Edition Revision Name : SCOMP Top-level Entity Name : SCOMP_System Family : MAX 10 -Total logic elements : 1,072 - Total combinational functions : 941 - Dedicated logic registers : 456 -Total registers : 456 +Total logic elements : 1,088 + Total combinational functions : 955 + Dedicated logic registers : 459 +Total registers : 459 Total pins : 75 Total virtual pins : 0 Total memory bits : 32,768 diff --git a/output_files/SCOMP.mif_update.rpt b/output_files/SCOMP.mif_update.rpt index 4f3e4c1..bd64ee2 100644 --- a/output_files/SCOMP.mif_update.rpt +++ b/output_files/SCOMP.mif_update.rpt @@ -1,5 +1,5 @@ MIF/HEX Update report for SCOMP -Tue Apr 06 23:27:02 2021 +Sun Apr 11 14:56:19 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -36,7 +36,7 @@ https://fpgasoftware.intel.com/eula. +---------------------------------------------------------------+ ; MIF/HEX Update Summary ; +-----------------------+---------------------------------------+ -; MIF/HEX Update Status ; Successful - Tue Apr 06 23:27:01 2021 ; +; MIF/HEX Update Status ; Successful - Sun Apr 11 14:56:19 2021 ; ; Revision Name ; SCOMP ; ; Top-level Entity Name ; SCOMP_System ; ; Family ; MAX 10 ; @@ -44,13 +44,13 @@ https://fpgasoftware.intel.com/eula. +-----------------------+---------------------------------------+ -+---------------------------------------------------------------------------------------+ -; MIF/HEX Update Processed Files ; -+---------------------------------------------------------------------------------------+ -; File Name ; -+---------------------------------------------------------------------------------------+ -; C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif ; -+---------------------------------------------------------------------------------------+ ++--------------------------------------------------------------------------+ +; MIF/HEX Update Processed Files ; ++--------------------------------------------------------------------------+ +; File Name ; ++--------------------------------------------------------------------------+ +; C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif ; ++--------------------------------------------------------------------------+ +-------------------------+ @@ -59,25 +59,25 @@ https://fpgasoftware.intel.com/eula. Info: ******************************************************************* Info: Running Quartus Prime MIF/HEX Update Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition - Info: Processing started: Tue Apr 06 23:26:59 2021 + Info: Processing started: Sun Apr 11 14:56:18 2021 Info: Command: quartus_cdb SCOMP -c SCOMP --update_mif -Warning (113031): 45 out of 2048 addresses are reinitialized. The latest initialized data will replace the existing data. There are 45 warnings found, and 10 warnings are reported. File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif Line: 1 - Warning (113030): Memory Initialization File address 0 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 13 - Warning (113030): Memory Initialization File address 1 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 14 - Warning (113030): Memory Initialization File address 2 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 15 - Warning (113030): Memory Initialization File address 3 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 16 - Warning (113030): Memory Initialization File address 4 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 17 - Warning (113030): Memory Initialization File address 5 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 18 - Warning (113030): Memory Initialization File address 6 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 19 - Warning (113030): Memory Initialization File address 7 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 20 - Warning (113030): Memory Initialization File address 8 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 21 - Warning (113030): Memory Initialization File address 9 is reinitialized File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/ Line: 22 +Warning (113031): 45 out of 2048 addresses are reinitialized. The latest initialized data will replace the existing data. There are 45 warnings found, and 10 warnings are reported. File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif Line: 1 + Warning (113030): Memory Initialization File address 0 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 13 + Warning (113030): Memory Initialization File address 1 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 14 + Warning (113030): Memory Initialization File address 2 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 15 + Warning (113030): Memory Initialization File address 3 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 16 + Warning (113030): Memory Initialization File address 4 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 17 + Warning (113030): Memory Initialization File address 5 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 18 + Warning (113030): Memory Initialization File address 6 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 19 + Warning (113030): Memory Initialization File address 7 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 20 + Warning (113030): Memory Initialization File address 8 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 21 + Warning (113030): Memory Initialization File address 9 is reinitialized File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/ Line: 22 Info (39024): Processed the following Memory Initialization File(s) - Info (39025): Processed Memory Initialization File C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif File: C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif Line: 0 + Info (39025): Processed Memory Initialization File C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif File: C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif Line: 0 Info: Quartus Prime MIF/HEX Update was successful. 0 errors, 11 warnings - Info: Peak virtual memory: 4726 megabytes - Info: Processing ended: Tue Apr 06 23:27:02 2021 - Info: Elapsed time: 00:00:03 - Info: Total CPU time (on all processors): 00:00:02 + Info: Peak virtual memory: 4728 megabytes + Info: Processing ended: Sun Apr 11 14:56:19 2021 + Info: Elapsed time: 00:00:01 + Info: Total CPU time (on all processors): 00:00:01 diff --git a/output_files/SCOMP.pof b/output_files/SCOMP.pof index edab3d2..ebe6b94 100644 Binary files a/output_files/SCOMP.pof and b/output_files/SCOMP.pof differ diff --git a/output_files/SCOMP.sof b/output_files/SCOMP.sof index 29ac579..1abc355 100644 Binary files a/output_files/SCOMP.sof and b/output_files/SCOMP.sof differ diff --git a/output_files/SCOMP.sta.rpt b/output_files/SCOMP.sta.rpt index 38c34b3..1202618 100644 --- a/output_files/SCOMP.sta.rpt +++ b/output_files/SCOMP.sta.rpt @@ -1,5 +1,5 @@ Timing Analyzer report for SCOMP -Tue Apr 06 22:27:26 2021 +Sun Apr 11 15:00:02 2021 Quartus Prime Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition @@ -92,17 +92,18 @@ https://fpgasoftware.intel.com/eula. +----------------------------+-------------+ ; Processors ; Number ; +----------------------------+-------------+ -; Number detected on machine ; 4 ; -; Maximum allowed ; 4 ; +; Number detected on machine ; 12 ; +; Maximum allowed ; 6 ; ; ; ; -; Average used ; 1.51 ; -; Maximum used ; 4 ; +; Average used ; 1.53 ; +; Maximum used ; 6 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 17.2% ; -; Processor 3 ; 17.0% ; -; Processor 4 ; 17.0% ; +; Processor 2 ; 11.2% ; +; Processor 3 ; 10.8% ; +; Processor 4 ; 10.5% ; +; Processors 5-6 ; 10.5% ; +----------------------------+-------------+ @@ -111,7 +112,7 @@ https://fpgasoftware.intel.com/eula. +---------------+--------+--------------------------+ ; SDC File Path ; Status ; Read at ; +---------------+--------+--------------------------+ -; SCOMP.sdc ; OK ; Tue Apr 06 22:27:19 2021 ; +; SCOMP.sdc ; OK ; Sun Apr 11 14:59:59 2021 ; +---------------+--------+--------------------------+ @@ -121,7 +122,7 @@ https://fpgasoftware.intel.com/eula. ; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ; +---------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-----------------------------------------------------+-------------------------------------------------------+ ; clk_div:inst5|clock_10Hz ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:inst5|clock_10Hz } ; -; clk_div:inst5|clock_10kHz ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:inst5|clock_10kHz } ; +; clk_div:inst5|clock_25kHz ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:inst5|clock_25kHz } ; ; clk_div:inst5|clock_100kHz ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk_div:inst5|clock_100kHz } ; ; clock_50 ; Base ; 20.000 ; 50.0 MHz ; 0.000 ; 10.000 ; ; ; ; ; ; ; ; ; ; ; { clock_50 } ; ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { I2C_INTERFACE:inst13|i2c_master:inst|data_clk } ; @@ -130,33 +131,33 @@ https://fpgasoftware.intel.com/eula. +---------------------------------------------------+-----------+---------+------------+-------+--------+------------+-----------+-------------+-------+--------+-----------+------------+----------+----------+-----------------------------------------------------+-------------------------------------------------------+ -+-----------------------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Fmax Summary ; -+------------+-----------------+---------------------------------------------------+------+ -; Fmax ; Restricted Fmax ; Clock Name ; Note ; -+------------+-----------------+---------------------------------------------------+------+ -; 68.22 MHz ; 68.22 MHz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; ; -; 76.15 MHz ; 76.15 MHz ; SCOMP:inst|IO_CYCLE ; ; -; 155.71 MHz ; 155.71 MHz ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; ; -; 350.14 MHz ; 350.14 MHz ; clk_div:inst5|clock_100kHz ; ; -; 377.64 MHz ; 377.64 MHz ; clk_div:inst5|clock_10Hz ; ; -; 383.14 MHz ; 383.14 MHz ; clk_div:inst5|clock_10kHz ; ; -+------------+-----------------+---------------------------------------------------+------+ ++-----------------------------------------------------------------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Fmax Summary ; ++------------+-----------------+---------------------------------------------------+------------------------------------------------+ +; Fmax ; Restricted Fmax ; Clock Name ; Note ; ++------------+-----------------+---------------------------------------------------+------------------------------------------------+ +; 67.48 MHz ; 67.48 MHz ; SCOMP:inst|IO_CYCLE ; ; +; 69.39 MHz ; 69.39 MHz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; ; +; 165.45 MHz ; 165.45 MHz ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; ; +; 352.24 MHz ; 352.24 MHz ; clk_div:inst5|clock_100kHz ; ; +; 377.93 MHz ; 377.93 MHz ; clk_div:inst5|clock_10Hz ; ; +; 418.59 MHz ; 416.15 MHz ; clk_div:inst5|clock_25kHz ; limit due to minimum period restriction (tmin) ; ++------------+-----------------+---------------------------------------------------+------------------------------------------------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. -+-----------------------------------------------------------------------------+ -; Slow 1200mV 85C Model Setup Summary ; -+---------------------------------------------------+---------+---------------+ -; Clock ; Slack ; End Point TNS ; -+---------------------------------------------------+---------+---------------+ -; inst1|altpll_component|auto_generated|pll1|clk[0] ; -10.238 ; -135.565 ; -; SCOMP:inst|IO_CYCLE ; -7.094 ; -389.281 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -4.710 ; -124.461 ; -; clk_div:inst5|clock_100kHz ; -4.669 ; -163.643 ; -; clk_div:inst5|clock_10kHz ; -3.272 ; -6.146 ; -; clk_div:inst5|clock_10Hz ; -1.648 ; -17.083 ; -+---------------------------------------------------+---------+---------------+ ++----------------------------------------------------------------------------+ +; Slow 1200mV 85C Model Setup Summary ; ++---------------------------------------------------+--------+---------------+ +; Clock ; Slack ; End Point TNS ; ++---------------------------------------------------+--------+---------------+ +; inst1|altpll_component|auto_generated|pll1|clk[0] ; -9.989 ; -142.472 ; +; SCOMP:inst|IO_CYCLE ; -7.400 ; -431.406 ; +; clk_div:inst5|clock_100kHz ; -6.310 ; -218.144 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -4.091 ; -97.456 ; +; clk_div:inst5|clock_25kHz ; -3.916 ; -8.872 ; +; clk_div:inst5|clock_10Hz ; -1.646 ; -16.621 ; ++---------------------------------------------------+--------+---------------+ +----------------------------------------------------------------------------+ @@ -164,12 +165,12 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; SCOMP:inst|IO_CYCLE ; -1.780 ; -3.970 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -0.490 ; -0.975 ; -; clk_div:inst5|clock_10kHz ; 0.329 ; 0.000 ; +; SCOMP:inst|IO_CYCLE ; -1.648 ; -1.648 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -0.400 ; -0.400 ; +; clk_div:inst5|clock_25kHz ; 0.330 ; 0.000 ; ; clk_div:inst5|clock_100kHz ; 0.340 ; 0.000 ; -; clk_div:inst5|clock_10Hz ; 0.362 ; 0.000 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; 0.411 ; 0.000 ; +; clk_div:inst5|clock_10Hz ; 0.364 ; 0.000 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; 0.421 ; 0.000 ; +---------------------------------------------------+--------+---------------+ @@ -178,19 +179,19 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +--------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------------+--------+---------------+ -; clk_div:inst5|clock_10Hz ; -4.559 ; -72.944 ; -; SCOMP:inst|IO_CYCLE ; 0.130 ; 0.000 ; +; clk_div:inst5|clock_10Hz ; -5.082 ; -80.880 ; +; SCOMP:inst|IO_CYCLE ; 0.648 ; 0.000 ; +--------------------------+--------+---------------+ -+--------------------------------------------------+ -; Slow 1200mV 85C Model Removal Summary ; -+--------------------------+-------+---------------+ -; Clock ; Slack ; End Point TNS ; -+--------------------------+-------+---------------+ -; SCOMP:inst|IO_CYCLE ; 0.149 ; 0.000 ; -; clk_div:inst5|clock_10Hz ; 3.511 ; 0.000 ; -+--------------------------+-------+---------------+ ++---------------------------------------------------+ +; Slow 1200mV 85C Model Removal Summary ; ++--------------------------+--------+---------------+ +; Clock ; Slack ; End Point TNS ; ++--------------------------+--------+---------------+ +; SCOMP:inst|IO_CYCLE ; -0.377 ; -0.377 ; +; clk_div:inst5|clock_10Hz ; 3.353 ; 0.000 ; ++--------------------------+--------+---------------+ +----------------------------------------------------------------------------+ @@ -198,11 +199,11 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; SCOMP:inst|IO_CYCLE ; -1.403 ; -108.031 ; +; SCOMP:inst|IO_CYCLE ; -1.403 ; -110.837 ; ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -1.403 ; -70.150 ; ; clk_div:inst5|clock_100kHz ; -1.403 ; -65.941 ; ; clk_div:inst5|clock_10Hz ; -1.403 ; -22.448 ; -; clk_div:inst5|clock_10kHz ; -1.403 ; -8.418 ; +; clk_div:inst5|clock_25kHz ; -1.403 ; -11.224 ; ; clock_50 ; 9.844 ; 0.000 ; ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 49.672 ; 0.000 ; +---------------------------------------------------+--------+---------------+ @@ -215,7 +216,7 @@ The design MTBF is not calculated because there are no specified synchronizers i Number of Synchronizer Chains Found: 2 Shortest Synchronizer Chain: 2 Registers Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 -Worst Case Available Settling Time: 192.734 ns +Worst Case Available Settling Time: 192.500 ns @@ -225,12 +226,12 @@ Worst Case Available Settling Time: 192.734 ns +------------+-----------------+---------------------------------------------------+------------------------------------------------+ ; Fmax ; Restricted Fmax ; Clock Name ; Note ; +------------+-----------------+---------------------------------------------------+------------------------------------------------+ -; 72.89 MHz ; 72.89 MHz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; ; -; 84.55 MHz ; 84.55 MHz ; SCOMP:inst|IO_CYCLE ; ; -; 174.64 MHz ; 174.64 MHz ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; ; -; 383.58 MHz ; 383.58 MHz ; clk_div:inst5|clock_100kHz ; ; +; 74.74 MHz ; 74.74 MHz ; SCOMP:inst|IO_CYCLE ; ; +; 74.99 MHz ; 74.99 MHz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; ; +; 183.82 MHz ; 183.82 MHz ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; ; +; 378.36 MHz ; 378.36 MHz ; clk_div:inst5|clock_100kHz ; ; ; 419.99 MHz ; 416.15 MHz ; clk_div:inst5|clock_10Hz ; limit due to minimum period restriction (tmin) ; -; 422.83 MHz ; 416.15 MHz ; clk_div:inst5|clock_10kHz ; limit due to minimum period restriction (tmin) ; +; 461.68 MHz ; 416.15 MHz ; clk_div:inst5|clock_25kHz ; limit due to minimum period restriction (tmin) ; +------------+-----------------+---------------------------------------------------+------------------------------------------------+ This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. @@ -240,12 +241,12 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; inst1|altpll_component|auto_generated|pll1|clk[0] ; -9.171 ; -118.778 ; -; SCOMP:inst|IO_CYCLE ; -6.534 ; -362.714 ; -; clk_div:inst5|clock_100kHz ; -4.257 ; -151.063 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -4.216 ; -111.980 ; -; clk_div:inst5|clock_10kHz ; -2.978 ; -5.224 ; -; clk_div:inst5|clock_10Hz ; -1.381 ; -13.986 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; -8.990 ; -125.018 ; +; SCOMP:inst|IO_CYCLE ; -6.939 ; -402.066 ; +; clk_div:inst5|clock_100kHz ; -5.796 ; -201.562 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -3.734 ; -87.535 ; +; clk_div:inst5|clock_25kHz ; -3.571 ; -7.522 ; +; clk_div:inst5|clock_10Hz ; -1.381 ; -13.590 ; +---------------------------------------------------+--------+---------------+ @@ -254,12 +255,12 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; SCOMP:inst|IO_CYCLE ; -1.472 ; -2.843 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -0.478 ; -0.950 ; -; clk_div:inst5|clock_10kHz ; 0.295 ; 0.000 ; -; clk_div:inst5|clock_100kHz ; 0.304 ; 0.000 ; +; SCOMP:inst|IO_CYCLE ; -1.598 ; -1.718 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -0.407 ; -0.407 ; +; clk_div:inst5|clock_25kHz ; 0.296 ; 0.000 ; +; clk_div:inst5|clock_100kHz ; 0.305 ; 0.000 ; ; clk_div:inst5|clock_10Hz ; 0.328 ; 0.000 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; 0.342 ; 0.000 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; 0.341 ; 0.000 ; +---------------------------------------------------+--------+---------------+ @@ -268,19 +269,19 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +--------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------------+--------+---------------+ -; clk_div:inst5|clock_10Hz ; -4.515 ; -72.240 ; -; SCOMP:inst|IO_CYCLE ; 0.350 ; 0.000 ; +; clk_div:inst5|clock_10Hz ; -4.502 ; -71.636 ; +; SCOMP:inst|IO_CYCLE ; 0.847 ; 0.000 ; +--------------------------+--------+---------------+ -+--------------------------------------------------+ -; Slow 1200mV 0C Model Removal Summary ; -+--------------------------+-------+---------------+ -; Clock ; Slack ; End Point TNS ; -+--------------------------+-------+---------------+ -; SCOMP:inst|IO_CYCLE ; 0.029 ; 0.000 ; -; clk_div:inst5|clock_10Hz ; 3.343 ; 0.000 ; -+--------------------------+-------+---------------+ ++---------------------------------------------------+ +; Slow 1200mV 0C Model Removal Summary ; ++--------------------------+--------+---------------+ +; Clock ; Slack ; End Point TNS ; ++--------------------------+--------+---------------+ +; SCOMP:inst|IO_CYCLE ; -0.458 ; -0.458 ; +; clk_div:inst5|clock_10Hz ; 3.258 ; 0.000 ; ++--------------------------+--------+---------------+ +----------------------------------------------------------------------------+ @@ -288,13 +289,13 @@ This panel reports FMAX for every clock in the design, regardless of the user-sp +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; SCOMP:inst|IO_CYCLE ; -1.403 ; -108.031 ; +; SCOMP:inst|IO_CYCLE ; -1.403 ; -110.837 ; ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -1.403 ; -70.150 ; ; clk_div:inst5|clock_100kHz ; -1.403 ; -65.941 ; ; clk_div:inst5|clock_10Hz ; -1.403 ; -22.448 ; -; clk_div:inst5|clock_10kHz ; -1.403 ; -8.418 ; +; clk_div:inst5|clock_25kHz ; -1.403 ; -11.224 ; ; clock_50 ; 9.857 ; 0.000 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; 49.688 ; 0.000 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; 49.684 ; 0.000 ; +---------------------------------------------------+--------+---------------+ @@ -305,7 +306,7 @@ The design MTBF is not calculated because there are no specified synchronizers i Number of Synchronizer Chains Found: 2 Shortest Synchronizer Chain: 2 Registers Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 -Worst Case Available Settling Time: 193.269 ns +Worst Case Available Settling Time: 192.987 ns @@ -315,12 +316,12 @@ Worst Case Available Settling Time: 193.269 ns +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; inst1|altpll_component|auto_generated|pll1|clk[0] ; -4.258 ; -57.599 ; -; SCOMP:inst|IO_CYCLE ; -2.809 ; -155.387 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -1.430 ; -32.444 ; -; clk_div:inst5|clock_100kHz ; -1.371 ; -41.952 ; -; clk_div:inst5|clock_10kHz ; -0.799 ; -0.799 ; -; clk_div:inst5|clock_10Hz ; -0.052 ; -0.058 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; -4.392 ; -62.461 ; +; SCOMP:inst|IO_CYCLE ; -3.204 ; -176.720 ; +; clk_div:inst5|clock_100kHz ; -1.994 ; -63.168 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -1.229 ; -23.041 ; +; clk_div:inst5|clock_25kHz ; -0.991 ; -0.991 ; +; clk_div:inst5|clock_10Hz ; -0.051 ; -0.056 ; +---------------------------------------------------+--------+---------------+ @@ -329,12 +330,12 @@ Worst Case Available Settling Time: 193.269 ns +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; SCOMP:inst|IO_CYCLE ; -0.935 ; -2.855 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -0.272 ; -0.541 ; -; clk_div:inst5|clock_10kHz ; 0.144 ; 0.000 ; +; SCOMP:inst|IO_CYCLE ; -0.763 ; -0.763 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -0.290 ; -0.290 ; +; clk_div:inst5|clock_25kHz ; 0.145 ; 0.000 ; ; clk_div:inst5|clock_100kHz ; 0.148 ; 0.000 ; -; clk_div:inst5|clock_10Hz ; 0.156 ; 0.000 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; 0.201 ; 0.000 ; +; clk_div:inst5|clock_10Hz ; 0.157 ; 0.000 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; 0.212 ; 0.000 ; +---------------------------------------------------+--------+---------------+ @@ -343,8 +344,8 @@ Worst Case Available Settling Time: 193.269 ns +--------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------------+--------+---------------+ -; clk_div:inst5|clock_10Hz ; -1.885 ; -30.160 ; -; SCOMP:inst|IO_CYCLE ; 0.237 ; 0.000 ; +; clk_div:inst5|clock_10Hz ; -2.210 ; -35.177 ; +; SCOMP:inst|IO_CYCLE ; 0.517 ; 0.000 ; +--------------------------+--------+---------------+ @@ -353,8 +354,8 @@ Worst Case Available Settling Time: 193.269 ns +--------------------------+-------+---------------+ ; Clock ; Slack ; End Point TNS ; +--------------------------+-------+---------------+ -; SCOMP:inst|IO_CYCLE ; 0.339 ; 0.000 ; -; clk_div:inst5|clock_10Hz ; 1.320 ; 0.000 ; +; SCOMP:inst|IO_CYCLE ; 0.075 ; 0.000 ; +; clk_div:inst5|clock_10Hz ; 1.317 ; 0.000 ; +--------------------------+-------+---------------+ @@ -363,13 +364,13 @@ Worst Case Available Settling Time: 193.269 ns +---------------------------------------------------+--------+---------------+ ; Clock ; Slack ; End Point TNS ; +---------------------------------------------------+--------+---------------+ -; SCOMP:inst|IO_CYCLE ; -1.000 ; -77.000 ; +; SCOMP:inst|IO_CYCLE ; -1.000 ; -79.128 ; ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -1.000 ; -50.000 ; ; clk_div:inst5|clock_100kHz ; -1.000 ; -47.000 ; ; clk_div:inst5|clock_10Hz ; -1.000 ; -16.000 ; -; clk_div:inst5|clock_10kHz ; -1.000 ; -6.000 ; +; clk_div:inst5|clock_25kHz ; -1.000 ; -8.000 ; ; clock_50 ; 9.532 ; 0.000 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; 49.715 ; 0.000 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; 49.713 ; 0.000 ; +---------------------------------------------------+--------+---------------+ @@ -380,7 +381,7 @@ The design MTBF is not calculated because there are no specified synchronizers i Number of Synchronizer Chains Found: 2 Shortest Synchronizer Chain: 2 Registers Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 -Worst Case Available Settling Time: 196.865 ns +Worst Case Available Settling Time: 196.760 ns @@ -390,22 +391,22 @@ Worst Case Available Settling Time: 196.865 ns +----------------------------------------------------+----------+--------+----------+---------+---------------------+ ; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ; +----------------------------------------------------+----------+--------+----------+---------+---------------------+ -; Worst-case Slack ; -10.238 ; -1.780 ; -4.559 ; 0.029 ; -1.403 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -4.710 ; -0.490 ; N/A ; N/A ; -1.403 ; -; SCOMP:inst|IO_CYCLE ; -7.094 ; -1.780 ; 0.130 ; 0.029 ; -1.403 ; -; clk_div:inst5|clock_100kHz ; -4.669 ; 0.148 ; N/A ; N/A ; -1.403 ; -; clk_div:inst5|clock_10Hz ; -1.648 ; 0.156 ; -4.559 ; 1.320 ; -1.403 ; -; clk_div:inst5|clock_10kHz ; -3.272 ; 0.144 ; N/A ; N/A ; -1.403 ; +; Worst-case Slack ; -9.989 ; -1.648 ; -5.082 ; -0.458 ; -1.403 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -4.091 ; -0.407 ; N/A ; N/A ; -1.403 ; +; SCOMP:inst|IO_CYCLE ; -7.400 ; -1.648 ; 0.517 ; -0.458 ; -1.403 ; +; clk_div:inst5|clock_100kHz ; -6.310 ; 0.148 ; N/A ; N/A ; -1.403 ; +; clk_div:inst5|clock_10Hz ; -1.646 ; 0.157 ; -5.082 ; 1.317 ; -1.403 ; +; clk_div:inst5|clock_25kHz ; -3.916 ; 0.145 ; N/A ; N/A ; -1.403 ; ; clock_50 ; N/A ; N/A ; N/A ; N/A ; 9.532 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; -10.238 ; 0.201 ; N/A ; N/A ; 49.672 ; -; Design-wide TNS ; -836.179 ; -4.945 ; -72.944 ; 0.0 ; -274.988 ; -; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -124.461 ; -0.975 ; N/A ; N/A ; -70.150 ; -; SCOMP:inst|IO_CYCLE ; -389.281 ; -3.970 ; 0.000 ; 0.000 ; -108.031 ; -; clk_div:inst5|clock_100kHz ; -163.643 ; 0.000 ; N/A ; N/A ; -65.941 ; -; clk_div:inst5|clock_10Hz ; -17.083 ; 0.000 ; -72.944 ; 0.000 ; -22.448 ; -; clk_div:inst5|clock_10kHz ; -6.146 ; 0.000 ; N/A ; N/A ; -8.418 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; -9.989 ; 0.212 ; N/A ; N/A ; 49.672 ; +; Design-wide TNS ; -914.971 ; -2.125 ; -80.88 ; -0.458 ; -280.6 ; +; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; -97.456 ; -0.407 ; N/A ; N/A ; -70.150 ; +; SCOMP:inst|IO_CYCLE ; -431.406 ; -1.718 ; 0.000 ; -0.458 ; -110.837 ; +; clk_div:inst5|clock_100kHz ; -218.144 ; 0.000 ; N/A ; N/A ; -65.941 ; +; clk_div:inst5|clock_10Hz ; -16.621 ; 0.000 ; -80.880 ; 0.000 ; -22.448 ; +; clk_div:inst5|clock_25kHz ; -8.872 ; 0.000 ; N/A ; N/A ; -11.224 ; ; clock_50 ; N/A ; N/A ; N/A ; N/A ; 0.000 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; -135.565 ; 0.000 ; N/A ; N/A ; 0.000 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; -142.472 ; 0.000 ; N/A ; N/A ; 0.000 ; +----------------------------------------------------+----------+--------+----------+---------+---------------------+ @@ -723,8 +724,8 @@ Worst Case Available Settling Time: 196.865 ns ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +---------------------------------------------------+---------------------------------------------------+----------+----------+----------+----------+ ; clk_div:inst5|clock_10Hz ; clk_div:inst5|clock_10Hz ; 136 ; 0 ; 0 ; 0 ; -; clk_div:inst5|clock_10kHz ; clk_div:inst5|clock_10kHz ; 26 ; 0 ; 0 ; 0 ; -; SCOMP:inst|IO_CYCLE ; clk_div:inst5|clock_10kHz ; 5 ; 0 ; 0 ; 0 ; +; clk_div:inst5|clock_25kHz ; clk_div:inst5|clock_25kHz ; 43 ; 0 ; 0 ; 0 ; +; SCOMP:inst|IO_CYCLE ; clk_div:inst5|clock_25kHz ; 7 ; 0 ; 0 ; 0 ; ; clk_div:inst5|clock_100kHz ; clk_div:inst5|clock_100kHz ; 172 ; 0 ; 0 ; 0 ; ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; clk_div:inst5|clock_100kHz ; 67 ; 0 ; 0 ; 0 ; ; SCOMP:inst|IO_CYCLE ; clk_div:inst5|clock_100kHz ; 119 ; 0 ; 0 ; 0 ; @@ -732,12 +733,12 @@ Worst Case Available Settling Time: 196.865 ns ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; 457 ; 38 ; 37 ; 10 ; ; clk_div:inst5|clock_10Hz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 16 ; 0 ; 0 ; 0 ; ; clk_div:inst5|clock_100kHz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 17 ; 0 ; 0 ; 0 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 10966 ; 0 ; 0 ; 0 ; -; SCOMP:inst|IO_CYCLE ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 186 ; 175 ; 0 ; 0 ; -; clk_div:inst5|clock_10Hz ; SCOMP:inst|IO_CYCLE ; 66 ; 0 ; 0 ; 0 ; -; clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 71 ; 0 ; 0 ; 0 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; SCOMP:inst|IO_CYCLE ; 8447 ; 0 ; 0 ; 0 ; -; SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; 764 ; 707 ; 0 ; 0 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 10746 ; 0 ; 0 ; 0 ; +; SCOMP:inst|IO_CYCLE ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 201 ; 190 ; 0 ; 0 ; +; clk_div:inst5|clock_10Hz ; SCOMP:inst|IO_CYCLE ; 68 ; 0 ; 0 ; 0 ; +; clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 73 ; 0 ; 0 ; 0 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; SCOMP:inst|IO_CYCLE ; 8741 ; 0 ; 0 ; 0 ; +; SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; 788 ; 729 ; 0 ; 0 ; +---------------------------------------------------+---------------------------------------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. @@ -748,8 +749,8 @@ Entries labeled "false path" only account for clock-to-clock false paths and not ; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; +---------------------------------------------------+---------------------------------------------------+----------+----------+----------+----------+ ; clk_div:inst5|clock_10Hz ; clk_div:inst5|clock_10Hz ; 136 ; 0 ; 0 ; 0 ; -; clk_div:inst5|clock_10kHz ; clk_div:inst5|clock_10kHz ; 26 ; 0 ; 0 ; 0 ; -; SCOMP:inst|IO_CYCLE ; clk_div:inst5|clock_10kHz ; 5 ; 0 ; 0 ; 0 ; +; clk_div:inst5|clock_25kHz ; clk_div:inst5|clock_25kHz ; 43 ; 0 ; 0 ; 0 ; +; SCOMP:inst|IO_CYCLE ; clk_div:inst5|clock_25kHz ; 7 ; 0 ; 0 ; 0 ; ; clk_div:inst5|clock_100kHz ; clk_div:inst5|clock_100kHz ; 172 ; 0 ; 0 ; 0 ; ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; clk_div:inst5|clock_100kHz ; 67 ; 0 ; 0 ; 0 ; ; SCOMP:inst|IO_CYCLE ; clk_div:inst5|clock_100kHz ; 119 ; 0 ; 0 ; 0 ; @@ -757,12 +758,12 @@ Entries labeled "false path" only account for clock-to-clock false paths and not ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; 457 ; 38 ; 37 ; 10 ; ; clk_div:inst5|clock_10Hz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 16 ; 0 ; 0 ; 0 ; ; clk_div:inst5|clock_100kHz ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 17 ; 0 ; 0 ; 0 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 10966 ; 0 ; 0 ; 0 ; -; SCOMP:inst|IO_CYCLE ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 186 ; 175 ; 0 ; 0 ; -; clk_div:inst5|clock_10Hz ; SCOMP:inst|IO_CYCLE ; 66 ; 0 ; 0 ; 0 ; -; clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 71 ; 0 ; 0 ; 0 ; -; inst1|altpll_component|auto_generated|pll1|clk[0] ; SCOMP:inst|IO_CYCLE ; 8447 ; 0 ; 0 ; 0 ; -; SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; 764 ; 707 ; 0 ; 0 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 10746 ; 0 ; 0 ; 0 ; +; SCOMP:inst|IO_CYCLE ; inst1|altpll_component|auto_generated|pll1|clk[0] ; 201 ; 190 ; 0 ; 0 ; +; clk_div:inst5|clock_10Hz ; SCOMP:inst|IO_CYCLE ; 68 ; 0 ; 0 ; 0 ; +; clk_div:inst5|clock_100kHz ; SCOMP:inst|IO_CYCLE ; 73 ; 0 ; 0 ; 0 ; +; inst1|altpll_component|auto_generated|pll1|clk[0] ; SCOMP:inst|IO_CYCLE ; 8741 ; 0 ; 0 ; 0 ; +; SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; 788 ; 729 ; 0 ; 0 ; +---------------------------------------------------+---------------------------------------------------+----------+----------+----------+----------+ Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. @@ -825,7 +826,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; I2C_INTERFACE:inst13|i2c_master:inst|data_clk ; Base ; Constrained ; ; SCOMP:inst|IO_CYCLE ; SCOMP:inst|IO_CYCLE ; Base ; Constrained ; ; clk_div:inst5|clock_10Hz ; clk_div:inst5|clock_10Hz ; Base ; Constrained ; -; clk_div:inst5|clock_10kHz ; clk_div:inst5|clock_10kHz ; Base ; Constrained ; +; clk_div:inst5|clock_25kHz ; clk_div:inst5|clock_25kHz ; Base ; Constrained ; ; clk_div:inst5|clock_100kHz ; clk_div:inst5|clock_100kHz ; Base ; Constrained ; ; clock_50 ; clock_50 ; Base ; Constrained ; ; inst1|altpll_component|auto_generated|pll1|clk[0] ; inst1|altpll_component|auto_generated|pll1|clk[0] ; Generated ; Constrained ; @@ -1018,10 +1019,10 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi Info: ******************************************************************* Info: Running Quartus Prime Timing Analyzer Info: Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition - Info: Processing started: Tue Apr 06 22:27:16 2021 + Info: Processing started: Sun Apr 11 14:59:58 2021 Info: Command: quartus_sta SCOMP -c SCOMP Info: qsta_default_script.tcl version: #1 -Info (20030): Parallel compilation is enabled and will use 4 of the 4 processors detected +Info (20030): Parallel compilation is enabled and will use 6 of the 6 processors detected Info (21077): Low junction temperature is 0 degrees C Info (21077): High junction temperature is 85 degrees C Info (332104): Reading SDC File: 'SCOMP.sdc' @@ -1031,53 +1032,53 @@ Info (332110): Deriving PLL clocks Info (332110): create_generated_clock -source {inst1|altpll_component|auto_generated|pll1|inclk[0]} -divide_by 5 -duty_cycle 50.00 -name {inst1|altpll_component|auto_generated|pll1|clk[0]} {inst1|altpll_component|auto_generated|pll1|clk[0]} Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" Info (332105): Deriving Clocks - Info (332105): create_clock -period 1.000 -name clk_div:inst5|clock_10kHz clk_div:inst5|clock_10kHz + Info (332105): create_clock -period 1.000 -name clk_div:inst5|clock_25kHz clk_div:inst5|clock_25kHz Info (332105): create_clock -period 1.000 -name clk_div:inst5|clock_10Hz clk_div:inst5|clock_10Hz Info (332105): create_clock -period 1.000 -name clk_div:inst5|clock_100kHz clk_div:inst5|clock_100kHz - Info (332105): create_clock -period 1.000 -name SCOMP:inst|IO_CYCLE SCOMP:inst|IO_CYCLE Info (332105): create_clock -period 1.000 -name I2C_INTERFACE:inst13|i2c_master:inst|data_clk I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332105): create_clock -period 1.000 -name SCOMP:inst|IO_CYCLE SCOMP:inst|IO_CYCLE Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty" Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. Info: Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON Info: Analyzing Slow 1200mV 85C Model Info: Can't run Report Timing Closure Recommendations. The current device family is not supported. Critical Warning (332148): Timing requirements not met -Info (332146): Worst-case setup slack is -10.238 +Info (332146): Worst-case setup slack is -9.989 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -10.238 -135.565 inst1|altpll_component|auto_generated|pll1|clk[0] - Info (332119): -7.094 -389.281 SCOMP:inst|IO_CYCLE - Info (332119): -4.710 -124.461 I2C_INTERFACE:inst13|i2c_master:inst|data_clk - Info (332119): -4.669 -163.643 clk_div:inst5|clock_100kHz - Info (332119): -3.272 -6.146 clk_div:inst5|clock_10kHz - Info (332119): -1.648 -17.083 clk_div:inst5|clock_10Hz -Info (332146): Worst-case hold slack is -1.780 + Info (332119): -9.989 -142.472 inst1|altpll_component|auto_generated|pll1|clk[0] + Info (332119): -7.400 -431.406 SCOMP:inst|IO_CYCLE + Info (332119): -6.310 -218.144 clk_div:inst5|clock_100kHz + Info (332119): -4.091 -97.456 I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332119): -3.916 -8.872 clk_div:inst5|clock_25kHz + Info (332119): -1.646 -16.621 clk_div:inst5|clock_10Hz +Info (332146): Worst-case hold slack is -1.648 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -1.780 -3.970 SCOMP:inst|IO_CYCLE - Info (332119): -0.490 -0.975 I2C_INTERFACE:inst13|i2c_master:inst|data_clk - Info (332119): 0.329 0.000 clk_div:inst5|clock_10kHz + Info (332119): -1.648 -1.648 SCOMP:inst|IO_CYCLE + Info (332119): -0.400 -0.400 I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332119): 0.330 0.000 clk_div:inst5|clock_25kHz Info (332119): 0.340 0.000 clk_div:inst5|clock_100kHz - Info (332119): 0.362 0.000 clk_div:inst5|clock_10Hz - Info (332119): 0.411 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] -Info (332146): Worst-case recovery slack is -4.559 + Info (332119): 0.364 0.000 clk_div:inst5|clock_10Hz + Info (332119): 0.421 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] +Info (332146): Worst-case recovery slack is -5.082 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -4.559 -72.944 clk_div:inst5|clock_10Hz - Info (332119): 0.130 0.000 SCOMP:inst|IO_CYCLE -Info (332146): Worst-case removal slack is 0.149 + Info (332119): -5.082 -80.880 clk_div:inst5|clock_10Hz + Info (332119): 0.648 0.000 SCOMP:inst|IO_CYCLE +Info (332146): Worst-case removal slack is -0.377 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.149 0.000 SCOMP:inst|IO_CYCLE - Info (332119): 3.511 0.000 clk_div:inst5|clock_10Hz + Info (332119): -0.377 -0.377 SCOMP:inst|IO_CYCLE + Info (332119): 3.353 0.000 clk_div:inst5|clock_10Hz Info (332146): Worst-case minimum pulse width slack is -1.403 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -1.403 -108.031 SCOMP:inst|IO_CYCLE + Info (332119): -1.403 -110.837 SCOMP:inst|IO_CYCLE Info (332119): -1.403 -70.150 I2C_INTERFACE:inst13|i2c_master:inst|data_clk Info (332119): -1.403 -65.941 clk_div:inst5|clock_100kHz Info (332119): -1.403 -22.448 clk_div:inst5|clock_10Hz - Info (332119): -1.403 -8.418 clk_div:inst5|clock_10kHz + Info (332119): -1.403 -11.224 clk_div:inst5|clock_25kHz Info (332119): 9.844 0.000 clock_50 Info (332119): 49.672 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] Info (332114): Report Metastability: Found 2 synchronizer chains. @@ -1085,112 +1086,112 @@ Info (332114): Report Metastability: Found 2 synchronizer chains. Info (332114): Number of Synchronizer Chains Found: 2 Info (332114): Shortest Synchronizer Chain: 2 Registers Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 - Info (332114): Worst Case Available Settling Time: 192.734 ns + Info (332114): Worst Case Available Settling Time: 192.500 ns Info (332114): Info: Analyzing Slow 1200mV 0C Model Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. Critical Warning (332148): Timing requirements not met -Info (332146): Worst-case setup slack is -9.171 +Info (332146): Worst-case setup slack is -8.990 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -9.171 -118.778 inst1|altpll_component|auto_generated|pll1|clk[0] - Info (332119): -6.534 -362.714 SCOMP:inst|IO_CYCLE - Info (332119): -4.257 -151.063 clk_div:inst5|clock_100kHz - Info (332119): -4.216 -111.980 I2C_INTERFACE:inst13|i2c_master:inst|data_clk - Info (332119): -2.978 -5.224 clk_div:inst5|clock_10kHz - Info (332119): -1.381 -13.986 clk_div:inst5|clock_10Hz -Info (332146): Worst-case hold slack is -1.472 + Info (332119): -8.990 -125.018 inst1|altpll_component|auto_generated|pll1|clk[0] + Info (332119): -6.939 -402.066 SCOMP:inst|IO_CYCLE + Info (332119): -5.796 -201.562 clk_div:inst5|clock_100kHz + Info (332119): -3.734 -87.535 I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332119): -3.571 -7.522 clk_div:inst5|clock_25kHz + Info (332119): -1.381 -13.590 clk_div:inst5|clock_10Hz +Info (332146): Worst-case hold slack is -1.598 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -1.472 -2.843 SCOMP:inst|IO_CYCLE - Info (332119): -0.478 -0.950 I2C_INTERFACE:inst13|i2c_master:inst|data_clk - Info (332119): 0.295 0.000 clk_div:inst5|clock_10kHz - Info (332119): 0.304 0.000 clk_div:inst5|clock_100kHz + Info (332119): -1.598 -1.718 SCOMP:inst|IO_CYCLE + Info (332119): -0.407 -0.407 I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332119): 0.296 0.000 clk_div:inst5|clock_25kHz + Info (332119): 0.305 0.000 clk_div:inst5|clock_100kHz Info (332119): 0.328 0.000 clk_div:inst5|clock_10Hz - Info (332119): 0.342 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] -Info (332146): Worst-case recovery slack is -4.515 + Info (332119): 0.341 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] +Info (332146): Worst-case recovery slack is -4.502 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -4.515 -72.240 clk_div:inst5|clock_10Hz - Info (332119): 0.350 0.000 SCOMP:inst|IO_CYCLE -Info (332146): Worst-case removal slack is 0.029 + Info (332119): -4.502 -71.636 clk_div:inst5|clock_10Hz + Info (332119): 0.847 0.000 SCOMP:inst|IO_CYCLE +Info (332146): Worst-case removal slack is -0.458 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.029 0.000 SCOMP:inst|IO_CYCLE - Info (332119): 3.343 0.000 clk_div:inst5|clock_10Hz + Info (332119): -0.458 -0.458 SCOMP:inst|IO_CYCLE + Info (332119): 3.258 0.000 clk_div:inst5|clock_10Hz Info (332146): Worst-case minimum pulse width slack is -1.403 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -1.403 -108.031 SCOMP:inst|IO_CYCLE + Info (332119): -1.403 -110.837 SCOMP:inst|IO_CYCLE Info (332119): -1.403 -70.150 I2C_INTERFACE:inst13|i2c_master:inst|data_clk Info (332119): -1.403 -65.941 clk_div:inst5|clock_100kHz Info (332119): -1.403 -22.448 clk_div:inst5|clock_10Hz - Info (332119): -1.403 -8.418 clk_div:inst5|clock_10kHz + Info (332119): -1.403 -11.224 clk_div:inst5|clock_25kHz Info (332119): 9.857 0.000 clock_50 - Info (332119): 49.688 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 49.684 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] Info (332114): Report Metastability: Found 2 synchronizer chains. Info (332114): The design MTBF is not calculated because there are no specified synchronizers in the design. Info (332114): Number of Synchronizer Chains Found: 2 Info (332114): Shortest Synchronizer Chain: 2 Registers Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 - Info (332114): Worst Case Available Settling Time: 193.269 ns + Info (332114): Worst Case Available Settling Time: 192.987 ns Info (332114): Info: Analyzing Fast 1200mV 0C Model Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. Critical Warning (332148): Timing requirements not met -Info (332146): Worst-case setup slack is -4.258 +Info (332146): Worst-case setup slack is -4.392 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -4.258 -57.599 inst1|altpll_component|auto_generated|pll1|clk[0] - Info (332119): -2.809 -155.387 SCOMP:inst|IO_CYCLE - Info (332119): -1.430 -32.444 I2C_INTERFACE:inst13|i2c_master:inst|data_clk - Info (332119): -1.371 -41.952 clk_div:inst5|clock_100kHz - Info (332119): -0.799 -0.799 clk_div:inst5|clock_10kHz - Info (332119): -0.052 -0.058 clk_div:inst5|clock_10Hz -Info (332146): Worst-case hold slack is -0.935 + Info (332119): -4.392 -62.461 inst1|altpll_component|auto_generated|pll1|clk[0] + Info (332119): -3.204 -176.720 SCOMP:inst|IO_CYCLE + Info (332119): -1.994 -63.168 clk_div:inst5|clock_100kHz + Info (332119): -1.229 -23.041 I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332119): -0.991 -0.991 clk_div:inst5|clock_25kHz + Info (332119): -0.051 -0.056 clk_div:inst5|clock_10Hz +Info (332146): Worst-case hold slack is -0.763 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -0.935 -2.855 SCOMP:inst|IO_CYCLE - Info (332119): -0.272 -0.541 I2C_INTERFACE:inst13|i2c_master:inst|data_clk - Info (332119): 0.144 0.000 clk_div:inst5|clock_10kHz + Info (332119): -0.763 -0.763 SCOMP:inst|IO_CYCLE + Info (332119): -0.290 -0.290 I2C_INTERFACE:inst13|i2c_master:inst|data_clk + Info (332119): 0.145 0.000 clk_div:inst5|clock_25kHz Info (332119): 0.148 0.000 clk_div:inst5|clock_100kHz - Info (332119): 0.156 0.000 clk_div:inst5|clock_10Hz - Info (332119): 0.201 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] -Info (332146): Worst-case recovery slack is -1.885 + Info (332119): 0.157 0.000 clk_div:inst5|clock_10Hz + Info (332119): 0.212 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] +Info (332146): Worst-case recovery slack is -2.210 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -1.885 -30.160 clk_div:inst5|clock_10Hz - Info (332119): 0.237 0.000 SCOMP:inst|IO_CYCLE -Info (332146): Worst-case removal slack is 0.339 + Info (332119): -2.210 -35.177 clk_div:inst5|clock_10Hz + Info (332119): 0.517 0.000 SCOMP:inst|IO_CYCLE +Info (332146): Worst-case removal slack is 0.075 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): 0.339 0.000 SCOMP:inst|IO_CYCLE - Info (332119): 1.320 0.000 clk_div:inst5|clock_10Hz + Info (332119): 0.075 0.000 SCOMP:inst|IO_CYCLE + Info (332119): 1.317 0.000 clk_div:inst5|clock_10Hz Info (332146): Worst-case minimum pulse width slack is -1.000 Info (332119): Slack End Point TNS Clock Info (332119): ========= =================== ===================== - Info (332119): -1.000 -77.000 SCOMP:inst|IO_CYCLE + Info (332119): -1.000 -79.128 SCOMP:inst|IO_CYCLE Info (332119): -1.000 -50.000 I2C_INTERFACE:inst13|i2c_master:inst|data_clk Info (332119): -1.000 -47.000 clk_div:inst5|clock_100kHz Info (332119): -1.000 -16.000 clk_div:inst5|clock_10Hz - Info (332119): -1.000 -6.000 clk_div:inst5|clock_10kHz + Info (332119): -1.000 -8.000 clk_div:inst5|clock_25kHz Info (332119): 9.532 0.000 clock_50 - Info (332119): 49.715 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] + Info (332119): 49.713 0.000 inst1|altpll_component|auto_generated|pll1|clk[0] Info (332114): Report Metastability: Found 2 synchronizer chains. Info (332114): The design MTBF is not calculated because there are no specified synchronizers in the design. Info (332114): Number of Synchronizer Chains Found: 2 Info (332114): Shortest Synchronizer Chain: 2 Registers Info (332114): Fraction of Chains for which MTBFs Could Not be Calculated: 1.000 - Info (332114): Worst Case Available Settling Time: 196.865 ns + Info (332114): Worst Case Available Settling Time: 196.760 ns Info (332114): Info (332102): Design is not fully constrained for setup requirements Info (332102): Design is not fully constrained for hold requirements Info: Quartus Prime Timing Analyzer was successful. 0 errors, 3 warnings - Info: Peak virtual memory: 4855 megabytes - Info: Processing ended: Tue Apr 06 22:27:26 2021 - Info: Elapsed time: 00:00:10 - Info: Total CPU time (on all processors): 00:00:12 + Info: Peak virtual memory: 4868 megabytes + Info: Processing ended: Sun Apr 11 15:00:02 2021 + Info: Elapsed time: 00:00:04 + Info: Total CPU time (on all processors): 00:00:05 diff --git a/output_files/SCOMP.sta.summary b/output_files/SCOMP.sta.summary index 080ac2c..8739720 100644 --- a/output_files/SCOMP.sta.summary +++ b/output_files/SCOMP.sta.summary @@ -3,39 +3,39 @@ Timing Analyzer Summary ------------------------------------------------------------ Type : Slow 1200mV 85C Model Setup 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : -10.238 -TNS : -135.565 +Slack : -9.989 +TNS : -142.472 Type : Slow 1200mV 85C Model Setup 'SCOMP:inst|IO_CYCLE' -Slack : -7.094 -TNS : -389.281 - -Type : Slow 1200mV 85C Model Setup 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' -Slack : -4.710 -TNS : -124.461 +Slack : -7.400 +TNS : -431.406 Type : Slow 1200mV 85C Model Setup 'clk_div:inst5|clock_100kHz' -Slack : -4.669 -TNS : -163.643 +Slack : -6.310 +TNS : -218.144 + +Type : Slow 1200mV 85C Model Setup 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' +Slack : -4.091 +TNS : -97.456 -Type : Slow 1200mV 85C Model Setup 'clk_div:inst5|clock_10kHz' -Slack : -3.272 -TNS : -6.146 +Type : Slow 1200mV 85C Model Setup 'clk_div:inst5|clock_25kHz' +Slack : -3.916 +TNS : -8.872 Type : Slow 1200mV 85C Model Setup 'clk_div:inst5|clock_10Hz' -Slack : -1.648 -TNS : -17.083 +Slack : -1.646 +TNS : -16.621 Type : Slow 1200mV 85C Model Hold 'SCOMP:inst|IO_CYCLE' -Slack : -1.780 -TNS : -3.970 +Slack : -1.648 +TNS : -1.648 Type : Slow 1200mV 85C Model Hold 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' -Slack : -0.490 -TNS : -0.975 +Slack : -0.400 +TNS : -0.400 -Type : Slow 1200mV 85C Model Hold 'clk_div:inst5|clock_10kHz' -Slack : 0.329 +Type : Slow 1200mV 85C Model Hold 'clk_div:inst5|clock_25kHz' +Slack : 0.330 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'clk_div:inst5|clock_100kHz' @@ -43,32 +43,32 @@ Slack : 0.340 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'clk_div:inst5|clock_10Hz' -Slack : 0.362 +Slack : 0.364 TNS : 0.000 Type : Slow 1200mV 85C Model Hold 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : 0.411 +Slack : 0.421 TNS : 0.000 Type : Slow 1200mV 85C Model Recovery 'clk_div:inst5|clock_10Hz' -Slack : -4.559 -TNS : -72.944 +Slack : -5.082 +TNS : -80.880 Type : Slow 1200mV 85C Model Recovery 'SCOMP:inst|IO_CYCLE' -Slack : 0.130 +Slack : 0.648 TNS : 0.000 Type : Slow 1200mV 85C Model Removal 'SCOMP:inst|IO_CYCLE' -Slack : 0.149 -TNS : 0.000 +Slack : -0.377 +TNS : -0.377 Type : Slow 1200mV 85C Model Removal 'clk_div:inst5|clock_10Hz' -Slack : 3.511 +Slack : 3.353 TNS : 0.000 Type : Slow 1200mV 85C Model Minimum Pulse Width 'SCOMP:inst|IO_CYCLE' Slack : -1.403 -TNS : -108.031 +TNS : -110.837 Type : Slow 1200mV 85C Model Minimum Pulse Width 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' Slack : -1.403 @@ -82,9 +82,9 @@ Type : Slow 1200mV 85C Model Minimum Pulse Width 'clk_div:inst5|clock_10Hz' Slack : -1.403 TNS : -22.448 -Type : Slow 1200mV 85C Model Minimum Pulse Width 'clk_div:inst5|clock_10kHz' +Type : Slow 1200mV 85C Model Minimum Pulse Width 'clk_div:inst5|clock_25kHz' Slack : -1.403 -TNS : -8.418 +TNS : -11.224 Type : Slow 1200mV 85C Model Minimum Pulse Width 'clock_50' Slack : 9.844 @@ -95,43 +95,43 @@ Slack : 49.672 TNS : 0.000 Type : Slow 1200mV 0C Model Setup 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : -9.171 -TNS : -118.778 +Slack : -8.990 +TNS : -125.018 Type : Slow 1200mV 0C Model Setup 'SCOMP:inst|IO_CYCLE' -Slack : -6.534 -TNS : -362.714 +Slack : -6.939 +TNS : -402.066 Type : Slow 1200mV 0C Model Setup 'clk_div:inst5|clock_100kHz' -Slack : -4.257 -TNS : -151.063 +Slack : -5.796 +TNS : -201.562 Type : Slow 1200mV 0C Model Setup 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' -Slack : -4.216 -TNS : -111.980 +Slack : -3.734 +TNS : -87.535 -Type : Slow 1200mV 0C Model Setup 'clk_div:inst5|clock_10kHz' -Slack : -2.978 -TNS : -5.224 +Type : Slow 1200mV 0C Model Setup 'clk_div:inst5|clock_25kHz' +Slack : -3.571 +TNS : -7.522 Type : Slow 1200mV 0C Model Setup 'clk_div:inst5|clock_10Hz' Slack : -1.381 -TNS : -13.986 +TNS : -13.590 Type : Slow 1200mV 0C Model Hold 'SCOMP:inst|IO_CYCLE' -Slack : -1.472 -TNS : -2.843 +Slack : -1.598 +TNS : -1.718 Type : Slow 1200mV 0C Model Hold 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' -Slack : -0.478 -TNS : -0.950 +Slack : -0.407 +TNS : -0.407 -Type : Slow 1200mV 0C Model Hold 'clk_div:inst5|clock_10kHz' -Slack : 0.295 +Type : Slow 1200mV 0C Model Hold 'clk_div:inst5|clock_25kHz' +Slack : 0.296 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'clk_div:inst5|clock_100kHz' -Slack : 0.304 +Slack : 0.305 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'clk_div:inst5|clock_10Hz' @@ -139,28 +139,28 @@ Slack : 0.328 TNS : 0.000 Type : Slow 1200mV 0C Model Hold 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : 0.342 +Slack : 0.341 TNS : 0.000 Type : Slow 1200mV 0C Model Recovery 'clk_div:inst5|clock_10Hz' -Slack : -4.515 -TNS : -72.240 +Slack : -4.502 +TNS : -71.636 Type : Slow 1200mV 0C Model Recovery 'SCOMP:inst|IO_CYCLE' -Slack : 0.350 +Slack : 0.847 TNS : 0.000 Type : Slow 1200mV 0C Model Removal 'SCOMP:inst|IO_CYCLE' -Slack : 0.029 -TNS : 0.000 +Slack : -0.458 +TNS : -0.458 Type : Slow 1200mV 0C Model Removal 'clk_div:inst5|clock_10Hz' -Slack : 3.343 +Slack : 3.258 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'SCOMP:inst|IO_CYCLE' Slack : -1.403 -TNS : -108.031 +TNS : -110.837 Type : Slow 1200mV 0C Model Minimum Pulse Width 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' Slack : -1.403 @@ -174,52 +174,52 @@ Type : Slow 1200mV 0C Model Minimum Pulse Width 'clk_div:inst5|clock_10Hz' Slack : -1.403 TNS : -22.448 -Type : Slow 1200mV 0C Model Minimum Pulse Width 'clk_div:inst5|clock_10kHz' +Type : Slow 1200mV 0C Model Minimum Pulse Width 'clk_div:inst5|clock_25kHz' Slack : -1.403 -TNS : -8.418 +TNS : -11.224 Type : Slow 1200mV 0C Model Minimum Pulse Width 'clock_50' Slack : 9.857 TNS : 0.000 Type : Slow 1200mV 0C Model Minimum Pulse Width 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : 49.688 +Slack : 49.684 TNS : 0.000 Type : Fast 1200mV 0C Model Setup 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : -4.258 -TNS : -57.599 +Slack : -4.392 +TNS : -62.461 Type : Fast 1200mV 0C Model Setup 'SCOMP:inst|IO_CYCLE' -Slack : -2.809 -TNS : -155.387 - -Type : Fast 1200mV 0C Model Setup 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' -Slack : -1.430 -TNS : -32.444 +Slack : -3.204 +TNS : -176.720 Type : Fast 1200mV 0C Model Setup 'clk_div:inst5|clock_100kHz' -Slack : -1.371 -TNS : -41.952 +Slack : -1.994 +TNS : -63.168 + +Type : Fast 1200mV 0C Model Setup 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' +Slack : -1.229 +TNS : -23.041 -Type : Fast 1200mV 0C Model Setup 'clk_div:inst5|clock_10kHz' -Slack : -0.799 -TNS : -0.799 +Type : Fast 1200mV 0C Model Setup 'clk_div:inst5|clock_25kHz' +Slack : -0.991 +TNS : -0.991 Type : Fast 1200mV 0C Model Setup 'clk_div:inst5|clock_10Hz' -Slack : -0.052 -TNS : -0.058 +Slack : -0.051 +TNS : -0.056 Type : Fast 1200mV 0C Model Hold 'SCOMP:inst|IO_CYCLE' -Slack : -0.935 -TNS : -2.855 +Slack : -0.763 +TNS : -0.763 Type : Fast 1200mV 0C Model Hold 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' -Slack : -0.272 -TNS : -0.541 +Slack : -0.290 +TNS : -0.290 -Type : Fast 1200mV 0C Model Hold 'clk_div:inst5|clock_10kHz' -Slack : 0.144 +Type : Fast 1200mV 0C Model Hold 'clk_div:inst5|clock_25kHz' +Slack : 0.145 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'clk_div:inst5|clock_100kHz' @@ -227,32 +227,32 @@ Slack : 0.148 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'clk_div:inst5|clock_10Hz' -Slack : 0.156 +Slack : 0.157 TNS : 0.000 Type : Fast 1200mV 0C Model Hold 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : 0.201 +Slack : 0.212 TNS : 0.000 Type : Fast 1200mV 0C Model Recovery 'clk_div:inst5|clock_10Hz' -Slack : -1.885 -TNS : -30.160 +Slack : -2.210 +TNS : -35.177 Type : Fast 1200mV 0C Model Recovery 'SCOMP:inst|IO_CYCLE' -Slack : 0.237 +Slack : 0.517 TNS : 0.000 Type : Fast 1200mV 0C Model Removal 'SCOMP:inst|IO_CYCLE' -Slack : 0.339 +Slack : 0.075 TNS : 0.000 Type : Fast 1200mV 0C Model Removal 'clk_div:inst5|clock_10Hz' -Slack : 1.320 +Slack : 1.317 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'SCOMP:inst|IO_CYCLE' Slack : -1.000 -TNS : -77.000 +TNS : -79.128 Type : Fast 1200mV 0C Model Minimum Pulse Width 'I2C_INTERFACE:inst13|i2c_master:inst|data_clk' Slack : -1.000 @@ -266,16 +266,16 @@ Type : Fast 1200mV 0C Model Minimum Pulse Width 'clk_div:inst5|clock_10Hz' Slack : -1.000 TNS : -16.000 -Type : Fast 1200mV 0C Model Minimum Pulse Width 'clk_div:inst5|clock_10kHz' +Type : Fast 1200mV 0C Model Minimum Pulse Width 'clk_div:inst5|clock_25kHz' Slack : -1.000 -TNS : -6.000 +TNS : -8.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'clock_50' Slack : 9.532 TNS : 0.000 Type : Fast 1200mV 0C Model Minimum Pulse Width 'inst1|altpll_component|auto_generated|pll1|clk[0]' -Slack : 49.715 +Slack : 49.713 TNS : 0.000 ------------------------------------------------------------ diff --git a/simulation/modelsim/SCOMP.vo b/simulation/modelsim/SCOMP.vo index 74edfac..bf7472e 100644 --- a/simulation/modelsim/SCOMP.vo +++ b/simulation/modelsim/SCOMP.vo @@ -17,7 +17,7 @@ // PROGRAM "Quartus Prime" // VERSION "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" -// DATE "04/06/2021 22:27:30" +// DATE "04/11/2021 15:00:03" // // Device: Altera 10M50DAF484C7G Package FBGA484 @@ -187,10 +187,6 @@ wire \clock_50~input_o ; wire \inst1|altpll_component|auto_generated|wire_pll1_fbout ; wire \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ; wire \inst5|count_100kHz[0]~6_combout ; -wire \inst5|count_100kHz[1]~9 ; -wire \inst5|count_100kHz[2]~10_combout ; -wire \inst5|count_100kHz[2]~11 ; -wire \inst5|count_100kHz[3]~12_combout ; wire \inst5|count_100kHz[3]~13 ; wire \inst5|count_100kHz[4]~14_combout ; wire \inst5|count_100kHz[4]~15 ; @@ -198,35 +194,102 @@ wire \inst5|count_100kHz[5]~16_combout ; wire \inst5|LessThan0~1_combout ; wire \inst5|count_100kHz[0]~7 ; wire \inst5|count_100kHz[1]~8_combout ; +wire \inst5|count_100kHz[1]~9 ; +wire \inst5|count_100kHz[2]~10_combout ; +wire \inst5|count_100kHz[2]~11 ; +wire \inst5|count_100kHz[3]~12_combout ; wire \inst5|LessThan0~0_combout ; wire \inst5|clock_100kHz_int~0_combout ; wire \inst5|clock_100kHz_int~q ; wire \inst5|clock_100kHz~feeder_combout ; wire \inst5|clock_100kHz~q ; wire \inst5|clock_100kHz~clkctrl_outclk ; -wire \GSENSOR_SCLK~input_o ; wire \inst13|inst|count~1_combout ; wire \inst1|altpll_component|auto_generated|wire_pll1_locked ; wire \inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout ; wire \inst1|altpll_component|auto_generated|pll_lock_sync~q ; wire \inst13|inst14|data_out[7]~0_combout ; wire \inst13|inst14|data_out[7]~0clkctrl_outclk ; +wire \GSENSOR_SCLK~input_o ; wire \inst13|inst|stretch~0_combout ; wire \inst13|inst|stretch~q ; wire \inst13|inst|count~0_combout ; wire \inst13|inst|data_clk~0_combout ; wire \inst13|inst|data_clk~q ; wire \inst13|inst|data_clk~clkctrl_outclk ; +wire \inst13|inst|bit_cnt[0]~0_combout ; +wire \inst13|inst|Selector27~0_combout ; +wire \inst13|inst|bit_cnt[1]~feeder_combout ; +wire \inst13|inst|Add1~0_combout ; +wire \inst13|inst|state~14_combout ; +wire \inst13|inst|state.mstr_ack~feeder_combout ; +wire \inst13|inst|state.mstr_ack~q ; +wire \inst|state.decode~q ; +wire \inst|state~50_combout ; +wire \inst|state.ex_return~q ; wire \inst10|state.Init~feeder_combout ; wire \inst10|state.Init~q ; -wire \inst|Selector8~0_combout ; -wire \inst|Selector6~0_combout ; +wire \inst|PC_stack[9][1]~feeder_combout ; wire \inst|state~55_combout ; wire \inst|state.ex_call~q ; wire \inst|PC_stack[9][0]~1_combout ; +wire \inst|PC_stack[9][1]~q ; +wire \inst|Selector128~0_combout ; +wire \inst|PC_stack[0][0]~0_combout ; +wire \inst|PC_stack[8][1]~q ; +wire \inst|Selector117~0_combout ; +wire \inst|PC_stack[7][1]~q ; +wire \inst|Selector106~0_combout ; +wire \inst|PC_stack[6][1]~q ; +wire \inst|Selector95~0_combout ; +wire \inst|PC_stack[5][1]~q ; +wire \inst|Selector84~0_combout ; +wire \inst|PC_stack[4][1]~q ; +wire \inst|Selector73~0_combout ; +wire \inst|PC_stack[3][1]~q ; +wire \inst|Selector62~0_combout ; +wire \inst|PC_stack[2][1]~q ; +wire \inst|Selector51~0_combout ; +wire \inst|PC_stack[1][1]~q ; +wire \inst|Selector40~0_combout ; +wire \inst|PC_stack[0][1]~q ; +wire \inst|Add0~0_combout ; +wire \inst|Selector11~1_combout ; +wire \inst|PC_stack[9][0]~feeder_combout ; +wire \inst|PC_stack[9][0]~q ; +wire \inst|Selector129~0_combout ; +wire \inst|PC_stack[8][0]~q ; +wire \inst|Selector118~0_combout ; +wire \inst|PC_stack[7][0]~q ; +wire \inst|Selector107~0_combout ; +wire \inst|PC_stack[6][0]~q ; +wire \inst|Selector96~0_combout ; +wire \inst|PC_stack[5][0]~q ; +wire \inst|Selector85~0_combout ; +wire \inst|PC_stack[4][0]~q ; +wire \inst|Selector74~0_combout ; +wire \inst|PC_stack[3][0]~q ; +wire \inst|Selector63~0_combout ; +wire \inst|PC_stack[2][0]~q ; +wire \inst|Selector52~0_combout ; +wire \inst|PC_stack[1][0]~q ; +wire \inst|Selector41~0_combout ; +wire \inst|PC_stack[0][0]~q ; +wire \inst|Selector11~2_combout ; +wire \inst|state~46_combout ; +wire \inst|state.ex_shift~q ; +wire \inst|Add0~7 ; +wire \inst|Add0~8_combout ; +wire \inst|state~37_combout ; +wire \inst|state~47_combout ; +wire \inst|state.ex_iload~q ; +wire \inst|state.ex_istore2~q ; +wire \inst|WideNor0~combout ; +wire \inst|Selector7~0_combout ; +wire \inst|Selector7~1_combout ; +wire \inst|PC_stack[9][4]~feeder_combout ; wire \inst|PC_stack[9][4]~q ; wire \inst|Selector125~0_combout ; -wire \inst|PC_stack[0][0]~0_combout ; wire \inst|PC_stack[8][4]~q ; wire \inst|Selector114~0_combout ; wire \inst|PC_stack[7][4]~q ; @@ -244,47 +307,52 @@ wire \inst|Selector48~0_combout ; wire \inst|PC_stack[1][4]~q ; wire \inst|Selector37~0_combout ; wire \inst|PC_stack[0][4]~q ; -wire \inst|Add0~7 ; -wire \inst|Add0~8_combout ; -wire \inst|Selector7~1_combout ; wire \inst|Selector7~2_combout ; -wire \inst|state~43_combout ; -wire \inst|state~52_combout ; -wire \inst|state.ex_jzero~q ; -wire \inst|state~35_combout ; -wire \inst|state~51_combout ; -wire \inst|state.ex_jpos~q ; -wire \inst|Selector28~0_combout ; -wire \inst|Selector28~1_combout ; -wire \inst|IO_WRITE_int~q ; -wire \inst|IR[0]~0_combout ; -wire \inst3|I2C_RDY_EN~0_combout ; -wire \inst13|inst4~combout ; -wire \inst|Selector4~0_combout ; +wire \inst|next_mem_addr[4]~4_combout ; +wire \inst|Add0~9 ; +wire \inst|Add0~10_combout ; wire \inst|Add0~11 ; wire \inst|Add0~12_combout ; -wire \inst|Selector5~1_combout ; -wire \inst|PC_stack[9][6]~feeder_combout ; -wire \inst|PC_stack[9][6]~q ; -wire \inst|Selector123~0_combout ; -wire \inst|PC_stack[8][6]~q ; -wire \inst|Selector112~0_combout ; -wire \inst|PC_stack[7][6]~q ; -wire \inst|Selector101~0_combout ; -wire \inst|PC_stack[6][6]~q ; -wire \inst|Selector90~0_combout ; -wire \inst|PC_stack[5][6]~q ; -wire \inst|Selector79~0_combout ; -wire \inst|PC_stack[4][6]~q ; -wire \inst|Selector68~0_combout ; -wire \inst|PC_stack[3][6]~q ; -wire \inst|Selector57~0_combout ; -wire \inst|PC_stack[2][6]~q ; -wire \inst|Selector46~0_combout ; -wire \inst|PC_stack[1][6]~q ; -wire \inst|Selector35~0_combout ; -wire \inst|PC_stack[0][6]~q ; -wire \inst|Selector5~2_combout ; +wire \inst|PC_stack[9][8]~feeder_combout ; +wire \inst|PC_stack[9][8]~q ; +wire \inst|Selector121~0_combout ; +wire \inst|PC_stack[8][8]~q ; +wire \inst|Selector110~0_combout ; +wire \inst|PC_stack[7][8]~q ; +wire \inst|Selector99~0_combout ; +wire \inst|PC_stack[6][8]~q ; +wire \inst|Selector88~0_combout ; +wire \inst|PC_stack[5][8]~q ; +wire \inst|Selector77~0_combout ; +wire \inst|PC_stack[4][8]~q ; +wire \inst|Selector66~0_combout ; +wire \inst|PC_stack[3][8]~q ; +wire \inst|Selector55~0_combout ; +wire \inst|PC_stack[2][8]~q ; +wire \inst|Selector44~0_combout ; +wire \inst|PC_stack[1][8]~q ; +wire \inst|Selector33~0_combout ; +wire \inst|PC_stack[0][8]~q ; +wire \inst|PC_stack[9][10]~feeder_combout ; +wire \inst|PC_stack[9][10]~q ; +wire \inst|Selector119~0_combout ; +wire \inst|PC_stack[8][10]~q ; +wire \inst|Selector108~0_combout ; +wire \inst|PC_stack[7][10]~q ; +wire \inst|Selector97~0_combout ; +wire \inst|PC_stack[6][10]~q ; +wire \inst|Selector86~0_combout ; +wire \inst|PC_stack[5][10]~q ; +wire \inst|Selector75~0_combout ; +wire \inst|PC_stack[4][10]~q ; +wire \inst|Selector64~0_combout ; +wire \inst|PC_stack[3][10]~q ; +wire \inst|Selector53~0_combout ; +wire \inst|PC_stack[2][10]~q ; +wire \inst|Selector42~0_combout ; +wire \inst|PC_stack[1][10]~q ; +wire \inst|Selector31~0_combout ; +wire \inst|PC_stack[0][10]~q ; wire \inst|Add0~13 ; wire \inst|Add0~14_combout ; wire \inst|Selector4~1_combout ; @@ -309,177 +377,163 @@ wire \inst|PC_stack[1][7]~q ; wire \inst|Selector34~0_combout ; wire \inst|PC_stack[0][7]~q ; wire \inst|Selector4~2_combout ; -wire \inst|next_mem_addr[7]~7_combout ; -wire \inst|PC_stack[9][8]~q ; -wire \inst|Selector121~0_combout ; -wire \inst|PC_stack[8][8]~q ; -wire \inst|Selector110~0_combout ; -wire \inst|PC_stack[7][8]~q ; -wire \inst|Selector99~0_combout ; -wire \inst|PC_stack[6][8]~q ; -wire \inst|Selector88~0_combout ; -wire \inst|PC_stack[5][8]~q ; -wire \inst|Selector77~0_combout ; -wire \inst|PC_stack[4][8]~q ; -wire \inst|Selector66~0_combout ; -wire \inst|PC_stack[3][8]~q ; -wire \inst|Selector55~0_combout ; -wire \inst|PC_stack[2][8]~q ; -wire \inst|Selector44~0_combout ; -wire \inst|PC_stack[1][8]~q ; -wire \inst|Selector33~0_combout ; -wire \inst|PC_stack[0][8]~q ; wire \inst|Add0~15 ; -wire \inst|Add0~16_combout ; -wire \inst|Selector3~1_combout ; -wire \inst|Selector3~2_combout ; wire \inst|Add0~17 ; -wire \inst|Add0~18_combout ; -wire \inst|state~37_combout ; +wire \inst|Add0~19 ; +wire \inst|Add0~20_combout ; +wire \inst|state~35_combout ; +wire \inst|state~36_combout ; +wire \inst|state.ex_xor~q ; +wire \inst|Selector25~3_combout ; wire \inst|state~38_combout ; wire \inst|state.ex_or~q ; +wire \inst|Selector30~0_combout ; wire \inst|Selector30~1_combout ; wire \inst|state.ex_load~q ; wire \inst|Selector27~1_combout ; -wire \inst|state~36_combout ; -wire \inst|state.ex_xor~q ; -wire \inst|Selector20~1_combout ; -wire \inst|state~46_combout ; -wire \inst|state.ex_shift~q ; -wire \inst|Selector19~0_combout ; -wire \inst|state~42_combout ; -wire \inst|state.ex_add~q ; -wire \inst|state~44_combout ; -wire \inst|state.ex_sub~q ; -wire \inst|Add1~40_combout ; wire \inst|state~39_combout ; wire \inst|state~40_combout ; wire \inst|state.ex_loadi~q ; +wire \inst|IR[0]~0_combout ; +wire \inst|Selector25~4_combout ; +wire \inst|state~41_combout ; +wire \inst|state.ex_addi~q ; +wire \inst|state~42_combout ; +wire \inst|state.ex_add~q ; +wire \inst|AC[3]~0_combout ; +wire \inst|Add1~15_combout ; wire \inst|Add1~1_combout ; -wire \inst|Add1~38_combout ; +wire \inst|Add1~13_combout ; wire \inst|state~45_combout ; wire \inst|state.ex_and~q ; wire \inst|WideOr3~0_combout ; wire \inst|WideOr3~1_combout ; -wire \inst|Add1~39_combout ; -wire \inst|state.ex_out2~q ; -wire \inst|Selector29~0_combout ; -wire \inst|Selector29~1_combout ; -wire \inst|IO_CYCLE~q ; -wire \inst3|SWITCH_EN~0_combout ; -wire \inst11|tri_enable~0_combout ; -wire \inst13|inst12~0_combout ; -wire \inst11|tri_enable~1_combout ; -wire \inst10|count[0]~16_combout ; -wire \KEY1~input_o ; -wire \inst10|state.BTN_high~q ; -wire \inst10|count[15]~18_combout ; -wire \inst10|count[0]~17 ; -wire \inst10|count[1]~19_combout ; -wire \inst10|count[1]~20 ; -wire \inst10|count[2]~21_combout ; -wire \inst10|count[2]~22 ; -wire \inst10|count[3]~23_combout ; -wire \inst10|count[3]~24 ; -wire \inst10|count[4]~25_combout ; -wire \inst10|count[4]~26 ; -wire \inst10|count[5]~27_combout ; -wire \inst10|count[5]~28 ; -wire \inst10|count[6]~29_combout ; -wire \inst13|inst1[6]~94_combout ; -wire \inst3|SWITCH_EN~clkctrl_outclk ; -wire \SW[6]~input_o ; -wire \inst13|inst1[6]~46_combout ; -wire \inst3|I2C_DATA_EN~0_combout ; -wire \inst3|I2C_DATA_EN~combout ; -wire \inst13|inst|bit_cnt[0]~0_combout ; -wire \inst13|inst14|prev_busy~q ; +wire \inst|Add1~14_combout ; +wire \inst|Add1~10_combout ; +wire \inst|Add1~8_combout ; +wire \inst|Add1~9_combout ; +wire \inst|Add1~3_combout ; +wire \inst|Add1~5_cout ; +wire \inst|Add1~7 ; +wire \inst|Add1~12 ; +wire \inst|Add1~16_combout ; +wire \inst|Selector25~5_combout ; wire \inst|WideOr3~2_combout ; wire \inst|Selector27~6_combout ; -wire \inst|Selector18~0_combout ; -wire \inst|Selector19~4_combout ; -wire \inst|shifter|auto_generated|sbit_w[34]~54_combout ; -wire \inst13|inst1[0]~17_combout ; -wire \inst13|inst1[0]~18_combout ; -wire \inst13|inst1[3]~92_combout ; -wire \SW[3]~input_o ; -wire \inst13|inst1[3]~31_combout ; -wire \GSENSOR_SDI~input_o ; -wire \inst13|inst|Add1~0_combout ; -wire \inst13|inst|state~14_combout ; -wire \inst13|inst|state.mstr_ack~q ; -wire \inst13|inst|Equal1~0_combout ; -wire \inst13|inst|state~16_combout ; -wire \inst13|inst|state.slv_ack2~q ; -wire \inst13|inst|Selector29~0_combout ; -wire \inst13|inst|Selector29~1_combout ; -wire \inst13|inst|ack_error~q ; -wire \inst13|inst|Selector23~1_combout ; -wire \inst13|inst|Selector23~2_combout ; -wire \inst13|inst|Selector23~3_combout ; -wire \inst13|inst|state.rd~q ; -wire \inst13|inst|Decoder0~0_combout ; -wire \inst13|inst|Decoder0~4_combout ; -wire \inst13|inst|data_rx[3]~3_combout ; -wire \inst13|inst|data_rd[3]~feeder_combout ; -wire \inst13|inst14|data_out[3]~5_combout ; -wire \inst13|inst14|state_machine~0_combout ; -wire \inst13|inst6~combout ; -wire \inst13|inst14|go~feeder_combout ; -wire \inst13|inst14|running~0_combout ; -wire \inst13|inst14|running~q ; -wire \inst13|inst14|latch_rdy~0_combout ; -wire \inst13|inst14|go~q ; -wire \inst13|inst14|tx_addr[7]~0_combout ; -wire \inst13|inst14|data_out[7]~2_combout ; -wire \inst13|inst1[3]~30_combout ; -wire \inst11|tri_enable~combout ; -wire \ENCODER_H1~input_o ; -wire \inst11|AB1[1]~feeder_combout ; -wire \ENCODER_H2~input_o ; -wire \inst11|Selector3~2_combout ; -wire \inst11|Selector20~0_combout ; -wire \inst11|Selector2~2_combout ; -wire \inst11|Selector2~3_combout ; -wire \inst11|state.AB_10~q ; -wire \inst11|Selector3~0_combout ; -wire \inst11|Selector3~1_combout ; -wire \inst11|Selector3~3_combout ; -wire \inst11|Selector3~4_combout ; -wire \inst11|state.AB_11~q ; -wire \inst11|Selector2~0_combout ; -wire \inst11|Selector2~1_combout ; -wire \inst11|Selector4~0_combout ; -wire \inst11|Selector4~1_combout ; -wire \inst11|Selector4~2_combout ; -wire \inst11|state.AB_01~q ; -wire \inst11|Selector1~1_combout ; -wire \inst11|Selector1~0_combout ; -wire \inst11|Selector1~2_combout ; -wire \inst11|state.AB_00~q ; -wire \inst11|Add1~2_combout ; -wire \inst11|Add1~1_combout ; -wire \inst11|Add1~3_combout ; -wire \inst11|Add1~6_combout ; -wire \inst11|count[0]~16_combout ; -wire \inst11|count[9]~18_combout ; -wire \inst11|Add1~0_combout ; -wire \inst11|count[0]~17 ; -wire \inst11|count[1]~19_combout ; -wire \inst11|Add1~4_combout ; -wire \inst11|count[1]~20 ; -wire \inst11|count[2]~21_combout ; -wire \inst11|Add1~5_combout ; -wire \inst11|count[2]~22 ; -wire \inst11|count[3]~23_combout ; -wire \inst13|inst1[3]~32_combout ; +wire \inst|Selector25~2_combout ; +wire \inst|Selector20~0_combout ; +wire \inst|Selector22~3_combout ; +wire \inst|Selector22~4_combout ; +wire \inst|Selector17~3_combout ; +wire \inst|Selector17~4_combout ; +wire \inst|Selector12~4_combout ; +wire \inst|Add1~80_combout ; +wire \inst|Add1~78_combout ; +wire \inst|Add1~79_combout ; +wire \inst|Selector13~1_combout ; +wire \inst|shifter|auto_generated|sbit_w[28]~21_combout ; +wire \inst|Add1~65_combout ; +wire \inst|Add1~63_combout ; +wire \inst|Add1~64_combout ; +wire \inst|Add1~58_combout ; +wire \inst|Add1~59_combout ; +wire \inst|Add1~60_combout ; +wire \inst|Add1~55_combout ; +wire \inst|Add1~53_combout ; +wire \inst|Add1~54_combout ; +wire \inst3|TIMER_EN~3_combout ; +wire \inst|Selector21~3_combout ; +wire \inst|Selector21~4_combout ; +wire \inst|Add1~33_combout ; +wire \inst|Add1~34_combout ; +wire \inst|Add1~35_combout ; +wire \inst|Add1~30_combout ; +wire \inst|Add1~28_combout ; +wire \inst|Add1~29_combout ; +wire \inst|Add1~25_combout ; +wire \inst|Add1~23_combout ; +wire \inst|Add1~24_combout ; +wire \inst|Add1~20_combout ; +wire \inst|Add1~18_combout ; +wire \inst|Add1~19_combout ; +wire \inst|Add1~17 ; +wire \inst|Add1~22 ; +wire \inst|Add1~27 ; +wire \inst|Add1~32 ; +wire \inst|Add1~36_combout ; +wire \inst|Selector21~1_combout ; +wire \inst|shifter|auto_generated|sbit_w[26]~16_combout ; +wire \inst|shifter|auto_generated|sbit_w[26]~17_combout ; +wire \inst|Selector19~1_combout ; +wire \inst|Add1~43_combout ; +wire \inst|Add1~44_combout ; +wire \inst|Add1~45_combout ; +wire \inst|Add1~38_combout ; +wire \inst|Add1~39_combout ; +wire \inst|Selector20~1_combout ; +wire \inst|shifter|auto_generated|sbit_w[23]~34_combout ; +wire \inst|shifter|auto_generated|sbit_w[23]~35_combout ; +wire \inst|shifter|auto_generated|sbit_w[21]~37_combout ; +wire \inst|shifter|auto_generated|sbit_w[21]~38_combout ; +wire \inst3|I2C_RDY_EN~0_combout ; +wire \inst|shifter|auto_generated|sbit_w[39]~61_combout ; +wire \inst|shifter|auto_generated|sbit_w[39]~62_combout ; +wire \inst|shifter|auto_generated|sbit_w[17]~29_combout ; +wire \inst|shifter|auto_generated|sbit_w[35]~64_combout ; +wire \inst|shifter|auto_generated|sbit_w[35]~63_combout ; +wire \inst|shifter|auto_generated|sbit_w[35]~65_combout ; +wire \inst|shifter|auto_generated|sbit_w[27]~44_combout ; +wire \inst|shifter|auto_generated|sbit_w[27]~45_combout ; +wire \inst|shifter|auto_generated|sbit_w[29]~41_combout ; +wire \inst|shifter|auto_generated|sbit_w[29]~42_combout ; +wire \inst|shifter|auto_generated|sbit_w[43]~67_combout ; +wire \inst|shifter|auto_generated|sbit_w[43]~68_combout ; +wire \inst|shifter|auto_generated|sbit_w[55]~79_combout ; +wire \inst|Selector20~4_combout ; +wire \inst|Add1~37 ; +wire \inst|Add1~41_combout ; +wire \inst|Selector20~2_combout ; +wire \inst|Selector20~3_combout ; +wire \inst|Selector20~5_combout ; +wire \inst11|tri_enable~0_combout ; +wire \inst|state~34_combout ; +wire \inst|state.ex_out~q ; +wire \inst|state.ex_out2~q ; +wire \inst|Selector29~0_combout ; +wire \inst|Selector29~1_combout ; +wire \inst|IO_CYCLE~q ; +wire \inst3|SWITCH_EN~0_combout ; +wire \inst13|inst12~0_combout ; +wire \inst11|tri_enable~1_combout ; +wire \inst13|inst4~combout ; +wire \inst10|count[0]~16_combout ; +wire \KEY1~input_o ; +wire \inst10|state.BTN_high~q ; +wire \inst10|count[9]~18_combout ; +wire \inst10|count[0]~17 ; +wire \inst10|count[1]~19_combout ; +wire \inst10|count[1]~20 ; +wire \inst10|count[2]~21_combout ; +wire \inst10|count[2]~22 ; +wire \inst10|count[3]~23_combout ; +wire \inst10|count[3]~24 ; +wire \inst10|count[4]~25_combout ; +wire \inst10|count[4]~26 ; +wire \inst10|count[5]~27_combout ; +wire \inst10|count[5]~28 ; +wire \inst10|count[6]~29_combout ; +wire \inst10|count[6]~feeder_combout ; +wire \inst10|count[6]~30 ; +wire \inst10|count[7]~31_combout ; +wire \inst13|inst1[7]~102_combout ; +wire \inst3|TIMER_EN~2_combout ; wire \inst5|count_10Hz[0]~19_combout ; -wire \inst5|LessThan4~3_combout ; -wire \inst5|LessThan4~1_combout ; -wire \inst5|LessThan4~0_combout ; -wire \inst5|LessThan4~2_combout ; -wire \inst5|LessThan4~4_combout ; -wire \inst5|LessThan4~6_combout ; +wire \inst5|LessThan5~3_combout ; +wire \inst5|LessThan5~0_combout ; +wire \inst5|LessThan5~1_combout ; +wire \inst5|LessThan5~2_combout ; +wire \inst5|LessThan5~4_combout ; +wire \inst5|LessThan5~6_combout ; wire \inst5|count_10Hz[0]~20 ; wire \inst5|count_10Hz[1]~21_combout ; wire \inst5|count_10Hz[1]~22 ; @@ -516,10 +570,9 @@ wire \inst5|count_10Hz[16]~52 ; wire \inst5|count_10Hz[17]~53_combout ; wire \inst5|count_10Hz[17]~54 ; wire \inst5|count_10Hz[18]~55_combout ; -wire \inst5|LessThan4~5_combout ; +wire \inst5|LessThan5~5_combout ; wire \inst5|clock_10Hz_int~0_combout ; wire \inst5|clock_10Hz_int~q ; -wire \inst5|clock_10Hz~feeder_combout ; wire \inst5|clock_10Hz~q ; wire \inst5|clock_10Hz~clkctrl_outclk ; wire \inst4|COUNT[0]~45_combout ; @@ -529,7 +582,6 @@ wire \inst4|COUNT[1]~16 ; wire \inst4|COUNT[2]~17_combout ; wire \inst4|COUNT[2]~18 ; wire \inst4|COUNT[3]~19_combout ; -wire \inst13|inst1[3]~33_combout ; wire \inst4|COUNT[3]~20 ; wire \inst4|COUNT[4]~21_combout ; wire \inst4|COUNT[4]~22 ; @@ -538,53 +590,48 @@ wire \inst4|COUNT[5]~24 ; wire \inst4|COUNT[6]~25_combout ; wire \inst4|COUNT[6]~26 ; wire \inst4|COUNT[7]~27_combout ; -wire \inst4|COUNT[7]~28 ; -wire \inst4|COUNT[8]~29_combout ; -wire \inst4|COUNT[8]~30 ; -wire \inst4|COUNT[9]~31_combout ; -wire \inst4|COUNT[9]~32 ; -wire \inst4|COUNT[10]~33_combout ; -wire \inst4|COUNT[10]~34 ; -wire \inst4|COUNT[11]~35_combout ; -wire \inst4|COUNT[11]~36 ; -wire \inst4|COUNT[12]~37_combout ; -wire \inst4|COUNT[12]~38 ; -wire \inst4|COUNT[13]~39_combout ; -wire \inst13|inst1[13]~77_combout ; -wire \inst|Add1~70_combout ; -wire \inst|Add1~68_combout ; -wire \inst|Add1~69_combout ; -wire \inst|Add1~63_combout ; -wire \inst|Add1~64_combout ; -wire \inst|shifter|auto_generated|sbit_w[20]~12_combout ; -wire \inst|Selector27~4_combout ; -wire \inst3|TIMER_EN~3_combout ; -wire \inst|shifter|auto_generated|sbit_w[28]~21_combout ; -wire \inst|shifter|auto_generated|sbit_w[28]~22_combout ; -wire \inst|Selector19~2_combout ; -wire \inst|Add1~43_combout ; -wire \inst|Add1~44_combout ; -wire \inst|Add1~45_combout ; -wire \inst|Add1~42 ; -wire \inst|Add1~46_combout ; -wire \inst|Selector19~3_combout ; -wire \inst|shifter|auto_generated|sbit_w[56]~24_combout ; -wire \inst|shifter|auto_generated|sbit_w[26]~16_combout ; -wire \inst|shifter|auto_generated|sbit_w[26]~17_combout ; -wire \inst|shifter|auto_generated|sbit_w[22]~9_combout ; -wire \inst|shifter|auto_generated|sbit_w[22]~10_combout ; -wire \inst|shifter|auto_generated|sbit_w[40]~25_combout ; -wire \inst|shifter|auto_generated|sbit_w[40]~28_combout ; -wire \inst|Selector19~5_combout ; -wire \inst|Selector19~6_combout ; -wire \inst|shifter|auto_generated|sbit_w[32]~4_combout ; -wire \inst|shifter|auto_generated|sbit_w[32]~5_combout ; -wire \inst|shifter|auto_generated|sbit_w[48]~8_combout ; -wire \inst|shifter|auto_generated|sbit_w[48]~15_combout ; -wire \inst|Selector19~7_combout ; -wire \inst|Selector19~1_combout ; -wire \inst|Selector19~8_combout ; -wire \inst11|Add1~11_combout ; +wire \inst4|IO_BUS|dout[7]~2_combout ; +wire \inst11|tri_enable~combout ; +wire \inst11|Add1~10_combout ; +wire \ENCODER_H2~input_o ; +wire \inst11|AB1[0]~feeder_combout ; +wire \ENCODER_H1~input_o ; +wire \inst11|AB1[1]~feeder_combout ; +wire \inst11|Selector2~0_combout ; +wire \inst11|Selector2~1_combout ; +wire \inst11|state.AB_10~q ; +wire \inst11|Selector1~1_combout ; +wire \inst11|Selector1~0_combout ; +wire \inst11|Selector1~2_combout ; +wire \inst11|state.AB_00~q ; +wire \inst11|Selector4~0_combout ; +wire \inst11|Selector4~1_combout ; +wire \inst11|Selector4~2_combout ; +wire \inst11|Selector4~3_combout ; +wire \inst11|Selector4~4_combout ; +wire \inst11|state.AB_01~q ; +wire \inst11|Selector3~0_combout ; +wire \inst11|Selector3~1_combout ; +wire \inst11|Selector3~3_combout ; +wire \inst11|Selector3~2_combout ; +wire \inst11|Selector20~0_combout ; +wire \inst11|Selector3~4_combout ; +wire \inst11|state.AB_11~q ; +wire \inst11|Add1~1_combout ; +wire \inst11|Add1~2_combout ; +wire \inst11|Add1~3_combout ; +wire \inst11|count[0]~16_combout ; +wire \inst11|count[7]~18_combout ; +wire \inst11|Add1~0_combout ; +wire \inst11|count[0]~17 ; +wire \inst11|count[1]~19_combout ; +wire \inst11|Add1~4_combout ; +wire \inst11|count[1]~20 ; +wire \inst11|count[2]~21_combout ; +wire \inst11|Add1~5_combout ; +wire \inst11|count[2]~22 ; +wire \inst11|count[3]~23_combout ; +wire \inst11|Add1~6_combout ; wire \inst11|count[3]~24 ; wire \inst11|count[4]~25_combout ; wire \inst11|Add1~7_combout ; @@ -596,39 +643,32 @@ wire \inst11|count[6]~29_combout ; wire \inst11|Add1~9_combout ; wire \inst11|count[6]~30 ; wire \inst11|count[7]~31_combout ; -wire \inst11|Add1~10_combout ; +wire \inst3|PWM_EN~0_combout ; +wire \inst3|SWITCH_EN~1_combout ; +wire \inst3|SWITCH_EN~combout ; +wire \inst3|SWITCH_EN~clkctrl_outclk ; +wire \SW[7]~input_o ; +wire \inst13|inst1[7]~55_combout ; +wire \inst3|I2C_DATA_EN~combout ; +wire \inst11|Add1~12_combout ; wire \inst11|count[7]~32 ; wire \inst11|count[8]~33_combout ; -wire \SW[8]~input_o ; -wire \inst13|inst1[8]~56_combout ; -wire \inst10|tri_enable~combout ; -wire \inst10|count[6]~30 ; -wire \inst10|count[7]~31_combout ; -wire \inst10|count[7]~32 ; -wire \inst10|count[8]~33_combout ; -wire \inst13|inst1[8]~57_combout ; -wire \inst13|inst|Decoder0~1_combout ; -wire \inst13|inst|data_rx[0]~0_combout ; -wire \inst13|inst|data_rd[0]~feeder_combout ; -wire \inst13|inst|Decoder0~5_combout ; -wire \inst13|inst|data_rx[4]~4_combout ; -wire \inst13|inst|data_rd[4]~feeder_combout ; -wire \inst13|inst14|data_out[12]~15_combout ; -wire \inst13|inst14|data_out[15]~11_combout ; -wire \inst13|inst1[12]~76_combout ; -wire \inst13|inst1[12]~74_combout ; -wire \inst11|Add1~15_combout ; +wire \inst11|Add1~11_combout ; wire \inst11|count[8]~34 ; wire \inst11|count[9]~35_combout ; -wire \inst11|Add1~12_combout ; -wire \inst11|count[9]~36 ; -wire \inst11|count[10]~37_combout ; -wire \inst11|Add1~13_combout ; -wire \inst11|count[10]~38 ; -wire \inst11|count[11]~39_combout ; -wire \inst11|Add1~14_combout ; -wire \inst11|count[11]~40 ; -wire \inst11|count[12]~41_combout ; +wire \inst13|inst1[9]~104_combout ; +wire \SW[9]~input_o ; +wire \inst13|inst1[9]~64_combout ; +wire \inst13|inst14|state_machine~1_combout ; +wire \inst13|inst6~combout ; +wire \inst13|inst14|go~feeder_combout ; +wire \inst13|inst14|data_out[0]~19_combout ; +wire \inst13|inst14|Selector22~0_combout ; +wire \inst10|count[7]~32 ; +wire \inst10|count[8]~33_combout ; +wire \inst13|inst1[8]~103_combout ; +wire \SW[8]~input_o ; +wire \inst13|inst1[8]~59_combout ; wire \inst10|count[8]~34 ; wire \inst10|count[9]~35_combout ; wire \inst10|count[9]~36 ; @@ -637,21 +677,79 @@ wire \inst10|count[10]~38 ; wire \inst10|count[11]~39_combout ; wire \inst10|count[11]~40 ; wire \inst10|count[12]~41_combout ; -wire \inst13|inst1[12]~75_combout ; -wire \inst13|inst1[12]~95_combout ; wire \inst10|count[12]~42 ; wire \inst10|count[13]~43_combout ; wire \inst11|Add1~16_combout ; +wire \inst11|count[9]~36 ; +wire \inst11|count[10]~37_combout ; +wire \inst11|Add1~13_combout ; +wire \inst11|count[10]~38 ; +wire \inst11|count[11]~39_combout ; +wire \inst11|Add1~14_combout ; +wire \inst11|count[11]~40 ; +wire \inst11|count[12]~41_combout ; +wire \inst11|Add1~15_combout ; wire \inst11|count[12]~42 ; wire \inst11|count[13]~43_combout ; -wire \inst13|inst1[13]~78_combout ; +wire \inst13|inst1[13]~82_combout ; +wire \inst13|inst1[13]~83_combout ; +wire \GSENSOR_SDI~input_o ; +wire \inst13|inst|Decoder0~0_combout ; wire \inst13|inst|Decoder0~6_combout ; wire \inst13|inst|data_rx[5]~5_combout ; wire \inst13|inst|data_rd[5]~feeder_combout ; wire \inst13|inst14|data_out[13]~16_combout ; -wire \inst13|inst1[13]~79_combout ; -wire \inst13|inst1[13]~96_combout ; +wire \inst13|inst14|state_machine~0_combout ; +wire \inst13|inst14|data_out[15]~11_combout ; +wire \inst13|inst1[13]~84_combout ; +wire \inst4|IO_OUT~combout ; +wire \inst4|COUNT[7]~28 ; +wire \inst4|COUNT[8]~29_combout ; +wire \inst4|COUNT[8]~30 ; +wire \inst4|COUNT[9]~31_combout ; +wire \inst4|COUNT[9]~32 ; +wire \inst4|COUNT[10]~33_combout ; +wire \inst4|COUNT[10]~34 ; +wire \inst4|COUNT[11]~35_combout ; +wire \inst4|COUNT[11]~36 ; +wire \inst4|COUNT[12]~37_combout ; +wire \inst4|COUNT[12]~38 ; +wire \inst4|COUNT[13]~39_combout ; +wire \inst13|inst1[13]~81_combout ; +wire \inst13|inst1[13]~85_combout ; wire \inst13|inst14|cmd_in[5]~feeder_combout ; +wire \inst13|inst1[12]~76_combout ; +wire \inst13|inst1[12]~77_combout ; +wire \inst13|inst1[12]~78_combout ; +wire \inst13|inst|Decoder0~5_combout ; +wire \inst13|inst|data_rx[4]~4_combout ; +wire \inst13|inst|data_rd[4]~feeder_combout ; +wire \inst13|inst14|data_out[12]~15_combout ; +wire \inst13|inst1[12]~79_combout ; +wire \inst13|inst1[12]~80_combout ; +wire \inst13|inst14|cmd_in[4]~feeder_combout ; +wire \inst13|inst14|Selector21~1_combout ; +wire \inst13|inst14|Selector20~2_combout ; +wire \inst13|inst14|Selector20~3_combout ; +wire \inst13|inst14|state.Rx2~q ; +wire \inst13|inst|Decoder0~1_combout ; +wire \inst13|inst|data_rx[0]~0_combout ; +wire \inst13|inst|data_rd[0]~feeder_combout ; +wire \inst13|inst14|data_out[8]~10_combout ; +wire \inst13|inst1[8]~58_combout ; +wire \inst13|inst1[8]~60_combout ; +wire \inst13|inst1[8]~61_combout ; +wire \inst13|inst1[8]~62_combout ; +wire \inst13|inst14|state~18_combout ; +wire \inst13|inst14|Selector21~0_combout ; +wire \inst13|inst14|Selector16~0_combout ; +wire \inst13|inst14|Selector16~1_combout ; +wire \inst13|inst14|state.idle~q ; +wire \inst13|inst14|running~0_combout ; +wire \inst13|inst14|running~q ; +wire \inst13|inst14|latch_rdy~0_combout ; +wire \inst13|inst14|go~q ; +wire \inst13|inst14|tx_addr[7]~0_combout ; wire \inst13|inst14|Equal0~0_combout ; wire \inst13|inst14|Selector17~0_combout ; wire \inst13|inst14|state.Tx2~q ; @@ -659,346 +757,291 @@ wire \inst13|inst14|Selector18~0_combout ; wire \inst13|inst14|state.Tx1p~q ; wire \inst13|inst14|Selector19~0_combout ; wire \inst13|inst14|state.Tx1~q ; -wire \inst13|inst14|Selector22~0_combout ; -wire \inst13|inst1[8]~59_combout ; -wire \inst13|inst14|Selector21~1_combout ; -wire \inst13|inst14|Selector20~2_combout ; -wire \inst13|inst14|Selector20~3_combout ; -wire \inst13|inst14|state.Rx2~q ; -wire \inst13|inst14|data_out[8]~10_combout ; -wire \inst13|inst1[8]~55_combout ; -wire \inst13|inst1[8]~58_combout ; +wire \inst13|inst14|Selector32~0_combout ; +wire \inst13|inst14|Selector32~1_combout ; +wire \inst13|inst14|Selector32~2_combout ; +wire \inst13|inst14|comm_en~q ; +wire \inst13|inst14|rnw~1_combout ; +wire \inst13|inst14|rnw~0_combout ; +wire \inst13|inst14|rnw~2_combout ; +wire \inst13|inst14|rnw~3_combout ; +wire \inst13|inst14|rnw~q ; +wire \inst13|inst|Selector19~0_combout ; +wire \inst13|inst|state.start~q ; +wire \inst13|inst|Equal1~0_combout ; +wire \inst13|inst|Selector21~0_combout ; +wire \inst13|inst|state.command~q ; +wire \inst13|inst|state~15_combout ; +wire \inst13|inst|state.slv_ack1~q ; +wire \inst13|inst|Selector29~0_combout ; +wire \inst13|inst|Selector29~1_combout ; +wire \inst13|inst|ack_error~q ; +wire \inst13|inst|Selector24~0_combout ; +wire \inst13|inst|Selector24~1_combout ; +wire \inst13|inst|state.stop~q ; +wire \inst13|inst|Selector18~0_combout ; +wire \inst13|inst|state.ready~q ; +wire \inst13|inst|addr_rw[7]~2_combout ; +wire \inst13|inst|Selector25~6_combout ; +wire \inst13|inst|addr_rw[7]~3_combout ; +wire \inst13|inst|Selector22~0_combout ; +wire \inst13|inst|Selector22~1_combout ; +wire \inst13|inst|Selector22~2_combout ; +wire \inst13|inst|state.wr~q ; +wire \inst13|inst|WideOr3~0_combout ; +wire \inst13|inst|Selector0~0_combout ; +wire \inst13|inst|Selector0~1_combout ; +wire \inst13|inst|Selector0~2_combout ; +wire \inst13|inst|Selector0~3_combout ; +wire \inst13|inst|busy~q ; +wire \inst13|inst14|prev_busy~feeder_combout ; +wire \inst13|inst14|prev_busy~q ; +wire \inst13|inst|Decoder0~2_combout ; +wire \inst13|inst|data_rx[1]~1_combout ; +wire \inst13|inst|data_rd[1]~feeder_combout ; +wire \inst13|inst14|data_out[9]~12_combout ; +wire \inst13|inst1[9]~65_combout ; +wire \inst4|IO_BUS|dout[9]~3_combout ; +wire \inst10|tri_enable~combout ; +wire \inst13|inst1[9]~63_combout ; +wire \inst13|inst1[9]~66_combout ; +wire \inst13|inst14|Selector21~2_combout ; +wire \inst13|inst14|state.Rx1p~q ; +wire \inst13|inst14|Selector22~1_combout ; +wire \inst13|inst14|Selector22~2_combout ; +wire \inst13|inst14|state.Rx1~q ; +wire \inst13|inst|Decoder0~8_combout ; +wire \inst13|inst|data_rx[7]~7_combout ; +wire \inst13|inst|data_rd[7]~feeder_combout ; +wire \inst13|inst14|data_out[7]~9_combout ; +wire \inst13|inst14|data_out[7]~2_combout ; +wire \inst13|inst1[7]~54_combout ; +wire \inst13|inst1[7]~56_combout ; +wire \inst|Selector20~6_combout ; +wire \inst|Selector20~7_combout ; +wire \inst|Add1~40_combout ; +wire \inst|Add1~42 ; +wire \inst|Add1~46_combout ; +wire \inst|Selector19~2_combout ; +wire \inst|Selector19~3_combout ; +wire \inst|shifter|auto_generated|sbit_w[32]~4_combout ; +wire \inst|shifter|auto_generated|sbit_w[32]~5_combout ; +wire \inst|shifter|auto_generated|sbit_w[18]~6_combout ; +wire \inst|shifter|auto_generated|sbit_w[18]~7_combout ; +wire \inst|shifter|auto_generated|sbit_w[48]~8_combout ; +wire \inst|shifter|auto_generated|sbit_w[48]~15_combout ; +wire \inst|shifter|auto_generated|sbit_w[30]~18_combout ; +wire \inst|shifter|auto_generated|sbit_w[30]~19_combout ; +wire \inst|shifter|auto_generated|sbit_w[44]~20_combout ; +wire \inst|shifter|auto_generated|sbit_w[44]~23_combout ; +wire \inst|shifter|auto_generated|sbit_w[56]~24_combout ; +wire \inst|shifter|auto_generated|sbit_w[40]~25_combout ; +wire \inst|shifter|auto_generated|sbit_w[40]~28_combout ; +wire \inst|Selector19~5_combout ; +wire \inst|Selector19~6_combout ; +wire \inst|Selector19~7_combout ; +wire \inst|Selector19~8_combout ; wire \inst|Selector19~9_combout ; wire \inst|shifter|auto_generated|sbit_w[24]~26_combout ; wire \inst|shifter|auto_generated|sbit_w[24]~27_combout ; wire \inst|shifter|auto_generated|sbit_w[42]~58_combout ; wire \inst|shifter|auto_generated|sbit_w[42]~59_combout ; -wire \inst|shifter|auto_generated|sbit_w[46]~56_combout ; -wire \inst|shifter|auto_generated|sbit_w[46]~79_combout ; -wire \inst|shifter|auto_generated|sbit_w[62]~74_combout ; -wire \inst|shifter|auto_generated|sbit_w[62]~75_combout ; -wire \inst|shifter|auto_generated|sbit_w[54]~76_combout ; +wire \inst|shifter|auto_generated|sbit_w[54]~78_combout ; +wire \inst|shifter|auto_generated|sbit_w[20]~13_combout ; wire \inst|shifter|auto_generated|sbit_w[38]~51_combout ; wire \inst|shifter|auto_generated|sbit_w[38]~52_combout ; -wire \inst|Selector13~2_combout ; -wire \inst|Selector13~1_combout ; -wire \inst|Selector13~3_combout ; -wire \inst|Selector13~4_combout ; -wire \inst|Add1~73_combout ; -wire \inst|Add1~74_combout ; -wire \inst|Add1~75_combout ; -wire \inst|Add1~72 ; -wire \inst|Add1~76_combout ; -wire \inst|Selector13~0_combout ; -wire \inst|Selector13~5_combout ; -wire \inst|Selector16~0_combout ; -wire \inst|Selector13~6_combout ; -wire \inst10|count[13]~44 ; -wire \inst10|count[14]~45_combout ; -wire \inst11|Add1~17_combout ; -wire \inst11|count[13]~44 ; -wire \inst11|count[14]~45_combout ; -wire \inst13|inst1[14]~82_combout ; -wire \inst13|inst1[14]~83_combout ; +wire \inst|Selector21~0_combout ; +wire \inst|Selector21~2_combout ; +wire \inst|Selector21~5_combout ; wire \inst13|inst|Decoder0~7_combout ; wire \inst13|inst|data_rx[6]~6_combout ; wire \inst13|inst|data_rd[6]~feeder_combout ; -wire \inst13|inst14|data_out[14]~17_combout ; -wire \inst13|inst1[14]~84_combout ; -wire \inst4|COUNT[13]~40 ; -wire \inst4|COUNT[14]~41_combout ; -wire \inst13|inst1[14]~81_combout ; -wire \inst|Selector13~7_combout ; -wire \inst|shifter|auto_generated|sbit_w[30]~18_combout ; -wire \inst|shifter|auto_generated|sbit_w[30]~19_combout ; -wire \inst|shifter|auto_generated|sbit_w[44]~20_combout ; -wire \inst|shifter|auto_generated|sbit_w[44]~23_combout ; -wire \inst|shifter|auto_generated|sbit_w[60]~70_combout ; +wire \inst13|inst14|data_out[6]~8_combout ; +wire \inst13|inst1[6]~49_combout ; +wire \SW[6]~input_o ; +wire \inst13|inst1[6]~50_combout ; +wire \inst13|inst1[6]~51_combout ; +wire \inst13|inst1[6]~101_combout ; +wire \inst13|inst1[6]~52_combout ; +wire \inst|Selector21~6_combout ; +wire \inst|shifter|auto_generated|sbit_w[22]~9_combout ; +wire \inst|shifter|auto_generated|sbit_w[22]~10_combout ; +wire \inst|shifter|auto_generated|sbit_w[36]~11_combout ; +wire \inst|shifter|auto_generated|sbit_w[36]~14_combout ; +wire \inst|shifter|auto_generated|sbit_w[52]~70_combout ; +wire \inst|shifter|auto_generated|sbit_w[52]~71_combout ; +wire \inst|shifter|auto_generated|sbit_w[60]~72_combout ; wire \inst|Selector23~0_combout ; wire \inst|Selector23~2_combout ; wire \inst|Selector23~3_combout ; -wire \inst|Add1~25_combout ; -wire \inst|Add1~23_combout ; -wire \inst|Add1~24_combout ; -wire \inst|Add1~20_combout ; -wire \inst|Add1~18_combout ; -wire \inst|Add1~19_combout ; -wire \inst|Add1~15_combout ; -wire \inst|Add1~13_combout ; -wire \inst|Add1~14_combout ; -wire \inst|Add1~10_combout ; -wire \inst|Add1~8_combout ; -wire \inst|Add1~9_combout ; -wire \inst|Add1~3_combout ; -wire \inst|Add1~0_combout ; -wire \inst|Add1~2_combout ; -wire \inst|Add1~5_cout ; -wire \inst|Add1~7 ; -wire \inst|Add1~12 ; -wire \inst|Add1~17 ; -wire \inst|Add1~22 ; wire \inst|Add1~26_combout ; wire \inst|Selector23~1_combout ; wire \inst|Selector23~4_combout ; -wire \inst|shifter|auto_generated|sbit_w[52]~68_combout ; -wire \inst|shifter|auto_generated|sbit_w[52]~69_combout ; wire \inst|Selector23~5_combout ; +wire \inst13|inst1[4]~99_combout ; wire \SW[4]~input_o ; -wire \inst13|inst1[4]~36_combout ; +wire \inst13|inst1[4]~40_combout ; wire \inst13|inst14|data_out[4]~6_combout ; -wire \inst13|inst1[4]~35_combout ; -wire \inst13|inst1[4]~37_combout ; -wire \inst13|inst1[4]~93_combout ; -wire \inst13|inst1[4]~38_combout ; +wire \inst13|inst1[4]~39_combout ; +wire \inst13|inst1[4]~41_combout ; +wire \inst13|inst1[4]~42_combout ; wire \inst|Selector23~6_combout ; -wire \inst|shifter|auto_generated|sbit_w[20]~13_combout ; -wire \inst|shifter|auto_generated|sbit_w[36]~11_combout ; -wire \inst|shifter|auto_generated|sbit_w[36]~14_combout ; -wire \inst|Selector15~0_combout ; -wire \inst|Selector15~2_combout ; -wire \inst|Add1~60_combout ; -wire \inst|Add1~58_combout ; -wire \inst|Add1~59_combout ; -wire \inst|Add1~53_combout ; -wire \inst|Add1~54_combout ; -wire \inst|Add1~55_combout ; +wire \inst|shifter|auto_generated|sbit_w[19]~31_combout ; +wire \inst|shifter|auto_generated|sbit_w[19]~32_combout ; +wire \inst|shifter|auto_generated|sbit_w[37]~36_combout ; +wire \inst|shifter|auto_generated|sbit_w[37]~39_combout ; +wire \inst|shifter|auto_generated|sbit_w[53]~30_combout ; +wire \inst|shifter|auto_generated|sbit_w[49]~33_combout ; +wire \inst|shifter|auto_generated|sbit_w[49]~40_combout ; +wire \inst|Selector18~4_combout ; +wire \inst|Selector18~5_combout ; wire \inst|Add1~48_combout ; wire \inst|Add1~49_combout ; -wire \inst|Add1~50_combout ; wire \inst|Add1~47 ; -wire \inst|Add1~52 ; -wire \inst|Add1~57 ; -wire \inst|Add1~62 ; -wire \inst|Add1~66_combout ; -wire \inst|Selector15~3_combout ; -wire \inst|Selector15~4_combout ; -wire \inst|Selector15~1_combout ; -wire \inst|Selector15~5_combout ; -wire \inst|Selector15~6_combout ; +wire \inst|Add1~51_combout ; +wire \inst|Selector18~6_combout ; +wire \inst|Selector18~7_combout ; +wire \inst|shifter|auto_generated|sbit_w[45]~43_combout ; +wire \inst|shifter|auto_generated|sbit_w[45]~80_combout ; +wire \inst|shifter|auto_generated|sbit_w[57]~46_combout ; +wire \inst|Selector18~2_combout ; +wire \inst|Selector18~3_combout ; +wire \inst|Selector18~0_combout ; +wire \inst|Selector18~1_combout ; +wire \inst|Selector18~8_combout ; +wire \inst|Add1~50_combout ; +wire \inst|Add1~52 ; +wire \inst|Add1~57 ; +wire \inst|Add1~62 ; +wire \inst|Add1~66_combout ; +wire \inst|Selector15~3_combout ; +wire \inst|Selector15~2_combout ; +wire \inst|Selector15~4_combout ; +wire \inst|Selector15~0_combout ; +wire \inst|Selector15~1_combout ; +wire \inst|Selector15~5_combout ; +wire \inst|Selector15~6_combout ; wire \inst|Selector15~7_combout ; -wire \inst|Add1~65_combout ; +wire \inst|shifter|auto_generated|sbit_w[28]~22_combout ; +wire \inst|shifter|auto_generated|sbit_w[46]~56_combout ; +wire \inst|shifter|auto_generated|sbit_w[46]~81_combout ; +wire \inst|shifter|auto_generated|sbit_w[62]~76_combout ; +wire \inst|shifter|auto_generated|sbit_w[62]~77_combout ; +wire \inst|Selector13~2_combout ; +wire \inst|Selector13~3_combout ; +wire \inst|Selector13~4_combout ; +wire \inst|Add1~73_combout ; +wire \inst|Add1~74_combout ; +wire \inst|Add1~68_combout ; +wire \inst|Add1~69_combout ; +wire \inst|Add1~70_combout ; wire \inst|Add1~67 ; -wire \inst|Add1~71_combout ; -wire \inst|Selector14~0_combout ; -wire \inst|Selector14~1_combout ; -wire \inst|shifter|auto_generated|sbit_w[17]~29_combout ; -wire \inst|shifter|auto_generated|sbit_w[53]~30_combout ; -wire \inst|shifter|auto_generated|sbit_w[53]~73_combout ; -wire \inst|shifter|auto_generated|sbit_w[23]~34_combout ; -wire \inst|shifter|auto_generated|sbit_w[23]~35_combout ; -wire \inst|shifter|auto_generated|sbit_w[19]~31_combout ; -wire \inst|shifter|auto_generated|sbit_w[19]~32_combout ; -wire \inst|shifter|auto_generated|sbit_w[37]~36_combout ; -wire \inst|shifter|auto_generated|sbit_w[37]~39_combout ; -wire \inst|Selector14~2_combout ; -wire \inst|Selector14~3_combout ; -wire \inst|Selector14~4_combout ; -wire \inst|Selector14~5_combout ; -wire \inst|Selector14~6_combout ; -wire \inst13|inst1[13]~80_combout ; -wire \inst|Selector14~7_combout ; -wire \inst|shifter|auto_generated|sbit_w[29]~41_combout ; -wire \inst|shifter|auto_generated|sbit_w[29]~42_combout ; -wire \inst|shifter|auto_generated|sbit_w[45]~43_combout ; -wire \inst|shifter|auto_generated|sbit_w[27]~44_combout ; -wire \inst|shifter|auto_generated|sbit_w[27]~45_combout ; -wire \inst|shifter|auto_generated|sbit_w[45]~78_combout ; -wire \inst|shifter|auto_generated|sbit_w[61]~71_combout ; -wire \inst|shifter|auto_generated|sbit_w[61]~72_combout ; -wire \inst|Selector22~0_combout ; -wire \inst|Selector22~1_combout ; -wire \inst|Selector22~2_combout ; -wire \inst|Selector22~3_combout ; -wire \inst|Selector22~4_combout ; -wire \inst|Add1~30_combout ; -wire \inst|Add1~28_combout ; -wire \inst|Add1~29_combout ; -wire \inst|Add1~27 ; -wire \inst|Add1~31_combout ; -wire \inst|Selector22~5_combout ; -wire \inst13|inst14|data_out[5]~7_combout ; -wire \inst13|inst1[5]~41_combout ; -wire \inst13|inst1[5]~42_combout ; -wire \SW[5]~input_o ; -wire \inst13|inst1[5]~40_combout ; -wire \inst13|inst1[5]~43_combout ; -wire \inst|Selector22~6_combout ; -wire \inst|shifter|auto_generated|sbit_w[21]~37_combout ; -wire \inst|shifter|auto_generated|sbit_w[21]~38_combout ; -wire \inst|shifter|auto_generated|sbit_w[35]~63_combout ; -wire \inst|shifter|auto_generated|sbit_w[35]~62_combout ; -wire \inst|shifter|auto_generated|sbit_w[35]~64_combout ; -wire \inst|shifter|auto_generated|sbit_w[39]~60_combout ; -wire \inst|shifter|auto_generated|sbit_w[39]~61_combout ; -wire \inst|Selector24~0_combout ; -wire \inst|shifter|auto_generated|sbit_w[59]~65_combout ; -wire \inst|shifter|auto_generated|sbit_w[43]~66_combout ; -wire \inst|shifter|auto_generated|sbit_w[43]~67_combout ; -wire \inst|Selector24~1_combout ; -wire \inst|Add1~21_combout ; -wire \inst|Selector24~3_combout ; -wire \inst|Selector24~4_combout ; -wire \inst|Selector24~2_combout ; -wire \inst|Selector24~5_combout ; -wire \inst|Selector24~6_combout ; -wire \inst|Selector24~7_combout ; -wire \inst|shifter|auto_generated|sbit_w[18]~6_combout ; -wire \inst|shifter|auto_generated|sbit_w[18]~7_combout ; -wire \inst|shifter|auto_generated|sbit_w[34]~53_combout ; -wire \inst|shifter|auto_generated|sbit_w[34]~55_combout ; -wire \inst|Selector17~3_combout ; -wire \inst|shifter|auto_generated|sbit_w[58]~57_combout ; -wire \inst|Selector17~2_combout ; -wire \inst|Selector17~4_combout ; +wire \inst|Add1~72 ; +wire \inst|Add1~76_combout ; +wire \inst|Selector13~0_combout ; +wire \inst|Selector13~5_combout ; +wire \inst|Selector13~6_combout ; +wire \inst4|COUNT[13]~40 ; +wire \inst4|COUNT[14]~41_combout ; +wire \inst13|inst1[14]~86_combout ; +wire \inst11|Add1~17_combout ; +wire \inst11|count[13]~44 ; +wire \inst11|count[14]~45_combout ; +wire \inst10|count[13]~44 ; +wire \inst10|count[14]~45_combout ; +wire \inst13|inst1[14]~87_combout ; +wire \inst13|inst1[14]~88_combout ; +wire \inst13|inst14|data_out[14]~17_combout ; +wire \inst13|inst1[14]~89_combout ; +wire \inst|Selector13~7_combout ; +wire \inst|Add1~75_combout ; +wire \inst|Add1~77 ; +wire \inst|Add1~81_combout ; +wire \inst|Selector12~5_combout ; +wire \inst|Selector12~6_combout ; +wire \inst|Selector12~7_combout ; +wire \inst|Selector12~8_combout ; +wire \inst|Selector12~1_combout ; +wire \inst|Selector12~2_combout ; +wire \inst|Selector12~3_combout ; +wire \inst|Selector12~9_combout ; +wire \inst|Selector12~0_combout ; +wire \inst|Selector12~10_combout ; +wire \inst4|COUNT[14]~42 ; +wire \inst4|COUNT[15]~43_combout ; +wire \inst13|inst1[15]~91_combout ; +wire \inst10|count[14]~46 ; +wire \inst10|count[15]~47_combout ; +wire \inst11|Add1~18_combout ; +wire \inst11|count[14]~46 ; +wire \inst11|count[15]~47_combout ; +wire \inst13|inst1[15]~92_combout ; +wire \inst13|inst1[15]~93_combout ; +wire \inst13|inst14|data_out[15]~18_combout ; +wire \inst13|inst1[15]~94_combout ; +wire \inst|Selector12~11_combout ; +wire \inst|Selector19~0_combout ; +wire \inst|Selector16~0_combout ; wire \inst|Add1~56_combout ; wire \inst|Selector17~5_combout ; wire \inst|Selector17~6_combout ; wire \inst|Selector17~7_combout ; +wire \inst|shifter|auto_generated|sbit_w[58]~57_combout ; +wire \inst|Selector17~2_combout ; +wire \inst13|inst1[10]~68_combout ; +wire \inst|Selector17~0_combout ; wire \inst13|inst|Decoder0~3_combout ; wire \inst13|inst|data_rx[2]~2_combout ; wire \inst13|inst|data_rd[2]~feeder_combout ; wire \inst13|inst14|data_out[10]~13_combout ; +wire \inst13|inst1[10]~69_combout ; wire \inst13|inst1[10]~67_combout ; -wire \inst13|inst1[10]~66_combout ; -wire \inst|Selector17~0_combout ; -wire \inst13|inst1[10]~65_combout ; wire \inst|Selector17~1_combout ; wire \inst|Selector17~8_combout ; wire \inst|shifter|auto_generated|sbit_w[25]~48_combout ; wire \inst|shifter|auto_generated|sbit_w[25]~49_combout ; wire \inst|shifter|auto_generated|sbit_w[41]~47_combout ; wire \inst|shifter|auto_generated|sbit_w[41]~50_combout ; -wire \inst|shifter|auto_generated|sbit_w[57]~46_combout ; -wire \inst|Selector18~3_combout ; -wire \inst|Selector18~4_combout ; -wire \inst|Selector18~1_combout ; -wire \inst|Add1~51_combout ; -wire \inst|Selector18~2_combout ; -wire \inst|shifter|auto_generated|sbit_w[49]~33_combout ; -wire \inst|shifter|auto_generated|sbit_w[49]~40_combout ; -wire \inst|Selector18~5_combout ; -wire \inst|Selector18~6_combout ; -wire \inst|Selector18~7_combout ; -wire \inst13|inst|Decoder0~2_combout ; -wire \inst13|inst|data_rx[1]~1_combout ; -wire \inst13|inst|data_rd[1]~feeder_combout ; -wire \inst13|inst14|data_out[9]~12_combout ; -wire \inst13|inst1[9]~61_combout ; -wire \inst13|inst1[9]~62_combout ; -wire \SW[9]~input_o ; -wire \inst13|inst1[9]~60_combout ; -wire \inst13|inst1[9]~63_combout ; -wire \inst13|inst1[9]~64_combout ; -wire \inst13|inst14|Selector21~2_combout ; -wire \inst13|inst14|state.Rx1p~q ; -wire \inst13|inst14|Selector22~1_combout ; -wire \inst13|inst14|Selector22~2_combout ; -wire \inst13|inst14|state.Rx1~q ; -wire \inst13|inst14|data_out[5]~19_combout ; -wire \inst13|inst14|state~18_combout ; -wire \inst13|inst14|Selector21~0_combout ; -wire \inst13|inst14|Selector16~0_combout ; -wire \inst13|inst14|Selector16~1_combout ; -wire \inst13|inst14|state.idle~q ; -wire \inst13|inst14|rnw~0_combout ; -wire \inst13|inst14|rnw~1_combout ; -wire \inst13|inst14|rnw~2_combout ; -wire \inst13|inst14|rnw~3_combout ; -wire \inst13|inst14|rnw~q ; -wire \inst13|inst|addr_rw[0]~feeder_combout ; -wire \inst13|inst14|state_machine~1_combout ; -wire \inst13|inst14|Selector32~1_combout ; -wire \inst13|inst14|Selector32~0_combout ; -wire \inst13|inst14|Selector32~2_combout ; -wire \inst13|inst14|comm_en~q ; -wire \inst13|inst|addr_rw[7]~2_combout ; -wire \inst13|inst|Selector25~6_combout ; -wire \inst13|inst|addr_rw[7]~3_combout ; -wire \inst13|inst|Selector22~0_combout ; -wire \inst13|inst|Selector22~1_combout ; -wire \inst13|inst|Selector22~2_combout ; -wire \inst13|inst|state.wr~q ; -wire \inst13|inst|Selector21~0_combout ; -wire \inst13|inst|state.command~q ; -wire \inst13|inst|WideOr12~0_combout ; -wire \inst13|inst|Selector27~0_combout ; -wire \inst13|inst|state~15_combout ; -wire \inst13|inst|state.slv_ack1~q ; -wire \inst13|inst|Selector24~0_combout ; -wire \inst13|inst|Selector24~1_combout ; -wire \inst13|inst|state.stop~q ; -wire \inst13|inst|Selector18~0_combout ; -wire \inst13|inst|state.ready~q ; -wire \inst13|inst|Selector19~0_combout ; -wire \inst13|inst|state.start~q ; -wire \inst13|inst|WideOr3~0_combout ; -wire \inst13|inst|Selector0~0_combout ; -wire \inst13|inst|Selector0~1_combout ; -wire \inst13|inst|Selector0~2_combout ; -wire \inst13|inst|Selector0~3_combout ; -wire \inst13|inst|busy~q ; -wire \inst13|inst14|data_out[6]~8_combout ; -wire \inst13|inst1[6]~45_combout ; -wire \inst13|inst1[6]~47_combout ; -wire \inst13|inst1[6]~48_combout ; -wire \inst|Selector21~3_combout ; -wire \inst|Selector21~4_combout ; -wire \inst|Add1~33_combout ; -wire \inst|Add1~34_combout ; -wire \inst|Add1~32 ; -wire \inst|Add1~36_combout ; -wire \inst|Selector21~1_combout ; -wire \inst|Selector21~0_combout ; -wire \inst|Selector21~2_combout ; -wire \inst|Selector21~5_combout ; -wire \inst|Selector21~6_combout ; -wire \inst|Add1~35_combout ; -wire \inst|Add1~37 ; -wire \inst|Add1~41_combout ; -wire \inst|Selector20~2_combout ; -wire \inst|shifter|auto_generated|sbit_w[55]~77_combout ; -wire \inst|Selector20~3_combout ; -wire \inst|Selector20~4_combout ; -wire \inst|Selector20~5_combout ; -wire \inst|Selector20~6_combout ; -wire \inst13|inst|Decoder0~8_combout ; -wire \inst13|inst|data_rx[7]~7_combout ; -wire \inst13|inst|data_rd[7]~feeder_combout ; -wire \inst13|inst14|data_out[7]~9_combout ; -wire \inst13|inst1[7]~51_combout ; -wire \inst13|inst1[7]~52_combout ; -wire \SW[7]~input_o ; -wire \inst13|inst1[7]~50_combout ; -wire \inst13|inst1[7]~53_combout ; -wire \inst|Selector20~7_combout ; +wire \inst|shifter|auto_generated|sbit_w[61]~73_combout ; +wire \inst|shifter|auto_generated|sbit_w[61]~74_combout ; +wire \inst|shifter|auto_generated|sbit_w[53]~75_combout ; +wire \inst|Selector22~0_combout ; +wire \inst|Selector22~1_combout ; +wire \inst|Selector22~2_combout ; +wire \inst|Add1~31_combout ; +wire \inst|Selector22~5_combout ; +wire \SW[5]~input_o ; +wire \inst13|inst1[5]~45_combout ; +wire \inst13|inst14|data_out[5]~7_combout ; +wire \inst13|inst1[5]~44_combout ; +wire \inst13|inst1[5]~46_combout ; +wire \inst13|inst1[5]~100_combout ; +wire \inst13|inst1[5]~47_combout ; +wire \inst|Selector22~6_combout ; +wire \inst|shifter|auto_generated|sbit_w[20]~12_combout ; +wire \inst|shifter|auto_generated|sbit_w[34]~53_combout ; +wire \inst|shifter|auto_generated|sbit_w[34]~54_combout ; +wire \inst|shifter|auto_generated|sbit_w[34]~55_combout ; +wire \inst|Selector25~6_combout ; +wire \inst|Selector25~7_combout ; +wire \inst|shifter|auto_generated|sbit_w[58]~60_combout ; +wire \inst|Selector25~0_combout ; +wire \SW[2]~input_o ; +wire \inst13|inst1[2]~32_combout ; +wire \inst13|inst14|data_out[2]~4_combout ; +wire \inst13|inst1[2]~33_combout ; +wire \inst4|IO_BUS|dout[2]~0_combout ; +wire \inst13|inst1[2]~31_combout ; +wire \inst|Selector25~1_combout ; +wire \inst|Selector25~8_combout ; wire \inst|Selector1~0_combout ; -wire \inst|Add0~19 ; -wire \inst|Add0~20_combout ; wire \inst|Selector1~1_combout ; -wire \inst|PC_stack[9][10]~feeder_combout ; -wire \inst|PC_stack[9][10]~q ; -wire \inst|Selector119~0_combout ; -wire \inst|PC_stack[8][10]~q ; -wire \inst|Selector108~0_combout ; -wire \inst|PC_stack[7][10]~q ; -wire \inst|Selector97~0_combout ; -wire \inst|PC_stack[6][10]~q ; -wire \inst|Selector86~0_combout ; -wire \inst|PC_stack[5][10]~q ; -wire \inst|Selector75~0_combout ; -wire \inst|PC_stack[4][10]~q ; -wire \inst|Selector64~0_combout ; -wire \inst|PC_stack[3][10]~q ; -wire \inst|Selector53~0_combout ; -wire \inst|PC_stack[2][10]~q ; -wire \inst|Selector42~0_combout ; -wire \inst|PC_stack[1][10]~q ; -wire \inst|Selector31~0_combout ; -wire \inst|PC_stack[0][10]~q ; wire \inst|Selector1~2_combout ; wire \inst|next_mem_addr[10]~10_combout ; wire \inst|Selector2~0_combout ; +wire \inst|Add0~18_combout ; wire \inst|Selector2~1_combout ; +wire \inst|PC_stack[9][9]~feeder_combout ; wire \inst|PC_stack[9][9]~q ; wire \inst|Selector120~0_combout ; wire \inst|PC_stack[8][9]~q ; @@ -1021,57 +1064,61 @@ wire \inst|PC_stack[0][9]~q ; wire \inst|Selector2~2_combout ; wire \inst|next_mem_addr[9]~9_combout ; wire \inst|Selector3~0_combout ; +wire \inst|Add0~16_combout ; +wire \inst|Selector3~1_combout ; +wire \inst|Selector3~2_combout ; wire \inst|next_mem_addr[8]~8_combout ; -wire \inst|Selector5~0_combout ; -wire \inst|next_mem_addr[6]~6_combout ; -wire \inst3|PWM_EN~0_combout ; -wire \inst3|SWITCH_EN~1_combout ; -wire \inst3|SWITCH_EN~combout ; -wire \inst4|COUNT[14]~42 ; -wire \inst4|COUNT[15]~43_combout ; -wire \inst13|inst1[15]~86_combout ; -wire \inst|Selector12~0_combout ; -wire \inst|Selector12~4_combout ; -wire \inst|Selector12~5_combout ; -wire \inst|Add1~78_combout ; -wire \inst|Add1~79_combout ; -wire \inst|Add1~80_combout ; -wire \inst|Add1~77 ; -wire \inst|Add1~81_combout ; -wire \inst|Selector12~6_combout ; -wire \inst|Selector12~7_combout ; -wire \inst|Selector12~8_combout ; -wire \inst|Selector12~1_combout ; -wire \inst|Selector12~2_combout ; -wire \inst|Selector12~3_combout ; -wire \inst|Selector12~9_combout ; -wire \inst|Selector12~10_combout ; -wire \inst10|count[14]~46 ; -wire \inst10|count[15]~47_combout ; -wire \inst11|Add1~18_combout ; -wire \inst11|count[14]~46 ; -wire \inst11|count[15]~47_combout ; -wire \inst13|inst1[15]~87_combout ; -wire \inst13|inst1[15]~88_combout ; -wire \inst13|inst14|data_out[15]~18_combout ; -wire \inst13|inst1[15]~89_combout ; -wire \inst|Selector12~11_combout ; -wire \inst|state~53_combout ; -wire \inst|state.ex_jneg~q ; -wire \inst|WideOr2~0_combout ; -wire \inst|state~54_combout ; -wire \inst|state.ex_jump~q ; -wire \inst|PC[0]~0_combout ; -wire \inst|Equal0~0_combout ; -wire \inst|Equal0~1_combout ; -wire \inst|Equal0~3_combout ; -wire \inst|Equal0~2_combout ; -wire \inst|Equal0~4_combout ; -wire \inst|PC[0]~1_combout ; -wire \inst|PC[0]~2_combout ; -wire \inst|Add0~9 ; -wire \inst|Add0~10_combout ; +wire \inst|Selector4~0_combout ; +wire \inst|next_mem_addr[7]~7_combout ; +wire \inst|Selector27~4_combout ; +wire \inst|Selector24~2_combout ; +wire \inst|Add1~21_combout ; +wire \inst|Selector24~3_combout ; +wire \inst|Selector24~4_combout ; +wire \inst|Selector24~5_combout ; +wire \inst|Selector24~6_combout ; +wire \inst|Selector24~7_combout ; +wire \inst|shifter|auto_generated|sbit_w[59]~66_combout ; +wire \inst|shifter|auto_generated|sbit_w[59]~69_combout ; +wire \inst|Selector24~0_combout ; +wire \inst4|IO_BUS|dout[3]~1_combout ; +wire \inst13|inst1[3]~35_combout ; +wire \SW[3]~input_o ; +wire \inst13|inst1[3]~36_combout ; +wire \inst13|inst|Decoder0~4_combout ; +wire \inst13|inst|data_rx[3]~3_combout ; +wire \inst13|inst|data_rd[3]~feeder_combout ; +wire \inst13|inst14|data_out[3]~5_combout ; +wire \inst13|inst1[3]~37_combout ; +wire \inst|Selector24~1_combout ; +wire \inst|Selector24~8_combout ; +wire \inst|Selector5~0_combout ; +wire \inst|Selector5~1_combout ; +wire \inst|PC_stack[9][6]~feeder_combout ; +wire \inst|PC_stack[9][6]~q ; +wire \inst|Selector123~0_combout ; +wire \inst|PC_stack[8][6]~q ; +wire \inst|Selector112~0_combout ; +wire \inst|PC_stack[7][6]~q ; +wire \inst|Selector101~0_combout ; +wire \inst|PC_stack[6][6]~q ; +wire \inst|Selector90~0_combout ; +wire \inst|PC_stack[5][6]~q ; +wire \inst|Selector79~0_combout ; +wire \inst|PC_stack[4][6]~q ; +wire \inst|Selector68~0_combout ; +wire \inst|PC_stack[3][6]~q ; +wire \inst|Selector57~0_combout ; +wire \inst|PC_stack[2][6]~q ; +wire \inst|Selector46~0_combout ; +wire \inst|PC_stack[1][6]~q ; +wire \inst|Selector35~0_combout ; +wire \inst|PC_stack[0][6]~q ; +wire \inst|Selector5~2_combout ; +wire \inst|next_mem_addr[6]~6_combout ; +wire \inst|Selector6~0_combout ; wire \inst|Selector6~1_combout ; +wire \inst|PC_stack[9][5]~feeder_combout ; wire \inst|PC_stack[9][5]~q ; wire \inst|Selector124~0_combout ; wire \inst|PC_stack[8][5]~q ; @@ -1093,11 +1140,40 @@ wire \inst|Selector36~0_combout ; wire \inst|PC_stack[0][5]~q ; wire \inst|Selector6~2_combout ; wire \inst|next_mem_addr[5]~5_combout ; -wire \inst|Selector7~0_combout ; -wire \inst|next_mem_addr[4]~4_combout ; -wire \inst|state~32_combout ; -wire \inst|state~50_combout ; -wire \inst|state.ex_return~q ; +wire \inst|Selector19~4_combout ; +wire \inst|Selector14~1_combout ; +wire \inst|Selector14~2_combout ; +wire \inst|Selector14~4_combout ; +wire \inst|Add1~71_combout ; +wire \inst|Selector14~5_combout ; +wire \inst|Selector14~3_combout ; +wire \inst|Selector14~6_combout ; +wire \inst|Selector14~0_combout ; +wire \inst|Selector14~7_combout ; +wire \inst|Equal0~0_combout ; +wire \inst|Equal0~2_combout ; +wire \inst|Equal0~3_combout ; +wire \inst|Equal0~1_combout ; +wire \inst|Equal0~4_combout ; +wire \inst|state~52_combout ; +wire \inst|state.ex_jzero~q ; +wire \inst|state~51_combout ; +wire \inst|state.ex_jpos~q ; +wire \inst|state~53_combout ; +wire \inst|state.ex_jneg~q ; +wire \inst|state~54_combout ; +wire \inst|state.ex_jump~q ; +wire \inst|WideOr2~0_combout ; +wire \inst|PC[0]~0_combout ; +wire \inst|PC[0]~1_combout ; +wire \inst|PC[0]~2_combout ; +wire \inst|Add0~1 ; +wire \inst|Add0~2_combout ; +wire \inst|Selector10~1_combout ; +wire \inst|Selector10~2_combout ; +wire \inst|Add0~3 ; +wire \inst|Add0~4_combout ; +wire \inst|Selector9~1_combout ; wire \inst|PC_stack[9][2]~feeder_combout ; wire \inst|PC_stack[9][2]~q ; wire \inst|Selector127~0_combout ; @@ -1118,59 +1194,11 @@ wire \inst|Selector50~0_combout ; wire \inst|PC_stack[1][2]~q ; wire \inst|Selector39~0_combout ; wire \inst|PC_stack[0][2]~q ; -wire \inst|PC_stack[9][1]~q ; -wire \inst|Selector128~0_combout ; -wire \inst|PC_stack[8][1]~q ; -wire \inst|Selector117~0_combout ; -wire \inst|PC_stack[7][1]~q ; -wire \inst|Selector106~0_combout ; -wire \inst|PC_stack[6][1]~q ; -wire \inst|Selector95~0_combout ; -wire \inst|PC_stack[5][1]~q ; -wire \inst|Selector84~0_combout ; -wire \inst|PC_stack[4][1]~q ; -wire \inst|Selector73~0_combout ; -wire \inst|PC_stack[3][1]~q ; -wire \inst|Selector62~0_combout ; -wire \inst|PC_stack[2][1]~q ; -wire \inst|Selector51~0_combout ; -wire \inst|PC_stack[1][1]~q ; -wire \inst|Selector40~0_combout ; -wire \inst|PC_stack[0][1]~q ; -wire \inst|Add0~0_combout ; -wire \inst|Selector11~1_combout ; -wire \inst|PC_stack[9][0]~q ; -wire \inst|Selector129~0_combout ; -wire \inst|PC_stack[8][0]~q ; -wire \inst|Selector118~0_combout ; -wire \inst|PC_stack[7][0]~q ; -wire \inst|Selector107~0_combout ; -wire \inst|PC_stack[6][0]~q ; -wire \inst|Selector96~0_combout ; -wire \inst|PC_stack[5][0]~q ; -wire \inst|Selector85~0_combout ; -wire \inst|PC_stack[4][0]~q ; -wire \inst|Selector74~0_combout ; -wire \inst|PC_stack[3][0]~q ; -wire \inst|Selector63~0_combout ; -wire \inst|PC_stack[2][0]~q ; -wire \inst|Selector52~0_combout ; -wire \inst|PC_stack[1][0]~q ; -wire \inst|Selector41~0_combout ; -wire \inst|PC_stack[0][0]~q ; -wire \inst|Selector11~2_combout ; -wire \inst|Add0~1 ; -wire \inst|Add0~2_combout ; -wire \inst|Selector10~1_combout ; -wire \inst|Selector10~2_combout ; -wire \inst|Add0~3 ; -wire \inst|Add0~4_combout ; -wire \inst|Selector9~1_combout ; wire \inst|Selector9~2_combout ; wire \inst|Add0~5 ; wire \inst|Add0~6_combout ; +wire \inst|Selector8~0_combout ; wire \inst|Selector8~1_combout ; -wire \inst|PC_stack[9][3]~feeder_combout ; wire \inst|PC_stack[9][3]~q ; wire \inst|Selector126~0_combout ; wire \inst|PC_stack[8][3]~q ; @@ -1192,97 +1220,78 @@ wire \inst|Selector38~0_combout ; wire \inst|PC_stack[0][3]~q ; wire \inst|Selector8~2_combout ; wire \inst|next_mem_addr[3]~3_combout ; +wire \inst|state~43_combout ; +wire \inst|state~44_combout ; +wire \inst|state.ex_sub~q ; +wire \inst|Add1~0_combout ; +wire \inst|Add1~2_combout ; +wire \inst|Add1~6_combout ; +wire \inst|Selector27~2_combout ; +wire \inst|Selector27~0_combout ; +wire \inst|Selector27~3_combout ; +wire \inst|Selector27~5_combout ; +wire \inst|Selector27~7_combout ; +wire \inst|Selector27~8_combout ; +wire \inst|Selector27~9_combout ; +wire \inst13|inst1[0]~20_combout ; +wire \inst13|inst14|data_out[0]~1_combout ; +wire \inst13|inst1[0]~21_combout ; +wire \SW[0]~input_o ; +wire \inst13|inst1[0]~22_combout ; +wire \inst13|inst1[0]~18_combout ; +wire \inst13|inst1[0]~19_combout ; +wire \inst|Selector27~10_combout ; wire \inst|Selector9~0_combout ; wire \inst|next_mem_addr[2]~2_combout ; -wire \inst|Selector10~0_combout ; -wire \inst|next_mem_addr[1]~1_combout ; -wire \inst|state~47_combout ; -wire \inst|state.ex_iload~q ; -wire \inst|state.ex_istore2~q ; -wire \inst|WideNor0~combout ; -wire \inst|Selector11~0_combout ; -wire \inst|next_mem_addr[0]~0_combout ; -wire \inst|state~34_combout ; -wire \inst|state.ex_out~q ; -wire \inst|WideOr7~0_combout ; -wire \inst|state~48_combout ; -wire \inst|state.ex_store~q ; -wire \inst|WideOr7~combout ; -wire \inst|state.fetch~q ; -wire \inst|state.decode~feeder_combout ; -wire \inst|state.decode~q ; -wire \inst|Selector30~0_combout ; -wire \inst|state~41_combout ; -wire \inst|state.ex_addi~q ; -wire \inst|AC[2]~0_combout ; -wire \inst|Selector25~0_combout ; -wire \inst|Selector25~2_combout ; -wire \inst|Selector25~3_combout ; -wire \inst|Selector25~1_combout ; -wire \inst|Selector25~4_combout ; -wire \inst|Add1~16_combout ; -wire \inst|Selector25~6_combout ; -wire \inst|Selector25~7_combout ; -wire \inst13|inst14|data_out[2]~4_combout ; -wire \inst13|inst1[2]~26_combout ; -wire \inst13|inst1[2]~27_combout ; -wire \SW[2]~input_o ; -wire \inst13|inst1[2]~25_combout ; -wire \inst13|inst1[2]~28_combout ; -wire \inst|Selector25~5_combout ; -wire \inst3|TIMER_EN~2_combout ; -wire \inst4|IO_OUT~combout ; -wire \inst13|inst1[1]~91_combout ; -wire \SW[1]~input_o ; -wire \inst13|inst1[1]~21_combout ; -wire \inst13|inst14|data_out[1]~3_combout ; -wire \inst13|inst1[1]~20_combout ; -wire \inst13|inst1[1]~22_combout ; -wire \inst13|inst1[1]~23_combout ; +wire \inst|state~32_combout ; +wire \inst|Selector28~0_combout ; +wire \inst|Selector28~1_combout ; +wire \inst|IO_WRITE_int~q ; +wire \inst13|inst1[0]~23_combout ; +wire \inst13|inst1[0]~24_combout ; +wire \inst|Selector26~1_combout ; +wire \inst|Selector26~0_combout ; +wire \inst|Selector26~2_combout ; wire \inst|Selector26~3_combout ; wire \inst|Selector26~4_combout ; wire \inst|Add1~11_combout ; -wire \inst|Selector26~0_combout ; -wire \inst|Selector26~1_combout ; -wire \inst|Selector26~2_combout ; wire \inst|Selector26~5_combout ; +wire \inst13|inst1[1]~96_combout ; +wire \SW[1]~input_o ; +wire \inst13|inst1[1]~27_combout ; +wire \inst13|inst14|data_out[1]~3_combout ; +wire \inst13|inst1[1]~26_combout ; +wire \inst13|inst1[1]~28_combout ; +wire \inst13|inst1[1]~29_combout ; wire \inst|Selector26~6_combout ; +wire \inst|Selector10~0_combout ; +wire \inst|next_mem_addr[1]~1_combout ; +wire \inst|state~49_combout ; +wire \inst|state.ex_istore~q ; +wire \inst|WideOr7~0_combout ; +wire \inst|WideOr7~combout ; +wire \inst|state.fetch~q ; +wire \inst|Selector11~0_combout ; +wire \inst|next_mem_addr[0]~0_combout ; wire \inst|state~33_combout ; wire \inst|state.ex_in~q ; wire \inst|state.ex_in2~q ; -wire \inst13|inst14|data_out[0]~1_combout ; -wire \inst13|inst1[0]~15_combout ; -wire \SW[0]~input_o ; -wire \inst13|inst1[0]~14_combout ; -wire \inst13|inst1[0]~16_combout ; -wire \inst|Selector27~7_combout ; -wire \inst|Selector27~5_combout ; -wire \inst|Selector27~8_combout ; -wire \inst|Add1~6_combout ; -wire \inst|Selector27~0_combout ; -wire \inst|Selector27~2_combout ; -wire \inst|Selector27~3_combout ; -wire \inst|Selector27~9_combout ; -wire \inst13|inst1[0]~12_combout ; -wire \inst13|inst1[0]~13_combout ; -wire \inst|Selector27~10_combout ; -wire \inst|Selector20~0_combout ; +wire \inst|Selector16~1_combout ; wire \inst|Selector16~4_combout ; wire \inst|Selector16~5_combout ; -wire \inst|Selector16~2_combout ; wire \inst|Add1~61_combout ; +wire \inst|Selector16~2_combout ; wire \inst|Selector16~3_combout ; wire \inst|Selector16~6_combout ; -wire \inst|Selector16~1_combout ; wire \inst|Selector16~7_combout ; -wire \inst13|inst1[11]~69_combout ; -wire \inst13|inst1[11]~70_combout ; wire \inst13|inst1[11]~71_combout ; -wire \inst13|inst14|data_out[11]~14_combout ; wire \inst13|inst1[11]~72_combout ; +wire \inst13|inst1[11]~73_combout ; +wire \inst13|inst14|data_out[11]~14_combout ; +wire \inst13|inst1[11]~74_combout ; wire \inst|Selector16~8_combout ; -wire \inst|state~49_combout ; -wire \inst|state.ex_istore~q ; +wire \inst|state~48_combout ; +wire \inst|state.ex_store~q ; wire \inst|state.ex_store2~q ; wire \inst|Selector0~0_combout ; wire \inst|Selector0~1_combout ; @@ -1291,85 +1300,92 @@ wire \inst3|TIMER_EN~0_combout ; wire \inst3|TIMER_EN~1_combout ; wire \inst13|inst12~combout ; wire \inst13|inst12~clkctrl_outclk ; -wire \inst13|inst1[4]~39_combout ; +wire \inst13|inst1[2]~97_combout ; +wire \inst13|inst1[2]~34_combout ; +wire \inst13|inst14|addr_in[2]~feeder_combout ; +wire \inst13|inst14|tx_addr[7]~1_combout ; +wire \inst13|inst1[1]~30_combout ; +wire \inst13|inst14|addr_in[1]~feeder_combout ; +wire \inst13|inst14|tx_addr[1]~feeder_combout ; +wire \inst13|inst|process_1~0_combout ; +wire \inst13|inst1[7]~57_combout ; +wire \inst13|inst14|addr_in[7]~feeder_combout ; +wire \inst13|inst14|tx_addr[7]~feeder_combout ; +wire \inst13|inst|process_1~3_combout ; +wire \inst13|inst1[4]~43_combout ; wire \inst13|inst14|addr_in[4]~feeder_combout ; wire \inst13|inst14|tx_addr[4]~feeder_combout ; -wire \inst13|inst14|tx_addr[7]~1_combout ; -wire \inst13|inst1[3]~34_combout ; +wire \inst13|inst1[3]~98_combout ; +wire \inst13|inst1[3]~38_combout ; wire \inst13|inst14|addr_in[3]~feeder_combout ; wire \inst13|inst14|tx_addr[3]~feeder_combout ; wire \inst13|inst|process_1~1_combout ; -wire \inst13|inst1[7]~54_combout ; -wire \inst13|inst14|addr_in[7]~feeder_combout ; -wire \inst13|inst14|tx_addr[7]~feeder_combout ; -wire \inst13|inst|process_1~3_combout ; -wire \inst13|inst1[2]~29_combout ; -wire \inst13|inst14|addr_in[2]~feeder_combout ; -wire \inst13|inst14|tx_addr[2]~feeder_combout ; -wire \inst13|inst1[1]~24_combout ; -wire \inst13|inst14|addr_in[1]~feeder_combout ; -wire \inst13|inst14|tx_addr[1]~feeder_combout ; -wire \inst13|inst|process_1~0_combout ; -wire \inst13|inst1[5]~44_combout ; -wire \inst13|inst14|addr_in[5]~feeder_combout ; -wire \inst13|inst14|tx_addr[5]~feeder_combout ; -wire \inst13|inst1[6]~49_combout ; +wire \inst13|inst1[6]~53_combout ; wire \inst13|inst14|addr_in[6]~feeder_combout ; wire \inst13|inst14|tx_addr[6]~feeder_combout ; +wire \inst13|inst1[5]~48_combout ; +wire \inst13|inst14|addr_in[5]~feeder_combout ; +wire \inst13|inst14|tx_addr[5]~feeder_combout ; wire \inst13|inst|process_1~2_combout ; wire \inst13|inst|process_1~4_combout ; +wire \inst13|inst|Selector23~1_combout ; +wire \inst13|inst|Selector23~2_combout ; +wire \inst13|inst|Selector23~3_combout ; +wire \inst13|inst|state.rd~q ; +wire \inst13|inst|WideOr12~0_combout ; +wire \inst13|inst|state~16_combout ; +wire \inst13|inst|state.slv_ack2~q ; wire \inst13|inst|Selector20~0_combout ; wire \inst13|inst|Selector20~1_combout ; wire \inst13|inst|state.restart~q ; -wire \inst13|inst|Selector25~4_combout ; -wire \inst13|inst|Selector25~5_combout ; -wire \inst13|inst|Selector25~1_combout ; -wire \inst13|inst|Selector25~2_combout ; -wire \inst13|inst|Selector25~0_combout ; -wire \inst13|inst|Selector25~3_combout ; wire \inst13|inst13~combout ; wire \inst13|inst13~clkctrl_outclk ; -wire \inst13|inst1[15]~90_combout ; +wire \inst13|inst1[15]~95_combout ; +wire \inst13|inst14|data_in[15]~feeder_combout ; wire \inst13|inst14|Selector23~0_combout ; wire \inst13|inst14|tx_byte[7]~0_combout ; wire \inst13|inst14|tx_byte[7]~1_combout ; +wire \inst13|inst|data_tx[7]~feeder_combout ; +wire \inst13|inst1[14]~90_combout ; +wire \inst13|inst14|data_in[14]~feeder_combout ; wire \inst13|inst14|data_in[6]~feeder_combout ; -wire \inst13|inst1[14]~85_combout ; wire \inst13|inst14|Selector24~0_combout ; +wire \inst13|inst|data_tx[6]~feeder_combout ; wire \inst13|inst14|data_in[13]~feeder_combout ; wire \inst13|inst14|data_in[5]~feeder_combout ; wire \inst13|inst14|Selector25~0_combout ; wire \inst13|inst14|data_in[12]~feeder_combout ; wire \inst13|inst14|data_in[4]~feeder_combout ; wire \inst13|inst14|Selector26~0_combout ; -wire \inst13|inst|Mux4~2_combout ; -wire \inst13|inst|Mux4~3_combout ; -wire \inst13|inst1[10]~68_combout ; +wire \inst13|inst|Mux2~2_combout ; +wire \inst13|inst|Mux2~3_combout ; +wire \inst13|inst1[10]~70_combout ; wire \inst13|inst14|data_in[10]~feeder_combout ; wire \inst13|inst14|data_in[2]~feeder_combout ; wire \inst13|inst14|Selector28~0_combout ; wire \inst13|inst14|data_in[3]~feeder_combout ; -wire \inst13|inst1[11]~73_combout ; +wire \inst13|inst1[11]~75_combout ; wire \inst13|inst14|data_in[11]~feeder_combout ; wire \inst13|inst14|Selector27~0_combout ; -wire \inst13|inst14|data_in[9]~feeder_combout ; wire \inst13|inst14|data_in[1]~feeder_combout ; wire \inst13|inst14|Selector29~0_combout ; -wire \inst13|inst1[0]~19_combout ; +wire \inst13|inst14|data_in[8]~feeder_combout ; +wire \inst13|inst1[0]~25_combout ; wire \inst13|inst14|data_in[0]~feeder_combout ; wire \inst13|inst14|Selector30~0_combout ; -wire \inst13|inst|Mux4~0_combout ; -wire \inst13|inst|Mux4~1_combout ; -wire \inst13|inst|Selector25~7_combout ; -wire \inst13|inst|Mux0~0_combout ; -wire \inst13|inst|Mux0~1_combout ; +wire \inst13|inst|Mux2~0_combout ; +wire \inst13|inst|Mux2~1_combout ; +wire \inst13|inst|Selector23~0_combout ; +wire \inst13|inst|Selector25~11_combout ; wire \inst13|inst|Mux0~2_combout ; wire \inst13|inst|Mux0~3_combout ; +wire \inst13|inst|Mux0~0_combout ; +wire \inst13|inst|Mux0~1_combout ; wire \inst13|inst|Selector25~13_combout ; -wire \inst13|inst|Mux3~2_combout ; -wire \inst13|inst|Mux3~3_combout ; wire \inst13|inst|Mux3~0_combout ; wire \inst13|inst|Mux3~1_combout ; +wire \inst13|inst|Mux3~2_combout ; +wire \inst13|inst|Mux3~3_combout ; wire \inst13|inst|Selector25~8_combout ; wire \inst13|inst|Mux1~0_combout ; wire \inst13|inst|Mux1~1_combout ; @@ -1377,82 +1393,89 @@ wire \inst13|inst|Mux1~2_combout ; wire \inst13|inst|Mux1~3_combout ; wire \inst13|inst|Selector25~9_combout ; wire \inst13|inst|Selector25~10_combout ; -wire \inst13|inst|Mux2~0_combout ; -wire \inst13|inst|Mux2~1_combout ; -wire \inst13|inst|Mux2~2_combout ; -wire \inst13|inst|Mux2~3_combout ; -wire \inst13|inst|Selector23~0_combout ; -wire \inst13|inst|Selector25~11_combout ; wire \inst13|inst|Selector25~14_combout ; +wire \inst13|inst|Mux4~2_combout ; +wire \inst13|inst|Mux4~3_combout ; +wire \inst13|inst|Mux4~0_combout ; +wire \inst13|inst|Mux4~1_combout ; +wire \inst13|inst|Selector25~7_combout ; +wire \inst13|inst|Selector25~0_combout ; +wire \inst13|inst|Selector25~1_combout ; +wire \inst13|inst|Selector25~2_combout ; +wire \inst13|inst|Selector25~3_combout ; +wire \inst13|inst|Selector25~4_combout ; +wire \inst13|inst|Selector25~5_combout ; wire \inst13|inst|Selector25~12_combout ; wire \inst13|inst|sda_int~q ; wire \inst13|inst|Selector30~0_combout ; +wire \inst13|inst|Selector17~0_combout ; +wire \inst13|inst|scl_req~0_combout ; wire \inst13|inst|Selector17~1_combout ; wire \inst13|inst|Selector17~2_combout ; wire \inst13|inst|Selector17~3_combout ; -wire \inst13|inst|scl_req~0_combout ; -wire \inst13|inst|Selector17~0_combout ; wire \inst13|inst|Selector17~4_combout ; wire \inst13|inst|scl_req~q ; wire \inst13|inst|scl_ena~q ; wire \inst13|inst|scl_clk~1_combout ; wire \inst13|inst|scl_clk~en_q ; wire \inst13|inst|scl~1_combout ; -wire \inst5|count_10kHz[0]~9_combout ; -wire \inst5|count_10kHz[4]~18 ; -wire \inst5|count_10kHz[5]~19_combout ; -wire \inst5|count_10kHz[5]~20 ; -wire \inst5|count_10kHz[6]~21_combout ; -wire \inst5|count_10kHz[6]~22 ; -wire \inst5|count_10kHz[7]~23_combout ; -wire \inst5|count_10kHz[7]~24 ; -wire \inst5|count_10kHz[8]~25_combout ; +wire \inst5|count_25kHz[0]~8_combout ; +wire \inst5|count_25kHz[0]~9 ; +wire \inst5|count_25kHz[1]~10_combout ; +wire \inst5|count_25kHz[1]~11 ; +wire \inst5|count_25kHz[2]~12_combout ; +wire \inst5|count_25kHz[2]~13 ; +wire \inst5|count_25kHz[3]~14_combout ; +wire \inst5|count_25kHz[3]~15 ; +wire \inst5|count_25kHz[4]~16_combout ; +wire \inst5|count_25kHz[4]~17 ; +wire \inst5|count_25kHz[5]~18_combout ; +wire \inst5|count_25kHz[5]~19 ; +wire \inst5|count_25kHz[6]~20_combout ; +wire \inst5|count_25kHz[6]~21 ; +wire \inst5|count_25kHz[7]~22_combout ; +wire \inst5|LessThan1~1_combout ; wire \inst5|LessThan1~0_combout ; wire \inst5|LessThan1~2_combout ; -wire \inst5|count_10kHz[0]~10 ; -wire \inst5|count_10kHz[1]~11_combout ; -wire \inst5|count_10kHz[1]~12 ; -wire \inst5|count_10kHz[2]~13_combout ; -wire \inst5|count_10kHz[2]~14 ; -wire \inst5|count_10kHz[3]~15_combout ; -wire \inst5|count_10kHz[3]~16 ; -wire \inst5|count_10kHz[4]~17_combout ; -wire \inst5|LessThan1~1_combout ; -wire \inst5|clock_10kHz_int~0_combout ; -wire \inst5|clock_10kHz_int~q ; -wire \inst5|clock_10kHz~feeder_combout ; -wire \inst5|clock_10kHz~q ; -wire \inst5|clock_10kHz~clkctrl_outclk ; -wire \inst14|COUNT[0]~12_combout ; -wire \inst14|COUNT[1]~4_combout ; -wire \inst14|COUNT[1]~5 ; -wire \inst14|COUNT[2]~6_combout ; -wire \inst14|COUNT[2]~7 ; -wire \inst14|COUNT[3]~8_combout ; -wire \inst14|COUNT[3]~9 ; -wire \inst14|COUNT[4]~10_combout ; -wire \inst14|PWM_OUT~0_combout ; +wire \inst5|clock_25kHz_int~0_combout ; +wire \inst5|clock_25kHz_int~q ; +wire \inst5|clock_25kHz~feeder_combout ; +wire \inst5|clock_25kHz~q ; +wire \inst5|clock_25kHz~clkctrl_outclk ; +wire \inst14|COUNT[0]~18_combout ; +wire \inst14|COUNT[1]~6_combout ; +wire \inst14|COUNT[1]~7 ; +wire \inst14|COUNT[2]~8_combout ; +wire \inst14|COUNT[2]~9 ; +wire \inst14|COUNT[3]~10_combout ; +wire \inst14|Equal1~0_combout ; +wire \inst14|COUNT[3]~11 ; +wire \inst14|COUNT[4]~12_combout ; +wire \inst14|COUNT[4]~13 ; +wire \inst14|COUNT[5]~14_combout ; +wire \inst14|COUNT[5]~15 ; +wire \inst14|COUNT[6]~16_combout ; +wire \inst14|Equal1~1_combout ; wire \inst3|PWM_EN~1_combout ; wire \inst3|PWM_EN~2_combout ; wire \inst3|PWM_EN~combout ; wire \inst3|PWM_EN~clkctrl_outclk ; -wire \inst14|COMPARE[3]~feeder_combout ; -wire \inst14|PWM_OUT~1_combout ; -wire \inst14|COMPARE[1]~feeder_combout ; -wire \inst14|COMPARE[0]~feeder_combout ; -wire \inst14|PWM_OUT~3_combout ; +wire \inst14|Equal0~0_combout ; wire \inst14|COMPARE[2]~feeder_combout ; +wire \inst14|PWM_OUT~1_combout ; +wire \inst14|PWM_OUT~0_combout ; wire \inst14|COMPARE[4]~feeder_combout ; wire \inst14|PWM_OUT~2_combout ; +wire \inst14|PWM_OUT~3_combout ; wire \inst14|PWM_OUT~4_combout ; wire \inst14|PWM_OUT~q ; wire \inst3|HEX0_EN~0_combout ; wire \inst3|HEX0_EN~combout ; wire \inst3|HEX0_EN~clkctrl_outclk ; -wire \inst9|inst1|latched_hex[0]~feeder_combout ; -wire \inst9|inst1|latched_hex[2]~feeder_combout ; wire \inst9|inst1|latched_hex[1]~feeder_combout ; +wire \inst9|inst1|latched_hex[2]~feeder_combout ; wire \inst9|inst1|latched_hex[3]~feeder_combout ; +wire \inst9|inst1|latched_hex[0]~feeder_combout ; wire \inst9|inst1|Mux0~0_combout ; wire \inst9|inst1|Mux1~0_combout ; wire \inst9|inst1|Mux2~0_combout ; @@ -1462,8 +1485,6 @@ wire \inst9|inst1|Mux5~0_combout ; wire \inst9|inst1|Mux6~0_combout ; wire \inst9|inst2|latched_hex[3]~feeder_combout ; wire \inst9|inst2|latched_hex[2]~feeder_combout ; -wire \inst9|inst2|latched_hex[1]~feeder_combout ; -wire \inst9|inst2|latched_hex[0]~feeder_combout ; wire \inst9|inst2|Mux0~0_combout ; wire \inst9|inst2|Mux1~0_combout ; wire \inst9|inst2|Mux2~0_combout ; @@ -1480,8 +1501,6 @@ wire \inst9|inst3|Mux5~0_combout ; wire \inst9|inst3|Mux6~0_combout ; wire \inst9|inst4|latched_hex[2]~feeder_combout ; wire \inst9|inst4|latched_hex[1]~feeder_combout ; -wire \inst9|inst4|latched_hex[3]~feeder_combout ; -wire \inst9|inst4|latched_hex[0]~feeder_combout ; wire \inst9|inst4|Mux0~0_combout ; wire \inst9|inst4|Mux1~0_combout ; wire \inst9|inst4|Mux2~0_combout ; @@ -1491,6 +1510,10 @@ wire \inst9|inst4|Mux5~0_combout ; wire \inst9|inst4|Mux6~0_combout ; wire \inst3|HEX1_EN~combout ; wire \inst3|HEX1_EN~clkctrl_outclk ; +wire \inst9|inst5|latched_hex[0]~feeder_combout ; +wire \inst9|inst5|latched_hex[3]~feeder_combout ; +wire \inst9|inst5|latched_hex[1]~feeder_combout ; +wire \inst9|inst5|latched_hex[2]~feeder_combout ; wire \inst9|inst5|Mux0~0_combout ; wire \inst9|inst5|Mux1~0_combout ; wire \inst9|inst5|Mux2~0_combout ; @@ -1499,6 +1522,8 @@ wire \inst9|inst5|Mux4~0_combout ; wire \inst9|inst5|Mux5~0_combout ; wire \inst9|inst5|Mux6~0_combout ; wire \inst9|inst6|latched_hex[1]~feeder_combout ; +wire \inst9|inst6|latched_hex[3]~feeder_combout ; +wire \inst9|inst6|latched_hex[0]~feeder_combout ; wire \inst9|inst6|Mux0~0_combout ; wire \inst9|inst6|Mux1~0_combout ; wire \inst9|inst6|Mux2~0_combout ; @@ -1511,29 +1536,28 @@ wire \inst3|LED_EN~clkctrl_outclk ; wire \inst6|DATA[9]~feeder_combout ; wire \inst6|DATA[8]~feeder_combout ; wire \inst6|DATA[7]~feeder_combout ; -wire \inst6|DATA[6]~feeder_combout ; +wire \inst6|DATA[5]~feeder_combout ; wire \inst6|DATA[4]~feeder_combout ; -wire \inst6|DATA[3]~feeder_combout ; +wire \inst6|DATA[1]~feeder_combout ; wire \inst6|DATA[0]~feeder_combout ; -wire [4:0] \inst14|COUNT ; +wire [6:0] \inst14|COUNT ; +wire [15:0] \inst4|COUNT ; +wire [3:0] \inst9|inst3|latched_hex ; wire [5:0] \inst5|count_100kHz ; wire [15:0] \inst11|count ; wire [15:0] \inst10|count ; wire [18:0] \inst5|count_10Hz ; -wire [8:0] \inst5|count_10kHz ; +wire [7:0] \inst5|count_25kHz ; wire [4:0] \inst1|altpll_component|auto_generated|wire_pll1_clk ; -wire [4:0] \inst14|COMPARE ; -wire [15:0] \inst4|COUNT ; -wire [3:0] \inst9|inst2|latched_hex ; wire [15:0] \inst|altsyncram_component|auto_generated|q_a ; wire [3:0] \inst9|inst1|latched_hex ; -wire [7:0] \inst13|inst|data_tx ; -wire [3:0] \inst9|inst3|latched_hex ; -wire [1:0] \inst11|AB1 ; +wire [3:0] \inst9|inst2|latched_hex ; wire [3:0] \inst9|inst4|latched_hex ; +wire [15:0] \inst13|inst14|data_in ; wire [3:0] \inst9|inst5|latched_hex ; -wire [15:0] \inst6|DATA ; wire [3:0] \inst9|inst6|latched_hex ; +wire [15:0] \inst6|DATA ; +wire [6:0] \inst14|COMPARE ; wire [15:0] \inst|IR ; wire [15:0] \inst7|B_DI ; wire [15:0] \inst13|inst14|data_out ; @@ -1542,1779 +1566,2336 @@ wire [1:0] \inst11|AB ; wire [7:0] \inst13|inst|data_rd ; wire [7:0] \inst13|inst14|cmd_in ; wire [10:0] \inst|PC ; +wire [1:0] \inst11|AB1 ; wire [7:0] \inst13|inst|data_rx ; wire [2:0] \inst13|inst|bit_cnt ; wire [7:0] \inst13|inst|addr_rw ; wire [7:0] \inst13|inst14|tx_addr ; wire [7:0] \inst13|inst14|tx_byte ; +wire [7:0] \inst13|inst|data_tx ; wire [2:0] \inst13|inst|count ; wire [7:0] \inst13|inst14|addr_in ; -wire [15:0] \inst13|inst14|data_in ; -wire [4:0] \inst1|altpll_component|auto_generated|pll1_CLK_bus ; -wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus ; -wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus ; -wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ; -wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ; +wire [4:0] \inst1|altpll_component|auto_generated|pll1_CLK_bus ; +wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus ; +wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus ; +wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ; +wire [3:0] \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ; + +assign \inst1|altpll_component|auto_generated|wire_pll1_clk [0] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [0]; +assign \inst1|altpll_component|auto_generated|wire_pll1_clk [1] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [1]; +assign \inst1|altpll_component|auto_generated|wire_pll1_clk [2] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [2]; +assign \inst1|altpll_component|auto_generated|wire_pll1_clk [3] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [3]; +assign \inst1|altpll_component|auto_generated|wire_pll1_clk [4] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [4]; + +assign \inst|altsyncram_component|auto_generated|q_a [0] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [0]; +assign \inst|altsyncram_component|auto_generated|q_a [2] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [1]; +assign \inst|altsyncram_component|auto_generated|q_a [7] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [2]; +assign \inst|altsyncram_component|auto_generated|q_a [10] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [3]; + +assign \inst|altsyncram_component|auto_generated|q_a [3] = \inst|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus [0]; +assign \inst|altsyncram_component|auto_generated|q_a [6] = \inst|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus [1]; +assign \inst|altsyncram_component|auto_generated|q_a [8] = \inst|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus [2]; +assign \inst|altsyncram_component|auto_generated|q_a [9] = \inst|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus [3]; + +assign \inst|altsyncram_component|auto_generated|q_a [1] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [0]; +assign \inst|altsyncram_component|auto_generated|q_a [4] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [1]; +assign \inst|altsyncram_component|auto_generated|q_a [5] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [2]; +assign \inst|altsyncram_component|auto_generated|q_a [12] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [3]; + +assign \inst|altsyncram_component|auto_generated|q_a [11] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [0]; +assign \inst|altsyncram_component|auto_generated|q_a [13] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [1]; +assign \inst|altsyncram_component|auto_generated|q_a [14] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [2]; +assign \inst|altsyncram_component|auto_generated|q_a [15] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [3]; + +// Location: LCCOMB_X44_Y52_N4 +fiftyfivenm_lcell_comb \~QUARTUS_CREATED_GND~I ( +// Equation(s): +// \~QUARTUS_CREATED_GND~I_combout = GND + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\~QUARTUS_CREATED_GND~I_combout ), + .cout()); +// synopsys translate_off +defparam \~QUARTUS_CREATED_GND~I .lut_mask = 16'h0000; +defparam \~QUARTUS_CREATED_GND~I .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOOBUF_X54_Y0_N2 +fiftyfivenm_io_obuf \GSENSOR_CS_n~output ( + .i(vcc), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(GSENSOR_CS_n), + .obar()); +// synopsys translate_off +defparam \GSENSOR_CS_n~output .bus_hold = "false"; +defparam \GSENSOR_CS_n~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X38_Y0_N23 +fiftyfivenm_io_obuf \GSENSOR_SDO~output ( + .i(vcc), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(GSENSOR_SDO), + .obar()); +// synopsys translate_off +defparam \GSENSOR_SDO~output .bus_hold = "false"; +defparam \GSENSOR_SDO~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X29_Y0_N30 +fiftyfivenm_io_obuf \PWM~output ( + .i(\inst14|PWM_OUT~q ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(PWM), + .obar()); +// synopsys translate_off +defparam \PWM~output .bus_hold = "false"; +defparam \PWM~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X31_Y0_N9 +fiftyfivenm_io_obuf \STBY~output ( + .i(\SW[9]~input_o ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(STBY), + .obar()); +// synopsys translate_off +defparam \STBY~output .bus_hold = "false"; +defparam \STBY~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X29_Y0_N2 +fiftyfivenm_io_obuf \IN1~output ( + .i(\SW[8]~input_o ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(IN1), + .obar()); +// synopsys translate_off +defparam \IN1~output .bus_hold = "false"; +defparam \IN1~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X29_Y0_N9 +fiftyfivenm_io_obuf \IN2~output ( + .i(\SW[7]~input_o ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(IN2), + .obar()); +// synopsys translate_off +defparam \IN2~output .bus_hold = "false"; +defparam \IN2~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X74_Y54_N23 +fiftyfivenm_io_obuf \HEX0[6]~output ( + .i(!\inst9|inst1|Mux0~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[6]), + .obar()); +// synopsys translate_off +defparam \HEX0[6]~output .bus_hold = "false"; +defparam \HEX0[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X74_Y54_N16 +fiftyfivenm_io_obuf \HEX0[5]~output ( + .i(\inst9|inst1|Mux1~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[5]), + .obar()); +// synopsys translate_off +defparam \HEX0[5]~output .bus_hold = "false"; +defparam \HEX0[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X74_Y54_N2 +fiftyfivenm_io_obuf \HEX0[4]~output ( + .i(\inst9|inst1|Mux2~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[4]), + .obar()); +// synopsys translate_off +defparam \HEX0[4]~output .bus_hold = "false"; +defparam \HEX0[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X62_Y54_N30 +fiftyfivenm_io_obuf \HEX0[3]~output ( + .i(\inst9|inst1|Mux3~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[3]), + .obar()); +// synopsys translate_off +defparam \HEX0[3]~output .bus_hold = "false"; +defparam \HEX0[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X60_Y54_N2 +fiftyfivenm_io_obuf \HEX0[2]~output ( + .i(\inst9|inst1|Mux4~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[2]), + .obar()); +// synopsys translate_off +defparam \HEX0[2]~output .bus_hold = "false"; +defparam \HEX0[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X74_Y54_N9 +fiftyfivenm_io_obuf \HEX0[1]~output ( + .i(\inst9|inst1|Mux5~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[1]), + .obar()); +// synopsys translate_off +defparam \HEX0[1]~output .bus_hold = "false"; +defparam \HEX0[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X58_Y54_N16 +fiftyfivenm_io_obuf \HEX0[0]~output ( + .i(\inst9|inst1|Mux6~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX0[0]), + .obar()); +// synopsys translate_off +defparam \HEX0[0]~output .bus_hold = "false"; +defparam \HEX0[0]~output .open_drain_output = "false"; +// synopsys translate_on -assign \inst1|altpll_component|auto_generated|wire_pll1_clk [0] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [0]; -assign \inst1|altpll_component|auto_generated|wire_pll1_clk [1] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [1]; -assign \inst1|altpll_component|auto_generated|wire_pll1_clk [2] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [2]; -assign \inst1|altpll_component|auto_generated|wire_pll1_clk [3] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [3]; -assign \inst1|altpll_component|auto_generated|wire_pll1_clk [4] = \inst1|altpll_component|auto_generated|pll1_CLK_bus [4]; +// Location: IOOBUF_X69_Y54_N30 +fiftyfivenm_io_obuf \HEX1[6]~output ( + .i(!\inst9|inst2|Mux0~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[6]), + .obar()); +// synopsys translate_off +defparam \HEX1[6]~output .bus_hold = "false"; +defparam \HEX1[6]~output .open_drain_output = "false"; +// synopsys translate_on -assign \inst|altsyncram_component|auto_generated|q_a [2] = \inst|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus [0]; -assign \inst|altsyncram_component|auto_generated|q_a [7] = \inst|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus [1]; -assign \inst|altsyncram_component|auto_generated|q_a [9] = \inst|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus [2]; -assign \inst|altsyncram_component|auto_generated|q_a [10] = \inst|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus [3]; +// Location: IOOBUF_X66_Y54_N30 +fiftyfivenm_io_obuf \HEX1[5]~output ( + .i(\inst9|inst2|Mux1~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[5]), + .obar()); +// synopsys translate_off +defparam \HEX1[5]~output .bus_hold = "false"; +defparam \HEX1[5]~output .open_drain_output = "false"; +// synopsys translate_on -assign \inst|altsyncram_component|auto_generated|q_a [0] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [0]; -assign \inst|altsyncram_component|auto_generated|q_a [3] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [1]; -assign \inst|altsyncram_component|auto_generated|q_a [6] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [2]; -assign \inst|altsyncram_component|auto_generated|q_a [8] = \inst|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus [3]; +// Location: IOOBUF_X64_Y54_N2 +fiftyfivenm_io_obuf \HEX1[4]~output ( + .i(\inst9|inst2|Mux2~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[4]), + .obar()); +// synopsys translate_off +defparam \HEX1[4]~output .bus_hold = "false"; +defparam \HEX1[4]~output .open_drain_output = "false"; +// synopsys translate_on -assign \inst|altsyncram_component|auto_generated|q_a [1] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [0]; -assign \inst|altsyncram_component|auto_generated|q_a [4] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [1]; -assign \inst|altsyncram_component|auto_generated|q_a [5] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [2]; -assign \inst|altsyncram_component|auto_generated|q_a [12] = \inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [3]; +// Location: IOOBUF_X60_Y54_N9 +fiftyfivenm_io_obuf \HEX1[3]~output ( + .i(\inst9|inst2|Mux3~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[3]), + .obar()); +// synopsys translate_off +defparam \HEX1[3]~output .bus_hold = "false"; +defparam \HEX1[3]~output .open_drain_output = "false"; +// synopsys translate_on -assign \inst|altsyncram_component|auto_generated|q_a [11] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [0]; -assign \inst|altsyncram_component|auto_generated|q_a [13] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [1]; -assign \inst|altsyncram_component|auto_generated|q_a [14] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [2]; -assign \inst|altsyncram_component|auto_generated|q_a [15] = \inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [3]; +// Location: IOOBUF_X78_Y49_N2 +fiftyfivenm_io_obuf \HEX1[2]~output ( + .i(\inst9|inst2|Mux4~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[2]), + .obar()); +// synopsys translate_off +defparam \HEX1[2]~output .bus_hold = "false"; +defparam \HEX1[2]~output .open_drain_output = "false"; +// synopsys translate_on -// Location: LCCOMB_X44_Y48_N20 -fiftyfivenm_lcell_comb \~QUARTUS_CREATED_GND~I ( -// Equation(s): -// \~QUARTUS_CREATED_GND~I_combout = GND +// Location: IOOBUF_X78_Y49_N9 +fiftyfivenm_io_obuf \HEX1[1]~output ( + .i(\inst9|inst2|Mux5~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[1]), + .obar()); +// synopsys translate_off +defparam \HEX1[1]~output .bus_hold = "false"; +defparam \HEX1[1]~output .open_drain_output = "false"; +// synopsys translate_on - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(gnd), - .cin(gnd), - .combout(\~QUARTUS_CREATED_GND~I_combout ), - .cout()); +// Location: IOOBUF_X69_Y54_N23 +fiftyfivenm_io_obuf \HEX1[0]~output ( + .i(\inst9|inst2|Mux6~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX1[0]), + .obar()); // synopsys translate_off -defparam \~QUARTUS_CREATED_GND~I .lut_mask = 16'h0000; -defparam \~QUARTUS_CREATED_GND~I .sum_lutc_input = "datac"; +defparam \HEX1[0]~output .bus_hold = "false"; +defparam \HEX1[0]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X54_Y0_N2 -fiftyfivenm_io_obuf \GSENSOR_CS_n~output ( - .i(vcc), +// Location: IOOBUF_X78_Y43_N9 +fiftyfivenm_io_obuf \HEX2[6]~output ( + .i(!\inst9|inst3|Mux0~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(GSENSOR_CS_n), + .o(HEX2[6]), .obar()); // synopsys translate_off -defparam \GSENSOR_CS_n~output .bus_hold = "false"; -defparam \GSENSOR_CS_n~output .open_drain_output = "false"; +defparam \HEX2[6]~output .bus_hold = "false"; +defparam \HEX2[6]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X38_Y0_N23 -fiftyfivenm_io_obuf \GSENSOR_SDO~output ( - .i(vcc), +// Location: IOOBUF_X78_Y35_N2 +fiftyfivenm_io_obuf \HEX2[5]~output ( + .i(\inst9|inst3|Mux1~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(GSENSOR_SDO), + .o(HEX2[5]), .obar()); // synopsys translate_off -defparam \GSENSOR_SDO~output .bus_hold = "false"; -defparam \GSENSOR_SDO~output .open_drain_output = "false"; +defparam \HEX2[5]~output .bus_hold = "false"; +defparam \HEX2[5]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X29_Y0_N30 -fiftyfivenm_io_obuf \PWM~output ( - .i(\inst14|PWM_OUT~q ), +// Location: IOOBUF_X78_Y43_N2 +fiftyfivenm_io_obuf \HEX2[4]~output ( + .i(\inst9|inst3|Mux2~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(PWM), + .o(HEX2[4]), .obar()); // synopsys translate_off -defparam \PWM~output .bus_hold = "false"; -defparam \PWM~output .open_drain_output = "false"; +defparam \HEX2[4]~output .bus_hold = "false"; +defparam \HEX2[4]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X31_Y0_N9 -fiftyfivenm_io_obuf \STBY~output ( - .i(\SW[9]~input_o ), +// Location: IOOBUF_X78_Y44_N2 +fiftyfivenm_io_obuf \HEX2[3]~output ( + .i(\inst9|inst3|Mux3~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(STBY), + .o(HEX2[3]), .obar()); // synopsys translate_off -defparam \STBY~output .bus_hold = "false"; -defparam \STBY~output .open_drain_output = "false"; +defparam \HEX2[3]~output .bus_hold = "false"; +defparam \HEX2[3]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X29_Y0_N2 -fiftyfivenm_io_obuf \IN1~output ( - .i(\SW[8]~input_o ), +// Location: IOOBUF_X69_Y54_N16 +fiftyfivenm_io_obuf \HEX2[2]~output ( + .i(\inst9|inst3|Mux4~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX2[2]), + .obar()); +// synopsys translate_off +defparam \HEX2[2]~output .bus_hold = "false"; +defparam \HEX2[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X66_Y54_N2 +fiftyfivenm_io_obuf \HEX2[1]~output ( + .i(\inst9|inst3|Mux5~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX2[1]), + .obar()); +// synopsys translate_off +defparam \HEX2[1]~output .bus_hold = "false"; +defparam \HEX2[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X78_Y44_N9 +fiftyfivenm_io_obuf \HEX2[0]~output ( + .i(\inst9|inst3|Mux6~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX2[0]), + .obar()); +// synopsys translate_off +defparam \HEX2[0]~output .bus_hold = "false"; +defparam \HEX2[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X78_Y43_N16 +fiftyfivenm_io_obuf \HEX3[6]~output ( + .i(!\inst9|inst4|Mux0~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX3[6]), + .obar()); +// synopsys translate_off +defparam \HEX3[6]~output .bus_hold = "false"; +defparam \HEX3[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X78_Y41_N2 +fiftyfivenm_io_obuf \HEX3[5]~output ( + .i(\inst9|inst4|Mux1~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX3[5]), + .obar()); +// synopsys translate_off +defparam \HEX3[5]~output .bus_hold = "false"; +defparam \HEX3[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X78_Y41_N9 +fiftyfivenm_io_obuf \HEX3[4]~output ( + .i(\inst9|inst4|Mux2~0_combout ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(HEX3[4]), + .obar()); +// synopsys translate_off +defparam \HEX3[4]~output .bus_hold = "false"; +defparam \HEX3[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X69_Y54_N9 +fiftyfivenm_io_obuf \HEX3[3]~output ( + .i(\inst9|inst4|Mux3~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(IN1), + .o(HEX3[3]), .obar()); // synopsys translate_off -defparam \IN1~output .bus_hold = "false"; -defparam \IN1~output .open_drain_output = "false"; +defparam \HEX3[3]~output .bus_hold = "false"; +defparam \HEX3[3]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X29_Y0_N9 -fiftyfivenm_io_obuf \IN2~output ( - .i(\SW[7]~input_o ), +// Location: IOOBUF_X78_Y33_N2 +fiftyfivenm_io_obuf \HEX3[2]~output ( + .i(\inst9|inst4|Mux4~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(IN2), + .o(HEX3[2]), .obar()); // synopsys translate_off -defparam \IN2~output .bus_hold = "false"; -defparam \IN2~output .open_drain_output = "false"; +defparam \HEX3[2]~output .bus_hold = "false"; +defparam \HEX3[2]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X74_Y54_N23 -fiftyfivenm_io_obuf \HEX0[6]~output ( - .i(!\inst9|inst1|Mux0~0_combout ), +// Location: IOOBUF_X78_Y33_N9 +fiftyfivenm_io_obuf \HEX3[1]~output ( + .i(\inst9|inst4|Mux5~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[6]), + .o(HEX3[1]), .obar()); // synopsys translate_off -defparam \HEX0[6]~output .bus_hold = "false"; -defparam \HEX0[6]~output .open_drain_output = "false"; +defparam \HEX3[1]~output .bus_hold = "false"; +defparam \HEX3[1]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X74_Y54_N16 -fiftyfivenm_io_obuf \HEX0[5]~output ( - .i(\inst9|inst1|Mux1~0_combout ), +// Location: IOOBUF_X78_Y35_N23 +fiftyfivenm_io_obuf \HEX3[0]~output ( + .i(\inst9|inst4|Mux6~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[5]), + .o(HEX3[0]), .obar()); // synopsys translate_off -defparam \HEX0[5]~output .bus_hold = "false"; -defparam \HEX0[5]~output .open_drain_output = "false"; +defparam \HEX3[0]~output .bus_hold = "false"; +defparam \HEX3[0]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X74_Y54_N2 -fiftyfivenm_io_obuf \HEX0[4]~output ( - .i(\inst9|inst1|Mux2~0_combout ), +// Location: IOOBUF_X78_Y35_N16 +fiftyfivenm_io_obuf \HEX4[6]~output ( + .i(!\inst9|inst5|Mux0~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[4]), + .o(HEX4[6]), .obar()); // synopsys translate_off -defparam \HEX0[4]~output .bus_hold = "false"; -defparam \HEX0[4]~output .open_drain_output = "false"; +defparam \HEX4[6]~output .bus_hold = "false"; +defparam \HEX4[6]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X62_Y54_N30 -fiftyfivenm_io_obuf \HEX0[3]~output ( - .i(\inst9|inst1|Mux3~0_combout ), +// Location: IOOBUF_X78_Y40_N9 +fiftyfivenm_io_obuf \HEX4[5]~output ( + .i(\inst9|inst5|Mux1~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[3]), + .o(HEX4[5]), .obar()); // synopsys translate_off -defparam \HEX0[3]~output .bus_hold = "false"; -defparam \HEX0[3]~output .open_drain_output = "false"; +defparam \HEX4[5]~output .bus_hold = "false"; +defparam \HEX4[5]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X60_Y54_N2 -fiftyfivenm_io_obuf \HEX0[2]~output ( - .i(\inst9|inst1|Mux4~0_combout ), +// Location: IOOBUF_X78_Y45_N23 +fiftyfivenm_io_obuf \HEX4[4]~output ( + .i(\inst9|inst5|Mux2~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[2]), + .o(HEX4[4]), .obar()); // synopsys translate_off -defparam \HEX0[2]~output .bus_hold = "false"; -defparam \HEX0[2]~output .open_drain_output = "false"; +defparam \HEX4[4]~output .bus_hold = "false"; +defparam \HEX4[4]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X74_Y54_N9 -fiftyfivenm_io_obuf \HEX0[1]~output ( - .i(\inst9|inst1|Mux5~0_combout ), +// Location: IOOBUF_X78_Y42_N16 +fiftyfivenm_io_obuf \HEX4[3]~output ( + .i(\inst9|inst5|Mux3~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[1]), + .o(HEX4[3]), .obar()); // synopsys translate_off -defparam \HEX0[1]~output .bus_hold = "false"; -defparam \HEX0[1]~output .open_drain_output = "false"; +defparam \HEX4[3]~output .bus_hold = "false"; +defparam \HEX4[3]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X58_Y54_N16 -fiftyfivenm_io_obuf \HEX0[0]~output ( - .i(\inst9|inst1|Mux6~0_combout ), +// Location: IOOBUF_X78_Y40_N23 +fiftyfivenm_io_obuf \HEX4[2]~output ( + .i(\inst9|inst5|Mux4~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX0[0]), + .o(HEX4[2]), .obar()); // synopsys translate_off -defparam \HEX0[0]~output .bus_hold = "false"; -defparam \HEX0[0]~output .open_drain_output = "false"; +defparam \HEX4[2]~output .bus_hold = "false"; +defparam \HEX4[2]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X69_Y54_N30 -fiftyfivenm_io_obuf \HEX1[6]~output ( - .i(!\inst9|inst2|Mux0~0_combout ), +// Location: IOOBUF_X78_Y40_N2 +fiftyfivenm_io_obuf \HEX4[1]~output ( + .i(\inst9|inst5|Mux5~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[6]), + .o(HEX4[1]), .obar()); // synopsys translate_off -defparam \HEX1[6]~output .bus_hold = "false"; -defparam \HEX1[6]~output .open_drain_output = "false"; +defparam \HEX4[1]~output .bus_hold = "false"; +defparam \HEX4[1]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X66_Y54_N30 -fiftyfivenm_io_obuf \HEX1[5]~output ( - .i(\inst9|inst2|Mux1~0_combout ), +// Location: IOOBUF_X78_Y40_N16 +fiftyfivenm_io_obuf \HEX4[0]~output ( + .i(\inst9|inst5|Mux6~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[5]), + .o(HEX4[0]), .obar()); // synopsys translate_off -defparam \HEX1[5]~output .bus_hold = "false"; -defparam \HEX1[5]~output .open_drain_output = "false"; +defparam \HEX4[0]~output .bus_hold = "false"; +defparam \HEX4[0]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X64_Y54_N2 -fiftyfivenm_io_obuf \HEX1[4]~output ( - .i(\inst9|inst2|Mux2~0_combout ), +// Location: IOOBUF_X78_Y34_N2 +fiftyfivenm_io_obuf \HEX5[6]~output ( + .i(!\inst9|inst6|Mux0~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[4]), + .o(HEX5[6]), .obar()); // synopsys translate_off -defparam \HEX1[4]~output .bus_hold = "false"; -defparam \HEX1[4]~output .open_drain_output = "false"; +defparam \HEX5[6]~output .bus_hold = "false"; +defparam \HEX5[6]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X60_Y54_N9 -fiftyfivenm_io_obuf \HEX1[3]~output ( - .i(\inst9|inst2|Mux3~0_combout ), +// Location: IOOBUF_X78_Y34_N16 +fiftyfivenm_io_obuf \HEX5[5]~output ( + .i(\inst9|inst6|Mux1~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[3]), + .o(HEX5[5]), .obar()); // synopsys translate_off -defparam \HEX1[3]~output .bus_hold = "false"; -defparam \HEX1[3]~output .open_drain_output = "false"; +defparam \HEX5[5]~output .bus_hold = "false"; +defparam \HEX5[5]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y49_N2 -fiftyfivenm_io_obuf \HEX1[2]~output ( - .i(\inst9|inst2|Mux4~0_combout ), +// Location: IOOBUF_X78_Y34_N9 +fiftyfivenm_io_obuf \HEX5[4]~output ( + .i(\inst9|inst6|Mux2~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[2]), + .o(HEX5[4]), .obar()); // synopsys translate_off -defparam \HEX1[2]~output .bus_hold = "false"; -defparam \HEX1[2]~output .open_drain_output = "false"; +defparam \HEX5[4]~output .bus_hold = "false"; +defparam \HEX5[4]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y49_N9 -fiftyfivenm_io_obuf \HEX1[1]~output ( - .i(\inst9|inst2|Mux5~0_combout ), +// Location: IOOBUF_X78_Y34_N24 +fiftyfivenm_io_obuf \HEX5[3]~output ( + .i(\inst9|inst6|Mux3~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[1]), + .o(HEX5[3]), .obar()); // synopsys translate_off -defparam \HEX1[1]~output .bus_hold = "false"; -defparam \HEX1[1]~output .open_drain_output = "false"; +defparam \HEX5[3]~output .bus_hold = "false"; +defparam \HEX5[3]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X69_Y54_N23 -fiftyfivenm_io_obuf \HEX1[0]~output ( - .i(\inst9|inst2|Mux6~0_combout ), +// Location: IOOBUF_X78_Y37_N16 +fiftyfivenm_io_obuf \HEX5[2]~output ( + .i(\inst9|inst6|Mux4~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX1[0]), + .o(HEX5[2]), .obar()); // synopsys translate_off -defparam \HEX1[0]~output .bus_hold = "false"; -defparam \HEX1[0]~output .open_drain_output = "false"; +defparam \HEX5[2]~output .bus_hold = "false"; +defparam \HEX5[2]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y43_N9 -fiftyfivenm_io_obuf \HEX2[6]~output ( - .i(!\inst9|inst3|Mux0~0_combout ), +// Location: IOOBUF_X78_Y42_N2 +fiftyfivenm_io_obuf \HEX5[1]~output ( + .i(\inst9|inst6|Mux5~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[6]), + .o(HEX5[1]), .obar()); // synopsys translate_off -defparam \HEX2[6]~output .bus_hold = "false"; -defparam \HEX2[6]~output .open_drain_output = "false"; +defparam \HEX5[1]~output .bus_hold = "false"; +defparam \HEX5[1]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y35_N2 -fiftyfivenm_io_obuf \HEX2[5]~output ( - .i(\inst9|inst3|Mux1~0_combout ), +// Location: IOOBUF_X78_Y45_N9 +fiftyfivenm_io_obuf \HEX5[0]~output ( + .i(\inst9|inst6|Mux6~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[5]), + .o(HEX5[0]), .obar()); // synopsys translate_off -defparam \HEX2[5]~output .bus_hold = "false"; -defparam \HEX2[5]~output .open_drain_output = "false"; +defparam \HEX5[0]~output .bus_hold = "false"; +defparam \HEX5[0]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y43_N2 -fiftyfivenm_io_obuf \HEX2[4]~output ( - .i(\inst9|inst3|Mux2~0_combout ), +// Location: IOOBUF_X49_Y54_N9 +fiftyfivenm_io_obuf \LEDR[9]~output ( + .i(\inst6|DATA [9]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[4]), + .o(LEDR[9]), .obar()); // synopsys translate_off -defparam \HEX2[4]~output .bus_hold = "false"; -defparam \HEX2[4]~output .open_drain_output = "false"; +defparam \LEDR[9]~output .bus_hold = "false"; +defparam \LEDR[9]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y44_N2 -fiftyfivenm_io_obuf \HEX2[3]~output ( - .i(\inst9|inst3|Mux3~0_combout ), +// Location: IOOBUF_X51_Y54_N9 +fiftyfivenm_io_obuf \LEDR[8]~output ( + .i(\inst6|DATA [8]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[3]), + .o(LEDR[8]), .obar()); // synopsys translate_off -defparam \HEX2[3]~output .bus_hold = "false"; -defparam \HEX2[3]~output .open_drain_output = "false"; +defparam \LEDR[8]~output .bus_hold = "false"; +defparam \LEDR[8]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X69_Y54_N16 -fiftyfivenm_io_obuf \HEX2[2]~output ( - .i(\inst9|inst3|Mux4~0_combout ), +// Location: IOOBUF_X56_Y54_N9 +fiftyfivenm_io_obuf \LEDR[7]~output ( + .i(\inst6|DATA [7]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[2]), + .o(LEDR[7]), .obar()); // synopsys translate_off -defparam \HEX2[2]~output .bus_hold = "false"; -defparam \HEX2[2]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X66_Y54_N2 -fiftyfivenm_io_obuf \HEX2[1]~output ( - .i(\inst9|inst3|Mux5~0_combout ), +defparam \LEDR[7]~output .bus_hold = "false"; +defparam \LEDR[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X66_Y54_N23 +fiftyfivenm_io_obuf \LEDR[6]~output ( + .i(\inst6|DATA [6]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[1]), + .o(LEDR[6]), .obar()); // synopsys translate_off -defparam \HEX2[1]~output .bus_hold = "false"; -defparam \HEX2[1]~output .open_drain_output = "false"; +defparam \LEDR[6]~output .bus_hold = "false"; +defparam \LEDR[6]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y44_N9 -fiftyfivenm_io_obuf \HEX2[0]~output ( - .i(\inst9|inst3|Mux6~0_combout ), +// Location: IOOBUF_X58_Y54_N23 +fiftyfivenm_io_obuf \LEDR[5]~output ( + .i(\inst6|DATA [5]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX2[0]), + .o(LEDR[5]), .obar()); // synopsys translate_off -defparam \HEX2[0]~output .bus_hold = "false"; -defparam \HEX2[0]~output .open_drain_output = "false"; +defparam \LEDR[5]~output .bus_hold = "false"; +defparam \LEDR[5]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y43_N16 -fiftyfivenm_io_obuf \HEX3[6]~output ( - .i(!\inst9|inst4|Mux0~0_combout ), +// Location: IOOBUF_X56_Y54_N30 +fiftyfivenm_io_obuf \LEDR[4]~output ( + .i(\inst6|DATA [4]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[6]), + .o(LEDR[4]), .obar()); // synopsys translate_off -defparam \HEX3[6]~output .bus_hold = "false"; -defparam \HEX3[6]~output .open_drain_output = "false"; +defparam \LEDR[4]~output .bus_hold = "false"; +defparam \LEDR[4]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y41_N2 -fiftyfivenm_io_obuf \HEX3[5]~output ( - .i(\inst9|inst4|Mux1~0_combout ), +// Location: IOOBUF_X46_Y54_N9 +fiftyfivenm_io_obuf \LEDR[3]~output ( + .i(\inst6|DATA [3]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[5]), + .o(LEDR[3]), .obar()); // synopsys translate_off -defparam \HEX3[5]~output .bus_hold = "false"; -defparam \HEX3[5]~output .open_drain_output = "false"; +defparam \LEDR[3]~output .bus_hold = "false"; +defparam \LEDR[3]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y41_N9 -fiftyfivenm_io_obuf \HEX3[4]~output ( - .i(\inst9|inst4|Mux2~0_combout ), +// Location: IOOBUF_X51_Y54_N16 +fiftyfivenm_io_obuf \LEDR[2]~output ( + .i(\inst6|DATA [2]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[4]), + .o(LEDR[2]), .obar()); // synopsys translate_off -defparam \HEX3[4]~output .bus_hold = "false"; -defparam \HEX3[4]~output .open_drain_output = "false"; +defparam \LEDR[2]~output .bus_hold = "false"; +defparam \LEDR[2]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X69_Y54_N9 -fiftyfivenm_io_obuf \HEX3[3]~output ( - .i(\inst9|inst4|Mux3~0_combout ), +// Location: IOOBUF_X46_Y54_N23 +fiftyfivenm_io_obuf \LEDR[1]~output ( + .i(\inst6|DATA [1]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[3]), + .o(LEDR[1]), .obar()); // synopsys translate_off -defparam \HEX3[3]~output .bus_hold = "false"; -defparam \HEX3[3]~output .open_drain_output = "false"; +defparam \LEDR[1]~output .bus_hold = "false"; +defparam \LEDR[1]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y33_N2 -fiftyfivenm_io_obuf \HEX3[2]~output ( - .i(\inst9|inst4|Mux4~0_combout ), +// Location: IOOBUF_X46_Y54_N2 +fiftyfivenm_io_obuf \LEDR[0]~output ( + .i(\inst6|DATA [0]), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[2]), + .o(LEDR[0]), .obar()); // synopsys translate_off -defparam \HEX3[2]~output .bus_hold = "false"; -defparam \HEX3[2]~output .open_drain_output = "false"; +defparam \LEDR[0]~output .bus_hold = "false"; +defparam \LEDR[0]~output .open_drain_output = "false"; // synopsys translate_on -// Location: IOOBUF_X78_Y33_N9 -fiftyfivenm_io_obuf \HEX3[1]~output ( - .i(\inst9|inst4|Mux5~0_combout ), +// Location: IOOBUF_X38_Y0_N30 +fiftyfivenm_io_obuf \GSENSOR_SDI~output ( + .i(\inst13|inst|Selector30~0_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[1]), + .o(GSENSOR_SDI), .obar()); // synopsys translate_off -defparam \HEX3[1]~output .bus_hold = "false"; -defparam \HEX3[1]~output .open_drain_output = "false"; +defparam \GSENSOR_SDI~output .bus_hold = "false"; +defparam \GSENSOR_SDI~output .open_drain_output = "true"; // synopsys translate_on -// Location: IOOBUF_X78_Y35_N23 -fiftyfivenm_io_obuf \HEX3[0]~output ( - .i(\inst9|inst4|Mux6~0_combout ), +// Location: IOOBUF_X51_Y0_N16 +fiftyfivenm_io_obuf \GSENSOR_SCLK~output ( + .i(\inst13|inst|scl~1_combout ), .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(HEX3[0]), + .o(GSENSOR_SCLK), .obar()); // synopsys translate_off -defparam \HEX3[0]~output .bus_hold = "false"; -defparam \HEX3[0]~output .open_drain_output = "false"; +defparam \GSENSOR_SCLK~output .bus_hold = "false"; +defparam \GSENSOR_SCLK~output .open_drain_output = "true"; +// synopsys translate_on + +// Location: IOIBUF_X46_Y54_N29 +fiftyfivenm_io_ibuf \KEY0~input ( + .i(KEY0), + .ibar(gnd), + .nsleep(vcc), + .o(\KEY0~input_o )); +// synopsys translate_off +defparam \KEY0~input .bus_hold = "false"; +defparam \KEY0~input .listen_to_nsleep_signal = "false"; +defparam \KEY0~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X78_Y29_N22 +fiftyfivenm_io_ibuf \clock_50~input ( + .i(clock_50), + .ibar(gnd), + .nsleep(vcc), + .o(\clock_50~input_o )); +// synopsys translate_off +defparam \clock_50~input .bus_hold = "false"; +defparam \clock_50~input .listen_to_nsleep_signal = "false"; +defparam \clock_50~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: PLL_4 +fiftyfivenm_pll \inst1|altpll_component|auto_generated|pll1 ( + .areset(!\KEY0~input_o ), + .pfdena(vcc), + .fbin(\inst1|altpll_component|auto_generated|wire_pll1_fbout ), + .phaseupdown(gnd), + .phasestep(gnd), + .scandata(gnd), + .scanclk(gnd), + .scanclkena(vcc), + .configupdate(gnd), + .clkswitch(gnd), + .inclk({gnd,\clock_50~input_o }), + .phasecounterselect(3'b000), + .phasedone(), + .scandataout(), + .scandone(), + .activeclock(), + .locked(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .vcooverrange(), + .vcounderrange(), + .fbout(\inst1|altpll_component|auto_generated|wire_pll1_fbout ), + .clk(\inst1|altpll_component|auto_generated|pll1_CLK_bus ), + .clkbad()); +// synopsys translate_off +defparam \inst1|altpll_component|auto_generated|pll1 .auto_settings = "false"; +defparam \inst1|altpll_component|auto_generated|pll1 .bandwidth_type = "medium"; +defparam \inst1|altpll_component|auto_generated|pll1 .c0_high = 30; +defparam \inst1|altpll_component|auto_generated|pll1 .c0_initial = 1; +defparam \inst1|altpll_component|auto_generated|pll1 .c0_low = 30; +defparam \inst1|altpll_component|auto_generated|pll1 .c0_mode = "even"; +defparam \inst1|altpll_component|auto_generated|pll1 .c0_ph = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c1_high = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c1_initial = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c1_low = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c1_mode = "bypass"; +defparam \inst1|altpll_component|auto_generated|pll1 .c1_ph = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off"; +defparam \inst1|altpll_component|auto_generated|pll1 .c2_high = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c2_initial = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c2_low = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c2_mode = "bypass"; +defparam \inst1|altpll_component|auto_generated|pll1 .c2_ph = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off"; +defparam \inst1|altpll_component|auto_generated|pll1 .c3_high = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c3_initial = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c3_low = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c3_mode = "bypass"; +defparam \inst1|altpll_component|auto_generated|pll1 .c3_ph = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off"; +defparam \inst1|altpll_component|auto_generated|pll1 .c4_high = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c4_initial = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c4_low = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c4_mode = "bypass"; +defparam \inst1|altpll_component|auto_generated|pll1 .c4_ph = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off"; +defparam \inst1|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1; +defparam \inst1|altpll_component|auto_generated|pll1 .clk0_counter = "c0"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk0_divide_by = 5; +defparam \inst1|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50; +defparam \inst1|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1; +defparam \inst1|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk1_counter = "unused"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk1_divide_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50; +defparam \inst1|altpll_component|auto_generated|pll1 .clk1_multiply_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk2_counter = "unused"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk2_divide_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50; +defparam \inst1|altpll_component|auto_generated|pll1 .clk2_multiply_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk2_phase_shift = "0"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk3_counter = "unused"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk3_divide_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50; +defparam \inst1|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk4_counter = "unused"; +defparam \inst1|altpll_component|auto_generated|pll1 .clk4_divide_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50; +defparam \inst1|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0"; +defparam \inst1|altpll_component|auto_generated|pll1 .compensate_clock = "clock0"; +defparam \inst1|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000; +defparam \inst1|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27; +defparam \inst1|altpll_component|auto_generated|pll1 .m = 12; +defparam \inst1|altpll_component|auto_generated|pll1 .m_initial = 1; +defparam \inst1|altpll_component|auto_generated|pll1 .m_ph = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .n = 1; +defparam \inst1|altpll_component|auto_generated|pll1 .operation_mode = "normal"; +defparam \inst1|altpll_component|auto_generated|pll1 .pfd_max = 200000; +defparam \inst1|altpll_component|auto_generated|pll1 .pfd_min = 3076; +defparam \inst1|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off"; +defparam \inst1|altpll_component|auto_generated|pll1 .simulation_type = "functional"; +defparam \inst1|altpll_component|auto_generated|pll1 .switch_over_type = "auto"; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_center = 1538; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_divide_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto"; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_max = 3333; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_min = 1538; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_multiply_by = 0; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 208; +defparam \inst1|altpll_component|auto_generated|pll1 .vco_post_scale = 2; +// synopsys translate_on + +// Location: CLKCTRL_G8 +fiftyfivenm_clkctrl \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\inst1|altpll_component|auto_generated|wire_pll1_clk [0]}), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )); +// synopsys translate_off +defparam \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock"; +defparam \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: IOOBUF_X78_Y35_N16 -fiftyfivenm_io_obuf \HEX4[6]~output ( - .i(!\inst9|inst5|Mux0~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[6]), - .obar()); +// Location: LCCOMB_X1_Y38_N0 +fiftyfivenm_lcell_comb \inst5|count_100kHz[0]~6 ( +// Equation(s): +// \inst5|count_100kHz[0]~6_combout = \inst5|count_100kHz [0] $ (VCC) +// \inst5|count_100kHz[0]~7 = CARRY(\inst5|count_100kHz [0]) + + .dataa(gnd), + .datab(\inst5|count_100kHz [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\inst5|count_100kHz[0]~6_combout ), + .cout(\inst5|count_100kHz[0]~7 )); // synopsys translate_off -defparam \HEX4[6]~output .bus_hold = "false"; -defparam \HEX4[6]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[0]~6 .lut_mask = 16'h33CC; +defparam \inst5|count_100kHz[0]~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X78_Y40_N9 -fiftyfivenm_io_obuf \HEX4[5]~output ( - .i(\inst9|inst5|Mux1~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[5]), - .obar()); +// Location: LCCOMB_X1_Y38_N6 +fiftyfivenm_lcell_comb \inst5|count_100kHz[3]~12 ( +// Equation(s): +// \inst5|count_100kHz[3]~12_combout = (\inst5|count_100kHz [3] & (!\inst5|count_100kHz[2]~11 )) # (!\inst5|count_100kHz [3] & ((\inst5|count_100kHz[2]~11 ) # (GND))) +// \inst5|count_100kHz[3]~13 = CARRY((!\inst5|count_100kHz[2]~11 ) # (!\inst5|count_100kHz [3])) + + .dataa(\inst5|count_100kHz [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_100kHz[2]~11 ), + .combout(\inst5|count_100kHz[3]~12_combout ), + .cout(\inst5|count_100kHz[3]~13 )); // synopsys translate_off -defparam \HEX4[5]~output .bus_hold = "false"; -defparam \HEX4[5]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[3]~12 .lut_mask = 16'h5A5F; +defparam \inst5|count_100kHz[3]~12 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: IOOBUF_X78_Y45_N23 -fiftyfivenm_io_obuf \HEX4[4]~output ( - .i(\inst9|inst5|Mux2~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[4]), - .obar()); +// Location: LCCOMB_X1_Y38_N8 +fiftyfivenm_lcell_comb \inst5|count_100kHz[4]~14 ( +// Equation(s): +// \inst5|count_100kHz[4]~14_combout = (\inst5|count_100kHz [4] & (\inst5|count_100kHz[3]~13 $ (GND))) # (!\inst5|count_100kHz [4] & (!\inst5|count_100kHz[3]~13 & VCC)) +// \inst5|count_100kHz[4]~15 = CARRY((\inst5|count_100kHz [4] & !\inst5|count_100kHz[3]~13 )) + + .dataa(gnd), + .datab(\inst5|count_100kHz [4]), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_100kHz[3]~13 ), + .combout(\inst5|count_100kHz[4]~14_combout ), + .cout(\inst5|count_100kHz[4]~15 )); // synopsys translate_off -defparam \HEX4[4]~output .bus_hold = "false"; -defparam \HEX4[4]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[4]~14 .lut_mask = 16'hC30C; +defparam \inst5|count_100kHz[4]~14 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: IOOBUF_X78_Y42_N16 -fiftyfivenm_io_obuf \HEX4[3]~output ( - .i(\inst9|inst5|Mux3~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[3]), - .obar()); +// Location: FF_X1_Y38_N9 +dffeas \inst5|count_100kHz[4] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_100kHz[4]~14_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan0~1_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_100kHz [4]), + .prn(vcc)); // synopsys translate_off -defparam \HEX4[3]~output .bus_hold = "false"; -defparam \HEX4[3]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[4] .is_wysiwyg = "true"; +defparam \inst5|count_100kHz[4] .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X78_Y40_N23 -fiftyfivenm_io_obuf \HEX4[2]~output ( - .i(\inst9|inst5|Mux4~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[2]), - .obar()); +// Location: LCCOMB_X1_Y38_N10 +fiftyfivenm_lcell_comb \inst5|count_100kHz[5]~16 ( +// Equation(s): +// \inst5|count_100kHz[5]~16_combout = \inst5|count_100kHz[4]~15 $ (\inst5|count_100kHz [5]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst5|count_100kHz [5]), + .cin(\inst5|count_100kHz[4]~15 ), + .combout(\inst5|count_100kHz[5]~16_combout ), + .cout()); // synopsys translate_off -defparam \HEX4[2]~output .bus_hold = "false"; -defparam \HEX4[2]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[5]~16 .lut_mask = 16'h0FF0; +defparam \inst5|count_100kHz[5]~16 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: IOOBUF_X78_Y40_N2 -fiftyfivenm_io_obuf \HEX4[1]~output ( - .i(\inst9|inst5|Mux5~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[1]), - .obar()); +// Location: FF_X1_Y38_N11 +dffeas \inst5|count_100kHz[5] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_100kHz[5]~16_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan0~1_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_100kHz [5]), + .prn(vcc)); // synopsys translate_off -defparam \HEX4[1]~output .bus_hold = "false"; -defparam \HEX4[1]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[5] .is_wysiwyg = "true"; +defparam \inst5|count_100kHz[5] .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X78_Y40_N16 -fiftyfivenm_io_obuf \HEX4[0]~output ( - .i(\inst9|inst5|Mux6~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX4[0]), - .obar()); +// Location: LCCOMB_X1_Y38_N24 +fiftyfivenm_lcell_comb \inst5|LessThan0~1 ( +// Equation(s): +// \inst5|LessThan0~1_combout = (!\inst5|LessThan0~0_combout & (\inst5|count_100kHz [4] & \inst5|count_100kHz [5])) + + .dataa(\inst5|LessThan0~0_combout ), + .datab(gnd), + .datac(\inst5|count_100kHz [4]), + .datad(\inst5|count_100kHz [5]), + .cin(gnd), + .combout(\inst5|LessThan0~1_combout ), + .cout()); // synopsys translate_off -defparam \HEX4[0]~output .bus_hold = "false"; -defparam \HEX4[0]~output .open_drain_output = "false"; +defparam \inst5|LessThan0~1 .lut_mask = 16'h5000; +defparam \inst5|LessThan0~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X78_Y34_N2 -fiftyfivenm_io_obuf \HEX5[6]~output ( - .i(!\inst9|inst6|Mux0~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[6]), - .obar()); +// Location: FF_X1_Y38_N1 +dffeas \inst5|count_100kHz[0] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_100kHz[0]~6_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan0~1_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_100kHz [0]), + .prn(vcc)); // synopsys translate_off -defparam \HEX5[6]~output .bus_hold = "false"; -defparam \HEX5[6]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[0] .is_wysiwyg = "true"; +defparam \inst5|count_100kHz[0] .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X78_Y34_N16 -fiftyfivenm_io_obuf \HEX5[5]~output ( - .i(\inst9|inst6|Mux1~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[5]), - .obar()); +// Location: LCCOMB_X1_Y38_N2 +fiftyfivenm_lcell_comb \inst5|count_100kHz[1]~8 ( +// Equation(s): +// \inst5|count_100kHz[1]~8_combout = (\inst5|count_100kHz [1] & (!\inst5|count_100kHz[0]~7 )) # (!\inst5|count_100kHz [1] & ((\inst5|count_100kHz[0]~7 ) # (GND))) +// \inst5|count_100kHz[1]~9 = CARRY((!\inst5|count_100kHz[0]~7 ) # (!\inst5|count_100kHz [1])) + + .dataa(gnd), + .datab(\inst5|count_100kHz [1]), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_100kHz[0]~7 ), + .combout(\inst5|count_100kHz[1]~8_combout ), + .cout(\inst5|count_100kHz[1]~9 )); // synopsys translate_off -defparam \HEX5[5]~output .bus_hold = "false"; -defparam \HEX5[5]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[1]~8 .lut_mask = 16'h3C3F; +defparam \inst5|count_100kHz[1]~8 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: IOOBUF_X78_Y34_N9 -fiftyfivenm_io_obuf \HEX5[4]~output ( - .i(\inst9|inst6|Mux2~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[4]), - .obar()); +// Location: FF_X1_Y38_N3 +dffeas \inst5|count_100kHz[1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_100kHz[1]~8_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan0~1_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_100kHz [1]), + .prn(vcc)); // synopsys translate_off -defparam \HEX5[4]~output .bus_hold = "false"; -defparam \HEX5[4]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[1] .is_wysiwyg = "true"; +defparam \inst5|count_100kHz[1] .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X78_Y34_N24 -fiftyfivenm_io_obuf \HEX5[3]~output ( - .i(\inst9|inst6|Mux3~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[3]), - .obar()); +// Location: LCCOMB_X1_Y38_N4 +fiftyfivenm_lcell_comb \inst5|count_100kHz[2]~10 ( +// Equation(s): +// \inst5|count_100kHz[2]~10_combout = (\inst5|count_100kHz [2] & (\inst5|count_100kHz[1]~9 $ (GND))) # (!\inst5|count_100kHz [2] & (!\inst5|count_100kHz[1]~9 & VCC)) +// \inst5|count_100kHz[2]~11 = CARRY((\inst5|count_100kHz [2] & !\inst5|count_100kHz[1]~9 )) + + .dataa(gnd), + .datab(\inst5|count_100kHz [2]), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_100kHz[1]~9 ), + .combout(\inst5|count_100kHz[2]~10_combout ), + .cout(\inst5|count_100kHz[2]~11 )); // synopsys translate_off -defparam \HEX5[3]~output .bus_hold = "false"; -defparam \HEX5[3]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[2]~10 .lut_mask = 16'hC30C; +defparam \inst5|count_100kHz[2]~10 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: IOOBUF_X78_Y37_N16 -fiftyfivenm_io_obuf \HEX5[2]~output ( - .i(\inst9|inst6|Mux4~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[2]), - .obar()); +// Location: FF_X1_Y38_N5 +dffeas \inst5|count_100kHz[2] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_100kHz[2]~10_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan0~1_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_100kHz [2]), + .prn(vcc)); // synopsys translate_off -defparam \HEX5[2]~output .bus_hold = "false"; -defparam \HEX5[2]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[2] .is_wysiwyg = "true"; +defparam \inst5|count_100kHz[2] .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X78_Y42_N2 -fiftyfivenm_io_obuf \HEX5[1]~output ( - .i(\inst9|inst6|Mux5~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[1]), - .obar()); +// Location: FF_X1_Y38_N7 +dffeas \inst5|count_100kHz[3] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_100kHz[3]~12_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan0~1_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_100kHz [3]), + .prn(vcc)); // synopsys translate_off -defparam \HEX5[1]~output .bus_hold = "false"; -defparam \HEX5[1]~output .open_drain_output = "false"; +defparam \inst5|count_100kHz[3] .is_wysiwyg = "true"; +defparam \inst5|count_100kHz[3] .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X78_Y45_N9 -fiftyfivenm_io_obuf \HEX5[0]~output ( - .i(\inst9|inst6|Mux6~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(HEX5[0]), - .obar()); +// Location: LCCOMB_X1_Y38_N26 +fiftyfivenm_lcell_comb \inst5|LessThan0~0 ( +// Equation(s): +// \inst5|LessThan0~0_combout = (!\inst5|count_100kHz [3] & (!\inst5|count_100kHz [0] & (!\inst5|count_100kHz [2] & !\inst5|count_100kHz [1]))) + + .dataa(\inst5|count_100kHz [3]), + .datab(\inst5|count_100kHz [0]), + .datac(\inst5|count_100kHz [2]), + .datad(\inst5|count_100kHz [1]), + .cin(gnd), + .combout(\inst5|LessThan0~0_combout ), + .cout()); // synopsys translate_off -defparam \HEX5[0]~output .bus_hold = "false"; -defparam \HEX5[0]~output .open_drain_output = "false"; +defparam \inst5|LessThan0~0 .lut_mask = 16'h0001; +defparam \inst5|LessThan0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X49_Y54_N9 -fiftyfivenm_io_obuf \LEDR[9]~output ( - .i(\inst6|DATA [9]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[9]), - .obar()); +// Location: LCCOMB_X1_Y38_N18 +fiftyfivenm_lcell_comb \inst5|clock_100kHz_int~0 ( +// Equation(s): +// \inst5|clock_100kHz_int~0_combout = \inst5|clock_100kHz_int~q $ (((!\inst5|LessThan0~0_combout & (\inst5|count_100kHz [4] & \inst5|count_100kHz [5])))) + + .dataa(\inst5|LessThan0~0_combout ), + .datab(\inst5|count_100kHz [4]), + .datac(\inst5|clock_100kHz_int~q ), + .datad(\inst5|count_100kHz [5]), + .cin(gnd), + .combout(\inst5|clock_100kHz_int~0_combout ), + .cout()); // synopsys translate_off -defparam \LEDR[9]~output .bus_hold = "false"; -defparam \LEDR[9]~output .open_drain_output = "false"; +defparam \inst5|clock_100kHz_int~0 .lut_mask = 16'hB4F0; +defparam \inst5|clock_100kHz_int~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X51_Y54_N9 -fiftyfivenm_io_obuf \LEDR[8]~output ( - .i(\inst6|DATA [8]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[8]), - .obar()); +// Location: FF_X1_Y38_N19 +dffeas \inst5|clock_100kHz_int ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|clock_100kHz_int~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|clock_100kHz_int~q ), + .prn(vcc)); // synopsys translate_off -defparam \LEDR[8]~output .bus_hold = "false"; -defparam \LEDR[8]~output .open_drain_output = "false"; +defparam \inst5|clock_100kHz_int .is_wysiwyg = "true"; +defparam \inst5|clock_100kHz_int .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X56_Y54_N9 -fiftyfivenm_io_obuf \LEDR[7]~output ( - .i(\inst6|DATA [7]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[7]), - .obar()); +// Location: LCCOMB_X1_Y38_N14 +fiftyfivenm_lcell_comb \inst5|clock_100kHz~feeder ( +// Equation(s): +// \inst5|clock_100kHz~feeder_combout = \inst5|clock_100kHz_int~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst5|clock_100kHz_int~q ), + .cin(gnd), + .combout(\inst5|clock_100kHz~feeder_combout ), + .cout()); // synopsys translate_off -defparam \LEDR[7]~output .bus_hold = "false"; -defparam \LEDR[7]~output .open_drain_output = "false"; +defparam \inst5|clock_100kHz~feeder .lut_mask = 16'hFF00; +defparam \inst5|clock_100kHz~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X66_Y54_N23 -fiftyfivenm_io_obuf \LEDR[6]~output ( - .i(\inst6|DATA [6]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[6]), - .obar()); +// Location: FF_X1_Y38_N15 +dffeas \inst5|clock_100kHz ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|clock_100kHz~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|clock_100kHz~q ), + .prn(vcc)); // synopsys translate_off -defparam \LEDR[6]~output .bus_hold = "false"; -defparam \LEDR[6]~output .open_drain_output = "false"; +defparam \inst5|clock_100kHz .is_wysiwyg = "true"; +defparam \inst5|clock_100kHz .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X58_Y54_N23 -fiftyfivenm_io_obuf \LEDR[5]~output ( - .i(\inst6|DATA [5]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[5]), - .obar()); +// Location: CLKCTRL_G0 +fiftyfivenm_clkctrl \inst5|clock_100kHz~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\inst5|clock_100kHz~q }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\inst5|clock_100kHz~clkctrl_outclk )); // synopsys translate_off -defparam \LEDR[5]~output .bus_hold = "false"; -defparam \LEDR[5]~output .open_drain_output = "false"; +defparam \inst5|clock_100kHz~clkctrl .clock_type = "global clock"; +defparam \inst5|clock_100kHz~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: IOOBUF_X56_Y54_N30 -fiftyfivenm_io_obuf \LEDR[4]~output ( - .i(\inst6|DATA [4]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[4]), - .obar()); +// Location: LCCOMB_X56_Y38_N8 +fiftyfivenm_lcell_comb \inst13|inst|count~1 ( +// Equation(s): +// \inst13|inst|count~1_combout = ((\inst13|inst|count [1] & \inst13|inst|stretch~q )) # (!\inst13|inst|count [0]) + + .dataa(\inst13|inst|count [1]), + .datab(\inst13|inst|stretch~q ), + .datac(\inst13|inst|count [0]), + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst|count~1_combout ), + .cout()); // synopsys translate_off -defparam \LEDR[4]~output .bus_hold = "false"; -defparam \LEDR[4]~output .open_drain_output = "false"; +defparam \inst13|inst|count~1 .lut_mask = 16'h8F8F; +defparam \inst13|inst|count~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X46_Y54_N9 -fiftyfivenm_io_obuf \LEDR[3]~output ( - .i(\inst6|DATA [3]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[3]), - .obar()); +// Location: LCCOMB_X62_Y35_N4 +fiftyfivenm_lcell_comb \inst1|altpll_component|auto_generated|pll_lock_sync~feeder ( +// Equation(s): +// \inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout = VCC + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .cout()); // synopsys translate_off -defparam \LEDR[3]~output .bus_hold = "false"; -defparam \LEDR[3]~output .open_drain_output = "false"; +defparam \inst1|altpll_component|auto_generated|pll_lock_sync~feeder .lut_mask = 16'hFFFF; +defparam \inst1|altpll_component|auto_generated|pll_lock_sync~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X51_Y54_N16 -fiftyfivenm_io_obuf \LEDR[2]~output ( - .i(\inst6|DATA [2]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[2]), - .obar()); +// Location: FF_X62_Y35_N5 +dffeas \inst1|altpll_component|auto_generated|pll_lock_sync ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .d(\inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .asdata(vcc), + .clrn(\KEY0~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .prn(vcc)); // synopsys translate_off -defparam \LEDR[2]~output .bus_hold = "false"; -defparam \LEDR[2]~output .open_drain_output = "false"; +defparam \inst1|altpll_component|auto_generated|pll_lock_sync .is_wysiwyg = "true"; +defparam \inst1|altpll_component|auto_generated|pll_lock_sync .power_up = "low"; // synopsys translate_on -// Location: IOOBUF_X46_Y54_N23 -fiftyfivenm_io_obuf \LEDR[1]~output ( - .i(\inst6|DATA [1]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[1]), - .obar()); -// synopsys translate_off -defparam \LEDR[1]~output .bus_hold = "false"; -defparam \LEDR[1]~output .open_drain_output = "false"; -// synopsys translate_on +// Location: LCCOMB_X56_Y38_N28 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[7]~0 ( +// Equation(s): +// \inst13|inst14|data_out[7]~0_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & \inst1|altpll_component|auto_generated|wire_pll1_locked ) -// Location: IOOBUF_X46_Y54_N2 -fiftyfivenm_io_obuf \LEDR[0]~output ( - .i(\inst6|DATA [0]), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(LEDR[0]), - .obar()); + .dataa(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datab(gnd), + .datac(gnd), + .datad(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .cin(gnd), + .combout(\inst13|inst14|data_out[7]~0_combout ), + .cout()); // synopsys translate_off -defparam \LEDR[0]~output .bus_hold = "false"; -defparam \LEDR[0]~output .open_drain_output = "false"; +defparam \inst13|inst14|data_out[7]~0 .lut_mask = 16'hAA00; +defparam \inst13|inst14|data_out[7]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X38_Y0_N30 -fiftyfivenm_io_obuf \GSENSOR_SDI~output ( - .i(\inst13|inst|Selector30~0_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(GSENSOR_SDI), - .obar()); +// Location: CLKCTRL_G12 +fiftyfivenm_clkctrl \inst13|inst14|data_out[7]~0clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\inst13|inst14|data_out[7]~0_combout }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\inst13|inst14|data_out[7]~0clkctrl_outclk )); // synopsys translate_off -defparam \GSENSOR_SDI~output .bus_hold = "false"; -defparam \GSENSOR_SDI~output .open_drain_output = "true"; +defparam \inst13|inst14|data_out[7]~0clkctrl .clock_type = "global clock"; +defparam \inst13|inst14|data_out[7]~0clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: IOOBUF_X51_Y0_N16 -fiftyfivenm_io_obuf \GSENSOR_SCLK~output ( - .i(\inst13|inst|scl~1_combout ), - .oe(vcc), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(GSENSOR_SCLK), - .obar()); +// Location: FF_X56_Y38_N9 +dffeas \inst13|inst|count[0] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst|count~1_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|count [0]), + .prn(vcc)); // synopsys translate_off -defparam \GSENSOR_SCLK~output .bus_hold = "false"; -defparam \GSENSOR_SCLK~output .open_drain_output = "true"; +defparam \inst13|inst|count[0] .is_wysiwyg = "true"; +defparam \inst13|inst|count[0] .power_up = "low"; // synopsys translate_on -// Location: IOIBUF_X46_Y54_N29 -fiftyfivenm_io_ibuf \KEY0~input ( - .i(KEY0), +// Location: IOIBUF_X51_Y0_N15 +fiftyfivenm_io_ibuf \GSENSOR_SCLK~input ( + .i(GSENSOR_SCLK), .ibar(gnd), .nsleep(vcc), - .o(\KEY0~input_o )); + .o(\GSENSOR_SCLK~input_o )); // synopsys translate_off -defparam \KEY0~input .bus_hold = "false"; -defparam \KEY0~input .listen_to_nsleep_signal = "false"; -defparam \KEY0~input .simulate_z_as = "z"; +defparam \GSENSOR_SCLK~input .bus_hold = "false"; +defparam \GSENSOR_SCLK~input .listen_to_nsleep_signal = "false"; +defparam \GSENSOR_SCLK~input .simulate_z_as = "z"; // synopsys translate_on -// Location: IOIBUF_X78_Y29_N22 -fiftyfivenm_io_ibuf \clock_50~input ( - .i(clock_50), - .ibar(gnd), - .nsleep(vcc), - .o(\clock_50~input_o )); +// Location: LCCOMB_X56_Y38_N26 +fiftyfivenm_lcell_comb \inst13|inst|stretch~0 ( +// Equation(s): +// \inst13|inst|stretch~0_combout = (\inst13|inst|count [1] & (!\GSENSOR_SCLK~input_o & ((\inst13|inst|stretch~q ) # (!\inst13|inst|count [0])))) # (!\inst13|inst|count [1] & (((\inst13|inst|stretch~q )))) + + .dataa(\inst13|inst|count [1]), + .datab(\inst13|inst|count [0]), + .datac(\inst13|inst|stretch~q ), + .datad(\GSENSOR_SCLK~input_o ), + .cin(gnd), + .combout(\inst13|inst|stretch~0_combout ), + .cout()); // synopsys translate_off -defparam \clock_50~input .bus_hold = "false"; -defparam \clock_50~input .listen_to_nsleep_signal = "false"; -defparam \clock_50~input .simulate_z_as = "z"; +defparam \inst13|inst|stretch~0 .lut_mask = 16'h50F2; +defparam \inst13|inst|stretch~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: PLL_4 -fiftyfivenm_pll \inst1|altpll_component|auto_generated|pll1 ( - .areset(!\KEY0~input_o ), - .pfdena(vcc), - .fbin(\inst1|altpll_component|auto_generated|wire_pll1_fbout ), - .phaseupdown(gnd), - .phasestep(gnd), - .scandata(gnd), - .scanclk(gnd), - .scanclkena(vcc), - .configupdate(gnd), - .clkswitch(gnd), - .inclk({gnd,\clock_50~input_o }), - .phasecounterselect(3'b000), - .phasedone(), - .scandataout(), - .scandone(), - .activeclock(), - .locked(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .vcooverrange(), - .vcounderrange(), - .fbout(\inst1|altpll_component|auto_generated|wire_pll1_fbout ), - .clk(\inst1|altpll_component|auto_generated|pll1_CLK_bus ), - .clkbad()); +// Location: FF_X56_Y38_N27 +dffeas \inst13|inst|stretch ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst|stretch~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|stretch~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst1|altpll_component|auto_generated|pll1 .auto_settings = "false"; -defparam \inst1|altpll_component|auto_generated|pll1 .bandwidth_type = "medium"; -defparam \inst1|altpll_component|auto_generated|pll1 .c0_high = 30; -defparam \inst1|altpll_component|auto_generated|pll1 .c0_initial = 1; -defparam \inst1|altpll_component|auto_generated|pll1 .c0_low = 30; -defparam \inst1|altpll_component|auto_generated|pll1 .c0_mode = "even"; -defparam \inst1|altpll_component|auto_generated|pll1 .c0_ph = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c1_high = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c1_initial = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c1_low = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c1_mode = "bypass"; -defparam \inst1|altpll_component|auto_generated|pll1 .c1_ph = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c1_use_casc_in = "off"; -defparam \inst1|altpll_component|auto_generated|pll1 .c2_high = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c2_initial = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c2_low = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c2_mode = "bypass"; -defparam \inst1|altpll_component|auto_generated|pll1 .c2_ph = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c2_use_casc_in = "off"; -defparam \inst1|altpll_component|auto_generated|pll1 .c3_high = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c3_initial = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c3_low = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c3_mode = "bypass"; -defparam \inst1|altpll_component|auto_generated|pll1 .c3_ph = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c3_use_casc_in = "off"; -defparam \inst1|altpll_component|auto_generated|pll1 .c4_high = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c4_initial = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c4_low = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c4_mode = "bypass"; -defparam \inst1|altpll_component|auto_generated|pll1 .c4_ph = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .c4_use_casc_in = "off"; -defparam \inst1|altpll_component|auto_generated|pll1 .charge_pump_current_bits = 1; -defparam \inst1|altpll_component|auto_generated|pll1 .clk0_counter = "c0"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk0_divide_by = 5; -defparam \inst1|altpll_component|auto_generated|pll1 .clk0_duty_cycle = 50; -defparam \inst1|altpll_component|auto_generated|pll1 .clk0_multiply_by = 1; -defparam \inst1|altpll_component|auto_generated|pll1 .clk0_phase_shift = "0"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk1_counter = "unused"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk1_divide_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk1_duty_cycle = 50; -defparam \inst1|altpll_component|auto_generated|pll1 .clk1_multiply_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk1_phase_shift = "0"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk2_counter = "unused"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk2_divide_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk2_duty_cycle = 50; -defparam \inst1|altpll_component|auto_generated|pll1 .clk2_multiply_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk2_phase_shift = "0"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk3_counter = "unused"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk3_divide_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk3_duty_cycle = 50; -defparam \inst1|altpll_component|auto_generated|pll1 .clk3_multiply_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk3_phase_shift = "0"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk4_counter = "unused"; -defparam \inst1|altpll_component|auto_generated|pll1 .clk4_divide_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk4_duty_cycle = 50; -defparam \inst1|altpll_component|auto_generated|pll1 .clk4_multiply_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .clk4_phase_shift = "0"; -defparam \inst1|altpll_component|auto_generated|pll1 .compensate_clock = "clock0"; -defparam \inst1|altpll_component|auto_generated|pll1 .inclk0_input_frequency = 20000; -defparam \inst1|altpll_component|auto_generated|pll1 .inclk1_input_frequency = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .loop_filter_c_bits = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .loop_filter_r_bits = 27; -defparam \inst1|altpll_component|auto_generated|pll1 .m = 12; -defparam \inst1|altpll_component|auto_generated|pll1 .m_initial = 1; -defparam \inst1|altpll_component|auto_generated|pll1 .m_ph = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .n = 1; -defparam \inst1|altpll_component|auto_generated|pll1 .operation_mode = "normal"; -defparam \inst1|altpll_component|auto_generated|pll1 .pfd_max = 200000; -defparam \inst1|altpll_component|auto_generated|pll1 .pfd_min = 3076; -defparam \inst1|altpll_component|auto_generated|pll1 .self_reset_on_loss_lock = "off"; -defparam \inst1|altpll_component|auto_generated|pll1 .simulation_type = "functional"; -defparam \inst1|altpll_component|auto_generated|pll1 .switch_over_type = "auto"; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_center = 1538; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_divide_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_frequency_control = "auto"; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_max = 3333; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_min = 1538; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_multiply_by = 0; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_phase_shift_step = 208; -defparam \inst1|altpll_component|auto_generated|pll1 .vco_post_scale = 2; +defparam \inst13|inst|stretch .is_wysiwyg = "true"; +defparam \inst13|inst|stretch .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y38_N30 +fiftyfivenm_lcell_comb \inst13|inst|count~0 ( +// Equation(s): +// \inst13|inst|count~0_combout = (\inst13|inst|count [0] & ((\inst13|inst|stretch~q ) # (!\inst13|inst|count [1]))) # (!\inst13|inst|count [0] & ((\inst13|inst|count [1]))) + + .dataa(\inst13|inst|stretch~q ), + .datab(gnd), + .datac(\inst13|inst|count [0]), + .datad(\inst13|inst|count [1]), + .cin(gnd), + .combout(\inst13|inst|count~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|count~0 .lut_mask = 16'hAFF0; +defparam \inst13|inst|count~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X56_Y38_N29 +dffeas \inst13|inst|count[1] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst|count~0_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|count [1]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|count[1] .is_wysiwyg = "true"; +defparam \inst13|inst|count[1] .power_up = "low"; // synopsys translate_on -// Location: CLKCTRL_G8 -fiftyfivenm_clkctrl \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl ( +// Location: LCCOMB_X56_Y38_N2 +fiftyfivenm_lcell_comb \inst13|inst|data_clk~0 ( +// Equation(s): +// \inst13|inst|data_clk~0_combout = !\inst13|inst|count [1] + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|count [1]), + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst|data_clk~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|data_clk~0 .lut_mask = 16'h0F0F; +defparam \inst13|inst|data_clk~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X56_Y38_N3 +dffeas \inst13|inst|data_clk ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst|data_clk~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_clk~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_clk .is_wysiwyg = "true"; +defparam \inst13|inst|data_clk .power_up = "low"; +// synopsys translate_on + +// Location: CLKCTRL_G14 +fiftyfivenm_clkctrl \inst13|inst|data_clk~clkctrl ( .ena(vcc), - .inclk({vcc,vcc,vcc,\inst1|altpll_component|auto_generated|wire_pll1_clk [0]}), + .inclk({vcc,vcc,vcc,\inst13|inst|data_clk~q }), .clkselect(2'b00), .devclrn(devclrn), .devpor(devpor), - .outclk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk )); + .outclk(\inst13|inst|data_clk~clkctrl_outclk )); // synopsys translate_off -defparam \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .clock_type = "global clock"; -defparam \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl .ena_register_mode = "none"; +defparam \inst13|inst|data_clk~clkctrl .clock_type = "global clock"; +defparam \inst13|inst|data_clk~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N10 -fiftyfivenm_lcell_comb \inst5|count_100kHz[0]~6 ( +// Location: LCCOMB_X55_Y35_N6 +fiftyfivenm_lcell_comb \inst13|inst|bit_cnt[0]~0 ( // Equation(s): -// \inst5|count_100kHz[0]~6_combout = \inst5|count_100kHz [0] $ (VCC) -// \inst5|count_100kHz[0]~7 = CARRY(\inst5|count_100kHz [0]) +// \inst13|inst|bit_cnt[0]~0_combout = !\inst13|inst|bit_cnt [0] - .dataa(\inst5|count_100kHz [0]), + .dataa(gnd), .datab(gnd), - .datac(gnd), - .datad(vcc), + .datac(\inst13|inst|bit_cnt [0]), + .datad(gnd), .cin(gnd), - .combout(\inst5|count_100kHz[0]~6_combout ), - .cout(\inst5|count_100kHz[0]~7 )); + .combout(\inst13|inst|bit_cnt[0]~0_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_100kHz[0]~6 .lut_mask = 16'h55AA; -defparam \inst5|count_100kHz[0]~6 .sum_lutc_input = "datac"; +defparam \inst13|inst|bit_cnt[0]~0 .lut_mask = 16'h0F0F; +defparam \inst13|inst|bit_cnt[0]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N12 -fiftyfivenm_lcell_comb \inst5|count_100kHz[1]~8 ( +// Location: LCCOMB_X55_Y35_N22 +fiftyfivenm_lcell_comb \inst13|inst|Selector27~0 ( // Equation(s): -// \inst5|count_100kHz[1]~8_combout = (\inst5|count_100kHz [1] & (!\inst5|count_100kHz[0]~7 )) # (!\inst5|count_100kHz [1] & ((\inst5|count_100kHz[0]~7 ) # (GND))) -// \inst5|count_100kHz[1]~9 = CARRY((!\inst5|count_100kHz[0]~7 ) # (!\inst5|count_100kHz [1])) +// \inst13|inst|Selector27~0_combout = \inst13|inst|bit_cnt [1] $ (\inst13|inst|bit_cnt [0]) - .dataa(\inst5|count_100kHz [1]), + .dataa(gnd), .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_100kHz[0]~7 ), - .combout(\inst5|count_100kHz[1]~8_combout ), - .cout(\inst5|count_100kHz[1]~9 )); + .datac(\inst13|inst|bit_cnt [1]), + .datad(\inst13|inst|bit_cnt [0]), + .cin(gnd), + .combout(\inst13|inst|Selector27~0_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_100kHz[1]~8 .lut_mask = 16'h5A5F; -defparam \inst5|count_100kHz[1]~8 .sum_lutc_input = "cin"; +defparam \inst13|inst|Selector27~0 .lut_mask = 16'h0FF0; +defparam \inst13|inst|Selector27~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N14 -fiftyfivenm_lcell_comb \inst5|count_100kHz[2]~10 ( +// Location: LCCOMB_X55_Y35_N4 +fiftyfivenm_lcell_comb \inst13|inst|bit_cnt[1]~feeder ( // Equation(s): -// \inst5|count_100kHz[2]~10_combout = (\inst5|count_100kHz [2] & (\inst5|count_100kHz[1]~9 $ (GND))) # (!\inst5|count_100kHz [2] & (!\inst5|count_100kHz[1]~9 & VCC)) -// \inst5|count_100kHz[2]~11 = CARRY((\inst5|count_100kHz [2] & !\inst5|count_100kHz[1]~9 )) +// \inst13|inst|bit_cnt[1]~feeder_combout = \inst13|inst|Selector27~0_combout .dataa(gnd), - .datab(\inst5|count_100kHz [2]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_100kHz[1]~9 ), - .combout(\inst5|count_100kHz[2]~10_combout ), - .cout(\inst5|count_100kHz[2]~11 )); + .datab(gnd), + .datac(\inst13|inst|Selector27~0_combout ), + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst|bit_cnt[1]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_100kHz[2]~10 .lut_mask = 16'hC30C; -defparam \inst5|count_100kHz[2]~10 .sum_lutc_input = "cin"; +defparam \inst13|inst|bit_cnt[1]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst|bit_cnt[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X2_Y38_N15 -dffeas \inst5|count_100kHz[2] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_100kHz[2]~10_combout ), +// Location: FF_X55_Y35_N5 +dffeas \inst13|inst|bit_cnt[1] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|bit_cnt[1]~feeder_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan0~1_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst13|inst|WideOr12~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_100kHz [2]), + .q(\inst13|inst|bit_cnt [1]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_100kHz[2] .is_wysiwyg = "true"; -defparam \inst5|count_100kHz[2] .power_up = "low"; +defparam \inst13|inst|bit_cnt[1] .is_wysiwyg = "true"; +defparam \inst13|inst|bit_cnt[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N16 -fiftyfivenm_lcell_comb \inst5|count_100kHz[3]~12 ( +// Location: LCCOMB_X55_Y35_N20 +fiftyfivenm_lcell_comb \inst13|inst|Add1~0 ( // Equation(s): -// \inst5|count_100kHz[3]~12_combout = (\inst5|count_100kHz [3] & (!\inst5|count_100kHz[2]~11 )) # (!\inst5|count_100kHz [3] & ((\inst5|count_100kHz[2]~11 ) # (GND))) -// \inst5|count_100kHz[3]~13 = CARRY((!\inst5|count_100kHz[2]~11 ) # (!\inst5|count_100kHz [3])) +// \inst13|inst|Add1~0_combout = \inst13|inst|bit_cnt [2] $ (((\inst13|inst|bit_cnt [0] & \inst13|inst|bit_cnt [1]))) - .dataa(gnd), - .datab(\inst5|count_100kHz [3]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_100kHz[2]~11 ), - .combout(\inst5|count_100kHz[3]~12_combout ), - .cout(\inst5|count_100kHz[3]~13 )); + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|bit_cnt [1]), + .datac(\inst13|inst|bit_cnt [2]), + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst|Add1~0_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_100kHz[3]~12 .lut_mask = 16'h3C3F; -defparam \inst5|count_100kHz[3]~12 .sum_lutc_input = "cin"; +defparam \inst13|inst|Add1~0 .lut_mask = 16'h7878; +defparam \inst13|inst|Add1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X2_Y38_N17 -dffeas \inst5|count_100kHz[3] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_100kHz[3]~12_combout ), - .asdata(vcc), - .clrn(vcc), +// Location: FF_X55_Y35_N27 +dffeas \inst13|inst|bit_cnt[2] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst|Add1~0_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan0~1_combout ), - .sload(gnd), - .ena(vcc), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|WideOr12~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_100kHz [3]), + .q(\inst13|inst|bit_cnt [2]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_100kHz[3] .is_wysiwyg = "true"; -defparam \inst5|count_100kHz[3] .power_up = "low"; +defparam \inst13|inst|bit_cnt[2] .is_wysiwyg = "true"; +defparam \inst13|inst|bit_cnt[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N18 -fiftyfivenm_lcell_comb \inst5|count_100kHz[4]~14 ( +// Location: LCCOMB_X56_Y35_N12 +fiftyfivenm_lcell_comb \inst13|inst|state~14 ( // Equation(s): -// \inst5|count_100kHz[4]~14_combout = (\inst5|count_100kHz [4] & (\inst5|count_100kHz[3]~13 $ (GND))) # (!\inst5|count_100kHz [4] & (!\inst5|count_100kHz[3]~13 & VCC)) -// \inst5|count_100kHz[4]~15 = CARRY((\inst5|count_100kHz [4] & !\inst5|count_100kHz[3]~13 )) +// \inst13|inst|state~14_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|state.rd~q & (\inst13|inst|bit_cnt [2] & \inst13|inst|bit_cnt [1]))) + + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|state.rd~q ), + .datac(\inst13|inst|bit_cnt [2]), + .datad(\inst13|inst|bit_cnt [1]), + .cin(gnd), + .combout(\inst13|inst|state~14_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|state~14 .lut_mask = 16'h8000; +defparam \inst13|inst|state~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y35_N10 +fiftyfivenm_lcell_comb \inst13|inst|state.mstr_ack~feeder ( +// Equation(s): +// \inst13|inst|state.mstr_ack~feeder_combout = \inst13|inst|state~14_combout .dataa(gnd), - .datab(\inst5|count_100kHz [4]), + .datab(gnd), .datac(gnd), - .datad(vcc), - .cin(\inst5|count_100kHz[3]~13 ), - .combout(\inst5|count_100kHz[4]~14_combout ), - .cout(\inst5|count_100kHz[4]~15 )); + .datad(\inst13|inst|state~14_combout ), + .cin(gnd), + .combout(\inst13|inst|state.mstr_ack~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_100kHz[4]~14 .lut_mask = 16'hC30C; -defparam \inst5|count_100kHz[4]~14 .sum_lutc_input = "cin"; +defparam \inst13|inst|state.mstr_ack~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst|state.mstr_ack~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X2_Y38_N19 -dffeas \inst5|count_100kHz[4] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_100kHz[4]~14_combout ), +// Location: FF_X56_Y35_N11 +dffeas \inst13|inst|state.mstr_ack ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|state.mstr_ack~feeder_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan0~1_combout ), + .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_100kHz [4]), + .q(\inst13|inst|state.mstr_ack~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_100kHz[4] .is_wysiwyg = "true"; -defparam \inst5|count_100kHz[4] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X2_Y38_N20 -fiftyfivenm_lcell_comb \inst5|count_100kHz[5]~16 ( -// Equation(s): -// \inst5|count_100kHz[5]~16_combout = \inst5|count_100kHz[4]~15 $ (\inst5|count_100kHz [5]) - - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst5|count_100kHz [5]), - .cin(\inst5|count_100kHz[4]~15 ), - .combout(\inst5|count_100kHz[5]~16_combout ), - .cout()); -// synopsys translate_off -defparam \inst5|count_100kHz[5]~16 .lut_mask = 16'h0FF0; -defparam \inst5|count_100kHz[5]~16 .sum_lutc_input = "cin"; +defparam \inst13|inst|state.mstr_ack .is_wysiwyg = "true"; +defparam \inst13|inst|state.mstr_ack .power_up = "low"; // synopsys translate_on -// Location: FF_X2_Y38_N21 -dffeas \inst5|count_100kHz[5] ( +// Location: FF_X54_Y38_N19 +dffeas \inst|state.decode ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_100kHz[5]~16_combout ), - .asdata(vcc), - .clrn(vcc), + .d(gnd), + .asdata(\inst|state.fetch~q ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan0~1_combout ), - .sload(gnd), + .sclr(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_100kHz [5]), + .q(\inst|state.decode~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_100kHz[5] .is_wysiwyg = "true"; -defparam \inst5|count_100kHz[5] .power_up = "low"; +defparam \inst|state.decode .is_wysiwyg = "true"; +defparam \inst|state.decode .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N28 -fiftyfivenm_lcell_comb \inst5|LessThan0~1 ( +// Location: LCCOMB_X55_Y38_N22 +fiftyfivenm_lcell_comb \inst|state~50 ( // Equation(s): -// \inst5|LessThan0~1_combout = (\inst5|count_100kHz [4] & (!\inst5|LessThan0~0_combout & \inst5|count_100kHz [5])) +// \inst|state~50_combout = (\inst|altsyncram_component|auto_generated|q_a [11] & (!\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state~32_combout )) - .dataa(gnd), - .datab(\inst5|count_100kHz [4]), - .datac(\inst5|LessThan0~0_combout ), - .datad(\inst5|count_100kHz [5]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|state~32_combout ), .cin(gnd), - .combout(\inst5|LessThan0~1_combout ), + .combout(\inst|state~50_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan0~1 .lut_mask = 16'h0C00; -defparam \inst5|LessThan0~1 .sum_lutc_input = "datac"; +defparam \inst|state~50 .lut_mask = 16'h0A00; +defparam \inst|state~50 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X2_Y38_N11 -dffeas \inst5|count_100kHz[0] ( +// Location: FF_X55_Y38_N23 +dffeas \inst|state.ex_return ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_100kHz[0]~6_combout ), + .d(\inst|state~50_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan0~1_combout ), + .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_100kHz [0]), + .q(\inst|state.ex_return~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_100kHz[0] .is_wysiwyg = "true"; -defparam \inst5|count_100kHz[0] .power_up = "low"; +defparam \inst|state.ex_return .is_wysiwyg = "true"; +defparam \inst|state.ex_return .power_up = "low"; // synopsys translate_on -// Location: FF_X2_Y38_N13 -dffeas \inst5|count_100kHz[1] ( +// Location: LCCOMB_X56_Y41_N8 +fiftyfivenm_lcell_comb \inst10|state.Init~feeder ( +// Equation(s): +// \inst10|state.Init~feeder_combout = VCC + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\inst10|state.Init~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst10|state.Init~feeder .lut_mask = 16'hFFFF; +defparam \inst10|state.Init~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X56_Y41_N9 +dffeas \inst10|state.Init ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_100kHz[1]~8_combout ), + .d(\inst10|state.Init~feeder_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan0~1_combout ), + .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_100kHz [1]), + .q(\inst10|state.Init~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_100kHz[1] .is_wysiwyg = "true"; -defparam \inst5|count_100kHz[1] .power_up = "low"; +defparam \inst10|state.Init .is_wysiwyg = "true"; +defparam \inst10|state.Init .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N26 -fiftyfivenm_lcell_comb \inst5|LessThan0~0 ( +// Location: LCCOMB_X56_Y42_N22 +fiftyfivenm_lcell_comb \inst|PC_stack[9][1]~feeder ( // Equation(s): -// \inst5|LessThan0~0_combout = (!\inst5|count_100kHz [1] & (!\inst5|count_100kHz [3] & (!\inst5|count_100kHz [2] & !\inst5|count_100kHz [0]))) +// \inst|PC_stack[9][1]~feeder_combout = \inst|PC_stack[8][1]~q - .dataa(\inst5|count_100kHz [1]), - .datab(\inst5|count_100kHz [3]), - .datac(\inst5|count_100kHz [2]), - .datad(\inst5|count_100kHz [0]), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst|PC_stack[8][1]~q ), .cin(gnd), - .combout(\inst5|LessThan0~0_combout ), + .combout(\inst|PC_stack[9][1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan0~0 .lut_mask = 16'h0001; -defparam \inst5|LessThan0~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][1]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X2_Y38_N24 -fiftyfivenm_lcell_comb \inst5|clock_100kHz_int~0 ( +// Location: LCCOMB_X55_Y38_N16 +fiftyfivenm_lcell_comb \inst|state~55 ( // Equation(s): -// \inst5|clock_100kHz_int~0_combout = \inst5|clock_100kHz_int~q $ (((!\inst5|LessThan0~0_combout & (\inst5|count_100kHz [4] & \inst5|count_100kHz [5])))) +// \inst|state~55_combout = (!\inst|altsyncram_component|auto_generated|q_a [11] & (!\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state~32_combout )) - .dataa(\inst5|LessThan0~0_combout ), - .datab(\inst5|count_100kHz [4]), - .datac(\inst5|clock_100kHz_int~q ), - .datad(\inst5|count_100kHz [5]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|state~32_combout ), .cin(gnd), - .combout(\inst5|clock_100kHz_int~0_combout ), + .combout(\inst|state~55_combout ), .cout()); // synopsys translate_off -defparam \inst5|clock_100kHz_int~0 .lut_mask = 16'hB4F0; -defparam \inst5|clock_100kHz_int~0 .sum_lutc_input = "datac"; +defparam \inst|state~55 .lut_mask = 16'h0500; +defparam \inst|state~55 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X2_Y38_N25 -dffeas \inst5|clock_100kHz_int ( +// Location: FF_X55_Y38_N17 +dffeas \inst|state.ex_call ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|clock_100kHz_int~0_combout ), + .d(\inst|state~55_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|clock_100kHz_int~q ), + .q(\inst|state.ex_call~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|clock_100kHz_int .is_wysiwyg = "true"; -defparam \inst5|clock_100kHz_int .power_up = "low"; +defparam \inst|state.ex_call .is_wysiwyg = "true"; +defparam \inst|state.ex_call .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N6 -fiftyfivenm_lcell_comb \inst5|clock_100kHz~feeder ( +// Location: LCCOMB_X55_Y42_N8 +fiftyfivenm_lcell_comb \inst|PC_stack[9][0]~1 ( // Equation(s): -// \inst5|clock_100kHz~feeder_combout = \inst5|clock_100kHz_int~q +// \inst|PC_stack[9][0]~1_combout = (\inst1|altpll_component|auto_generated|wire_pll1_locked & (\inst1|altpll_component|auto_generated|pll_lock_sync~q & \inst|state.ex_call~q )) - .dataa(gnd), + .dataa(\inst1|altpll_component|auto_generated|wire_pll1_locked ), .datab(gnd), - .datac(gnd), - .datad(\inst5|clock_100kHz_int~q ), + .datac(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datad(\inst|state.ex_call~q ), .cin(gnd), - .combout(\inst5|clock_100kHz~feeder_combout ), + .combout(\inst|PC_stack[9][0]~1_combout ), .cout()); // synopsys translate_off -defparam \inst5|clock_100kHz~feeder .lut_mask = 16'hFF00; -defparam \inst5|clock_100kHz~feeder .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][0]~1 .lut_mask = 16'hA000; +defparam \inst|PC_stack[9][0]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y38_N7 -dffeas \inst5|clock_100kHz ( +// Location: FF_X56_Y42_N23 +dffeas \inst|PC_stack[9][1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|clock_100kHz~feeder_combout ), + .d(\inst|PC_stack[9][1]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|clock_100kHz~q ), + .q(\inst|PC_stack[9][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|clock_100kHz .is_wysiwyg = "true"; -defparam \inst5|clock_100kHz .power_up = "low"; -// synopsys translate_on - -// Location: CLKCTRL_G1 -fiftyfivenm_clkctrl \inst5|clock_100kHz~clkctrl ( - .ena(vcc), - .inclk({vcc,vcc,vcc,\inst5|clock_100kHz~q }), - .clkselect(2'b00), - .devclrn(devclrn), - .devpor(devpor), - .outclk(\inst5|clock_100kHz~clkctrl_outclk )); -// synopsys translate_off -defparam \inst5|clock_100kHz~clkctrl .clock_type = "global clock"; -defparam \inst5|clock_100kHz~clkctrl .ena_register_mode = "none"; -// synopsys translate_on - -// Location: IOIBUF_X51_Y0_N15 -fiftyfivenm_io_ibuf \GSENSOR_SCLK~input ( - .i(GSENSOR_SCLK), - .ibar(gnd), - .nsleep(vcc), - .o(\GSENSOR_SCLK~input_o )); -// synopsys translate_off -defparam \GSENSOR_SCLK~input .bus_hold = "false"; -defparam \GSENSOR_SCLK~input .listen_to_nsleep_signal = "false"; -defparam \GSENSOR_SCLK~input .simulate_z_as = "z"; +defparam \inst|PC_stack[9][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N14 -fiftyfivenm_lcell_comb \inst13|inst|count~1 ( +// Location: LCCOMB_X56_Y42_N2 +fiftyfivenm_lcell_comb \inst|Selector128~0 ( // Equation(s): -// \inst13|inst|count~1_combout = ((\inst13|inst|count [1] & \inst13|inst|stretch~q )) # (!\inst13|inst|count [0]) +// \inst|Selector128~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][1]~q ))) - .dataa(gnd), - .datab(\inst13|inst|count [1]), - .datac(\inst13|inst|count [0]), - .datad(\inst13|inst|stretch~q ), + .dataa(\inst|PC_stack[9][1]~q ), + .datab(\inst|state.ex_return~q ), + .datac(gnd), + .datad(\inst|PC_stack[7][1]~q ), .cin(gnd), - .combout(\inst13|inst|count~1_combout ), + .combout(\inst|Selector128~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|count~1 .lut_mask = 16'hCF0F; -defparam \inst13|inst|count~1 .sum_lutc_input = "datac"; +defparam \inst|Selector128~0 .lut_mask = 16'hBB88; +defparam \inst|Selector128~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y37_N28 -fiftyfivenm_lcell_comb \inst1|altpll_component|auto_generated|pll_lock_sync~feeder ( +// Location: LCCOMB_X55_Y42_N10 +fiftyfivenm_lcell_comb \inst|PC_stack[0][0]~0 ( // Equation(s): -// \inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout = VCC +// \inst|PC_stack[0][0]~0_combout = (\inst1|altpll_component|auto_generated|wire_pll1_locked & (\inst1|altpll_component|auto_generated|pll_lock_sync~q & ((\inst|state.ex_call~q ) # (\inst|state.ex_return~q )))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(gnd), + .dataa(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .datab(\inst|state.ex_call~q ), + .datac(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), + .combout(\inst|PC_stack[0][0]~0_combout ), .cout()); // synopsys translate_off -defparam \inst1|altpll_component|auto_generated|pll_lock_sync~feeder .lut_mask = 16'hFFFF; -defparam \inst1|altpll_component|auto_generated|pll_lock_sync~feeder .sum_lutc_input = "datac"; +defparam \inst|PC_stack[0][0]~0 .lut_mask = 16'hA080; +defparam \inst|PC_stack[0][0]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y37_N29 -dffeas \inst1|altpll_component|auto_generated|pll_lock_sync ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .d(\inst1|altpll_component|auto_generated|pll_lock_sync~feeder_combout ), +// Location: FF_X56_Y42_N3 +dffeas \inst|PC_stack[8][1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector128~0_combout ), .asdata(vcc), - .clrn(\KEY0~input_o ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .q(\inst|PC_stack[8][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst1|altpll_component|auto_generated|pll_lock_sync .is_wysiwyg = "true"; -defparam \inst1|altpll_component|auto_generated|pll_lock_sync .power_up = "low"; +defparam \inst|PC_stack[8][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N10 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[7]~0 ( +// Location: LCCOMB_X56_Y42_N18 +fiftyfivenm_lcell_comb \inst|Selector117~0 ( // Equation(s): -// \inst13|inst14|data_out[7]~0_combout = (\inst1|altpll_component|auto_generated|wire_pll1_locked & \inst1|altpll_component|auto_generated|pll_lock_sync~q ) +// \inst|Selector117~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][1]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][1]~q )) - .dataa(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .datab(gnd), + .dataa(\inst|PC_stack[6][1]~q ), + .datab(\inst|state.ex_return~q ), .datac(gnd), - .datad(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datad(\inst|PC_stack[8][1]~q ), .cin(gnd), - .combout(\inst13|inst14|data_out[7]~0_combout ), + .combout(\inst|Selector117~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[7]~0 .lut_mask = 16'hAA00; -defparam \inst13|inst14|data_out[7]~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: CLKCTRL_G2 -fiftyfivenm_clkctrl \inst13|inst14|data_out[7]~0clkctrl ( - .ena(vcc), - .inclk({vcc,vcc,vcc,\inst13|inst14|data_out[7]~0_combout }), - .clkselect(2'b00), - .devclrn(devclrn), - .devpor(devpor), - .outclk(\inst13|inst14|data_out[7]~0clkctrl_outclk )); -// synopsys translate_off -defparam \inst13|inst14|data_out[7]~0clkctrl .clock_type = "global clock"; -defparam \inst13|inst14|data_out[7]~0clkctrl .ena_register_mode = "none"; +defparam \inst|Selector117~0 .lut_mask = 16'hEE22; +defparam \inst|Selector117~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y38_N15 -dffeas \inst13|inst|count[0] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst|count~1_combout ), +// Location: FF_X56_Y42_N19 +dffeas \inst|PC_stack[7][1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector117~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|count [0]), + .q(\inst|PC_stack[7][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|count[0] .is_wysiwyg = "true"; -defparam \inst13|inst|count[0] .power_up = "low"; +defparam \inst|PC_stack[7][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N20 -fiftyfivenm_lcell_comb \inst13|inst|stretch~0 ( +// Location: LCCOMB_X56_Y42_N10 +fiftyfivenm_lcell_comb \inst|Selector106~0 ( // Equation(s): -// \inst13|inst|stretch~0_combout = (\inst13|inst|count [1] & (!\GSENSOR_SCLK~input_o & ((\inst13|inst|stretch~q ) # (!\inst13|inst|count [0])))) # (!\inst13|inst|count [1] & (((\inst13|inst|stretch~q )))) +// \inst|Selector106~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][1]~q ))) - .dataa(\GSENSOR_SCLK~input_o ), - .datab(\inst13|inst|count [1]), - .datac(\inst13|inst|stretch~q ), - .datad(\inst13|inst|count [0]), + .dataa(gnd), + .datab(\inst|PC_stack[7][1]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[5][1]~q ), .cin(gnd), - .combout(\inst13|inst|stretch~0_combout ), + .combout(\inst|Selector106~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|stretch~0 .lut_mask = 16'h7074; -defparam \inst13|inst|stretch~0 .sum_lutc_input = "datac"; +defparam \inst|Selector106~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector106~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y38_N21 -dffeas \inst13|inst|stretch ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst|stretch~0_combout ), +// Location: FF_X56_Y42_N11 +dffeas \inst|PC_stack[6][1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector106~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|stretch~q ), + .q(\inst|PC_stack[6][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|stretch .is_wysiwyg = "true"; -defparam \inst13|inst|stretch .power_up = "low"; +defparam \inst|PC_stack[6][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N22 -fiftyfivenm_lcell_comb \inst13|inst|count~0 ( +// Location: LCCOMB_X56_Y42_N20 +fiftyfivenm_lcell_comb \inst|Selector95~0 ( // Equation(s): -// \inst13|inst|count~0_combout = (\inst13|inst|count [0] & ((\inst13|inst|stretch~q ) # (!\inst13|inst|count [1]))) # (!\inst13|inst|count [0] & ((\inst13|inst|count [1]))) +// \inst|Selector95~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][1]~q ))) - .dataa(gnd), - .datab(\inst13|inst|stretch~q ), - .datac(\inst13|inst|count [0]), - .datad(\inst13|inst|count [1]), + .dataa(\inst|PC_stack[6][1]~q ), + .datab(gnd), + .datac(\inst|PC_stack[4][1]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst13|inst|count~0_combout ), + .combout(\inst|Selector95~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|count~0 .lut_mask = 16'hCFF0; -defparam \inst13|inst|count~0 .sum_lutc_input = "datac"; +defparam \inst|Selector95~0 .lut_mask = 16'hAAF0; +defparam \inst|Selector95~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y38_N11 -dffeas \inst13|inst|count[1] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst|count~0_combout ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), +// Location: FF_X56_Y42_N21 +dffeas \inst|PC_stack[5][1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector95~0_combout ), + .asdata(vcc), + .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|count [1]), + .q(\inst|PC_stack[5][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|count[1] .is_wysiwyg = "true"; -defparam \inst13|inst|count[1] .power_up = "low"; +defparam \inst|PC_stack[5][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N12 -fiftyfivenm_lcell_comb \inst13|inst|data_clk~0 ( +// Location: LCCOMB_X56_Y42_N26 +fiftyfivenm_lcell_comb \inst|Selector84~0 ( // Equation(s): -// \inst13|inst|data_clk~0_combout = !\inst13|inst|count [1] +// \inst|Selector84~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][1]~q ))) .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst|count [1]), - .datad(gnd), + .datab(\inst|PC_stack[5][1]~q ), + .datac(\inst|PC_stack[3][1]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst13|inst|data_clk~0_combout ), + .combout(\inst|Selector84~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_clk~0 .lut_mask = 16'h0F0F; -defparam \inst13|inst|data_clk~0 .sum_lutc_input = "datac"; +defparam \inst|Selector84~0 .lut_mask = 16'hCCF0; +defparam \inst|Selector84~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y38_N13 -dffeas \inst13|inst|data_clk ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst|data_clk~0_combout ), +// Location: FF_X56_Y42_N27 +dffeas \inst|PC_stack[4][1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector84~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_clk~q ), + .q(\inst|PC_stack[4][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_clk .is_wysiwyg = "true"; -defparam \inst13|inst|data_clk .power_up = "low"; -// synopsys translate_on - -// Location: CLKCTRL_G9 -fiftyfivenm_clkctrl \inst13|inst|data_clk~clkctrl ( - .ena(vcc), - .inclk({vcc,vcc,vcc,\inst13|inst|data_clk~q }), - .clkselect(2'b00), - .devclrn(devclrn), - .devpor(devpor), - .outclk(\inst13|inst|data_clk~clkctrl_outclk )); -// synopsys translate_off -defparam \inst13|inst|data_clk~clkctrl .clock_type = "global clock"; -defparam \inst13|inst|data_clk~clkctrl .ena_register_mode = "none"; +defparam \inst|PC_stack[4][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y46_N4 -fiftyfivenm_lcell_comb \inst10|state.Init~feeder ( +// Location: LCCOMB_X56_Y42_N28 +fiftyfivenm_lcell_comb \inst|Selector73~0 ( // Equation(s): -// \inst10|state.Init~feeder_combout = VCC +// \inst|Selector73~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][1]~q ))) - .dataa(gnd), - .datab(gnd), + .dataa(\inst|PC_stack[4][1]~q ), + .datab(\inst|PC_stack[2][1]~q ), .datac(gnd), - .datad(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst10|state.Init~feeder_combout ), + .combout(\inst|Selector73~0_combout ), .cout()); // synopsys translate_off -defparam \inst10|state.Init~feeder .lut_mask = 16'hFFFF; -defparam \inst10|state.Init~feeder .sum_lutc_input = "datac"; +defparam \inst|Selector73~0 .lut_mask = 16'hAACC; +defparam \inst|Selector73~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y46_N5 -dffeas \inst10|state.Init ( +// Location: FF_X56_Y42_N29 +dffeas \inst|PC_stack[3][1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|state.Init~feeder_combout ), + .d(\inst|Selector73~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|state.Init~q ), + .q(\inst|PC_stack[3][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|state.Init .is_wysiwyg = "true"; -defparam \inst10|state.Init .power_up = "low"; +defparam \inst|PC_stack[3][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N10 -fiftyfivenm_lcell_comb \inst|Selector8~0 ( +// Location: LCCOMB_X52_Y42_N16 +fiftyfivenm_lcell_comb \inst|Selector62~0 ( // Equation(s): -// \inst|Selector8~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [3])) # (!\inst|WideNor0~combout & ((\inst|IR [3]))))) +// \inst|Selector62~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][1]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][1]~q )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [3]), - .datab(\inst|IR [3]), - .datac(\inst|WideNor0~combout ), - .datad(\inst|state.fetch~q ), + .dataa(\inst|PC_stack[1][1]~q ), + .datab(gnd), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[3][1]~q ), .cin(gnd), - .combout(\inst|Selector8~0_combout ), + .combout(\inst|Selector62~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector8~0 .lut_mask = 16'h00AC; -defparam \inst|Selector8~0 .sum_lutc_input = "datac"; +defparam \inst|Selector62~0 .lut_mask = 16'hFA0A; +defparam \inst|Selector62~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N14 -fiftyfivenm_lcell_comb \inst|Selector6~0 ( -// Equation(s): -// \inst|Selector6~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [5]))) # (!\inst|WideNor0~combout & (\inst|IR [5])))) - - .dataa(\inst|IR [5]), - .datab(\inst|WideNor0~combout ), - .datac(\inst|state.fetch~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [5]), - .cin(gnd), - .combout(\inst|Selector6~0_combout ), - .cout()); +// Location: FF_X52_Y42_N17 +dffeas \inst|PC_stack[2][1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector62~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[2][1]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector6~0 .lut_mask = 16'h0E02; -defparam \inst|Selector6~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[2][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N12 -fiftyfivenm_lcell_comb \inst|state~55 ( +// Location: LCCOMB_X52_Y42_N12 +fiftyfivenm_lcell_comb \inst|Selector51~0 ( // Equation(s): -// \inst|state~55_combout = (!\inst|altsyncram_component|auto_generated|q_a [12] & (!\inst|altsyncram_component|auto_generated|q_a [11] & \inst|state~32_combout )) +// \inst|Selector51~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][1]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][1]~q )) - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|state~32_combout ), + .dataa(\inst|PC_stack[0][1]~q ), + .datab(gnd), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[2][1]~q ), .cin(gnd), - .combout(\inst|state~55_combout ), + .combout(\inst|Selector51~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~55 .lut_mask = 16'h0300; -defparam \inst|state~55 .sum_lutc_input = "datac"; +defparam \inst|Selector51~0 .lut_mask = 16'hFA0A; +defparam \inst|Selector51~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y43_N13 -dffeas \inst|state.ex_call ( +// Location: FF_X52_Y42_N13 +dffeas \inst|PC_stack[1][1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~55_combout ), + .d(\inst|Selector51~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_call~q ), + .q(\inst|PC_stack[1][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_call .is_wysiwyg = "true"; -defparam \inst|state.ex_call .power_up = "low"; +defparam \inst|PC_stack[1][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N20 -fiftyfivenm_lcell_comb \inst|PC_stack[9][0]~1 ( +// Location: LCCOMB_X52_Y42_N22 +fiftyfivenm_lcell_comb \inst|Selector40~0 ( // Equation(s): -// \inst|PC_stack[9][0]~1_combout = (\inst|state.ex_call~q & (\inst1|altpll_component|auto_generated|pll_lock_sync~q & \inst1|altpll_component|auto_generated|wire_pll1_locked )) +// \inst|Selector40~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [1]))) - .dataa(\inst|state.ex_call~q ), + .dataa(\inst|PC_stack[1][1]~q ), .datab(gnd), - .datac(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), - .datad(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC [1]), .cin(gnd), - .combout(\inst|PC_stack[9][0]~1_combout ), + .combout(\inst|Selector40~0_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][0]~1 .lut_mask = 16'hA000; -defparam \inst|PC_stack[9][0]~1 .sum_lutc_input = "datac"; +defparam \inst|Selector40~0 .lut_mask = 16'hAFA0; +defparam \inst|Selector40~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N13 -dffeas \inst|PC_stack[9][4] ( +// Location: FF_X52_Y42_N23 +dffeas \inst|PC_stack[0][1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|PC_stack[8][4]~q ), + .d(\inst|Selector40~0_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(\inst|PC_stack[9][0]~1_combout ), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][4]~q ), + .q(\inst|PC_stack[0][1]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][4] .power_up = "low"; +defparam \inst|PC_stack[0][1] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N22 -fiftyfivenm_lcell_comb \inst|Selector125~0 ( +// Location: LCCOMB_X55_Y41_N0 +fiftyfivenm_lcell_comb \inst|Add0~0 ( // Equation(s): -// \inst|Selector125~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][4]~q ))) +// \inst|Add0~0_combout = \inst|PC [0] $ (VCC) +// \inst|Add0~1 = CARRY(\inst|PC [0]) + + .dataa(\inst|PC [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\inst|Add0~0_combout ), + .cout(\inst|Add0~1 )); +// synopsys translate_off +defparam \inst|Add0~0 .lut_mask = 16'h55AA; +defparam \inst|Add0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y40_N10 +fiftyfivenm_lcell_comb \inst|Selector11~1 ( +// Equation(s): +// \inst|Selector11~1_combout = (\inst|Selector11~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~0_combout )) - .dataa(\inst|PC_stack[9][4]~q ), + .dataa(\inst|state.fetch~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[7][4]~q ), + .datac(\inst|Add0~0_combout ), + .datad(\inst|Selector11~0_combout ), .cin(gnd), - .combout(\inst|Selector125~0_combout ), + .combout(\inst|Selector11~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector125~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector125~0 .sum_lutc_input = "datac"; +defparam \inst|Selector11~1 .lut_mask = 16'hFFA0; +defparam \inst|Selector11~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N16 -fiftyfivenm_lcell_comb \inst|PC_stack[0][0]~0 ( +// Location: LCCOMB_X55_Y42_N22 +fiftyfivenm_lcell_comb \inst|PC_stack[9][0]~feeder ( // Equation(s): -// \inst|PC_stack[0][0]~0_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & (\inst1|altpll_component|auto_generated|wire_pll1_locked & ((\inst|state.ex_call~q ) # (\inst|state.ex_return~q )))) +// \inst|PC_stack[9][0]~feeder_combout = \inst|PC_stack[8][0]~q - .dataa(\inst|state.ex_call~q ), - .datab(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst|PC_stack[8][0]~q ), .cin(gnd), - .combout(\inst|PC_stack[0][0]~0_combout ), + .combout(\inst|PC_stack[9][0]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[0][0]~0 .lut_mask = 16'hC800; -defparam \inst|PC_stack[0][0]~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][0]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N23 -dffeas \inst|PC_stack[8][4] ( +// Location: FF_X55_Y42_N23 +dffeas \inst|PC_stack[9][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector125~0_combout ), + .d(\inst|PC_stack[9][0]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][4]~q ), + .q(\inst|PC_stack[9][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][4] .power_up = "low"; +defparam \inst|PC_stack[9][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N24 -fiftyfivenm_lcell_comb \inst|Selector114~0 ( +// Location: LCCOMB_X55_Y42_N20 +fiftyfivenm_lcell_comb \inst|Selector129~0 ( // Equation(s): -// \inst|Selector114~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][4]~q ))) +// \inst|Selector129~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][0]~q )) - .dataa(\inst|PC_stack[8][4]~q ), + .dataa(\inst|PC_stack[7][0]~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[6][4]~q ), + .datac(\inst|PC_stack[9][0]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector114~0_combout ), + .combout(\inst|Selector129~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector114~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector114~0 .sum_lutc_input = "datac"; +defparam \inst|Selector129~0 .lut_mask = 16'hF0AA; +defparam \inst|Selector129~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N25 -dffeas \inst|PC_stack[7][4] ( +// Location: FF_X55_Y42_N21 +dffeas \inst|PC_stack[8][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector114~0_combout ), + .d(\inst|Selector129~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3323,34 +3904,34 @@ dffeas \inst|PC_stack[7][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][4]~q ), + .q(\inst|PC_stack[8][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][4] .power_up = "low"; +defparam \inst|PC_stack[8][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N18 -fiftyfivenm_lcell_comb \inst|Selector103~0 ( +// Location: LCCOMB_X55_Y42_N30 +fiftyfivenm_lcell_comb \inst|Selector118~0 ( // Equation(s): -// \inst|Selector103~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][4]~q ))) +// \inst|Selector118~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][0]~q ))) .dataa(gnd), - .datab(\inst|PC_stack[7][4]~q ), + .datab(\inst|PC_stack[8][0]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][4]~q ), + .datad(\inst|PC_stack[6][0]~q ), .cin(gnd), - .combout(\inst|Selector103~0_combout ), + .combout(\inst|Selector118~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector103~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector103~0 .sum_lutc_input = "datac"; +defparam \inst|Selector118~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector118~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N19 -dffeas \inst|PC_stack[6][4] ( +// Location: FF_X55_Y42_N31 +dffeas \inst|PC_stack[7][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector103~0_combout ), + .d(\inst|Selector118~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3359,34 +3940,34 @@ dffeas \inst|PC_stack[6][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][4]~q ), + .q(\inst|PC_stack[7][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][4] .power_up = "low"; +defparam \inst|PC_stack[7][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N28 -fiftyfivenm_lcell_comb \inst|Selector92~0 ( +// Location: LCCOMB_X55_Y42_N16 +fiftyfivenm_lcell_comb \inst|Selector107~0 ( // Equation(s): -// \inst|Selector92~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][4]~q ))) +// \inst|Selector107~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][0]~q )) - .dataa(gnd), - .datab(\inst|PC_stack[6][4]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][4]~q ), + .dataa(\inst|PC_stack[5][0]~q ), + .datab(gnd), + .datac(\inst|PC_stack[7][0]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector92~0_combout ), + .combout(\inst|Selector107~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector92~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector92~0 .sum_lutc_input = "datac"; +defparam \inst|Selector107~0 .lut_mask = 16'hF0AA; +defparam \inst|Selector107~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N29 -dffeas \inst|PC_stack[5][4] ( +// Location: FF_X55_Y42_N17 +dffeas \inst|PC_stack[6][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector92~0_combout ), + .d(\inst|Selector107~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3395,34 +3976,34 @@ dffeas \inst|PC_stack[5][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][4]~q ), + .q(\inst|PC_stack[6][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][4] .power_up = "low"; +defparam \inst|PC_stack[6][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N10 -fiftyfivenm_lcell_comb \inst|Selector81~0 ( +// Location: LCCOMB_X55_Y42_N26 +fiftyfivenm_lcell_comb \inst|Selector96~0 ( // Equation(s): -// \inst|Selector81~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][4]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][4]~q )) +// \inst|Selector96~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][0]~q )) .dataa(gnd), - .datab(\inst|PC_stack[3][4]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][4]~q ), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[4][0]~q ), + .datad(\inst|PC_stack[6][0]~q ), .cin(gnd), - .combout(\inst|Selector81~0_combout ), + .combout(\inst|Selector96~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector81~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector81~0 .sum_lutc_input = "datac"; +defparam \inst|Selector96~0 .lut_mask = 16'hFC30; +defparam \inst|Selector96~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N11 -dffeas \inst|PC_stack[4][4] ( +// Location: FF_X55_Y42_N27 +dffeas \inst|PC_stack[5][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector81~0_combout ), + .d(\inst|Selector96~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3431,34 +4012,34 @@ dffeas \inst|PC_stack[4][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][4]~q ), + .q(\inst|PC_stack[5][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][4] .power_up = "low"; +defparam \inst|PC_stack[5][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N24 -fiftyfivenm_lcell_comb \inst|Selector70~0 ( +// Location: LCCOMB_X55_Y42_N4 +fiftyfivenm_lcell_comb \inst|Selector85~0 ( // Equation(s): -// \inst|Selector70~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][4]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][4]~q )) +// \inst|Selector85~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][0]~q ))) - .dataa(\inst|PC_stack[2][4]~q ), - .datab(gnd), - .datac(\inst|PC_stack[4][4]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|PC_stack[5][0]~q ), + .datab(\inst|state.ex_return~q ), + .datac(gnd), + .datad(\inst|PC_stack[3][0]~q ), .cin(gnd), - .combout(\inst|Selector70~0_combout ), + .combout(\inst|Selector85~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector70~0 .lut_mask = 16'hF0AA; -defparam \inst|Selector70~0 .sum_lutc_input = "datac"; +defparam \inst|Selector85~0 .lut_mask = 16'hBB88; +defparam \inst|Selector85~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N25 -dffeas \inst|PC_stack[3][4] ( +// Location: FF_X55_Y42_N5 +dffeas \inst|PC_stack[4][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector70~0_combout ), + .d(\inst|Selector85~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3467,34 +4048,34 @@ dffeas \inst|PC_stack[3][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][4]~q ), + .q(\inst|PC_stack[4][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][4] .power_up = "low"; +defparam \inst|PC_stack[4][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N12 -fiftyfivenm_lcell_comb \inst|Selector59~0 ( +// Location: LCCOMB_X55_Y42_N18 +fiftyfivenm_lcell_comb \inst|Selector74~0 ( // Equation(s): -// \inst|Selector59~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][4]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][4]~q )) +// \inst|Selector74~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][0]~q ))) - .dataa(\inst|state.ex_return~q ), - .datab(\inst|PC_stack[1][4]~q ), - .datac(gnd), - .datad(\inst|PC_stack[3][4]~q ), + .dataa(gnd), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[4][0]~q ), + .datad(\inst|PC_stack[2][0]~q ), .cin(gnd), - .combout(\inst|Selector59~0_combout ), + .combout(\inst|Selector74~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector59~0 .lut_mask = 16'hEE44; -defparam \inst|Selector59~0 .sum_lutc_input = "datac"; +defparam \inst|Selector74~0 .lut_mask = 16'hF3C0; +defparam \inst|Selector74~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N13 -dffeas \inst|PC_stack[2][4] ( +// Location: FF_X55_Y42_N19 +dffeas \inst|PC_stack[3][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector59~0_combout ), + .d(\inst|Selector74~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3503,34 +4084,34 @@ dffeas \inst|PC_stack[2][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][4]~q ), + .q(\inst|PC_stack[3][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][4] .power_up = "low"; +defparam \inst|PC_stack[3][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N16 -fiftyfivenm_lcell_comb \inst|Selector48~0 ( +// Location: LCCOMB_X55_Y42_N28 +fiftyfivenm_lcell_comb \inst|Selector63~0 ( // Equation(s): -// \inst|Selector48~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][4]~q ))) +// \inst|Selector63~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][0]~q )) - .dataa(\inst|PC_stack[2][4]~q ), - .datab(\inst|PC_stack[0][4]~q ), + .dataa(\inst|PC_stack[1][0]~q ), + .datab(\inst|PC_stack[3][0]~q ), .datac(gnd), .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector48~0_combout ), + .combout(\inst|Selector63~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector48~0 .lut_mask = 16'hAACC; -defparam \inst|Selector48~0 .sum_lutc_input = "datac"; +defparam \inst|Selector63~0 .lut_mask = 16'hCCAA; +defparam \inst|Selector63~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N17 -dffeas \inst|PC_stack[1][4] ( +// Location: FF_X55_Y42_N29 +dffeas \inst|PC_stack[2][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector48~0_combout ), + .d(\inst|Selector63~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3539,34 +4120,34 @@ dffeas \inst|PC_stack[1][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][4]~q ), + .q(\inst|PC_stack[2][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][4] .power_up = "low"; +defparam \inst|PC_stack[2][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N8 -fiftyfivenm_lcell_comb \inst|Selector37~0 ( +// Location: LCCOMB_X55_Y42_N12 +fiftyfivenm_lcell_comb \inst|Selector52~0 ( // Equation(s): -// \inst|Selector37~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][4]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [4])) +// \inst|Selector52~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][0]~q ))) - .dataa(\inst|state.ex_return~q ), - .datab(\inst|PC [4]), - .datac(gnd), - .datad(\inst|PC_stack[1][4]~q ), + .dataa(gnd), + .datab(\inst|PC_stack[2][0]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[0][0]~q ), .cin(gnd), - .combout(\inst|Selector37~0_combout ), + .combout(\inst|Selector52~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector37~0 .lut_mask = 16'hEE44; -defparam \inst|Selector37~0 .sum_lutc_input = "datac"; +defparam \inst|Selector52~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector52~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N9 -dffeas \inst|PC_stack[0][4] ( +// Location: FF_X55_Y42_N13 +dffeas \inst|PC_stack[1][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector37~0_combout ), + .d(\inst|Selector52~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3575,174 +4156,87 @@ dffeas \inst|PC_stack[0][4] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][4]~q ), + .q(\inst|PC_stack[1][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][4] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][4] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y40_N6 -fiftyfivenm_lcell_comb \inst|Add0~6 ( -// Equation(s): -// \inst|Add0~6_combout = (\inst|PC [3] & (!\inst|Add0~5 )) # (!\inst|PC [3] & ((\inst|Add0~5 ) # (GND))) -// \inst|Add0~7 = CARRY((!\inst|Add0~5 ) # (!\inst|PC [3])) - - .dataa(gnd), - .datab(\inst|PC [3]), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add0~5 ), - .combout(\inst|Add0~6_combout ), - .cout(\inst|Add0~7 )); -// synopsys translate_off -defparam \inst|Add0~6 .lut_mask = 16'h3C3F; -defparam \inst|Add0~6 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y40_N8 -fiftyfivenm_lcell_comb \inst|Add0~8 ( -// Equation(s): -// \inst|Add0~8_combout = (\inst|PC [4] & (\inst|Add0~7 $ (GND))) # (!\inst|PC [4] & (!\inst|Add0~7 & VCC)) -// \inst|Add0~9 = CARRY((\inst|PC [4] & !\inst|Add0~7 )) - - .dataa(\inst|PC [4]), - .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add0~7 ), - .combout(\inst|Add0~8_combout ), - .cout(\inst|Add0~9 )); -// synopsys translate_off -defparam \inst|Add0~8 .lut_mask = 16'hA50A; -defparam \inst|Add0~8 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y40_N30 -fiftyfivenm_lcell_comb \inst|Selector7~1 ( -// Equation(s): -// \inst|Selector7~1_combout = (\inst|Selector7~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~8_combout )) - - .dataa(\inst|Selector7~0_combout ), - .datab(gnd), - .datac(\inst|state.fetch~q ), - .datad(\inst|Add0~8_combout ), - .cin(gnd), - .combout(\inst|Selector7~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector7~1 .lut_mask = 16'hFAAA; -defparam \inst|Selector7~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y39_N4 -fiftyfivenm_lcell_comb \inst|Selector7~2 ( -// Equation(s): -// \inst|Selector7~2_combout = (\inst|state.ex_return~q & (\inst|PC_stack[0][4]~q )) # (!\inst|state.ex_return~q & (((\inst|Selector7~1_combout & \inst10|state.Init~q )))) - - .dataa(\inst|state.ex_return~q ), - .datab(\inst|PC_stack[0][4]~q ), - .datac(\inst|Selector7~1_combout ), - .datad(\inst10|state.Init~q ), - .cin(gnd), - .combout(\inst|Selector7~2_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector7~2 .lut_mask = 16'hD888; -defparam \inst|Selector7~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y43_N16 -fiftyfivenm_lcell_comb \inst|state~43 ( -// Equation(s): -// \inst|state~43_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (!\inst|altsyncram_component|auto_generated|q_a [11] & !\inst|altsyncram_component|auto_generated|q_a [12]))) - - .dataa(\inst|state.decode~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [15]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|altsyncram_component|auto_generated|q_a [12]), - .cin(gnd), - .combout(\inst|state~43_combout ), - .cout()); -// synopsys translate_off -defparam \inst|state~43 .lut_mask = 16'h0002; -defparam \inst|state~43 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[1][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N22 -fiftyfivenm_lcell_comb \inst|state~52 ( -// Equation(s): -// \inst|state~52_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~43_combout )) - - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [14]), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|state~43_combout ), +// Location: LCCOMB_X55_Y42_N24 +fiftyfivenm_lcell_comb \inst|Selector41~0 ( +// Equation(s): +// \inst|Selector41~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [0]))) + + .dataa(\inst|PC_stack[1][0]~q ), + .datab(\inst|state.ex_return~q ), + .datac(gnd), + .datad(\inst|PC [0]), .cin(gnd), - .combout(\inst|state~52_combout ), + .combout(\inst|Selector41~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~52 .lut_mask = 16'h0C00; -defparam \inst|state~52 .sum_lutc_input = "datac"; +defparam \inst|Selector41~0 .lut_mask = 16'hBB88; +defparam \inst|Selector41~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y42_N23 -dffeas \inst|state.ex_jzero ( +// Location: FF_X55_Y42_N25 +dffeas \inst|PC_stack[0][0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~52_combout ), + .d(\inst|Selector41~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_jzero~q ), + .q(\inst|PC_stack[0][0]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_jzero .is_wysiwyg = "true"; -defparam \inst|state.ex_jzero .power_up = "low"; +defparam \inst|PC_stack[0][0] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N30 -fiftyfivenm_lcell_comb \inst|state~35 ( +// Location: LCCOMB_X54_Y40_N22 +fiftyfivenm_lcell_comb \inst|Selector11~2 ( // Equation(s): -// \inst|state~35_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (\inst|altsyncram_component|auto_generated|q_a [11] & \inst|altsyncram_component|auto_generated|q_a [12]))) +// \inst|Selector11~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][0]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector11~1_combout & (\inst10|state.Init~q ))) - .dataa(\inst|state.decode~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [15]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|altsyncram_component|auto_generated|q_a [12]), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|Selector11~1_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst|PC_stack[0][0]~q ), .cin(gnd), - .combout(\inst|state~35_combout ), + .combout(\inst|Selector11~2_combout ), .cout()); // synopsys translate_off -defparam \inst|state~35 .lut_mask = 16'h2000; -defparam \inst|state~35 .sum_lutc_input = "datac"; +defparam \inst|Selector11~2 .lut_mask = 16'hEA40; +defparam \inst|Selector11~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N16 -fiftyfivenm_lcell_comb \inst|state~51 ( +// Location: LCCOMB_X54_Y42_N14 +fiftyfivenm_lcell_comb \inst|state~46 ( // Equation(s): -// \inst|state~51_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|state~35_combout & !\inst|altsyncram_component|auto_generated|q_a [14])) +// \inst|state~46_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~43_combout )) .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), .datab(gnd), - .datac(\inst|state~35_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~43_combout ), .cin(gnd), - .combout(\inst|state~51_combout ), + .combout(\inst|state~46_combout ), .cout()); // synopsys translate_off -defparam \inst|state~51 .lut_mask = 16'h00A0; -defparam \inst|state~51 .sum_lutc_input = "datac"; +defparam \inst|state~46 .lut_mask = 16'hA000; +defparam \inst|state~46 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y42_N17 -dffeas \inst|state.ex_jpos ( +// Location: FF_X54_Y42_N15 +dffeas \inst|state.ex_shift ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~51_combout ), + .d(\inst|state~46_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -3751,246 +4245,193 @@ dffeas \inst|state.ex_jpos ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_jpos~q ), + .q(\inst|state.ex_shift~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_jpos .is_wysiwyg = "true"; -defparam \inst|state.ex_jpos .power_up = "low"; +defparam \inst|state.ex_shift .is_wysiwyg = "true"; +defparam \inst|state.ex_shift .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N6 -fiftyfivenm_lcell_comb \inst|Selector28~0 ( +// Location: LCCOMB_X55_Y41_N6 +fiftyfivenm_lcell_comb \inst|Add0~6 ( // Equation(s): -// \inst|Selector28~0_combout = (\inst|IO_WRITE_int~q & ((\inst|state.decode~q ) # ((\inst10|state.Init~q & !\inst|state.fetch~q )))) +// \inst|Add0~6_combout = (\inst|PC [3] & (!\inst|Add0~5 )) # (!\inst|PC [3] & ((\inst|Add0~5 ) # (GND))) +// \inst|Add0~7 = CARRY((!\inst|Add0~5 ) # (!\inst|PC [3])) - .dataa(\inst|state.decode~q ), - .datab(\inst|IO_WRITE_int~q ), - .datac(\inst10|state.Init~q ), - .datad(\inst|state.fetch~q ), - .cin(gnd), - .combout(\inst|Selector28~0_combout ), - .cout()); + .dataa(\inst|PC [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add0~5 ), + .combout(\inst|Add0~6_combout ), + .cout(\inst|Add0~7 )); // synopsys translate_off -defparam \inst|Selector28~0 .lut_mask = 16'h88C8; -defparam \inst|Selector28~0 .sum_lutc_input = "datac"; +defparam \inst|Add0~6 .lut_mask = 16'h5A5F; +defparam \inst|Add0~6 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N22 -fiftyfivenm_lcell_comb \inst|Selector28~1 ( +// Location: LCCOMB_X55_Y41_N8 +fiftyfivenm_lcell_comb \inst|Add0~8 ( // Equation(s): -// \inst|Selector28~1_combout = (\inst|Selector28~0_combout ) # ((\inst|altsyncram_component|auto_generated|q_a [12] & (\inst|altsyncram_component|auto_generated|q_a [11] & \inst|state~32_combout ))) +// \inst|Add0~8_combout = (\inst|PC [4] & (\inst|Add0~7 $ (GND))) # (!\inst|PC [4] & (!\inst|Add0~7 & VCC)) +// \inst|Add0~9 = CARRY((\inst|PC [4] & !\inst|Add0~7 )) - .dataa(\inst|Selector28~0_combout ), - .datab(\inst|altsyncram_component|auto_generated|q_a [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|state~32_combout ), - .cin(gnd), - .combout(\inst|Selector28~1_combout ), - .cout()); + .dataa(\inst|PC [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add0~7 ), + .combout(\inst|Add0~8_combout ), + .cout(\inst|Add0~9 )); // synopsys translate_off -defparam \inst|Selector28~1 .lut_mask = 16'hEAAA; -defparam \inst|Selector28~1 .sum_lutc_input = "datac"; +defparam \inst|Add0~8 .lut_mask = 16'hA50A; +defparam \inst|Add0~8 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X51_Y42_N1 -dffeas \inst|IO_WRITE_int ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|Selector28~1_combout ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|IO_WRITE_int~q ), - .prn(vcc)); +// Location: LCCOMB_X54_Y42_N6 +fiftyfivenm_lcell_comb \inst|state~37 ( +// Equation(s): +// \inst|state~37_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (!\inst|altsyncram_component|auto_generated|q_a [11] & \inst|altsyncram_component|auto_generated|q_a [12]))) + + .dataa(\inst|state.decode~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [15]), + .datac(\inst|altsyncram_component|auto_generated|q_a [11]), + .datad(\inst|altsyncram_component|auto_generated|q_a [12]), + .cin(gnd), + .combout(\inst|state~37_combout ), + .cout()); // synopsys translate_off -defparam \inst|IO_WRITE_int .is_wysiwyg = "true"; -defparam \inst|IO_WRITE_int .power_up = "low"; +defparam \inst|state~37 .lut_mask = 16'h0200; +defparam \inst|state~37 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N0 -fiftyfivenm_lcell_comb \inst|IR[0]~0 ( +// Location: LCCOMB_X54_Y38_N0 +fiftyfivenm_lcell_comb \inst|state~47 ( // Equation(s): -// \inst|IR[0]~0_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & (\inst1|altpll_component|auto_generated|wire_pll1_locked & \inst|state.decode~q )) +// \inst|state~47_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~37_combout )) - .dataa(gnd), - .datab(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), - .datac(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .datad(\inst|state.decode~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), + .datac(gnd), + .datad(\inst|state~37_combout ), .cin(gnd), - .combout(\inst|IR[0]~0_combout ), + .combout(\inst|state~47_combout ), .cout()); // synopsys translate_off -defparam \inst|IR[0]~0 .lut_mask = 16'hC000; -defparam \inst|IR[0]~0 .sum_lutc_input = "datac"; +defparam \inst|state~47 .lut_mask = 16'h8800; +defparam \inst|state~47 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y43_N15 -dffeas \inst|IR[4] ( +// Location: FF_X54_Y38_N1 +dffeas \inst|state.ex_iload ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [4]), - .clrn(vcc), + .d(\inst|state~47_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), + .sload(gnd), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IR [4]), + .q(\inst|state.ex_iload~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|IR[4] .is_wysiwyg = "true"; -defparam \inst|IR[4] .power_up = "low"; +defparam \inst|state.ex_iload .is_wysiwyg = "true"; +defparam \inst|state.ex_iload .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y43_N25 -dffeas \inst|IR[1] ( +// Location: FF_X54_Y38_N21 +dffeas \inst|state.ex_istore2 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [1]), - .clrn(vcc), + .asdata(\inst|state.ex_istore~q ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(vcc), - .ena(\inst|IR[0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IR [1]), + .q(\inst|state.ex_istore2~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|IR[1] .is_wysiwyg = "true"; -defparam \inst|IR[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y43_N26 -fiftyfivenm_lcell_comb \inst3|I2C_RDY_EN~0 ( -// Equation(s): -// \inst3|I2C_RDY_EN~0_combout = (\inst|IR [4] & \inst|IR [1]) - - .dataa(gnd), - .datab(\inst|IR [4]), - .datac(gnd), - .datad(\inst|IR [1]), - .cin(gnd), - .combout(\inst3|I2C_RDY_EN~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst3|I2C_RDY_EN~0 .lut_mask = 16'hCC00; -defparam \inst3|I2C_RDY_EN~0 .sum_lutc_input = "datac"; +defparam \inst|state.ex_istore2 .is_wysiwyg = "true"; +defparam \inst|state.ex_istore2 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N24 -fiftyfivenm_lcell_comb \inst13|inst4 ( +// Location: LCCOMB_X54_Y38_N20 +fiftyfivenm_lcell_comb \inst|WideNor0 ( // Equation(s): -// \inst13|inst4~combout = (!\inst|IO_WRITE_int~q & (\inst|IR [7] & (\inst3|I2C_RDY_EN~0_combout & \inst3|TIMER_EN~1_combout ))) +// \inst|WideNor0~combout = (\inst|state.decode~q ) # ((\inst|state.ex_iload~q ) # (\inst|state.ex_istore2~q )) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst|IR [7]), - .datac(\inst3|I2C_RDY_EN~0_combout ), - .datad(\inst3|TIMER_EN~1_combout ), + .dataa(\inst|state.decode~q ), + .datab(\inst|state.ex_iload~q ), + .datac(\inst|state.ex_istore2~q ), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst4~combout ), + .combout(\inst|WideNor0~combout ), .cout()); // synopsys translate_off -defparam \inst13|inst4 .lut_mask = 16'h4000; -defparam \inst13|inst4 .sum_lutc_input = "datac"; +defparam \inst|WideNor0 .lut_mask = 16'hFEFE; +defparam \inst|WideNor0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N0 -fiftyfivenm_lcell_comb \inst|Selector4~0 ( +// Location: LCCOMB_X56_Y41_N26 +fiftyfivenm_lcell_comb \inst|Selector7~0 ( // Equation(s): -// \inst|Selector4~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [7])) # (!\inst|WideNor0~combout & ((\inst|IR [7]))))) +// \inst|Selector7~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [4]))) # (!\inst|WideNor0~combout & (\inst|IR [4])))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [7]), - .datab(\inst|state.fetch~q ), - .datac(\inst|WideNor0~combout ), - .datad(\inst|IR [7]), + .dataa(\inst|IR [4]), + .datab(\inst|WideNor0~combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [4]), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst|Selector4~0_combout ), + .combout(\inst|Selector7~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector4~0 .lut_mask = 16'h2320; -defparam \inst|Selector4~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y40_N10 -fiftyfivenm_lcell_comb \inst|Add0~10 ( -// Equation(s): -// \inst|Add0~10_combout = (\inst|PC [5] & (!\inst|Add0~9 )) # (!\inst|PC [5] & ((\inst|Add0~9 ) # (GND))) -// \inst|Add0~11 = CARRY((!\inst|Add0~9 ) # (!\inst|PC [5])) - - .dataa(\inst|PC [5]), - .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add0~9 ), - .combout(\inst|Add0~10_combout ), - .cout(\inst|Add0~11 )); -// synopsys translate_off -defparam \inst|Add0~10 .lut_mask = 16'h5A5F; -defparam \inst|Add0~10 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y40_N12 -fiftyfivenm_lcell_comb \inst|Add0~12 ( -// Equation(s): -// \inst|Add0~12_combout = (\inst|PC [6] & (\inst|Add0~11 $ (GND))) # (!\inst|PC [6] & (!\inst|Add0~11 & VCC)) -// \inst|Add0~13 = CARRY((\inst|PC [6] & !\inst|Add0~11 )) - - .dataa(gnd), - .datab(\inst|PC [6]), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add0~11 ), - .combout(\inst|Add0~12_combout ), - .cout(\inst|Add0~13 )); -// synopsys translate_off -defparam \inst|Add0~12 .lut_mask = 16'hC30C; -defparam \inst|Add0~12 .sum_lutc_input = "cin"; +defparam \inst|Selector7~0 .lut_mask = 16'h00E2; +defparam \inst|Selector7~0 .sum_lutc_input = "datac"; // synopsys translate_on - -// Location: LCCOMB_X54_Y40_N30 -fiftyfivenm_lcell_comb \inst|Selector5~1 ( + +// Location: LCCOMB_X55_Y41_N24 +fiftyfivenm_lcell_comb \inst|Selector7~1 ( // Equation(s): -// \inst|Selector5~1_combout = (\inst|Selector5~0_combout ) # ((\inst|Add0~12_combout & \inst|state.fetch~q )) +// \inst|Selector7~1_combout = (\inst|Selector7~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~8_combout )) - .dataa(\inst|Add0~12_combout ), - .datab(gnd), - .datac(\inst|Selector5~0_combout ), - .datad(\inst|state.fetch~q ), + .dataa(gnd), + .datab(\inst|state.fetch~q ), + .datac(\inst|Add0~8_combout ), + .datad(\inst|Selector7~0_combout ), .cin(gnd), - .combout(\inst|Selector5~1_combout ), + .combout(\inst|Selector7~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector5~1 .lut_mask = 16'hFAF0; -defparam \inst|Selector5~1 .sum_lutc_input = "datac"; +defparam \inst|Selector7~1 .lut_mask = 16'hFFC0; +defparam \inst|Selector7~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N14 -fiftyfivenm_lcell_comb \inst|PC_stack[9][6]~feeder ( +// Location: LCCOMB_X57_Y42_N24 +fiftyfivenm_lcell_comb \inst|PC_stack[9][4]~feeder ( // Equation(s): -// \inst|PC_stack[9][6]~feeder_combout = \inst|PC_stack[8][6]~q +// \inst|PC_stack[9][4]~feeder_combout = \inst|PC_stack[8][4]~q .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst|PC_stack[8][6]~q ), + .datad(\inst|PC_stack[8][4]~q ), .cin(gnd), - .combout(\inst|PC_stack[9][6]~feeder_combout ), + .combout(\inst|PC_stack[9][4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][6]~feeder .lut_mask = 16'hFF00; -defparam \inst|PC_stack[9][6]~feeder .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][4]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N15 -dffeas \inst|PC_stack[9][6] ( +// Location: FF_X57_Y42_N25 +dffeas \inst|PC_stack[9][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|PC_stack[9][6]~feeder_combout ), + .d(\inst|PC_stack[9][4]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -3999,34 +4440,34 @@ dffeas \inst|PC_stack[9][6] ( .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][6]~q ), + .q(\inst|PC_stack[9][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][6] .power_up = "low"; +defparam \inst|PC_stack[9][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N2 -fiftyfivenm_lcell_comb \inst|Selector123~0 ( +// Location: LCCOMB_X58_Y42_N26 +fiftyfivenm_lcell_comb \inst|Selector125~0 ( // Equation(s): -// \inst|Selector123~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][6]~q )) +// \inst|Selector125~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][4]~q ))) .dataa(gnd), - .datab(\inst|PC_stack[7][6]~q ), + .datab(\inst|PC_stack[9][4]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[9][6]~q ), + .datad(\inst|PC_stack[7][4]~q ), .cin(gnd), - .combout(\inst|Selector123~0_combout ), + .combout(\inst|Selector125~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector123~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector123~0 .sum_lutc_input = "datac"; +defparam \inst|Selector125~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector125~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N3 -dffeas \inst|PC_stack[8][6] ( +// Location: FF_X58_Y42_N27 +dffeas \inst|PC_stack[8][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector123~0_combout ), + .d(\inst|Selector125~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4035,34 +4476,34 @@ dffeas \inst|PC_stack[8][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][6]~q ), + .q(\inst|PC_stack[8][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][6] .power_up = "low"; +defparam \inst|PC_stack[8][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N4 -fiftyfivenm_lcell_comb \inst|Selector112~0 ( +// Location: LCCOMB_X58_Y42_N16 +fiftyfivenm_lcell_comb \inst|Selector114~0 ( // Equation(s): -// \inst|Selector112~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][6]~q )) +// \inst|Selector114~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][4]~q ))) .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|PC_stack[6][6]~q ), - .datad(\inst|PC_stack[8][6]~q ), + .datac(\inst|PC_stack[8][4]~q ), + .datad(\inst|PC_stack[6][4]~q ), .cin(gnd), - .combout(\inst|Selector112~0_combout ), + .combout(\inst|Selector114~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector112~0 .lut_mask = 16'hFA50; -defparam \inst|Selector112~0 .sum_lutc_input = "datac"; +defparam \inst|Selector114~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector114~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N5 -dffeas \inst|PC_stack[7][6] ( +// Location: FF_X58_Y42_N17 +dffeas \inst|PC_stack[7][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector112~0_combout ), + .d(\inst|Selector114~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4071,34 +4512,34 @@ dffeas \inst|PC_stack[7][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][6]~q ), + .q(\inst|PC_stack[7][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][6] .power_up = "low"; +defparam \inst|PC_stack[7][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N26 -fiftyfivenm_lcell_comb \inst|Selector101~0 ( +// Location: LCCOMB_X58_Y42_N18 +fiftyfivenm_lcell_comb \inst|Selector103~0 ( // Equation(s): -// \inst|Selector101~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][6]~q )) +// \inst|Selector103~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][4]~q ))) - .dataa(\inst|PC_stack[5][6]~q ), - .datab(\inst|PC_stack[7][6]~q ), + .dataa(gnd), + .datab(\inst|PC_stack[7][4]~q ), .datac(\inst|state.ex_return~q ), - .datad(gnd), + .datad(\inst|PC_stack[5][4]~q ), .cin(gnd), - .combout(\inst|Selector101~0_combout ), + .combout(\inst|Selector103~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector101~0 .lut_mask = 16'hCACA; -defparam \inst|Selector101~0 .sum_lutc_input = "datac"; +defparam \inst|Selector103~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector103~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N27 -dffeas \inst|PC_stack[6][6] ( +// Location: FF_X58_Y42_N19 +dffeas \inst|PC_stack[6][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector101~0_combout ), + .d(\inst|Selector103~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4107,34 +4548,34 @@ dffeas \inst|PC_stack[6][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][6]~q ), + .q(\inst|PC_stack[6][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][6] .power_up = "low"; +defparam \inst|PC_stack[6][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N10 -fiftyfivenm_lcell_comb \inst|Selector90~0 ( +// Location: LCCOMB_X58_Y42_N20 +fiftyfivenm_lcell_comb \inst|Selector92~0 ( // Equation(s): -// \inst|Selector90~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][6]~q ))) +// \inst|Selector92~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][4]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][4]~q )) .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|PC_stack[6][6]~q ), - .datad(\inst|PC_stack[4][6]~q ), + .datac(\inst|PC_stack[4][4]~q ), + .datad(\inst|PC_stack[6][4]~q ), .cin(gnd), - .combout(\inst|Selector90~0_combout ), + .combout(\inst|Selector92~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector90~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector90~0 .sum_lutc_input = "datac"; +defparam \inst|Selector92~0 .lut_mask = 16'hFA50; +defparam \inst|Selector92~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N11 -dffeas \inst|PC_stack[5][6] ( +// Location: FF_X58_Y42_N21 +dffeas \inst|PC_stack[5][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector90~0_combout ), + .d(\inst|Selector92~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4143,34 +4584,34 @@ dffeas \inst|PC_stack[5][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][6]~q ), + .q(\inst|PC_stack[5][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][6] .power_up = "low"; +defparam \inst|PC_stack[5][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N22 -fiftyfivenm_lcell_comb \inst|Selector79~0 ( +// Location: LCCOMB_X58_Y42_N22 +fiftyfivenm_lcell_comb \inst|Selector81~0 ( // Equation(s): -// \inst|Selector79~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][6]~q ))) +// \inst|Selector81~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][4]~q ))) - .dataa(\inst|PC_stack[5][6]~q ), - .datab(gnd), + .dataa(gnd), + .datab(\inst|PC_stack[5][4]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[3][6]~q ), + .datad(\inst|PC_stack[3][4]~q ), .cin(gnd), - .combout(\inst|Selector79~0_combout ), + .combout(\inst|Selector81~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector79~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector79~0 .sum_lutc_input = "datac"; +defparam \inst|Selector81~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector81~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N23 -dffeas \inst|PC_stack[4][6] ( +// Location: FF_X58_Y42_N23 +dffeas \inst|PC_stack[4][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector79~0_combout ), + .d(\inst|Selector81~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4179,34 +4620,34 @@ dffeas \inst|PC_stack[4][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][6]~q ), + .q(\inst|PC_stack[4][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][6] .power_up = "low"; +defparam \inst|PC_stack[4][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N2 -fiftyfivenm_lcell_comb \inst|Selector68~0 ( +// Location: LCCOMB_X58_Y42_N28 +fiftyfivenm_lcell_comb \inst|Selector70~0 ( // Equation(s): -// \inst|Selector68~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][6]~q )) +// \inst|Selector70~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][4]~q ))) - .dataa(\inst|PC_stack[2][6]~q ), + .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][6]~q ), + .datac(\inst|PC_stack[4][4]~q ), + .datad(\inst|PC_stack[2][4]~q ), .cin(gnd), - .combout(\inst|Selector68~0_combout ), + .combout(\inst|Selector70~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector68~0 .lut_mask = 16'hFA0A; -defparam \inst|Selector68~0 .sum_lutc_input = "datac"; +defparam \inst|Selector70~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector70~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N3 -dffeas \inst|PC_stack[3][6] ( +// Location: FF_X58_Y42_N29 +dffeas \inst|PC_stack[3][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector68~0_combout ), + .d(\inst|Selector70~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4215,34 +4656,34 @@ dffeas \inst|PC_stack[3][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][6]~q ), + .q(\inst|PC_stack[3][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][6] .power_up = "low"; +defparam \inst|PC_stack[3][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N26 -fiftyfivenm_lcell_comb \inst|Selector57~0 ( +// Location: LCCOMB_X58_Y42_N24 +fiftyfivenm_lcell_comb \inst|Selector59~0 ( // Equation(s): -// \inst|Selector57~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][6]~q ))) +// \inst|Selector59~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][4]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][4]~q )) - .dataa(gnd), - .datab(\inst|PC_stack[3][6]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[1][6]~q ), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[1][4]~q ), + .datad(\inst|PC_stack[3][4]~q ), .cin(gnd), - .combout(\inst|Selector57~0_combout ), + .combout(\inst|Selector59~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector57~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector57~0 .sum_lutc_input = "datac"; +defparam \inst|Selector59~0 .lut_mask = 16'hFA50; +defparam \inst|Selector59~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N27 -dffeas \inst|PC_stack[2][6] ( +// Location: FF_X58_Y42_N25 +dffeas \inst|PC_stack[2][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector57~0_combout ), + .d(\inst|Selector59~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4251,34 +4692,34 @@ dffeas \inst|PC_stack[2][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][6]~q ), + .q(\inst|PC_stack[2][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][6] .power_up = "low"; +defparam \inst|PC_stack[2][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N6 -fiftyfivenm_lcell_comb \inst|Selector46~0 ( +// Location: LCCOMB_X58_Y42_N4 +fiftyfivenm_lcell_comb \inst|Selector48~0 ( // Equation(s): -// \inst|Selector46~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][6]~q ))) +// \inst|Selector48~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][4]~q ))) - .dataa(\inst|PC_stack[2][6]~q ), - .datab(gnd), + .dataa(gnd), + .datab(\inst|PC_stack[2][4]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][6]~q ), + .datad(\inst|PC_stack[0][4]~q ), .cin(gnd), - .combout(\inst|Selector46~0_combout ), + .combout(\inst|Selector48~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector46~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector46~0 .sum_lutc_input = "datac"; +defparam \inst|Selector48~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector48~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N7 -dffeas \inst|PC_stack[1][6] ( +// Location: FF_X58_Y42_N5 +dffeas \inst|PC_stack[1][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector46~0_combout ), + .d(\inst|Selector48~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4287,34 +4728,34 @@ dffeas \inst|PC_stack[1][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][6]~q ), + .q(\inst|PC_stack[1][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][6] .power_up = "low"; +defparam \inst|PC_stack[1][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N18 -fiftyfivenm_lcell_comb \inst|Selector35~0 ( +// Location: LCCOMB_X58_Y42_N12 +fiftyfivenm_lcell_comb \inst|Selector37~0 ( // Equation(s): -// \inst|Selector35~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [6])) +// \inst|Selector37~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][4]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [4]))) - .dataa(gnd), - .datab(\inst|PC [6]), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[1][6]~q ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|PC_stack[1][4]~q ), + .datac(\inst|PC [4]), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector35~0_combout ), + .combout(\inst|Selector37~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector35~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector35~0 .sum_lutc_input = "datac"; +defparam \inst|Selector37~0 .lut_mask = 16'hD8D8; +defparam \inst|Selector37~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N19 -dffeas \inst|PC_stack[0][6] ( +// Location: FF_X58_Y42_N13 +dffeas \inst|PC_stack[0][4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector35~0_combout ), + .d(\inst|Selector37~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4323,34 +4764,34 @@ dffeas \inst|PC_stack[0][6] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][6]~q ), + .q(\inst|PC_stack[0][4]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][6] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][6] .power_up = "low"; +defparam \inst|PC_stack[0][4] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N14 -fiftyfivenm_lcell_comb \inst|Selector5~2 ( +// Location: LCCOMB_X58_Y42_N30 +fiftyfivenm_lcell_comb \inst|Selector7~2 ( // Equation(s): -// \inst|Selector5~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][6]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector5~1_combout ))) +// \inst|Selector7~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][4]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector7~1_combout & (\inst10|state.Init~q ))) - .dataa(\inst10|state.Init~q ), - .datab(\inst|Selector5~1_combout ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][6]~q ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|Selector7~1_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst|PC_stack[0][4]~q ), .cin(gnd), - .combout(\inst|Selector5~2_combout ), + .combout(\inst|Selector7~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector5~2 .lut_mask = 16'hF808; -defparam \inst|Selector5~2 .sum_lutc_input = "datac"; +defparam \inst|Selector7~2 .lut_mask = 16'hEA40; +defparam \inst|Selector7~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N15 -dffeas \inst|PC[6] ( +// Location: FF_X58_Y42_N31 +dffeas \inst|PC[4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector5~2_combout ), + .d(\inst|Selector7~2_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4359,69 +4800,87 @@ dffeas \inst|PC[6] ( .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [6]), + .q(\inst|PC [4]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[6] .is_wysiwyg = "true"; -defparam \inst|PC[6] .power_up = "low"; +defparam \inst|PC[4] .is_wysiwyg = "true"; +defparam \inst|PC[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y41_N28 +fiftyfivenm_lcell_comb \inst|next_mem_addr[4]~4 ( +// Equation(s): +// \inst|next_mem_addr[4]~4_combout = (\inst|Selector7~0_combout ) # ((\inst|PC [4] & \inst|state.fetch~q )) + + .dataa(\inst|PC [4]), + .datab(gnd), + .datac(\inst|state.fetch~q ), + .datad(\inst|Selector7~0_combout ), + .cin(gnd), + .combout(\inst|next_mem_addr[4]~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst|next_mem_addr[4]~4 .lut_mask = 16'hFFA0; +defparam \inst|next_mem_addr[4]~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N14 -fiftyfivenm_lcell_comb \inst|Add0~14 ( +// Location: LCCOMB_X55_Y41_N10 +fiftyfivenm_lcell_comb \inst|Add0~10 ( // Equation(s): -// \inst|Add0~14_combout = (\inst|PC [7] & (!\inst|Add0~13 )) # (!\inst|PC [7] & ((\inst|Add0~13 ) # (GND))) -// \inst|Add0~15 = CARRY((!\inst|Add0~13 ) # (!\inst|PC [7])) +// \inst|Add0~10_combout = (\inst|PC [5] & (!\inst|Add0~9 )) # (!\inst|PC [5] & ((\inst|Add0~9 ) # (GND))) +// \inst|Add0~11 = CARRY((!\inst|Add0~9 ) # (!\inst|PC [5])) .dataa(gnd), - .datab(\inst|PC [7]), + .datab(\inst|PC [5]), .datac(gnd), .datad(vcc), - .cin(\inst|Add0~13 ), - .combout(\inst|Add0~14_combout ), - .cout(\inst|Add0~15 )); + .cin(\inst|Add0~9 ), + .combout(\inst|Add0~10_combout ), + .cout(\inst|Add0~11 )); // synopsys translate_off -defparam \inst|Add0~14 .lut_mask = 16'h3C3F; -defparam \inst|Add0~14 .sum_lutc_input = "cin"; +defparam \inst|Add0~10 .lut_mask = 16'h3C3F; +defparam \inst|Add0~10 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N2 -fiftyfivenm_lcell_comb \inst|Selector4~1 ( +// Location: LCCOMB_X55_Y41_N12 +fiftyfivenm_lcell_comb \inst|Add0~12 ( // Equation(s): -// \inst|Selector4~1_combout = (\inst|Selector4~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~14_combout )) +// \inst|Add0~12_combout = (\inst|PC [6] & (\inst|Add0~11 $ (GND))) # (!\inst|PC [6] & (!\inst|Add0~11 & VCC)) +// \inst|Add0~13 = CARRY((\inst|PC [6] & !\inst|Add0~11 )) .dataa(gnd), - .datab(\inst|Selector4~0_combout ), - .datac(\inst|state.fetch~q ), - .datad(\inst|Add0~14_combout ), - .cin(gnd), - .combout(\inst|Selector4~1_combout ), - .cout()); + .datab(\inst|PC [6]), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add0~11 ), + .combout(\inst|Add0~12_combout ), + .cout(\inst|Add0~13 )); // synopsys translate_off -defparam \inst|Selector4~1 .lut_mask = 16'hFCCC; -defparam \inst|Selector4~1 .sum_lutc_input = "datac"; +defparam \inst|Add0~12 .lut_mask = 16'hC30C; +defparam \inst|Add0~12 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N30 -fiftyfivenm_lcell_comb \inst|PC_stack[9][7]~feeder ( +// Location: LCCOMB_X60_Y42_N10 +fiftyfivenm_lcell_comb \inst|PC_stack[9][8]~feeder ( // Equation(s): -// \inst|PC_stack[9][7]~feeder_combout = \inst|PC_stack[8][7]~q +// \inst|PC_stack[9][8]~feeder_combout = \inst|PC_stack[8][8]~q .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst|PC_stack[8][7]~q ), + .datad(\inst|PC_stack[8][8]~q ), .cin(gnd), - .combout(\inst|PC_stack[9][7]~feeder_combout ), + .combout(\inst|PC_stack[9][8]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][7]~feeder .lut_mask = 16'hFF00; -defparam \inst|PC_stack[9][7]~feeder .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][8]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][8]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N31 -dffeas \inst|PC_stack[9][7] ( +// Location: FF_X60_Y42_N11 +dffeas \inst|PC_stack[9][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|PC_stack[9][7]~feeder_combout ), + .d(\inst|PC_stack[9][8]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4430,34 +4889,34 @@ dffeas \inst|PC_stack[9][7] ( .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][7]~q ), + .q(\inst|PC_stack[9][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][7] .power_up = "low"; +defparam \inst|PC_stack[9][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N0 -fiftyfivenm_lcell_comb \inst|Selector122~0 ( +// Location: LCCOMB_X60_Y42_N6 +fiftyfivenm_lcell_comb \inst|Selector121~0 ( // Equation(s): -// \inst|Selector122~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][7]~q )) +// \inst|Selector121~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][8]~q ))) - .dataa(\inst|PC_stack[7][7]~q ), - .datab(\inst|PC_stack[9][7]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|PC_stack[9][8]~q ), + .datab(\inst|PC_stack[7][8]~q ), + .datac(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector122~0_combout ), + .combout(\inst|Selector121~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector122~0 .lut_mask = 16'hCACA; -defparam \inst|Selector122~0 .sum_lutc_input = "datac"; +defparam \inst|Selector121~0 .lut_mask = 16'hAACC; +defparam \inst|Selector121~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N1 -dffeas \inst|PC_stack[8][7] ( +// Location: FF_X60_Y42_N7 +dffeas \inst|PC_stack[8][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector122~0_combout ), + .d(\inst|Selector121~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4466,34 +4925,34 @@ dffeas \inst|PC_stack[8][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][7]~q ), + .q(\inst|PC_stack[8][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][7] .power_up = "low"; +defparam \inst|PC_stack[8][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N26 -fiftyfivenm_lcell_comb \inst|Selector111~0 ( +// Location: LCCOMB_X60_Y42_N14 +fiftyfivenm_lcell_comb \inst|Selector110~0 ( // Equation(s): -// \inst|Selector111~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][7]~q )) +// \inst|Selector110~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][8]~q ))) - .dataa(\inst|PC_stack[6][7]~q ), + .dataa(\inst|PC_stack[8][8]~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[8][7]~q ), + .datac(\inst|PC_stack[6][8]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector111~0_combout ), + .combout(\inst|Selector110~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector111~0 .lut_mask = 16'hFA0A; -defparam \inst|Selector111~0 .sum_lutc_input = "datac"; +defparam \inst|Selector110~0 .lut_mask = 16'hAAF0; +defparam \inst|Selector110~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N27 -dffeas \inst|PC_stack[7][7] ( +// Location: FF_X60_Y42_N15 +dffeas \inst|PC_stack[7][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector111~0_combout ), + .d(\inst|Selector110~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4502,34 +4961,34 @@ dffeas \inst|PC_stack[7][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][7]~q ), + .q(\inst|PC_stack[7][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][7] .power_up = "low"; +defparam \inst|PC_stack[7][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N12 -fiftyfivenm_lcell_comb \inst|Selector100~0 ( +// Location: LCCOMB_X60_Y42_N22 +fiftyfivenm_lcell_comb \inst|Selector99~0 ( // Equation(s): -// \inst|Selector100~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][7]~q ))) +// \inst|Selector99~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][8]~q )) - .dataa(\inst|PC_stack[7][7]~q ), - .datab(\inst|PC_stack[5][7]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|PC_stack[5][8]~q ), + .datab(\inst|PC_stack[7][8]~q ), + .datac(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector100~0_combout ), + .combout(\inst|Selector99~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector100~0 .lut_mask = 16'hACAC; -defparam \inst|Selector100~0 .sum_lutc_input = "datac"; +defparam \inst|Selector99~0 .lut_mask = 16'hCCAA; +defparam \inst|Selector99~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N13 -dffeas \inst|PC_stack[6][7] ( +// Location: FF_X60_Y42_N23 +dffeas \inst|PC_stack[6][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector100~0_combout ), + .d(\inst|Selector99~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4538,70 +4997,34 @@ dffeas \inst|PC_stack[6][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][7]~q ), + .q(\inst|PC_stack[6][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][7] .power_up = "low"; +defparam \inst|PC_stack[6][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N14 -fiftyfivenm_lcell_comb \inst|Selector89~0 ( +// Location: LCCOMB_X60_Y42_N30 +fiftyfivenm_lcell_comb \inst|Selector88~0 ( // Equation(s): -// \inst|Selector89~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][7]~q ))) +// \inst|Selector88~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][8]~q ))) - .dataa(\inst|PC_stack[6][7]~q ), + .dataa(\inst|PC_stack[6][8]~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][7]~q ), - .cin(gnd), - .combout(\inst|Selector89~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector89~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector89~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X55_Y42_N15 -dffeas \inst|PC_stack[5][7] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector89~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[5][7]~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|PC_stack[5][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][7] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X55_Y42_N20 -fiftyfivenm_lcell_comb \inst|Selector78~0 ( -// Equation(s): -// \inst|Selector78~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][7]~q )) - - .dataa(\inst|PC_stack[3][7]~q ), - .datab(\inst|PC_stack[5][7]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .datac(\inst|PC_stack[4][8]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector78~0_combout ), + .combout(\inst|Selector88~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector78~0 .lut_mask = 16'hCACA; -defparam \inst|Selector78~0 .sum_lutc_input = "datac"; +defparam \inst|Selector88~0 .lut_mask = 16'hAAF0; +defparam \inst|Selector88~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N21 -dffeas \inst|PC_stack[4][7] ( +// Location: FF_X60_Y42_N31 +dffeas \inst|PC_stack[5][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector78~0_combout ), + .d(\inst|Selector88~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4610,34 +5033,34 @@ dffeas \inst|PC_stack[4][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][7]~q ), + .q(\inst|PC_stack[5][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][7] .power_up = "low"; +defparam \inst|PC_stack[5][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N22 -fiftyfivenm_lcell_comb \inst|Selector67~0 ( +// Location: LCCOMB_X60_Y42_N26 +fiftyfivenm_lcell_comb \inst|Selector77~0 ( // Equation(s): -// \inst|Selector67~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][7]~q )) +// \inst|Selector77~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][8]~q ))) - .dataa(\inst|PC_stack[2][7]~q ), - .datab(\inst|PC_stack[4][7]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|PC_stack[5][8]~q ), + .datab(\inst|PC_stack[3][8]~q ), + .datac(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector67~0_combout ), + .combout(\inst|Selector77~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector67~0 .lut_mask = 16'hCACA; -defparam \inst|Selector67~0 .sum_lutc_input = "datac"; +defparam \inst|Selector77~0 .lut_mask = 16'hAACC; +defparam \inst|Selector77~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N23 -dffeas \inst|PC_stack[3][7] ( +// Location: FF_X60_Y42_N27 +dffeas \inst|PC_stack[4][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector67~0_combout ), + .d(\inst|Selector77~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4646,34 +5069,34 @@ dffeas \inst|PC_stack[3][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][7]~q ), + .q(\inst|PC_stack[4][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][7] .power_up = "low"; +defparam \inst|PC_stack[4][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N30 -fiftyfivenm_lcell_comb \inst|Selector56~0 ( +// Location: LCCOMB_X60_Y42_N18 +fiftyfivenm_lcell_comb \inst|Selector66~0 ( // Equation(s): -// \inst|Selector56~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][7]~q ))) +// \inst|Selector66~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][8]~q )) - .dataa(\inst|PC_stack[3][7]~q ), + .dataa(\inst|PC_stack[2][8]~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[1][7]~q ), + .datac(\inst|PC_stack[4][8]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector56~0_combout ), + .combout(\inst|Selector66~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector56~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector56~0 .sum_lutc_input = "datac"; +defparam \inst|Selector66~0 .lut_mask = 16'hF0AA; +defparam \inst|Selector66~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N31 -dffeas \inst|PC_stack[2][7] ( +// Location: FF_X60_Y42_N19 +dffeas \inst|PC_stack[3][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector56~0_combout ), + .d(\inst|Selector66~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4682,34 +5105,34 @@ dffeas \inst|PC_stack[2][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][7]~q ), + .q(\inst|PC_stack[3][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][7] .power_up = "low"; +defparam \inst|PC_stack[3][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N18 -fiftyfivenm_lcell_comb \inst|Selector45~0 ( +// Location: LCCOMB_X60_Y42_N12 +fiftyfivenm_lcell_comb \inst|Selector55~0 ( // Equation(s): -// \inst|Selector45~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][7]~q ))) +// \inst|Selector55~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][8]~q )) - .dataa(\inst|PC_stack[2][7]~q ), - .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][7]~q ), + .dataa(gnd), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[1][8]~q ), + .datad(\inst|PC_stack[3][8]~q ), .cin(gnd), - .combout(\inst|Selector45~0_combout ), + .combout(\inst|Selector55~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector45~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector45~0 .sum_lutc_input = "datac"; +defparam \inst|Selector55~0 .lut_mask = 16'hFC30; +defparam \inst|Selector55~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N19 -dffeas \inst|PC_stack[1][7] ( +// Location: FF_X60_Y42_N13 +dffeas \inst|PC_stack[2][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector45~0_combout ), + .d(\inst|Selector55~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4718,34 +5141,34 @@ dffeas \inst|PC_stack[1][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][7]~q ), + .q(\inst|PC_stack[2][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][7] .power_up = "low"; +defparam \inst|PC_stack[2][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N28 -fiftyfivenm_lcell_comb \inst|Selector34~0 ( +// Location: LCCOMB_X57_Y41_N0 +fiftyfivenm_lcell_comb \inst|Selector44~0 ( // Equation(s): -// \inst|Selector34~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [7]))) +// \inst|Selector44~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][8]~q )) - .dataa(\inst|state.ex_return~q ), - .datab(\inst|PC_stack[1][7]~q ), - .datac(\inst|PC [7]), - .datad(gnd), + .dataa(\inst|PC_stack[0][8]~q ), + .datab(gnd), + .datac(\inst|PC_stack[2][8]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector34~0_combout ), + .combout(\inst|Selector44~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector34~0 .lut_mask = 16'hD8D8; -defparam \inst|Selector34~0 .sum_lutc_input = "datac"; +defparam \inst|Selector44~0 .lut_mask = 16'hF0AA; +defparam \inst|Selector44~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N29 -dffeas \inst|PC_stack[0][7] ( +// Location: FF_X57_Y41_N1 +dffeas \inst|PC_stack[1][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector34~0_combout ), + .d(\inst|Selector44~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4754,106 +5177,106 @@ dffeas \inst|PC_stack[0][7] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][7]~q ), + .q(\inst|PC_stack[1][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][7] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][7] .power_up = "low"; +defparam \inst|PC_stack[1][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N24 -fiftyfivenm_lcell_comb \inst|Selector4~2 ( +// Location: LCCOMB_X57_Y41_N30 +fiftyfivenm_lcell_comb \inst|Selector33~0 ( // Equation(s): -// \inst|Selector4~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][7]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector4~1_combout ))) +// \inst|Selector33~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [8]))) - .dataa(\inst10|state.Init~q ), - .datab(\inst|Selector4~1_combout ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][7]~q ), + .dataa(\inst|PC_stack[1][8]~q ), + .datab(\inst|PC [8]), + .datac(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector4~2_combout ), + .combout(\inst|Selector33~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector4~2 .lut_mask = 16'hF808; -defparam \inst|Selector4~2 .sum_lutc_input = "datac"; +defparam \inst|Selector33~0 .lut_mask = 16'hAACC; +defparam \inst|Selector33~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N25 -dffeas \inst|PC[7] ( +// Location: FF_X57_Y41_N31 +dffeas \inst|PC_stack[0][8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector4~2_combout ), + .d(\inst|Selector33~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [7]), + .q(\inst|PC_stack[0][8]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[7] .is_wysiwyg = "true"; -defparam \inst|PC[7] .power_up = "low"; +defparam \inst|PC_stack[0][8] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N26 -fiftyfivenm_lcell_comb \inst|next_mem_addr[7]~7 ( +// Location: LCCOMB_X56_Y42_N30 +fiftyfivenm_lcell_comb \inst|PC_stack[9][10]~feeder ( // Equation(s): -// \inst|next_mem_addr[7]~7_combout = (\inst|Selector4~0_combout ) # ((\inst|state.fetch~q & \inst|PC [7])) +// \inst|PC_stack[9][10]~feeder_combout = \inst|PC_stack[8][10]~q - .dataa(\inst|state.fetch~q ), + .dataa(gnd), .datab(gnd), - .datac(\inst|PC [7]), - .datad(\inst|Selector4~0_combout ), + .datac(gnd), + .datad(\inst|PC_stack[8][10]~q ), .cin(gnd), - .combout(\inst|next_mem_addr[7]~7_combout ), + .combout(\inst|PC_stack[9][10]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|next_mem_addr[7]~7 .lut_mask = 16'hFFA0; -defparam \inst|next_mem_addr[7]~7 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][10]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][10]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N11 -dffeas \inst|PC_stack[9][8] ( +// Location: FF_X56_Y42_N31 +dffeas \inst|PC_stack[9][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|PC_stack[8][8]~q ), + .d(\inst|PC_stack[9][10]~feeder_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][8]~q ), + .q(\inst|PC_stack[9][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][8] .power_up = "low"; +defparam \inst|PC_stack[9][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N26 -fiftyfivenm_lcell_comb \inst|Selector121~0 ( +// Location: LCCOMB_X54_Y41_N2 +fiftyfivenm_lcell_comb \inst|Selector119~0 ( // Equation(s): -// \inst|Selector121~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][8]~q ))) +// \inst|Selector119~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][10]~q )) - .dataa(\inst|PC_stack[9][8]~q ), - .datab(\inst|PC_stack[7][8]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[7][10]~q ), + .datad(\inst|PC_stack[9][10]~q ), .cin(gnd), - .combout(\inst|Selector121~0_combout ), + .combout(\inst|Selector119~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector121~0 .lut_mask = 16'hACAC; -defparam \inst|Selector121~0 .sum_lutc_input = "datac"; +defparam \inst|Selector119~0 .lut_mask = 16'hFA50; +defparam \inst|Selector119~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N27 -dffeas \inst|PC_stack[8][8] ( +// Location: FF_X54_Y41_N3 +dffeas \inst|PC_stack[8][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector121~0_combout ), + .d(\inst|Selector119~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4862,34 +5285,34 @@ dffeas \inst|PC_stack[8][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][8]~q ), + .q(\inst|PC_stack[8][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][8] .power_up = "low"; +defparam \inst|PC_stack[8][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N14 -fiftyfivenm_lcell_comb \inst|Selector110~0 ( +// Location: LCCOMB_X54_Y41_N8 +fiftyfivenm_lcell_comb \inst|Selector108~0 ( // Equation(s): -// \inst|Selector110~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][8]~q )) +// \inst|Selector108~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][10]~q ))) - .dataa(\inst|PC_stack[6][8]~q ), - .datab(\inst|state.ex_return~q ), - .datac(\inst|PC_stack[8][8]~q ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|PC_stack[8][10]~q ), + .datac(\inst|PC_stack[6][10]~q ), .datad(gnd), .cin(gnd), - .combout(\inst|Selector110~0_combout ), + .combout(\inst|Selector108~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector110~0 .lut_mask = 16'hE2E2; -defparam \inst|Selector110~0 .sum_lutc_input = "datac"; +defparam \inst|Selector108~0 .lut_mask = 16'hD8D8; +defparam \inst|Selector108~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N15 -dffeas \inst|PC_stack[7][8] ( +// Location: FF_X54_Y41_N9 +dffeas \inst|PC_stack[7][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector110~0_combout ), + .d(\inst|Selector108~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4898,34 +5321,34 @@ dffeas \inst|PC_stack[7][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][8]~q ), + .q(\inst|PC_stack[7][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][8] .power_up = "low"; +defparam \inst|PC_stack[7][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N30 -fiftyfivenm_lcell_comb \inst|Selector99~0 ( +// Location: LCCOMB_X54_Y41_N22 +fiftyfivenm_lcell_comb \inst|Selector97~0 ( // Equation(s): -// \inst|Selector99~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][8]~q )) +// \inst|Selector97~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][10]~q ))) - .dataa(\inst|PC_stack[5][8]~q ), - .datab(\inst|PC_stack[7][8]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[7][10]~q ), + .datad(\inst|PC_stack[5][10]~q ), .cin(gnd), - .combout(\inst|Selector99~0_combout ), + .combout(\inst|Selector97~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector99~0 .lut_mask = 16'hCACA; -defparam \inst|Selector99~0 .sum_lutc_input = "datac"; +defparam \inst|Selector97~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector97~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N31 -dffeas \inst|PC_stack[6][8] ( +// Location: FF_X54_Y41_N23 +dffeas \inst|PC_stack[6][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector99~0_combout ), + .d(\inst|Selector97~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4934,34 +5357,34 @@ dffeas \inst|PC_stack[6][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][8]~q ), + .q(\inst|PC_stack[6][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][8] .power_up = "low"; +defparam \inst|PC_stack[6][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N22 -fiftyfivenm_lcell_comb \inst|Selector88~0 ( +// Location: LCCOMB_X54_Y41_N12 +fiftyfivenm_lcell_comb \inst|Selector86~0 ( // Equation(s): -// \inst|Selector88~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][8]~q ))) +// \inst|Selector86~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][10]~q ))) - .dataa(\inst|PC_stack[6][8]~q ), - .datab(\inst|PC_stack[4][8]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|PC_stack[6][10]~q ), + .datab(gnd), + .datac(\inst|PC_stack[4][10]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector88~0_combout ), + .combout(\inst|Selector86~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector88~0 .lut_mask = 16'hACAC; -defparam \inst|Selector88~0 .sum_lutc_input = "datac"; +defparam \inst|Selector86~0 .lut_mask = 16'hAAF0; +defparam \inst|Selector86~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N23 -dffeas \inst|PC_stack[5][8] ( +// Location: FF_X54_Y41_N13 +dffeas \inst|PC_stack[5][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector88~0_combout ), + .d(\inst|Selector86~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -4970,34 +5393,34 @@ dffeas \inst|PC_stack[5][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][8]~q ), + .q(\inst|PC_stack[5][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][8] .power_up = "low"; +defparam \inst|PC_stack[5][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N18 -fiftyfivenm_lcell_comb \inst|Selector77~0 ( +// Location: LCCOMB_X54_Y41_N30 +fiftyfivenm_lcell_comb \inst|Selector75~0 ( // Equation(s): -// \inst|Selector77~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][8]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][8]~q ))) +// \inst|Selector75~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][10]~q )) - .dataa(\inst|PC_stack[5][8]~q ), - .datab(\inst|PC_stack[3][8]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[3][10]~q ), + .datad(\inst|PC_stack[5][10]~q ), .cin(gnd), - .combout(\inst|Selector77~0_combout ), + .combout(\inst|Selector75~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector77~0 .lut_mask = 16'hACAC; -defparam \inst|Selector77~0 .sum_lutc_input = "datac"; +defparam \inst|Selector75~0 .lut_mask = 16'hFA50; +defparam \inst|Selector75~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N19 -dffeas \inst|PC_stack[4][8] ( +// Location: FF_X54_Y41_N31 +dffeas \inst|PC_stack[4][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector77~0_combout ), + .d(\inst|Selector75~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -5006,34 +5429,34 @@ dffeas \inst|PC_stack[4][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][8]~q ), + .q(\inst|PC_stack[4][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][8] .power_up = "low"; +defparam \inst|PC_stack[4][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N20 -fiftyfivenm_lcell_comb \inst|Selector66~0 ( +// Location: LCCOMB_X54_Y41_N4 +fiftyfivenm_lcell_comb \inst|Selector64~0 ( // Equation(s): -// \inst|Selector66~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][8]~q )) +// \inst|Selector64~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][10]~q ))) - .dataa(\inst|PC_stack[2][8]~q ), - .datab(\inst|PC_stack[4][8]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[4][10]~q ), + .datad(\inst|PC_stack[2][10]~q ), .cin(gnd), - .combout(\inst|Selector66~0_combout ), + .combout(\inst|Selector64~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector66~0 .lut_mask = 16'hCACA; -defparam \inst|Selector66~0 .sum_lutc_input = "datac"; +defparam \inst|Selector64~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector64~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N21 -dffeas \inst|PC_stack[3][8] ( +// Location: FF_X54_Y41_N5 +dffeas \inst|PC_stack[3][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector66~0_combout ), + .d(\inst|Selector64~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -5042,34 +5465,34 @@ dffeas \inst|PC_stack[3][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][8]~q ), + .q(\inst|PC_stack[3][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][8] .power_up = "low"; +defparam \inst|PC_stack[3][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N16 -fiftyfivenm_lcell_comb \inst|Selector55~0 ( +// Location: LCCOMB_X54_Y41_N18 +fiftyfivenm_lcell_comb \inst|Selector53~0 ( // Equation(s): -// \inst|Selector55~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][8]~q )) +// \inst|Selector53~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][10]~q ))) .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|PC_stack[1][8]~q ), - .datad(\inst|PC_stack[3][8]~q ), + .datac(\inst|PC_stack[3][10]~q ), + .datad(\inst|PC_stack[1][10]~q ), .cin(gnd), - .combout(\inst|Selector55~0_combout ), + .combout(\inst|Selector53~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector55~0 .lut_mask = 16'hFA50; -defparam \inst|Selector55~0 .sum_lutc_input = "datac"; +defparam \inst|Selector53~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector53~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N17 -dffeas \inst|PC_stack[2][8] ( +// Location: FF_X54_Y41_N19 +dffeas \inst|PC_stack[2][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector55~0_combout ), + .d(\inst|Selector53~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -5078,34 +5501,34 @@ dffeas \inst|PC_stack[2][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][8]~q ), + .q(\inst|PC_stack[2][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][8] .power_up = "low"; +defparam \inst|PC_stack[2][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N4 -fiftyfivenm_lcell_comb \inst|Selector44~0 ( +// Location: LCCOMB_X54_Y41_N0 +fiftyfivenm_lcell_comb \inst|Selector42~0 ( // Equation(s): -// \inst|Selector44~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][8]~q )) +// \inst|Selector42~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][10]~q )) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[0][8]~q ), - .datad(\inst|PC_stack[2][8]~q ), + .dataa(gnd), + .datab(\inst|PC_stack[0][10]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[2][10]~q ), .cin(gnd), - .combout(\inst|Selector44~0_combout ), + .combout(\inst|Selector42~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector44~0 .lut_mask = 16'hFA50; -defparam \inst|Selector44~0 .sum_lutc_input = "datac"; +defparam \inst|Selector42~0 .lut_mask = 16'hFC0C; +defparam \inst|Selector42~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N5 -dffeas \inst|PC_stack[1][8] ( +// Location: FF_X54_Y41_N1 +dffeas \inst|PC_stack[1][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector44~0_combout ), + .d(\inst|Selector42~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -5114,34 +5537,34 @@ dffeas \inst|PC_stack[1][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][8]~q ), + .q(\inst|PC_stack[1][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][8] .power_up = "low"; +defparam \inst|PC_stack[1][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N8 -fiftyfivenm_lcell_comb \inst|Selector33~0 ( +// Location: LCCOMB_X54_Y41_N20 +fiftyfivenm_lcell_comb \inst|Selector31~0 ( // Equation(s): -// \inst|Selector33~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][8]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [8])) +// \inst|Selector31~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [10]))) - .dataa(\inst|PC [8]), - .datab(\inst|PC_stack[1][8]~q ), - .datac(\inst|state.ex_return~q ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|PC_stack[1][10]~q ), + .datac(\inst|PC [10]), .datad(gnd), .cin(gnd), - .combout(\inst|Selector33~0_combout ), + .combout(\inst|Selector31~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector33~0 .lut_mask = 16'hCACA; -defparam \inst|Selector33~0 .sum_lutc_input = "datac"; +defparam \inst|Selector31~0 .lut_mask = 16'hD8D8; +defparam \inst|Selector31~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N9 -dffeas \inst|PC_stack[0][8] ( +// Location: FF_X54_Y41_N21 +dffeas \inst|PC_stack[0][10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector33~0_combout ), + .d(\inst|Selector31~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -5150,7125 +5573,6886 @@ dffeas \inst|PC_stack[0][8] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][8]~q ), + .q(\inst|PC_stack[0][10]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][8] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][8] .power_up = "low"; +defparam \inst|PC_stack[0][10] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N16 -fiftyfivenm_lcell_comb \inst|Add0~16 ( +// Location: LCCOMB_X55_Y41_N14 +fiftyfivenm_lcell_comb \inst|Add0~14 ( // Equation(s): -// \inst|Add0~16_combout = (\inst|PC [8] & (\inst|Add0~15 $ (GND))) # (!\inst|PC [8] & (!\inst|Add0~15 & VCC)) -// \inst|Add0~17 = CARRY((\inst|PC [8] & !\inst|Add0~15 )) +// \inst|Add0~14_combout = (\inst|PC [7] & (!\inst|Add0~13 )) # (!\inst|PC [7] & ((\inst|Add0~13 ) # (GND))) +// \inst|Add0~15 = CARRY((!\inst|Add0~13 ) # (!\inst|PC [7])) - .dataa(\inst|PC [8]), - .datab(gnd), + .dataa(gnd), + .datab(\inst|PC [7]), .datac(gnd), .datad(vcc), - .cin(\inst|Add0~15 ), - .combout(\inst|Add0~16_combout ), - .cout(\inst|Add0~17 )); + .cin(\inst|Add0~13 ), + .combout(\inst|Add0~14_combout ), + .cout(\inst|Add0~15 )); // synopsys translate_off -defparam \inst|Add0~16 .lut_mask = 16'hA50A; -defparam \inst|Add0~16 .sum_lutc_input = "cin"; +defparam \inst|Add0~14 .lut_mask = 16'h3C3F; +defparam \inst|Add0~14 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N6 -fiftyfivenm_lcell_comb \inst|Selector3~1 ( +// Location: LCCOMB_X52_Y42_N14 +fiftyfivenm_lcell_comb \inst|Selector4~1 ( // Equation(s): -// \inst|Selector3~1_combout = (\inst|Selector3~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~16_combout )) +// \inst|Selector4~1_combout = (\inst|Selector4~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~14_combout )) - .dataa(\inst|Selector3~0_combout ), - .datab(gnd), - .datac(\inst|state.fetch~q ), - .datad(\inst|Add0~16_combout ), + .dataa(gnd), + .datab(\inst|state.fetch~q ), + .datac(\inst|Selector4~0_combout ), + .datad(\inst|Add0~14_combout ), .cin(gnd), - .combout(\inst|Selector3~1_combout ), + .combout(\inst|Selector4~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector3~1 .lut_mask = 16'hFAAA; -defparam \inst|Selector3~1 .sum_lutc_input = "datac"; +defparam \inst|Selector4~1 .lut_mask = 16'hFCF0; +defparam \inst|Selector4~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y42_N6 -fiftyfivenm_lcell_comb \inst|Selector3~2 ( +// Location: LCCOMB_X56_Y42_N8 +fiftyfivenm_lcell_comb \inst|PC_stack[9][7]~feeder ( // Equation(s): -// \inst|Selector3~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][8]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & ((\inst|Selector3~1_combout )))) +// \inst|PC_stack[9][7]~feeder_combout = \inst|PC_stack[8][7]~q - .dataa(\inst10|state.Init~q ), - .datab(\inst|PC_stack[0][8]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|Selector3~1_combout ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst|PC_stack[8][7]~q ), .cin(gnd), - .combout(\inst|Selector3~2_combout ), + .combout(\inst|PC_stack[9][7]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector3~2 .lut_mask = 16'hCAC0; -defparam \inst|Selector3~2 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][7]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][7]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y42_N7 -dffeas \inst|PC[8] ( +// Location: FF_X56_Y42_N9 +dffeas \inst|PC_stack[9][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector3~2_combout ), + .d(\inst|PC_stack[9][7]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [8]), + .q(\inst|PC_stack[9][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[8] .is_wysiwyg = "true"; -defparam \inst|PC[8] .power_up = "low"; +defparam \inst|PC_stack[9][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N18 -fiftyfivenm_lcell_comb \inst|Add0~18 ( +// Location: LCCOMB_X52_Y42_N18 +fiftyfivenm_lcell_comb \inst|Selector122~0 ( // Equation(s): -// \inst|Add0~18_combout = (\inst|PC [9] & (!\inst|Add0~17 )) # (!\inst|PC [9] & ((\inst|Add0~17 ) # (GND))) -// \inst|Add0~19 = CARRY((!\inst|Add0~17 ) # (!\inst|PC [9])) +// \inst|Selector122~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][7]~q )) .dataa(gnd), - .datab(\inst|PC [9]), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add0~17 ), - .combout(\inst|Add0~18_combout ), - .cout(\inst|Add0~19 )); -// synopsys translate_off -defparam \inst|Add0~18 .lut_mask = 16'h3C3F; -defparam \inst|Add0~18 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y43_N0 -fiftyfivenm_lcell_comb \inst|state~37 ( -// Equation(s): -// \inst|state~37_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (!\inst|altsyncram_component|auto_generated|q_a [11] & \inst|altsyncram_component|auto_generated|q_a [12]))) - - .dataa(\inst|state.decode~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [15]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|altsyncram_component|auto_generated|q_a [12]), - .cin(gnd), - .combout(\inst|state~37_combout ), - .cout()); -// synopsys translate_off -defparam \inst|state~37 .lut_mask = 16'h0200; -defparam \inst|state~37 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y43_N24 -fiftyfivenm_lcell_comb \inst|state~38 ( -// Equation(s): -// \inst|state~38_combout = (!\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~37_combout )) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), - .datab(gnd), - .datac(\inst|altsyncram_component|auto_generated|q_a [14]), - .datad(\inst|state~37_combout ), + .datab(\inst|PC_stack[7][7]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[9][7]~q ), .cin(gnd), - .combout(\inst|state~38_combout ), + .combout(\inst|Selector122~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~38 .lut_mask = 16'h5000; -defparam \inst|state~38 .sum_lutc_input = "datac"; +defparam \inst|Selector122~0 .lut_mask = 16'hFC0C; +defparam \inst|Selector122~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X47_Y43_N25 -dffeas \inst|state.ex_or ( +// Location: FF_X52_Y42_N19 +dffeas \inst|PC_stack[8][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~38_combout ), + .d(\inst|Selector122~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_or~q ), + .q(\inst|PC_stack[8][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_or .is_wysiwyg = "true"; -defparam \inst|state.ex_or .power_up = "low"; +defparam \inst|PC_stack[8][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N24 -fiftyfivenm_lcell_comb \inst|Selector30~1 ( +// Location: LCCOMB_X52_Y42_N28 +fiftyfivenm_lcell_comb \inst|Selector111~0 ( // Equation(s): -// \inst|Selector30~1_combout = (\inst|state.ex_iload~q ) # ((!\inst|altsyncram_component|auto_generated|q_a [14] & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|Selector30~0_combout ))) +// \inst|Selector111~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][7]~q )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), - .datab(\inst|altsyncram_component|auto_generated|q_a [13]), - .datac(\inst|state.ex_iload~q ), - .datad(\inst|Selector30~0_combout ), + .dataa(\inst|PC_stack[6][7]~q ), + .datab(gnd), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[8][7]~q ), .cin(gnd), - .combout(\inst|Selector30~1_combout ), + .combout(\inst|Selector111~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector30~1 .lut_mask = 16'hF1F0; -defparam \inst|Selector30~1 .sum_lutc_input = "datac"; +defparam \inst|Selector111~0 .lut_mask = 16'hFA0A; +defparam \inst|Selector111~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N25 -dffeas \inst|state.ex_load ( +// Location: FF_X52_Y42_N29 +dffeas \inst|PC_stack[7][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector30~1_combout ), + .d(\inst|Selector111~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_load~q ), + .q(\inst|PC_stack[7][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_load .is_wysiwyg = "true"; -defparam \inst|state.ex_load .power_up = "low"; +defparam \inst|PC_stack[7][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N14 -fiftyfivenm_lcell_comb \inst|Selector27~1 ( +// Location: LCCOMB_X52_Y42_N6 +fiftyfivenm_lcell_comb \inst|Selector100~0 ( // Equation(s): -// \inst|Selector27~1_combout = (\inst|state.ex_or~q ) # (\inst|state.ex_load~q ) +// \inst|Selector100~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][7]~q )) .dataa(gnd), - .datab(\inst|state.ex_or~q ), - .datac(\inst|state.ex_load~q ), - .datad(gnd), - .cin(gnd), - .combout(\inst|Selector27~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector27~1 .lut_mask = 16'hFCFC; -defparam \inst|Selector27~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y40_N28 -fiftyfivenm_lcell_comb \inst|state~36 ( -// Equation(s): -// \inst|state~36_combout = (!\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|state~35_combout & \inst|altsyncram_component|auto_generated|q_a [14])) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), - .datab(gnd), - .datac(\inst|state~35_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|PC_stack[5][7]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[7][7]~q ), .cin(gnd), - .combout(\inst|state~36_combout ), + .combout(\inst|Selector100~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~36 .lut_mask = 16'h5000; -defparam \inst|state~36 .sum_lutc_input = "datac"; +defparam \inst|Selector100~0 .lut_mask = 16'hFC0C; +defparam \inst|Selector100~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N29 -dffeas \inst|state.ex_xor ( +// Location: FF_X52_Y42_N7 +dffeas \inst|PC_stack[6][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~36_combout ), + .d(\inst|Selector100~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_xor~q ), + .q(\inst|PC_stack[6][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_xor .is_wysiwyg = "true"; -defparam \inst|state.ex_xor .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X45_Y40_N22 -fiftyfivenm_lcell_comb \inst|Selector20~1 ( -// Equation(s): -// \inst|Selector20~1_combout = (\inst|altsyncram_component|auto_generated|q_a [7] & ((\inst|Selector27~1_combout ) # ((!\inst|AC [7] & \inst|state.ex_xor~q )))) # (!\inst|altsyncram_component|auto_generated|q_a [7] & (\inst|AC [7] & ((\inst|state.ex_xor~q -// )))) - - .dataa(\inst|AC [7]), - .datab(\inst|Selector27~1_combout ), - .datac(\inst|state.ex_xor~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [7]), - .cin(gnd), - .combout(\inst|Selector20~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector20~1 .lut_mask = 16'hDCA0; -defparam \inst|Selector20~1 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[6][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N2 -fiftyfivenm_lcell_comb \inst|state~46 ( +// Location: LCCOMB_X52_Y42_N4 +fiftyfivenm_lcell_comb \inst|Selector89~0 ( // Equation(s): -// \inst|state~46_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~43_combout )) +// \inst|Selector89~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][7]~q )) - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [14]), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|state~43_combout ), + .dataa(\inst|PC_stack[4][7]~q ), + .datab(gnd), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[6][7]~q ), .cin(gnd), - .combout(\inst|state~46_combout ), + .combout(\inst|Selector89~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~46 .lut_mask = 16'hC000; -defparam \inst|state~46 .sum_lutc_input = "datac"; +defparam \inst|Selector89~0 .lut_mask = 16'hFA0A; +defparam \inst|Selector89~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y42_N3 -dffeas \inst|state.ex_shift ( +// Location: FF_X52_Y42_N5 +dffeas \inst|PC_stack[5][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~46_combout ), + .d(\inst|Selector89~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_shift~q ), + .q(\inst|PC_stack[5][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_shift .is_wysiwyg = "true"; -defparam \inst|state.ex_shift .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X45_Y40_N8 -fiftyfivenm_lcell_comb \inst|Selector19~0 ( -// Equation(s): -// \inst|Selector19~0_combout = (\inst|IR [3] & (\inst|AC [15] & (\inst|IR [4] & \inst|state.ex_shift~q ))) - - .dataa(\inst|IR [3]), - .datab(\inst|AC [15]), - .datac(\inst|IR [4]), - .datad(\inst|state.ex_shift~q ), - .cin(gnd), - .combout(\inst|Selector19~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector19~0 .lut_mask = 16'h8000; -defparam \inst|Selector19~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[5][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N10 -fiftyfivenm_lcell_comb \inst|state~42 ( +// Location: LCCOMB_X52_Y42_N10 +fiftyfivenm_lcell_comb \inst|Selector78~0 ( // Equation(s): -// \inst|state~42_combout = (!\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|state~35_combout & !\inst|altsyncram_component|auto_generated|q_a [14])) +// \inst|Selector78~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][7]~q ))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), - .datab(gnd), - .datac(\inst|state~35_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .dataa(gnd), + .datab(\inst|PC_stack[5][7]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[3][7]~q ), .cin(gnd), - .combout(\inst|state~42_combout ), + .combout(\inst|Selector78~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~42 .lut_mask = 16'h0050; -defparam \inst|state~42 .sum_lutc_input = "datac"; +defparam \inst|Selector78~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector78~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N11 -dffeas \inst|state.ex_add ( +// Location: FF_X52_Y42_N11 +dffeas \inst|PC_stack[4][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~42_combout ), + .d(\inst|Selector78~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_add~q ), + .q(\inst|PC_stack[4][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_add .is_wysiwyg = "true"; -defparam \inst|state.ex_add .power_up = "low"; +defparam \inst|PC_stack[4][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N12 -fiftyfivenm_lcell_comb \inst|state~44 ( +// Location: LCCOMB_X52_Y42_N0 +fiftyfivenm_lcell_comb \inst|Selector67~0 ( // Equation(s): -// \inst|state~44_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~43_combout )) +// \inst|Selector67~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][7]~q ))) - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [14]), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|state~43_combout ), + .dataa(\inst|PC_stack[4][7]~q ), + .datab(gnd), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[2][7]~q ), .cin(gnd), - .combout(\inst|state~44_combout ), + .combout(\inst|Selector67~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~44 .lut_mask = 16'h3000; -defparam \inst|state~44 .sum_lutc_input = "datac"; +defparam \inst|Selector67~0 .lut_mask = 16'hAFA0; +defparam \inst|Selector67~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y42_N13 -dffeas \inst|state.ex_sub ( +// Location: FF_X52_Y42_N1 +dffeas \inst|PC_stack[3][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~44_combout ), + .d(\inst|Selector67~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_sub~q ), + .q(\inst|PC_stack[3][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_sub .is_wysiwyg = "true"; -defparam \inst|state.ex_sub .power_up = "low"; +defparam \inst|PC_stack[3][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N30 -fiftyfivenm_lcell_comb \inst|Add1~40 ( +// Location: LCCOMB_X52_Y42_N2 +fiftyfivenm_lcell_comb \inst|Selector56~0 ( // Equation(s): -// \inst|Add1~40_combout = (\inst|AC [7] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst|Selector56~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][7]~q )) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|AC [7]), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst|PC_stack[1][7]~q ), + .datab(gnd), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[3][7]~q ), .cin(gnd), - .combout(\inst|Add1~40_combout ), + .combout(\inst|Selector56~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~40 .lut_mask = 16'hCCC8; -defparam \inst|Add1~40 .sum_lutc_input = "datac"; +defparam \inst|Selector56~0 .lut_mask = 16'hFA0A; +defparam \inst|Selector56~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N22 -fiftyfivenm_lcell_comb \inst|state~39 ( -// Equation(s): -// \inst|state~39_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|state.decode~q & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|altsyncram_component|auto_generated|q_a [15]))) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), - .datab(\inst|state.decode~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|altsyncram_component|auto_generated|q_a [15]), - .cin(gnd), - .combout(\inst|state~39_combout ), - .cout()); +// Location: FF_X52_Y42_N3 +dffeas \inst|PC_stack[2][7] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector56~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[2][7]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|state~39 .lut_mask = 16'h4000; -defparam \inst|state~39 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[2][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N8 -fiftyfivenm_lcell_comb \inst|state~40 ( +// Location: LCCOMB_X52_Y42_N26 +fiftyfivenm_lcell_comb \inst|Selector45~0 ( // Equation(s): -// \inst|state~40_combout = (\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state~39_combout )) +// \inst|Selector45~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][7]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][7]~q )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), - .datab(gnd), - .datac(\inst|altsyncram_component|auto_generated|q_a [12]), - .datad(\inst|state~39_combout ), + .dataa(gnd), + .datab(\inst|PC_stack[0][7]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[2][7]~q ), .cin(gnd), - .combout(\inst|state~40_combout ), + .combout(\inst|Selector45~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~40 .lut_mask = 16'hA000; -defparam \inst|state~40 .sum_lutc_input = "datac"; +defparam \inst|Selector45~0 .lut_mask = 16'hFC0C; +defparam \inst|Selector45~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X47_Y40_N9 -dffeas \inst|state.ex_loadi ( +// Location: FF_X52_Y42_N27 +dffeas \inst|PC_stack[1][7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~40_combout ), + .d(\inst|Selector45~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_loadi~q ), + .q(\inst|PC_stack[1][7]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_loadi .is_wysiwyg = "true"; -defparam \inst|state.ex_loadi .power_up = "low"; +defparam \inst|PC_stack[1][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N30 -fiftyfivenm_lcell_comb \inst|Add1~1 ( +// Location: LCCOMB_X52_Y42_N20 +fiftyfivenm_lcell_comb \inst|Selector34~0 ( // Equation(s): -// \inst|Add1~1_combout = (!\inst|state.ex_loadi~q & (\inst|state.ex_addi~q & !\inst|state.ex_in2~q )) +// \inst|Selector34~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][7]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [7]))) - .dataa(\inst|state.ex_loadi~q ), + .dataa(\inst|PC_stack[1][7]~q ), .datab(gnd), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|state.ex_in2~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC [7]), .cin(gnd), - .combout(\inst|Add1~1_combout ), + .combout(\inst|Selector34~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~1 .lut_mask = 16'h0050; -defparam \inst|Add1~1 .sum_lutc_input = "datac"; +defparam \inst|Selector34~0 .lut_mask = 16'hAFA0; +defparam \inst|Selector34~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N2 -fiftyfivenm_lcell_comb \inst|Add1~38 ( -// Equation(s): -// \inst|Add1~38_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [7]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [7])) - - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [7]), - .datad(gnd), - .cin(gnd), - .combout(\inst|Add1~38_combout ), - .cout()); +// Location: FF_X52_Y42_N21 +dffeas \inst|PC_stack[0][7] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector34~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[0][7]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~38 .lut_mask = 16'h2C2C; -defparam \inst|Add1~38 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[0][7] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N18 -fiftyfivenm_lcell_comb \inst|state~45 ( +// Location: LCCOMB_X52_Y42_N30 +fiftyfivenm_lcell_comb \inst|Selector4~2 ( // Equation(s): -// \inst|state~45_combout = (\inst|Selector30~0_combout & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|altsyncram_component|auto_generated|q_a [14])) +// \inst|Selector4~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][7]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector4~1_combout ))) - .dataa(\inst|Selector30~0_combout ), - .datab(gnd), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .dataa(\inst|state.ex_return~q ), + .datab(\inst10|state.Init~q ), + .datac(\inst|Selector4~1_combout ), + .datad(\inst|PC_stack[0][7]~q ), .cin(gnd), - .combout(\inst|state~45_combout ), + .combout(\inst|Selector4~2_combout ), .cout()); // synopsys translate_off -defparam \inst|state~45 .lut_mask = 16'h0A00; -defparam \inst|state~45 .sum_lutc_input = "datac"; +defparam \inst|Selector4~2 .lut_mask = 16'hEA40; +defparam \inst|Selector4~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N19 -dffeas \inst|state.ex_and ( +// Location: FF_X52_Y42_N31 +dffeas \inst|PC[7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~45_combout ), + .d(\inst|Selector4~2_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_and~q ), + .q(\inst|PC [7]), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_and .is_wysiwyg = "true"; -defparam \inst|state.ex_and .power_up = "low"; +defparam \inst|PC[7] .is_wysiwyg = "true"; +defparam \inst|PC[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N12 -fiftyfivenm_lcell_comb \inst|WideOr3~0 ( +// Location: LCCOMB_X55_Y41_N16 +fiftyfivenm_lcell_comb \inst|Add0~16 ( +// Equation(s): +// \inst|Add0~16_combout = (\inst|PC [8] & (\inst|Add0~15 $ (GND))) # (!\inst|PC [8] & (!\inst|Add0~15 & VCC)) +// \inst|Add0~17 = CARRY((\inst|PC [8] & !\inst|Add0~15 )) + + .dataa(gnd), + .datab(\inst|PC [8]), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add0~15 ), + .combout(\inst|Add0~16_combout ), + .cout(\inst|Add0~17 )); +// synopsys translate_off +defparam \inst|Add0~16 .lut_mask = 16'hC30C; +defparam \inst|Add0~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y41_N18 +fiftyfivenm_lcell_comb \inst|Add0~18 ( +// Equation(s): +// \inst|Add0~18_combout = (\inst|PC [9] & (!\inst|Add0~17 )) # (!\inst|PC [9] & ((\inst|Add0~17 ) # (GND))) +// \inst|Add0~19 = CARRY((!\inst|Add0~17 ) # (!\inst|PC [9])) + + .dataa(\inst|PC [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add0~17 ), + .combout(\inst|Add0~18_combout ), + .cout(\inst|Add0~19 )); +// synopsys translate_off +defparam \inst|Add0~18 .lut_mask = 16'h5A5F; +defparam \inst|Add0~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y41_N20 +fiftyfivenm_lcell_comb \inst|Add0~20 ( // Equation(s): -// \inst|WideOr3~0_combout = (!\inst|state.ex_addi~q & (!\inst|state.ex_loadi~q & (!\inst|state.ex_and~q & !\inst|state.ex_in2~q ))) +// \inst|Add0~20_combout = \inst|Add0~19 $ (!\inst|PC [10]) - .dataa(\inst|state.ex_addi~q ), - .datab(\inst|state.ex_loadi~q ), - .datac(\inst|state.ex_and~q ), - .datad(\inst|state.ex_in2~q ), - .cin(gnd), - .combout(\inst|WideOr3~0_combout ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst|PC [10]), + .cin(\inst|Add0~19 ), + .combout(\inst|Add0~20_combout ), .cout()); // synopsys translate_off -defparam \inst|WideOr3~0 .lut_mask = 16'h0001; -defparam \inst|WideOr3~0 .sum_lutc_input = "datac"; +defparam \inst|Add0~20 .lut_mask = 16'hF00F; +defparam \inst|Add0~20 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N4 -fiftyfivenm_lcell_comb \inst|WideOr3~1 ( +// Location: LCCOMB_X54_Y42_N20 +fiftyfivenm_lcell_comb \inst|state~35 ( // Equation(s): -// \inst|WideOr3~1_combout = (!\inst|state.ex_shift~q & (!\inst|state.ex_or~q & (\inst|WideOr3~0_combout & !\inst|state.ex_xor~q ))) +// \inst|state~35_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (\inst|altsyncram_component|auto_generated|q_a [11] & \inst|altsyncram_component|auto_generated|q_a [12]))) - .dataa(\inst|state.ex_shift~q ), - .datab(\inst|state.ex_or~q ), - .datac(\inst|WideOr3~0_combout ), - .datad(\inst|state.ex_xor~q ), + .dataa(\inst|state.decode~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [15]), + .datac(\inst|altsyncram_component|auto_generated|q_a [11]), + .datad(\inst|altsyncram_component|auto_generated|q_a [12]), .cin(gnd), - .combout(\inst|WideOr3~1_combout ), + .combout(\inst|state~35_combout ), .cout()); // synopsys translate_off -defparam \inst|WideOr3~1 .lut_mask = 16'h0010; -defparam \inst|WideOr3~1 .sum_lutc_input = "datac"; +defparam \inst|state~35 .lut_mask = 16'h2000; +defparam \inst|state~35 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N28 -fiftyfivenm_lcell_comb \inst|Add1~39 ( +// Location: LCCOMB_X54_Y42_N26 +fiftyfivenm_lcell_comb \inst|state~36 ( // Equation(s): -// \inst|Add1~39_combout = (\inst|Add1~1_combout & ((\inst|IR [7]) # ((\inst|Add1~38_combout & \inst|WideOr3~1_combout )))) # (!\inst|Add1~1_combout & (((\inst|Add1~38_combout & \inst|WideOr3~1_combout )))) +// \inst|state~36_combout = (!\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~35_combout )) - .dataa(\inst|Add1~1_combout ), - .datab(\inst|IR [7]), - .datac(\inst|Add1~38_combout ), - .datad(\inst|WideOr3~1_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~35_combout ), .cin(gnd), - .combout(\inst|Add1~39_combout ), + .combout(\inst|state~36_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~39 .lut_mask = 16'hF888; -defparam \inst|Add1~39 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y43_N27 -dffeas \inst|IR[10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [10]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|IR [10]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|IR[10] .is_wysiwyg = "true"; -defparam \inst|IR[10] .power_up = "low"; +defparam \inst|state~36 .lut_mask = 16'h5000; +defparam \inst|state~36 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y43_N25 -dffeas \inst|state.ex_out2 ( +// Location: FF_X54_Y42_N27 +dffeas \inst|state.ex_xor ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|state.ex_out~q ), + .d(\inst|state~36_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_out2~q ), + .q(\inst|state.ex_xor~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_out2 .is_wysiwyg = "true"; -defparam \inst|state.ex_out2 .power_up = "low"; +defparam \inst|state.ex_xor .is_wysiwyg = "true"; +defparam \inst|state.ex_xor .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N18 -fiftyfivenm_lcell_comb \inst|Selector29~0 ( +// Location: LCCOMB_X57_Y40_N10 +fiftyfivenm_lcell_comb \inst|Selector25~3 ( // Equation(s): -// \inst|Selector29~0_combout = (!\inst|state.fetch~q & (\inst|IO_CYCLE~q & (\inst10|state.Init~q & !\inst|state.ex_in2~q ))) +// \inst|Selector25~3_combout = (\inst|state.ex_xor~q & (\inst|AC [2] $ (\inst|altsyncram_component|auto_generated|q_a [2]))) - .dataa(\inst|state.fetch~q ), - .datab(\inst|IO_CYCLE~q ), - .datac(\inst10|state.Init~q ), - .datad(\inst|state.ex_in2~q ), + .dataa(\inst|AC [2]), + .datab(gnd), + .datac(\inst|state.ex_xor~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [2]), .cin(gnd), - .combout(\inst|Selector29~0_combout ), + .combout(\inst|Selector25~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector29~0 .lut_mask = 16'h0040; -defparam \inst|Selector29~0 .sum_lutc_input = "datac"; +defparam \inst|Selector25~3 .lut_mask = 16'h50A0; +defparam \inst|Selector25~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N24 -fiftyfivenm_lcell_comb \inst|Selector29~1 ( +// Location: LCCOMB_X54_Y38_N24 +fiftyfivenm_lcell_comb \inst|state~38 ( // Equation(s): -// \inst|Selector29~1_combout = (\inst|state.ex_out~q ) # ((\inst|state.ex_in~q ) # ((!\inst|state.ex_out2~q & \inst|Selector29~0_combout ))) +// \inst|state~38_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~37_combout )) - .dataa(\inst|state.ex_out~q ), - .datab(\inst|state.ex_in~q ), - .datac(\inst|state.ex_out2~q ), - .datad(\inst|Selector29~0_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), + .datac(gnd), + .datad(\inst|state~37_combout ), .cin(gnd), - .combout(\inst|Selector29~1_combout ), + .combout(\inst|state~38_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector29~1 .lut_mask = 16'hEFEE; -defparam \inst|Selector29~1 .sum_lutc_input = "datac"; +defparam \inst|state~38 .lut_mask = 16'h2200; +defparam \inst|state~38 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y43_N29 -dffeas \inst|IO_CYCLE ( +// Location: FF_X54_Y38_N25 +dffeas \inst|state.ex_or ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|Selector29~1_combout ), - .clrn(vcc), + .d(\inst|state~38_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .sload(gnd), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IO_CYCLE~q ), + .q(\inst|state.ex_or~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|IO_CYCLE .is_wysiwyg = "true"; -defparam \inst|IO_CYCLE .power_up = "low"; +defparam \inst|state.ex_or .is_wysiwyg = "true"; +defparam \inst|state.ex_or .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N18 -fiftyfivenm_lcell_comb \inst3|SWITCH_EN~0 ( +// Location: LCCOMB_X54_Y38_N18 +fiftyfivenm_lcell_comb \inst|Selector30~0 ( // Equation(s): -// \inst3|SWITCH_EN~0_combout = (!\inst|IR [10] & (!\inst|IR [9] & (!\inst|IR [8] & \inst|IO_CYCLE~q ))) +// \inst|Selector30~0_combout = (!\inst|altsyncram_component|auto_generated|q_a [12] & (\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|state.decode~q & !\inst|altsyncram_component|auto_generated|q_a [15]))) - .dataa(\inst|IR [10]), - .datab(\inst|IR [9]), - .datac(\inst|IR [8]), - .datad(\inst|IO_CYCLE~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [12]), + .datab(\inst|altsyncram_component|auto_generated|q_a [11]), + .datac(\inst|state.decode~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [15]), .cin(gnd), - .combout(\inst3|SWITCH_EN~0_combout ), + .combout(\inst|Selector30~0_combout ), .cout()); // synopsys translate_off -defparam \inst3|SWITCH_EN~0 .lut_mask = 16'h0100; -defparam \inst3|SWITCH_EN~0 .sum_lutc_input = "datac"; +defparam \inst|Selector30~0 .lut_mask = 16'h0040; +defparam \inst|Selector30~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N0 -fiftyfivenm_lcell_comb \inst11|tri_enable~0 ( +// Location: LCCOMB_X54_Y38_N8 +fiftyfivenm_lcell_comb \inst|Selector30~1 ( // Equation(s): -// \inst11|tri_enable~0_combout = (\inst|IR [5] & (!\inst|IR [3] & (!\inst|IO_WRITE_int~q & !\inst|IR [2]))) +// \inst|Selector30~1_combout = (\inst|state.ex_iload~q ) # ((!\inst|altsyncram_component|auto_generated|q_a [14] & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|Selector30~0_combout ))) - .dataa(\inst|IR [5]), - .datab(\inst|IR [3]), - .datac(\inst|IO_WRITE_int~q ), - .datad(\inst|IR [2]), + .dataa(\inst|state.ex_iload~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [14]), + .datac(\inst|altsyncram_component|auto_generated|q_a [13]), + .datad(\inst|Selector30~0_combout ), .cin(gnd), - .combout(\inst11|tri_enable~0_combout ), + .combout(\inst|Selector30~1_combout ), .cout()); // synopsys translate_off -defparam \inst11|tri_enable~0 .lut_mask = 16'h0002; -defparam \inst11|tri_enable~0 .sum_lutc_input = "datac"; +defparam \inst|Selector30~1 .lut_mask = 16'hABAA; +defparam \inst|Selector30~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N4 -fiftyfivenm_lcell_comb \inst13|inst12~0 ( -// Equation(s): -// \inst13|inst12~0_combout = (\inst|IR [4] & (\inst|IR [7] & !\inst|IR [1])) - - .dataa(gnd), - .datab(\inst|IR [4]), - .datac(\inst|IR [7]), - .datad(\inst|IR [1]), - .cin(gnd), - .combout(\inst13|inst12~0_combout ), - .cout()); +// Location: FF_X54_Y38_N9 +dffeas \inst|state.ex_load ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector30~1_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|state.ex_load~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst13|inst12~0 .lut_mask = 16'h00C0; -defparam \inst13|inst12~0 .sum_lutc_input = "datac"; +defparam \inst|state.ex_load .is_wysiwyg = "true"; +defparam \inst|state.ex_load .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N10 -fiftyfivenm_lcell_comb \inst11|tri_enable~1 ( +// Location: LCCOMB_X56_Y37_N16 +fiftyfivenm_lcell_comb \inst|Selector27~1 ( // Equation(s): -// \inst11|tri_enable~1_combout = (\inst3|SWITCH_EN~0_combout & (\inst11|tri_enable~0_combout & (\inst|IR [6] & \inst13|inst12~0_combout ))) +// \inst|Selector27~1_combout = (\inst|state.ex_or~q ) # (\inst|state.ex_load~q ) - .dataa(\inst3|SWITCH_EN~0_combout ), - .datab(\inst11|tri_enable~0_combout ), - .datac(\inst|IR [6]), - .datad(\inst13|inst12~0_combout ), + .dataa(gnd), + .datab(\inst|state.ex_or~q ), + .datac(\inst|state.ex_load~q ), + .datad(gnd), .cin(gnd), - .combout(\inst11|tri_enable~1_combout ), + .combout(\inst|Selector27~1_combout ), .cout()); // synopsys translate_off -defparam \inst11|tri_enable~1 .lut_mask = 16'h8000; -defparam \inst11|tri_enable~1 .sum_lutc_input = "datac"; +defparam \inst|Selector27~1 .lut_mask = 16'hFCFC; +defparam \inst|Selector27~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N0 -fiftyfivenm_lcell_comb \inst10|count[0]~16 ( +// Location: LCCOMB_X54_Y42_N28 +fiftyfivenm_lcell_comb \inst|state~39 ( // Equation(s): -// \inst10|count[0]~16_combout = \inst10|count [0] $ (VCC) -// \inst10|count[0]~17 = CARRY(\inst10|count [0]) +// \inst|state~39_combout = (\inst|state.decode~q & (\inst|altsyncram_component|auto_generated|q_a [15] & (\inst|altsyncram_component|auto_generated|q_a [13] & !\inst|altsyncram_component|auto_generated|q_a [14]))) - .dataa(gnd), - .datab(\inst10|count [0]), - .datac(gnd), - .datad(vcc), + .dataa(\inst|state.decode~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [15]), + .datac(\inst|altsyncram_component|auto_generated|q_a [13]), + .datad(\inst|altsyncram_component|auto_generated|q_a [14]), .cin(gnd), - .combout(\inst10|count[0]~16_combout ), - .cout(\inst10|count[0]~17 )); -// synopsys translate_off -defparam \inst10|count[0]~16 .lut_mask = 16'h33CC; -defparam \inst10|count[0]~16 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X49_Y54_N29 -fiftyfivenm_io_ibuf \KEY1~input ( - .i(KEY1), - .ibar(gnd), - .nsleep(vcc), - .o(\KEY1~input_o )); -// synopsys translate_off -defparam \KEY1~input .bus_hold = "false"; -defparam \KEY1~input .listen_to_nsleep_signal = "false"; -defparam \KEY1~input .simulate_z_as = "z"; -// synopsys translate_on - -// Location: FF_X49_Y46_N19 -dffeas \inst10|state.BTN_high ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\KEY1~input_o ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst10|state.BTN_high~q ), - .prn(vcc)); + .combout(\inst|state~39_combout ), + .cout()); // synopsys translate_off -defparam \inst10|state.BTN_high .is_wysiwyg = "true"; -defparam \inst10|state.BTN_high .power_up = "low"; +defparam \inst|state~39 .lut_mask = 16'h0080; +defparam \inst|state~39 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y46_N18 -fiftyfivenm_lcell_comb \inst10|count[15]~18 ( +// Location: LCCOMB_X54_Y42_N12 +fiftyfivenm_lcell_comb \inst|state~40 ( // Equation(s): -// \inst10|count[15]~18_combout = (\inst10|state.Init~q & (\KEY1~input_o $ (\inst10|state.BTN_high~q ))) +// \inst|state~40_combout = (\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state~39_combout )) - .dataa(gnd), - .datab(\KEY1~input_o ), - .datac(\inst10|state.BTN_high~q ), - .datad(\inst10|state.Init~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|state~39_combout ), .cin(gnd), - .combout(\inst10|count[15]~18_combout ), + .combout(\inst|state~40_combout ), .cout()); // synopsys translate_off -defparam \inst10|count[15]~18 .lut_mask = 16'h3C00; -defparam \inst10|count[15]~18 .sum_lutc_input = "datac"; +defparam \inst|state~40 .lut_mask = 16'hA000; +defparam \inst|state~40 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N1 -dffeas \inst10|count[0] ( +// Location: FF_X54_Y42_N13 +dffeas \inst|state.ex_loadi ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[0]~16_combout ), + .d(\inst|state~40_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [0]), + .q(\inst|state.ex_loadi~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[0] .is_wysiwyg = "true"; -defparam \inst10|count[0] .power_up = "low"; +defparam \inst|state.ex_loadi .is_wysiwyg = "true"; +defparam \inst|state.ex_loadi .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N2 -fiftyfivenm_lcell_comb \inst10|count[1]~19 ( +// Location: LCCOMB_X56_Y38_N18 +fiftyfivenm_lcell_comb \inst|IR[0]~0 ( // Equation(s): -// \inst10|count[1]~19_combout = (\inst10|count [1] & (!\inst10|count[0]~17 )) # (!\inst10|count [1] & ((\inst10|count[0]~17 ) # (GND))) -// \inst10|count[1]~20 = CARRY((!\inst10|count[0]~17 ) # (!\inst10|count [1])) +// \inst|IR[0]~0_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & (\inst|state.decode~q & \inst1|altpll_component|auto_generated|wire_pll1_locked )) - .dataa(gnd), - .datab(\inst10|count [1]), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[0]~17 ), - .combout(\inst10|count[1]~19_combout ), - .cout(\inst10|count[1]~20 )); + .dataa(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datab(gnd), + .datac(\inst|state.decode~q ), + .datad(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .cin(gnd), + .combout(\inst|IR[0]~0_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[1]~19 .lut_mask = 16'h3C3F; -defparam \inst10|count[1]~19 .sum_lutc_input = "cin"; +defparam \inst|IR[0]~0 .lut_mask = 16'hA000; +defparam \inst|IR[0]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N3 -dffeas \inst10|count[1] ( +// Location: FF_X58_Y38_N31 +dffeas \inst|IR[2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[1]~19_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [2]), + .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [1]), + .q(\inst|IR [2]), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[1] .is_wysiwyg = "true"; -defparam \inst10|count[1] .power_up = "low"; +defparam \inst|IR[2] .is_wysiwyg = "true"; +defparam \inst|IR[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N4 -fiftyfivenm_lcell_comb \inst10|count[2]~21 ( +// Location: LCCOMB_X57_Y40_N8 +fiftyfivenm_lcell_comb \inst|Selector25~4 ( // Equation(s): -// \inst10|count[2]~21_combout = (\inst10|count [2] & (\inst10|count[1]~20 $ (GND))) # (!\inst10|count [2] & (!\inst10|count[1]~20 & VCC)) -// \inst10|count[2]~22 = CARRY((\inst10|count [2] & !\inst10|count[1]~20 )) +// \inst|Selector25~4_combout = (\inst|Selector27~1_combout & ((\inst|altsyncram_component|auto_generated|q_a [2]) # ((\inst|state.ex_loadi~q & \inst|IR [2])))) # (!\inst|Selector27~1_combout & (\inst|state.ex_loadi~q & ((\inst|IR [2])))) - .dataa(gnd), - .datab(\inst10|count [2]), + .dataa(\inst|Selector27~1_combout ), + .datab(\inst|state.ex_loadi~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [2]), + .datad(\inst|IR [2]), + .cin(gnd), + .combout(\inst|Selector25~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector25~4 .lut_mask = 16'hECA0; +defparam \inst|Selector25~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y38_N16 +fiftyfivenm_lcell_comb \inst|state~41 ( +// Equation(s): +// \inst|state~41_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|Selector30~0_combout )) + + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), .datac(gnd), - .datad(vcc), - .cin(\inst10|count[1]~20 ), - .combout(\inst10|count[2]~21_combout ), - .cout(\inst10|count[2]~22 )); + .datad(\inst|Selector30~0_combout ), + .cin(gnd), + .combout(\inst|state~41_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[2]~21 .lut_mask = 16'hC30C; -defparam \inst10|count[2]~21 .sum_lutc_input = "cin"; +defparam \inst|state~41 .lut_mask = 16'h8800; +defparam \inst|state~41 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N5 -dffeas \inst10|count[2] ( +// Location: FF_X54_Y38_N17 +dffeas \inst|state.ex_addi ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[2]~21_combout ), + .d(\inst|state~41_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [2]), + .q(\inst|state.ex_addi~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[2] .is_wysiwyg = "true"; -defparam \inst10|count[2] .power_up = "low"; +defparam \inst|state.ex_addi .is_wysiwyg = "true"; +defparam \inst|state.ex_addi .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N6 -fiftyfivenm_lcell_comb \inst10|count[3]~23 ( +// Location: LCCOMB_X54_Y42_N22 +fiftyfivenm_lcell_comb \inst|state~42 ( // Equation(s): -// \inst10|count[3]~23_combout = (\inst10|count [3] & (!\inst10|count[2]~22 )) # (!\inst10|count [3] & ((\inst10|count[2]~22 ) # (GND))) -// \inst10|count[3]~24 = CARRY((!\inst10|count[2]~22 ) # (!\inst10|count [3])) +// \inst|state~42_combout = (!\inst|altsyncram_component|auto_generated|q_a [13] & (!\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~35_combout )) - .dataa(\inst10|count [3]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[2]~22 ), - .combout(\inst10|count[3]~23_combout ), - .cout(\inst10|count[3]~24 )); + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~35_combout ), + .cin(gnd), + .combout(\inst|state~42_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[3]~23 .lut_mask = 16'h5A5F; -defparam \inst10|count[3]~23 .sum_lutc_input = "cin"; +defparam \inst|state~42 .lut_mask = 16'h0500; +defparam \inst|state~42 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N7 -dffeas \inst10|count[3] ( +// Location: FF_X54_Y42_N23 +dffeas \inst|state.ex_add ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[3]~23_combout ), + .d(\inst|state~42_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [3]), + .q(\inst|state.ex_add~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[3] .is_wysiwyg = "true"; -defparam \inst10|count[3] .power_up = "low"; +defparam \inst|state.ex_add .is_wysiwyg = "true"; +defparam \inst|state.ex_add .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N8 -fiftyfivenm_lcell_comb \inst10|count[4]~25 ( +// Location: LCCOMB_X58_Y39_N30 +fiftyfivenm_lcell_comb \inst|AC[3]~0 ( // Equation(s): -// \inst10|count[4]~25_combout = (\inst10|count [4] & (\inst10|count[3]~24 $ (GND))) # (!\inst10|count [4] & (!\inst10|count[3]~24 & VCC)) -// \inst10|count[4]~26 = CARRY((\inst10|count [4] & !\inst10|count[3]~24 )) +// \inst|AC[3]~0_combout = (\inst|state.ex_addi~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_sub~q )) - .dataa(gnd), - .datab(\inst10|count [4]), + .dataa(\inst|state.ex_addi~q ), + .datab(\inst|state.ex_add~q ), .datac(gnd), - .datad(vcc), - .cin(\inst10|count[3]~24 ), - .combout(\inst10|count[4]~25_combout ), - .cout(\inst10|count[4]~26 )); + .datad(\inst|state.ex_sub~q ), + .cin(gnd), + .combout(\inst|AC[3]~0_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[4]~25 .lut_mask = 16'hC30C; -defparam \inst10|count[4]~25 .sum_lutc_input = "cin"; +defparam \inst|AC[3]~0 .lut_mask = 16'hFFEE; +defparam \inst|AC[3]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N9 -dffeas \inst10|count[4] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[4]~25_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst10|count [4]), - .prn(vcc)); +// Location: LCCOMB_X55_Y40_N8 +fiftyfivenm_lcell_comb \inst|Add1~15 ( +// Equation(s): +// \inst|Add1~15_combout = (\inst|AC [2] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_add~q )))) + + .dataa(\inst|AC [2]), + .datab(\inst|state.ex_addi~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_add~q ), + .cin(gnd), + .combout(\inst|Add1~15_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[4] .is_wysiwyg = "true"; -defparam \inst10|count[4] .power_up = "low"; +defparam \inst|Add1~15 .lut_mask = 16'hAAA8; +defparam \inst|Add1~15 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N10 -fiftyfivenm_lcell_comb \inst10|count[5]~27 ( +// Location: LCCOMB_X56_Y38_N4 +fiftyfivenm_lcell_comb \inst|Add1~1 ( // Equation(s): -// \inst10|count[5]~27_combout = (\inst10|count [5] & (!\inst10|count[4]~26 )) # (!\inst10|count [5] & ((\inst10|count[4]~26 ) # (GND))) -// \inst10|count[5]~28 = CARRY((!\inst10|count[4]~26 ) # (!\inst10|count [5])) +// \inst|Add1~1_combout = (!\inst|state.ex_in2~q & (!\inst|state.ex_loadi~q & \inst|state.ex_addi~q )) - .dataa(\inst10|count [5]), + .dataa(\inst|state.ex_in2~q ), .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[4]~26 ), - .combout(\inst10|count[5]~27_combout ), - .cout(\inst10|count[5]~28 )); + .datac(\inst|state.ex_loadi~q ), + .datad(\inst|state.ex_addi~q ), + .cin(gnd), + .combout(\inst|Add1~1_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[5]~27 .lut_mask = 16'h5A5F; -defparam \inst10|count[5]~27 .sum_lutc_input = "cin"; +defparam \inst|Add1~1 .lut_mask = 16'h0500; +defparam \inst|Add1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N11 -dffeas \inst10|count[5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[5]~27_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst10|count [5]), - .prn(vcc)); +// Location: LCCOMB_X57_Y40_N26 +fiftyfivenm_lcell_comb \inst|Add1~13 ( +// Equation(s): +// \inst|Add1~13_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [2]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [2])) + + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_add~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [2]), + .datad(gnd), + .cin(gnd), + .combout(\inst|Add1~13_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[5] .is_wysiwyg = "true"; -defparam \inst10|count[5] .power_up = "low"; +defparam \inst|Add1~13 .lut_mask = 16'h4A4A; +defparam \inst|Add1~13 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N12 -fiftyfivenm_lcell_comb \inst10|count[6]~29 ( +// Location: LCCOMB_X54_Y38_N30 +fiftyfivenm_lcell_comb \inst|state~45 ( // Equation(s): -// \inst10|count[6]~29_combout = (\inst10|count [6] & (\inst10|count[5]~28 $ (GND))) # (!\inst10|count [6] & (!\inst10|count[5]~28 & VCC)) -// \inst10|count[6]~30 = CARRY((\inst10|count [6] & !\inst10|count[5]~28 )) +// \inst|state~45_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|Selector30~0_combout )) - .dataa(\inst10|count [6]), - .datab(gnd), + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), .datac(gnd), - .datad(vcc), - .cin(\inst10|count[5]~28 ), - .combout(\inst10|count[6]~29_combout ), - .cout(\inst10|count[6]~30 )); + .datad(\inst|Selector30~0_combout ), + .cin(gnd), + .combout(\inst|state~45_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[6]~29 .lut_mask = 16'hA50A; -defparam \inst10|count[6]~29 .sum_lutc_input = "cin"; +defparam \inst|state~45 .lut_mask = 16'h2200; +defparam \inst|state~45 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N13 -dffeas \inst10|count[6] ( +// Location: FF_X54_Y38_N31 +dffeas \inst|state.ex_and ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[6]~29_combout ), + .d(\inst|state~45_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [6]), + .q(\inst|state.ex_and~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[6] .is_wysiwyg = "true"; -defparam \inst10|count[6] .power_up = "low"; +defparam \inst|state.ex_and .is_wysiwyg = "true"; +defparam \inst|state.ex_and .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y38_N0 +fiftyfivenm_lcell_comb \inst|WideOr3~0 ( +// Equation(s): +// \inst|WideOr3~0_combout = (!\inst|state.ex_in2~q & (!\inst|state.ex_and~q & (!\inst|state.ex_loadi~q & !\inst|state.ex_addi~q ))) + + .dataa(\inst|state.ex_in2~q ), + .datab(\inst|state.ex_and~q ), + .datac(\inst|state.ex_loadi~q ), + .datad(\inst|state.ex_addi~q ), + .cin(gnd), + .combout(\inst|WideOr3~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|WideOr3~0 .lut_mask = 16'h0001; +defparam \inst|WideOr3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N22 -fiftyfivenm_lcell_comb \inst13|inst1[6]~94 ( +// Location: LCCOMB_X55_Y38_N20 +fiftyfivenm_lcell_comb \inst|WideOr3~1 ( // Equation(s): -// \inst13|inst1[6]~94_combout = (!\inst13|inst4~combout & (((\inst|IR [0]) # (\inst10|count [6])) # (!\inst11|tri_enable~1_combout ))) +// \inst|WideOr3~1_combout = (!\inst|state.ex_shift~q & (!\inst|state.ex_xor~q & (\inst|WideOr3~0_combout & !\inst|state.ex_or~q ))) - .dataa(\inst11|tri_enable~1_combout ), - .datab(\inst|IR [0]), - .datac(\inst10|count [6]), - .datad(\inst13|inst4~combout ), + .dataa(\inst|state.ex_shift~q ), + .datab(\inst|state.ex_xor~q ), + .datac(\inst|WideOr3~0_combout ), + .datad(\inst|state.ex_or~q ), .cin(gnd), - .combout(\inst13|inst1[6]~94_combout ), + .combout(\inst|WideOr3~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[6]~94 .lut_mask = 16'h00FD; -defparam \inst13|inst1[6]~94 .sum_lutc_input = "datac"; +defparam \inst|WideOr3~1 .lut_mask = 16'h0010; +defparam \inst|WideOr3~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G12 -fiftyfivenm_clkctrl \inst3|SWITCH_EN~clkctrl ( - .ena(vcc), - .inclk({vcc,vcc,vcc,\inst3|SWITCH_EN~combout }), - .clkselect(2'b00), - .devclrn(devclrn), - .devpor(devpor), - .outclk(\inst3|SWITCH_EN~clkctrl_outclk )); +// Location: LCCOMB_X57_Y40_N4 +fiftyfivenm_lcell_comb \inst|Add1~14 ( +// Equation(s): +// \inst|Add1~14_combout = (\inst|Add1~1_combout & ((\inst|IR [2]) # ((\inst|Add1~13_combout & \inst|WideOr3~1_combout )))) # (!\inst|Add1~1_combout & (((\inst|Add1~13_combout & \inst|WideOr3~1_combout )))) + + .dataa(\inst|Add1~1_combout ), + .datab(\inst|IR [2]), + .datac(\inst|Add1~13_combout ), + .datad(\inst|WideOr3~1_combout ), + .cin(gnd), + .combout(\inst|Add1~14_combout ), + .cout()); // synopsys translate_off -defparam \inst3|SWITCH_EN~clkctrl .clock_type = "global clock"; -defparam \inst3|SWITCH_EN~clkctrl .ena_register_mode = "none"; +defparam \inst|Add1~14 .lut_mask = 16'hF888; +defparam \inst|Add1~14 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOIBUF_X54_Y54_N15 -fiftyfivenm_io_ibuf \SW[6]~input ( - .i(SW[6]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[6]~input_o )); +// Location: LCCOMB_X55_Y40_N6 +fiftyfivenm_lcell_comb \inst|Add1~10 ( +// Equation(s): +// \inst|Add1~10_combout = (\inst|AC [1] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_addi~q )))) + + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_add~q ), + .datac(\inst|AC [1]), + .datad(\inst|state.ex_addi~q ), + .cin(gnd), + .combout(\inst|Add1~10_combout ), + .cout()); // synopsys translate_off -defparam \SW[6]~input .bus_hold = "false"; -defparam \SW[6]~input .listen_to_nsleep_signal = "false"; -defparam \SW[6]~input .simulate_z_as = "z"; +defparam \inst|Add1~10 .lut_mask = 16'hF0E0; +defparam \inst|Add1~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y44_N21 -dffeas \inst7|B_DI[6] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), +// Location: FF_X57_Y38_N25 +dffeas \inst|IR[1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), - .asdata(\SW[6]~input_o ), + .asdata(\inst|altsyncram_component|auto_generated|q_a [1]), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(vcc), - .ena(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [6]), + .q(\inst|IR [1]), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[6] .is_wysiwyg = "true"; -defparam \inst7|B_DI[6] .power_up = "low"; +defparam \inst|IR[1] .is_wysiwyg = "true"; +defparam \inst|IR[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y44_N20 -fiftyfivenm_lcell_comb \inst13|inst1[6]~46 ( +// Location: LCCOMB_X55_Y37_N0 +fiftyfivenm_lcell_comb \inst|Add1~8 ( // Equation(s): -// \inst13|inst1[6]~46_combout = (\inst|IO_WRITE_int~q & (\inst|AC [6] & ((\inst7|B_DI [6]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [6]) # (!\inst3|SWITCH_EN~combout )))) +// \inst|Add1~8_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [1])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [1] & \inst|state.ex_add~q )) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst|AC [6]), - .datac(\inst7|B_DI [6]), - .datad(\inst3|SWITCH_EN~combout ), + .dataa(\inst|state.ex_sub~q ), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [1]), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst1[6]~46_combout ), + .combout(\inst|Add1~8_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[6]~46 .lut_mask = 16'hD0DD; -defparam \inst13|inst1[6]~46 .sum_lutc_input = "datac"; +defparam \inst|Add1~8 .lut_mask = 16'h5A0A; +defparam \inst|Add1~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N12 -fiftyfivenm_lcell_comb \inst3|I2C_DATA_EN~0 ( +// Location: LCCOMB_X55_Y38_N24 +fiftyfivenm_lcell_comb \inst|Add1~9 ( // Equation(s): -// \inst3|I2C_DATA_EN~0_combout = (!\inst|IR [3] & (!\inst|IR [5] & (!\inst|IR [6] & !\inst|IR [2]))) +// \inst|Add1~9_combout = (\inst|Add1~1_combout & ((\inst|IR [1]) # ((\inst|WideOr3~1_combout & \inst|Add1~8_combout )))) # (!\inst|Add1~1_combout & (\inst|WideOr3~1_combout & ((\inst|Add1~8_combout )))) - .dataa(\inst|IR [3]), - .datab(\inst|IR [5]), - .datac(\inst|IR [6]), - .datad(\inst|IR [2]), + .dataa(\inst|Add1~1_combout ), + .datab(\inst|WideOr3~1_combout ), + .datac(\inst|IR [1]), + .datad(\inst|Add1~8_combout ), .cin(gnd), - .combout(\inst3|I2C_DATA_EN~0_combout ), + .combout(\inst|Add1~9_combout ), .cout()); // synopsys translate_off -defparam \inst3|I2C_DATA_EN~0 .lut_mask = 16'h0001; -defparam \inst3|I2C_DATA_EN~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~9 .lut_mask = 16'hECA0; +defparam \inst|Add1~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N20 -fiftyfivenm_lcell_comb \inst3|I2C_DATA_EN ( +// Location: LCCOMB_X55_Y40_N0 +fiftyfivenm_lcell_comb \inst|Add1~3 ( // Equation(s): -// \inst3|I2C_DATA_EN~combout = (\inst3|I2C_DATA_EN~0_combout & (\inst3|SWITCH_EN~0_combout & (\inst13|inst12~0_combout & \inst|IR [0]))) +// \inst|Add1~3_combout = (\inst|AC [0] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) - .dataa(\inst3|I2C_DATA_EN~0_combout ), - .datab(\inst3|SWITCH_EN~0_combout ), - .datac(\inst13|inst12~0_combout ), - .datad(\inst|IR [0]), + .dataa(\inst|AC [0]), + .datab(\inst|state.ex_add~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_addi~q ), .cin(gnd), - .combout(\inst3|I2C_DATA_EN~combout ), + .combout(\inst|Add1~3_combout ), .cout()); // synopsys translate_off -defparam \inst3|I2C_DATA_EN .lut_mask = 16'h8000; -defparam \inst3|I2C_DATA_EN .sum_lutc_input = "datac"; +defparam \inst|Add1~3 .lut_mask = 16'hAAA8; +defparam \inst|Add1~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N24 -fiftyfivenm_lcell_comb \inst13|inst|bit_cnt[0]~0 ( +// Location: LCCOMB_X55_Y40_N16 +fiftyfivenm_lcell_comb \inst|Add1~5 ( // Equation(s): -// \inst13|inst|bit_cnt[0]~0_combout = !\inst13|inst|bit_cnt [0] +// \inst|Add1~5_cout = CARRY(\inst|state.ex_sub~q ) - .dataa(gnd), + .dataa(\inst|state.ex_sub~q ), .datab(gnd), - .datac(\inst13|inst|bit_cnt [0]), - .datad(gnd), + .datac(gnd), + .datad(vcc), .cin(gnd), - .combout(\inst13|inst|bit_cnt[0]~0_combout ), - .cout()); + .combout(), + .cout(\inst|Add1~5_cout )); // synopsys translate_off -defparam \inst13|inst|bit_cnt[0]~0 .lut_mask = 16'h0F0F; -defparam \inst13|inst|bit_cnt[0]~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~5 .lut_mask = 16'h00AA; +defparam \inst|Add1~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y38_N9 -dffeas \inst13|inst14|prev_busy ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst|busy~q ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|prev_busy~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y40_N18 +fiftyfivenm_lcell_comb \inst|Add1~6 ( +// Equation(s): +// \inst|Add1~6_combout = (\inst|Add1~2_combout & ((\inst|Add1~3_combout & (\inst|Add1~5_cout & VCC)) # (!\inst|Add1~3_combout & (!\inst|Add1~5_cout )))) # (!\inst|Add1~2_combout & ((\inst|Add1~3_combout & (!\inst|Add1~5_cout )) # +// (!\inst|Add1~3_combout & ((\inst|Add1~5_cout ) # (GND))))) +// \inst|Add1~7 = CARRY((\inst|Add1~2_combout & (!\inst|Add1~3_combout & !\inst|Add1~5_cout )) # (!\inst|Add1~2_combout & ((!\inst|Add1~5_cout ) # (!\inst|Add1~3_combout )))) + + .dataa(\inst|Add1~2_combout ), + .datab(\inst|Add1~3_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~5_cout ), + .combout(\inst|Add1~6_combout ), + .cout(\inst|Add1~7 )); // synopsys translate_off -defparam \inst13|inst14|prev_busy .is_wysiwyg = "true"; -defparam \inst13|inst14|prev_busy .power_up = "low"; +defparam \inst|Add1~6 .lut_mask = 16'h9617; +defparam \inst|Add1~6 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y40_N20 +fiftyfivenm_lcell_comb \inst|Add1~11 ( +// Equation(s): +// \inst|Add1~11_combout = ((\inst|Add1~10_combout $ (\inst|Add1~9_combout $ (!\inst|Add1~7 )))) # (GND) +// \inst|Add1~12 = CARRY((\inst|Add1~10_combout & ((\inst|Add1~9_combout ) # (!\inst|Add1~7 ))) # (!\inst|Add1~10_combout & (\inst|Add1~9_combout & !\inst|Add1~7 ))) + + .dataa(\inst|Add1~10_combout ), + .datab(\inst|Add1~9_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~7 ), + .combout(\inst|Add1~11_combout ), + .cout(\inst|Add1~12 )); +// synopsys translate_off +defparam \inst|Add1~11 .lut_mask = 16'h698E; +defparam \inst|Add1~11 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y40_N22 +fiftyfivenm_lcell_comb \inst|Add1~16 ( +// Equation(s): +// \inst|Add1~16_combout = (\inst|Add1~15_combout & ((\inst|Add1~14_combout & (\inst|Add1~12 & VCC)) # (!\inst|Add1~14_combout & (!\inst|Add1~12 )))) # (!\inst|Add1~15_combout & ((\inst|Add1~14_combout & (!\inst|Add1~12 )) # (!\inst|Add1~14_combout & +// ((\inst|Add1~12 ) # (GND))))) +// \inst|Add1~17 = CARRY((\inst|Add1~15_combout & (!\inst|Add1~14_combout & !\inst|Add1~12 )) # (!\inst|Add1~15_combout & ((!\inst|Add1~12 ) # (!\inst|Add1~14_combout )))) + + .dataa(\inst|Add1~15_combout ), + .datab(\inst|Add1~14_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~12 ), + .combout(\inst|Add1~16_combout ), + .cout(\inst|Add1~17 )); +// synopsys translate_off +defparam \inst|Add1~16 .lut_mask = 16'h9617; +defparam \inst|Add1~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y40_N30 +fiftyfivenm_lcell_comb \inst|Selector25~5 ( +// Equation(s): +// \inst|Selector25~5_combout = (\inst|Selector25~3_combout ) # ((\inst|Selector25~4_combout ) # ((\inst|AC[3]~0_combout & \inst|Add1~16_combout ))) + + .dataa(\inst|Selector25~3_combout ), + .datab(\inst|Selector25~4_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Add1~16_combout ), + .cin(gnd), + .combout(\inst|Selector25~5_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector25~5 .lut_mask = 16'hFEEE; +defparam \inst|Selector25~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N22 +// Location: LCCOMB_X57_Y40_N28 fiftyfivenm_lcell_comb \inst|WideOr3~2 ( // Equation(s): -// \inst|WideOr3~2_combout = (\inst|state.ex_load~q ) # (((\inst|state.ex_sub~q ) # (\inst|state.ex_add~q )) # (!\inst10|state.Init~q )) +// \inst|WideOr3~2_combout = (\inst|state.ex_sub~q ) # ((\inst|state.ex_load~q ) # ((\inst|state.ex_add~q ) # (!\inst10|state.Init~q ))) - .dataa(\inst|state.ex_load~q ), - .datab(\inst10|state.Init~q ), - .datac(\inst|state.ex_sub~q ), + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_load~q ), + .datac(\inst10|state.Init~q ), .datad(\inst|state.ex_add~q ), .cin(gnd), .combout(\inst|WideOr3~2_combout ), .cout()); // synopsys translate_off -defparam \inst|WideOr3~2 .lut_mask = 16'hFFFB; +defparam \inst|WideOr3~2 .lut_mask = 16'hFFEF; defparam \inst|WideOr3~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N8 +// Location: LCCOMB_X57_Y40_N14 fiftyfivenm_lcell_comb \inst|Selector27~6 ( // Equation(s): // \inst|Selector27~6_combout = (!\inst|state.ex_or~q & ((\inst|WideOr3~2_combout ) # (!\inst|WideOr3~1_combout ))) - .dataa(\inst|WideOr3~2_combout ), - .datab(gnd), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|state.ex_or~q ), + .dataa(\inst|state.ex_or~q ), + .datab(\inst|WideOr3~2_combout ), + .datac(gnd), + .datad(\inst|WideOr3~1_combout ), .cin(gnd), .combout(\inst|Selector27~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~6 .lut_mask = 16'h00AF; +defparam \inst|Selector27~6 .lut_mask = 16'h4455; defparam \inst|Selector27~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N24 -fiftyfivenm_lcell_comb \inst|Selector18~0 ( +// Location: LCCOMB_X57_Y40_N16 +fiftyfivenm_lcell_comb \inst|Selector25~2 ( // Equation(s): -// \inst|Selector18~0_combout = (\inst|AC [9] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [9])) # (!\inst|Selector27~6_combout ))) +// \inst|Selector25~2_combout = (\inst|AC [2] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [2])) # (!\inst|Selector27~6_combout ))) .dataa(\inst|state.ex_and~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [9]), - .datac(\inst|Selector27~6_combout ), - .datad(\inst|AC [9]), + .datab(\inst|Selector27~6_combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [2]), + .datad(\inst|AC [2]), .cin(gnd), - .combout(\inst|Selector18~0_combout ), + .combout(\inst|Selector25~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector18~0 .lut_mask = 16'h8F00; -defparam \inst|Selector18~0 .sum_lutc_input = "datac"; +defparam \inst|Selector25~2 .lut_mask = 16'hB300; +defparam \inst|Selector25~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N16 -fiftyfivenm_lcell_comb \inst|Selector19~4 ( +// Location: LCCOMB_X56_Y40_N16 +fiftyfivenm_lcell_comb \inst|Selector20~0 ( // Equation(s): -// \inst|Selector19~4_combout = (!\inst|IR [4] & (\inst|IR [3] & \inst|state.ex_shift~q )) +// \inst|Selector20~0_combout = (!\inst|IR [3] & \inst|state.ex_shift~q ) - .dataa(\inst|IR [4]), - .datab(gnd), - .datac(\inst|IR [3]), + .dataa(gnd), + .datab(\inst|IR [3]), + .datac(gnd), .datad(\inst|state.ex_shift~q ), .cin(gnd), - .combout(\inst|Selector19~4_combout ), + .combout(\inst|Selector20~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector19~4 .lut_mask = 16'h5000; -defparam \inst|Selector19~4 .sum_lutc_input = "datac"; +defparam \inst|Selector20~0 .lut_mask = 16'h3300; +defparam \inst|Selector20~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N12 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[34]~54 ( +// Location: FF_X58_Y38_N29 +dffeas \inst|IR[5] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [5]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|IR [5]), + .prn(vcc)); +// synopsys translate_off +defparam \inst|IR[5] .is_wysiwyg = "true"; +defparam \inst|IR[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y37_N26 +fiftyfivenm_lcell_comb \inst|Selector22~3 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[34]~54_combout = (\inst|AC [0] & (!\inst|IR [0] & (!\inst|IR [4] & \inst|IR [1]))) +// \inst|Selector22~3_combout = (\inst|state.ex_loadi~q & ((\inst|IR [5]) # ((\inst|Selector27~1_combout & \inst|altsyncram_component|auto_generated|q_a [5])))) # (!\inst|state.ex_loadi~q & (\inst|Selector27~1_combout & +// ((\inst|altsyncram_component|auto_generated|q_a [5])))) - .dataa(\inst|AC [0]), - .datab(\inst|IR [0]), - .datac(\inst|IR [4]), - .datad(\inst|IR [1]), + .dataa(\inst|state.ex_loadi~q ), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|IR [5]), + .datad(\inst|altsyncram_component|auto_generated|q_a [5]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[34]~54_combout ), + .combout(\inst|Selector22~3_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[34]~54 .lut_mask = 16'h0200; -defparam \inst|shifter|auto_generated|sbit_w[34]~54 .sum_lutc_input = "datac"; +defparam \inst|Selector22~3 .lut_mask = 16'hECA0; +defparam \inst|Selector22~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N14 -fiftyfivenm_lcell_comb \inst13|inst1[0]~17 ( +// Location: LCCOMB_X56_Y37_N4 +fiftyfivenm_lcell_comb \inst|Selector22~4 ( // Equation(s): -// \inst13|inst1[0]~17_combout = (\inst3|I2C_DATA_EN~combout ) # ((\inst|IO_WRITE_int~q ) # ((\inst3|TIMER_EN~2_combout & \inst3|TIMER_EN~1_combout ))) +// \inst|Selector22~4_combout = (\inst|Selector22~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [5] $ (\inst|AC [5])))) - .dataa(\inst3|TIMER_EN~2_combout ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst3|TIMER_EN~1_combout ), - .datad(\inst|IO_WRITE_int~q ), + .dataa(\inst|Selector22~3_combout ), + .datab(\inst|altsyncram_component|auto_generated|q_a [5]), + .datac(\inst|state.ex_xor~q ), + .datad(\inst|AC [5]), .cin(gnd), - .combout(\inst13|inst1[0]~17_combout ), + .combout(\inst|Selector22~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~17 .lut_mask = 16'hFFEC; -defparam \inst13|inst1[0]~17 .sum_lutc_input = "datac"; +defparam \inst|Selector22~4 .lut_mask = 16'hBAEA; +defparam \inst|Selector22~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N24 -fiftyfivenm_lcell_comb \inst13|inst1[0]~18 ( +// Location: LCCOMB_X58_Y34_N6 +fiftyfivenm_lcell_comb \inst|Selector17~3 ( // Equation(s): -// \inst13|inst1[0]~18_combout = (\inst13|inst4~combout ) # ((\inst13|inst1[0]~17_combout ) # ((\inst3|SWITCH_EN~combout ) # (\inst11|tri_enable~1_combout ))) +// \inst|Selector17~3_combout = (!\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[34]~55_combout & \inst|Selector19~4_combout )) - .dataa(\inst13|inst4~combout ), - .datab(\inst13|inst1[0]~17_combout ), - .datac(\inst3|SWITCH_EN~combout ), - .datad(\inst11|tri_enable~1_combout ), + .dataa(gnd), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), + .datad(\inst|Selector19~4_combout ), .cin(gnd), - .combout(\inst13|inst1[0]~18_combout ), + .combout(\inst|Selector17~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~18 .lut_mask = 16'hFFFE; -defparam \inst13|inst1[0]~18 .sum_lutc_input = "datac"; +defparam \inst|Selector17~3 .lut_mask = 16'h3000; +defparam \inst|Selector17~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N26 -fiftyfivenm_lcell_comb \inst13|inst1[3]~92 ( +// Location: LCCOMB_X56_Y39_N26 +fiftyfivenm_lcell_comb \inst|Selector17~4 ( // Equation(s): -// \inst13|inst1[3]~92_combout = (!\inst13|inst4~combout & (((\inst|IR [0]) # (\inst10|count [3])) # (!\inst11|tri_enable~1_combout ))) +// \inst|Selector17~4_combout = (\inst|AC [10] & (((\inst|altsyncram_component|auto_generated|q_a [10] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst11|tri_enable~1_combout ), - .datab(\inst13|inst4~combout ), - .datac(\inst|IR [0]), - .datad(\inst10|count [3]), + .dataa(\inst|Selector27~6_combout ), + .datab(\inst|AC [10]), + .datac(\inst|altsyncram_component|auto_generated|q_a [10]), + .datad(\inst|state.ex_and~q ), .cin(gnd), - .combout(\inst13|inst1[3]~92_combout ), + .combout(\inst|Selector17~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[3]~92 .lut_mask = 16'h3331; -defparam \inst13|inst1[3]~92 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X54_Y54_N29 -fiftyfivenm_io_ibuf \SW[3]~input ( - .i(SW[3]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[3]~input_o )); -// synopsys translate_off -defparam \SW[3]~input .bus_hold = "false"; -defparam \SW[3]~input .listen_to_nsleep_signal = "false"; -defparam \SW[3]~input .simulate_z_as = "z"; +defparam \inst|Selector17~4 .lut_mask = 16'hC444; +defparam \inst|Selector17~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y42_N25 -dffeas \inst7|B_DI[3] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), +// Location: FF_X58_Y38_N19 +dffeas \inst|IR[10] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), - .asdata(\SW[3]~input_o ), + .asdata(\inst|altsyncram_component|auto_generated|q_a [10]), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(vcc), - .ena(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [3]), + .q(\inst|IR [10]), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[3] .is_wysiwyg = "true"; -defparam \inst7|B_DI[3] .power_up = "low"; +defparam \inst|IR[10] .is_wysiwyg = "true"; +defparam \inst|IR[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N24 -fiftyfivenm_lcell_comb \inst13|inst1[3]~31 ( +// Location: LCCOMB_X56_Y40_N22 +fiftyfivenm_lcell_comb \inst|Selector12~4 ( // Equation(s): -// \inst13|inst1[3]~31_combout = (\inst|IO_WRITE_int~q & (\inst|AC [3] & ((\inst7|B_DI [3]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [3]) # (!\inst3|SWITCH_EN~combout )))) +// \inst|Selector12~4_combout = (\inst|state.ex_and~q & ((\inst|altsyncram_component|auto_generated|q_a [15]) # ((\inst|IR [4] & \inst|state.ex_shift~q )))) # (!\inst|state.ex_and~q & (((\inst|IR [4] & \inst|state.ex_shift~q )))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst|AC [3]), - .datac(\inst7|B_DI [3]), - .datad(\inst3|SWITCH_EN~combout ), + .dataa(\inst|state.ex_and~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [15]), + .datac(\inst|IR [4]), + .datad(\inst|state.ex_shift~q ), .cin(gnd), - .combout(\inst13|inst1[3]~31_combout ), + .combout(\inst|Selector12~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[3]~31 .lut_mask = 16'hD0DD; -defparam \inst13|inst1[3]~31 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X38_Y0_N29 -fiftyfivenm_io_ibuf \GSENSOR_SDI~input ( - .i(GSENSOR_SDI), - .ibar(gnd), - .nsleep(vcc), - .o(\GSENSOR_SDI~input_o )); -// synopsys translate_off -defparam \GSENSOR_SDI~input .bus_hold = "false"; -defparam \GSENSOR_SDI~input .listen_to_nsleep_signal = "false"; -defparam \GSENSOR_SDI~input .simulate_z_as = "z"; +defparam \inst|Selector12~4 .lut_mask = 16'hF888; +defparam \inst|Selector12~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N6 -fiftyfivenm_lcell_comb \inst13|inst|Add1~0 ( +// Location: LCCOMB_X58_Y39_N22 +fiftyfivenm_lcell_comb \inst|Add1~80 ( // Equation(s): -// \inst13|inst|Add1~0_combout = \inst13|inst|bit_cnt [2] $ (((\inst13|inst|bit_cnt [0] & \inst13|inst|bit_cnt [1]))) +// \inst|Add1~80_combout = (\inst|AC [15] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) - .dataa(gnd), - .datab(\inst13|inst|bit_cnt [0]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|bit_cnt [1]), + .dataa(\inst|state.ex_add~q ), + .datab(\inst|state.ex_sub~q ), + .datac(\inst|state.ex_addi~q ), + .datad(\inst|AC [15]), .cin(gnd), - .combout(\inst13|inst|Add1~0_combout ), + .combout(\inst|Add1~80_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Add1~0 .lut_mask = 16'h3CF0; -defparam \inst13|inst|Add1~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X46_Y35_N7 -dffeas \inst13|inst|bit_cnt[2] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Add1~0_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|WideOr12~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|bit_cnt [2]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|bit_cnt[2] .is_wysiwyg = "true"; -defparam \inst13|inst|bit_cnt[2] .power_up = "low"; +defparam \inst|Add1~80 .lut_mask = 16'hFE00; +defparam \inst|Add1~80 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N26 -fiftyfivenm_lcell_comb \inst13|inst|state~14 ( +// Location: LCCOMB_X56_Y41_N6 +fiftyfivenm_lcell_comb \inst|Add1~78 ( // Equation(s): -// \inst13|inst|state~14_combout = (\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [2] & (\inst13|inst|bit_cnt [0] & \inst13|inst|state.rd~q ))) +// \inst|Add1~78_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [15])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [15] & \inst|state.ex_add~q )) - .dataa(\inst13|inst|bit_cnt [1]), - .datab(\inst13|inst|bit_cnt [2]), - .datac(\inst13|inst|bit_cnt [0]), - .datad(\inst13|inst|state.rd~q ), + .dataa(\inst|state.ex_sub~q ), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [15]), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst|state~14_combout ), + .combout(\inst|Add1~78_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|state~14 .lut_mask = 16'h8000; -defparam \inst13|inst|state~14 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X46_Y35_N27 -dffeas \inst13|inst|state.mstr_ack ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|state~14_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|state.mstr_ack~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|state.mstr_ack .is_wysiwyg = "true"; -defparam \inst13|inst|state.mstr_ack .power_up = "low"; +defparam \inst|Add1~78 .lut_mask = 16'h5A0A; +defparam \inst|Add1~78 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N8 -fiftyfivenm_lcell_comb \inst13|inst|Equal1~0 ( +// Location: LCCOMB_X56_Y41_N16 +fiftyfivenm_lcell_comb \inst|Add1~79 ( // Equation(s): -// \inst13|inst|Equal1~0_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [2] & \inst13|inst|bit_cnt [1])) +// \inst|Add1~79_combout = (\inst|Add1~78_combout & ((\inst|WideOr3~1_combout ) # ((\inst|Add1~1_combout & \inst|IR [10])))) # (!\inst|Add1~78_combout & (\inst|Add1~1_combout & ((\inst|IR [10])))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [2]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(gnd), + .dataa(\inst|Add1~78_combout ), + .datab(\inst|Add1~1_combout ), + .datac(\inst|WideOr3~1_combout ), + .datad(\inst|IR [10]), .cin(gnd), - .combout(\inst13|inst|Equal1~0_combout ), + .combout(\inst|Add1~79_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Equal1~0 .lut_mask = 16'h8080; -defparam \inst13|inst|Equal1~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~79 .lut_mask = 16'hECA0; +defparam \inst|Add1~79 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N22 -fiftyfivenm_lcell_comb \inst13|inst|state~16 ( +// Location: LCCOMB_X57_Y40_N20 +fiftyfivenm_lcell_comb \inst|Selector13~1 ( // Equation(s): -// \inst13|inst|state~16_combout = (\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [2] & \inst13|inst|state.wr~q ))) +// \inst|Selector13~1_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & ((\inst|state.ex_or~q ) # (\inst|state.ex_load~q ))) - .dataa(\inst13|inst|bit_cnt [1]), - .datab(\inst13|inst|bit_cnt [0]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|state.wr~q ), + .dataa(\inst|state.ex_or~q ), + .datab(gnd), + .datac(\inst|state.ex_load~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [14]), .cin(gnd), - .combout(\inst13|inst|state~16_combout ), + .combout(\inst|Selector13~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|state~16 .lut_mask = 16'h8000; -defparam \inst13|inst|state~16 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X46_Y35_N23 -dffeas \inst13|inst|state.slv_ack2 ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|state~16_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|state.slv_ack2~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|state.slv_ack2 .is_wysiwyg = "true"; -defparam \inst13|inst|state.slv_ack2 .power_up = "low"; +defparam \inst|Selector13~1 .lut_mask = 16'hFA00; +defparam \inst|Selector13~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N18 -fiftyfivenm_lcell_comb \inst13|inst|Selector29~0 ( +// Location: LCCOMB_X60_Y37_N6 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[28]~21 ( // Equation(s): -// \inst13|inst|Selector29~0_combout = (\GSENSOR_SDI~input_o & ((\inst13|inst|state.slv_ack1~q ) # ((\inst13|inst|state.slv_ack2~q )))) # (!\GSENSOR_SDI~input_o & (\inst13|inst|ack_error~q & ((\inst13|inst|state.slv_ack1~q ) # -// (\inst13|inst|state.slv_ack2~q )))) +// \inst|shifter|auto_generated|sbit_w[28]~21_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [13])) # (!\inst|IR [4] & ((\inst|AC [11]))))) - .dataa(\GSENSOR_SDI~input_o ), - .datab(\inst13|inst|state.slv_ack1~q ), - .datac(\inst13|inst|state.slv_ack2~q ), - .datad(\inst13|inst|ack_error~q ), + .dataa(\inst|IR [0]), + .datab(\inst|IR [4]), + .datac(\inst|AC [13]), + .datad(\inst|AC [11]), .cin(gnd), - .combout(\inst13|inst|Selector29~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[28]~21_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector29~0 .lut_mask = 16'hFCA8; -defparam \inst13|inst|Selector29~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[28]~21 .lut_mask = 16'hA280; +defparam \inst|shifter|auto_generated|sbit_w[28]~21 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N12 -fiftyfivenm_lcell_comb \inst13|inst|Selector29~1 ( +// Location: LCCOMB_X55_Y37_N24 +fiftyfivenm_lcell_comb \inst|Add1~65 ( // Equation(s): -// \inst13|inst|Selector29~1_combout = (\inst13|inst|Selector29~0_combout ) # ((\inst13|inst|ack_error~q & ((\inst13|inst|state.rd~q ) # (!\inst13|inst|state.start~q )))) +// \inst|Add1~65_combout = (\inst|AC [12] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_add~q )))) - .dataa(\inst13|inst|state.start~q ), - .datab(\inst13|inst|state.rd~q ), - .datac(\inst13|inst|ack_error~q ), - .datad(\inst13|inst|Selector29~0_combout ), + .dataa(\inst|state.ex_addi~q ), + .datab(\inst|AC [12]), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst|Selector29~1_combout ), + .combout(\inst|Add1~65_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector29~1 .lut_mask = 16'hFFD0; -defparam \inst13|inst|Selector29~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y35_N13 -dffeas \inst13|inst|ack_error ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector29~1_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|ack_error~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|ack_error .is_wysiwyg = "true"; -defparam \inst13|inst|ack_error .power_up = "low"; +defparam \inst|Add1~65 .lut_mask = 16'hCCC8; +defparam \inst|Add1~65 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N2 -fiftyfivenm_lcell_comb \inst13|inst|Selector23~1 ( +// Location: LCCOMB_X54_Y42_N24 +fiftyfivenm_lcell_comb \inst|Add1~63 ( // Equation(s): -// \inst13|inst|Selector23~1_combout = (\inst13|inst|addr_rw [0] & (\inst13|inst|state.slv_ack1~q & !\inst13|inst|ack_error~q )) +// \inst|Add1~63_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [12]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [12])) - .dataa(\inst13|inst|addr_rw [0]), - .datab(gnd), - .datac(\inst13|inst|state.slv_ack1~q ), - .datad(\inst13|inst|ack_error~q ), + .dataa(\inst|state.ex_add~q ), + .datab(\inst|state.ex_sub~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst|Selector23~1_combout ), + .combout(\inst|Add1~63_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector23~1 .lut_mask = 16'h00A0; -defparam \inst13|inst|Selector23~1 .sum_lutc_input = "datac"; +defparam \inst|Add1~63 .lut_mask = 16'h2C2C; +defparam \inst|Add1~63 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N2 -fiftyfivenm_lcell_comb \inst13|inst|Selector23~2 ( +// Location: LCCOMB_X55_Y39_N28 +fiftyfivenm_lcell_comb \inst|Add1~64 ( // Equation(s): -// \inst13|inst|Selector23~2_combout = (\inst13|inst|Selector23~1_combout ) # ((!\inst13|inst|Equal1~0_combout & \inst13|inst|state.rd~q )) +// \inst|Add1~64_combout = (\inst|IR [10] & ((\inst|Add1~1_combout ) # ((\inst|WideOr3~1_combout & \inst|Add1~63_combout )))) # (!\inst|IR [10] & (\inst|WideOr3~1_combout & (\inst|Add1~63_combout ))) - .dataa(\inst13|inst|Equal1~0_combout ), - .datab(gnd), - .datac(\inst13|inst|state.rd~q ), - .datad(\inst13|inst|Selector23~1_combout ), + .dataa(\inst|IR [10]), + .datab(\inst|WideOr3~1_combout ), + .datac(\inst|Add1~63_combout ), + .datad(\inst|Add1~1_combout ), .cin(gnd), - .combout(\inst13|inst|Selector23~2_combout ), + .combout(\inst|Add1~64_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector23~2 .lut_mask = 16'hFF50; -defparam \inst13|inst|Selector23~2 .sum_lutc_input = "datac"; +defparam \inst|Add1~64 .lut_mask = 16'hEAC0; +defparam \inst|Add1~64 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N16 -fiftyfivenm_lcell_comb \inst13|inst|Selector23~3 ( +// Location: LCCOMB_X55_Y39_N20 +fiftyfivenm_lcell_comb \inst|Add1~58 ( // Equation(s): -// \inst13|inst|Selector23~3_combout = (\inst13|inst|Selector23~2_combout ) # ((\inst13|inst14|rnw~q & (\inst13|inst|process_1~4_combout & \inst13|inst|state.mstr_ack~q ))) +// \inst|Add1~58_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [11]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [11])) - .dataa(\inst13|inst14|rnw~q ), - .datab(\inst13|inst|process_1~4_combout ), - .datac(\inst13|inst|state.mstr_ack~q ), - .datad(\inst13|inst|Selector23~2_combout ), + .dataa(gnd), + .datab(\inst|state.ex_add~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [11]), .cin(gnd), - .combout(\inst13|inst|Selector23~3_combout ), + .combout(\inst|Add1~58_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector23~3 .lut_mask = 16'hFF80; -defparam \inst13|inst|Selector23~3 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X45_Y35_N17 -dffeas \inst13|inst|state.rd ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector23~3_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|state.rd~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|state.rd .is_wysiwyg = "true"; -defparam \inst13|inst|state.rd .power_up = "low"; +defparam \inst|Add1~58 .lut_mask = 16'h0CF0; +defparam \inst|Add1~58 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y38_N18 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~0 ( +// Location: LCCOMB_X55_Y39_N30 +fiftyfivenm_lcell_comb \inst|Add1~59 ( // Equation(s): -// \inst13|inst|Decoder0~0_combout = (\inst1|altpll_component|auto_generated|wire_pll1_locked & (\inst1|altpll_component|auto_generated|pll_lock_sync~q & \inst13|inst|state.rd~q )) +// \inst|Add1~59_combout = (\inst|IR [10] & ((\inst|Add1~1_combout ) # ((\inst|Add1~58_combout & \inst|WideOr3~1_combout )))) # (!\inst|IR [10] & (\inst|Add1~58_combout & (\inst|WideOr3~1_combout ))) - .dataa(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .datab(gnd), - .datac(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), - .datad(\inst13|inst|state.rd~q ), + .dataa(\inst|IR [10]), + .datab(\inst|Add1~58_combout ), + .datac(\inst|WideOr3~1_combout ), + .datad(\inst|Add1~1_combout ), .cin(gnd), - .combout(\inst13|inst|Decoder0~0_combout ), + .combout(\inst|Add1~59_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~0 .lut_mask = 16'hA000; -defparam \inst13|inst|Decoder0~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~59 .lut_mask = 16'hEAC0; +defparam \inst|Add1~59 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N12 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~4 ( +// Location: LCCOMB_X55_Y37_N22 +fiftyfivenm_lcell_comb \inst|Add1~60 ( // Equation(s): -// \inst13|inst|Decoder0~4_combout = (!\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst|Add1~60_combout = (\inst|AC [11] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_sub~q )))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(\inst|state.ex_addi~q ), + .datab(\inst|state.ex_add~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|AC [11]), .cin(gnd), - .combout(\inst13|inst|Decoder0~4_combout ), + .combout(\inst|Add1~60_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~4 .lut_mask = 16'h1000; -defparam \inst13|inst|Decoder0~4 .sum_lutc_input = "datac"; +defparam \inst|Add1~60 .lut_mask = 16'hFE00; +defparam \inst|Add1~60 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N22 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[3]~3 ( +// Location: LCCOMB_X55_Y39_N22 +fiftyfivenm_lcell_comb \inst|Add1~55 ( // Equation(s): -// \inst13|inst|data_rx[3]~3_combout = (\inst13|inst|Decoder0~4_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~4_combout & ((\inst13|inst|data_rx [3]))) +// \inst|Add1~55_combout = (\inst|AC [10] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [3]), - .datad(\inst13|inst|Decoder0~4_combout ), + .dataa(\inst|AC [10]), + .datab(\inst|state.ex_add~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_addi~q ), .cin(gnd), - .combout(\inst13|inst|data_rx[3]~3_combout ), + .combout(\inst|Add1~55_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[3]~3 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[3]~3 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X47_Y38_N23 -dffeas \inst13|inst|data_rx[3] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[3]~3_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rx [3]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_rx[3] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[3] .power_up = "low"; +defparam \inst|Add1~55 .lut_mask = 16'hAAA8; +defparam \inst|Add1~55 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N26 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[3]~feeder ( +// Location: LCCOMB_X55_Y39_N18 +fiftyfivenm_lcell_comb \inst|Add1~53 ( // Equation(s): -// \inst13|inst|data_rd[3]~feeder_combout = \inst13|inst|data_rx [3] +// \inst|Add1~53_combout = (\inst|altsyncram_component|auto_generated|q_a [10] & (!\inst|state.ex_sub~q & \inst|state.ex_add~q )) # (!\inst|altsyncram_component|auto_generated|q_a [10] & (\inst|state.ex_sub~q )) .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst|data_rx [3]), + .datab(\inst|altsyncram_component|auto_generated|q_a [10]), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst|data_rd[3]~feeder_combout ), + .combout(\inst|Add1~53_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[3]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|data_rd[3]~feeder .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X51_Y38_N27 -dffeas \inst13|inst|data_rd[3] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[3]~feeder_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|state~14_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rd [3]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_rd[3] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[3] .power_up = "low"; +defparam \inst|Add1~53 .lut_mask = 16'h3C30; +defparam \inst|Add1~53 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N18 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[3]~5 ( +// Location: LCCOMB_X55_Y39_N24 +fiftyfivenm_lcell_comb \inst|Add1~54 ( // Equation(s): -// \inst13|inst14|data_out[3]~5_combout = (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & (\inst13|inst14|state.Rx1~q & \inst13|inst|data_rd [3]))) +// \inst|Add1~54_combout = (\inst|IR [10] & ((\inst|Add1~1_combout ) # ((\inst|Add1~53_combout & \inst|WideOr3~1_combout )))) # (!\inst|IR [10] & (\inst|Add1~53_combout & (\inst|WideOr3~1_combout ))) - .dataa(\inst13|inst|busy~q ), - .datab(\inst13|inst14|prev_busy~q ), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst|data_rd [3]), + .dataa(\inst|IR [10]), + .datab(\inst|Add1~53_combout ), + .datac(\inst|WideOr3~1_combout ), + .datad(\inst|Add1~1_combout ), .cin(gnd), - .combout(\inst13|inst14|data_out[3]~5_combout ), + .combout(\inst|Add1~54_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[3]~5 .lut_mask = 16'h4000; -defparam \inst13|inst14|data_out[3]~5 .sum_lutc_input = "datac"; +defparam \inst|Add1~54 .lut_mask = 16'hEAC0; +defparam \inst|Add1~54 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N2 -fiftyfivenm_lcell_comb \inst13|inst14|state_machine~0 ( +// Location: LCCOMB_X57_Y37_N16 +fiftyfivenm_lcell_comb \inst3|TIMER_EN~3 ( // Equation(s): -// \inst13|inst14|state_machine~0_combout = (\inst13|inst14|prev_busy~q & !\inst13|inst|busy~q ) +// \inst3|TIMER_EN~3_combout = (!\inst|IR [4] & \inst|IR [1]) .dataa(gnd), - .datab(\inst13|inst14|prev_busy~q ), - .datac(\inst13|inst|busy~q ), - .datad(gnd), + .datab(gnd), + .datac(\inst|IR [4]), + .datad(\inst|IR [1]), .cin(gnd), - .combout(\inst13|inst14|state_machine~0_combout ), + .combout(\inst3|TIMER_EN~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|state_machine~0 .lut_mask = 16'h0C0C; -defparam \inst13|inst14|state_machine~0 .sum_lutc_input = "datac"; +defparam \inst3|TIMER_EN~3 .lut_mask = 16'h0F00; +defparam \inst3|TIMER_EN~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N18 -fiftyfivenm_lcell_comb \inst13|inst6 ( +// Location: LCCOMB_X57_Y39_N4 +fiftyfivenm_lcell_comb \inst|Selector21~3 ( // Equation(s): -// \inst13|inst6~combout = LCELL((\inst|IR [7] & (\inst3|TIMER_EN~1_combout & (\inst3|I2C_RDY_EN~0_combout & \inst|IO_WRITE_int~q )))) +// \inst|Selector21~3_combout = (\inst|altsyncram_component|auto_generated|q_a [6] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_loadi~q & \inst|IR [6])))) # (!\inst|altsyncram_component|auto_generated|q_a [6] & (((\inst|state.ex_loadi~q & \inst|IR +// [6])))) - .dataa(\inst|IR [7]), - .datab(\inst3|TIMER_EN~1_combout ), - .datac(\inst3|I2C_RDY_EN~0_combout ), - .datad(\inst|IO_WRITE_int~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [6]), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|state.ex_loadi~q ), + .datad(\inst|IR [6]), .cin(gnd), - .combout(\inst13|inst6~combout ), + .combout(\inst|Selector21~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst6 .lut_mask = 16'h8000; -defparam \inst13|inst6 .sum_lutc_input = "datac"; +defparam \inst|Selector21~3 .lut_mask = 16'hF888; +defparam \inst|Selector21~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N0 -fiftyfivenm_lcell_comb \inst13|inst14|go~feeder ( +// Location: LCCOMB_X57_Y39_N30 +fiftyfivenm_lcell_comb \inst|Selector21~4 ( // Equation(s): -// \inst13|inst14|go~feeder_combout = VCC +// \inst|Selector21~4_combout = (\inst|Selector21~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [6] $ (\inst|AC [6])))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(gnd), + .dataa(\inst|altsyncram_component|auto_generated|q_a [6]), + .datab(\inst|Selector21~3_combout ), + .datac(\inst|AC [6]), + .datad(\inst|state.ex_xor~q ), .cin(gnd), - .combout(\inst13|inst14|go~feeder_combout ), + .combout(\inst|Selector21~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|go~feeder .lut_mask = 16'hFFFF; -defparam \inst13|inst14|go~feeder .sum_lutc_input = "datac"; +defparam \inst|Selector21~4 .lut_mask = 16'hDECC; +defparam \inst|Selector21~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N16 -fiftyfivenm_lcell_comb \inst13|inst14|running~0 ( +// Location: LCCOMB_X56_Y41_N14 +fiftyfivenm_lcell_comb \inst|Add1~33 ( // Equation(s): -// \inst13|inst14|running~0_combout = (\inst13|inst14|state.idle~q & (\inst13|inst14|running~q )) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|go~q ))) +// \inst|Add1~33_combout = (\inst|altsyncram_component|auto_generated|q_a [6] & (!\inst|state.ex_sub~q & \inst|state.ex_add~q )) # (!\inst|altsyncram_component|auto_generated|q_a [6] & (\inst|state.ex_sub~q )) - .dataa(\inst13|inst14|state.idle~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [6]), .datab(gnd), - .datac(\inst13|inst14|running~q ), - .datad(\inst13|inst14|go~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst14|running~0_combout ), + .combout(\inst|Add1~33_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|running~0 .lut_mask = 16'hF5A0; -defparam \inst13|inst14|running~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X49_Y38_N17 -dffeas \inst13|inst14|running ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|running~0_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|running~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst14|running .is_wysiwyg = "true"; -defparam \inst13|inst14|running .power_up = "low"; +defparam \inst|Add1~33 .lut_mask = 16'h5A50; +defparam \inst|Add1~33 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N4 -fiftyfivenm_lcell_comb \inst13|inst14|latch_rdy~0 ( +// Location: LCCOMB_X56_Y41_N4 +fiftyfivenm_lcell_comb \inst|Add1~34 ( // Equation(s): -// \inst13|inst14|latch_rdy~0_combout = (\inst13|inst14|running~q ) # ((!\inst1|altpll_component|auto_generated|pll_lock_sync~q ) # (!\inst1|altpll_component|auto_generated|wire_pll1_locked )) +// \inst|Add1~34_combout = (\inst|WideOr3~1_combout & ((\inst|Add1~33_combout ) # ((\inst|Add1~1_combout & \inst|IR [6])))) # (!\inst|WideOr3~1_combout & (\inst|Add1~1_combout & ((\inst|IR [6])))) - .dataa(gnd), - .datab(\inst13|inst14|running~q ), - .datac(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .datad(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .dataa(\inst|WideOr3~1_combout ), + .datab(\inst|Add1~1_combout ), + .datac(\inst|Add1~33_combout ), + .datad(\inst|IR [6]), .cin(gnd), - .combout(\inst13|inst14|latch_rdy~0_combout ), + .combout(\inst|Add1~34_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|latch_rdy~0 .lut_mask = 16'hCFFF; -defparam \inst13|inst14|latch_rdy~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~34 .lut_mask = 16'hECA0; +defparam \inst|Add1~34 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y40_N1 -dffeas \inst13|inst14|go ( - .clk(\inst13|inst6~combout ), - .d(\inst13|inst14|go~feeder_combout ), - .asdata(vcc), - .clrn(!\inst13|inst14|latch_rdy~0_combout ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|go~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y40_N4 +fiftyfivenm_lcell_comb \inst|Add1~35 ( +// Equation(s): +// \inst|Add1~35_combout = (\inst|AC [6] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_add~q )))) + + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_addi~q ), + .datac(\inst|AC [6]), + .datad(\inst|state.ex_add~q ), + .cin(gnd), + .combout(\inst|Add1~35_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|go .is_wysiwyg = "true"; -defparam \inst13|inst14|go .power_up = "low"; +defparam \inst|Add1~35 .lut_mask = 16'hF0E0; +defparam \inst|Add1~35 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N18 -fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[7]~0 ( +// Location: LCCOMB_X55_Y40_N10 +fiftyfivenm_lcell_comb \inst|Add1~30 ( // Equation(s): -// \inst13|inst14|tx_addr[7]~0_combout = (!\inst13|inst14|state.idle~q & \inst13|inst14|go~q ) +// \inst|Add1~30_combout = (\inst|AC [5] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_addi~q )))) - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst14|state.idle~q ), - .datad(\inst13|inst14|go~q ), + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_add~q ), + .datac(\inst|AC [5]), + .datad(\inst|state.ex_addi~q ), .cin(gnd), - .combout(\inst13|inst14|tx_addr[7]~0_combout ), + .combout(\inst|Add1~30_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|tx_addr[7]~0 .lut_mask = 16'h0F00; -defparam \inst13|inst14|tx_addr[7]~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~30 .lut_mask = 16'hF0E0; +defparam \inst|Add1~30 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N12 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[7]~2 ( +// Location: LCCOMB_X56_Y41_N30 +fiftyfivenm_lcell_comb \inst|Add1~28 ( // Equation(s): -// \inst13|inst14|data_out[7]~2_combout = (\inst13|inst14|data_out[7]~0_combout & ((\inst13|inst14|tx_addr[7]~0_combout ) # ((\inst13|inst14|state.Rx1~q & \inst13|inst14|state_machine~0_combout )))) +// \inst|Add1~28_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [5])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [5] & \inst|state.ex_add~q )) - .dataa(\inst13|inst14|data_out[7]~0_combout ), - .datab(\inst13|inst14|state.Rx1~q ), - .datac(\inst13|inst14|state_machine~0_combout ), - .datad(\inst13|inst14|tx_addr[7]~0_combout ), + .dataa(\inst|state.ex_sub~q ), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [5]), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst14|data_out[7]~2_combout ), + .combout(\inst|Add1~28_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[7]~2 .lut_mask = 16'hAA80; -defparam \inst13|inst14|data_out[7]~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y38_N19 -dffeas \inst13|inst14|data_out[3] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[3]~5_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|data_out [3]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst14|data_out[3] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[3] .power_up = "low"; +defparam \inst|Add1~28 .lut_mask = 16'h5A0A; +defparam \inst|Add1~28 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N16 -fiftyfivenm_lcell_comb \inst13|inst1[3]~30 ( +// Location: LCCOMB_X56_Y41_N20 +fiftyfivenm_lcell_comb \inst|Add1~29 ( // Equation(s): -// \inst13|inst1[3]~30_combout = (\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [3]) # (!\inst3|I2C_DATA_EN~combout )) +// \inst|Add1~29_combout = (\inst|Add1~28_combout & ((\inst|WideOr3~1_combout ) # ((\inst|Add1~1_combout & \inst|IR [5])))) # (!\inst|Add1~28_combout & (\inst|Add1~1_combout & ((\inst|IR [5])))) - .dataa(gnd), - .datab(\inst|IO_WRITE_int~q ), - .datac(\inst3|I2C_DATA_EN~combout ), - .datad(\inst13|inst14|data_out [3]), + .dataa(\inst|Add1~28_combout ), + .datab(\inst|Add1~1_combout ), + .datac(\inst|WideOr3~1_combout ), + .datad(\inst|IR [5]), .cin(gnd), - .combout(\inst13|inst1[3]~30_combout ), + .combout(\inst|Add1~29_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[3]~30 .lut_mask = 16'hFFCF; -defparam \inst13|inst1[3]~30 .sum_lutc_input = "datac"; +defparam \inst|Add1~29 .lut_mask = 16'hECA0; +defparam \inst|Add1~29 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N8 -fiftyfivenm_lcell_comb \inst11|tri_enable ( +// Location: LCCOMB_X56_Y40_N4 +fiftyfivenm_lcell_comb \inst|Add1~25 ( // Equation(s): -// \inst11|tri_enable~combout = (\inst11|tri_enable~1_combout & \inst|IR [0]) +// \inst|Add1~25_combout = (\inst|AC [4] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_add~q )))) - .dataa(\inst11|tri_enable~1_combout ), - .datab(gnd), - .datac(gnd), - .datad(\inst|IR [0]), + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_addi~q ), + .datac(\inst|AC [4]), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst11|tri_enable~combout ), + .combout(\inst|Add1~25_combout ), .cout()); // synopsys translate_off -defparam \inst11|tri_enable .lut_mask = 16'hAA00; -defparam \inst11|tri_enable .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X34_Y0_N8 -fiftyfivenm_io_ibuf \ENCODER_H1~input ( - .i(ENCODER_H1), - .ibar(gnd), - .nsleep(vcc), - .o(\ENCODER_H1~input_o )); -// synopsys translate_off -defparam \ENCODER_H1~input .bus_hold = "false"; -defparam \ENCODER_H1~input .listen_to_nsleep_signal = "false"; -defparam \ENCODER_H1~input .simulate_z_as = "z"; +defparam \inst|Add1~25 .lut_mask = 16'hF0E0; +defparam \inst|Add1~25 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X43_Y38_N16 -fiftyfivenm_lcell_comb \inst11|AB1[1]~feeder ( +// Location: LCCOMB_X54_Y40_N24 +fiftyfivenm_lcell_comb \inst|Add1~23 ( // Equation(s): -// \inst11|AB1[1]~feeder_combout = \ENCODER_H1~input_o +// \inst|Add1~23_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [4]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [4])) .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\ENCODER_H1~input_o ), + .datab(\inst|state.ex_sub~q ), + .datac(\inst|state.ex_add~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [4]), .cin(gnd), - .combout(\inst11|AB1[1]~feeder_combout ), + .combout(\inst|Add1~23_combout ), .cout()); // synopsys translate_off -defparam \inst11|AB1[1]~feeder .lut_mask = 16'hFF00; -defparam \inst11|AB1[1]~feeder .sum_lutc_input = "datac"; +defparam \inst|Add1~23 .lut_mask = 16'h30CC; +defparam \inst|Add1~23 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X43_Y38_N17 -dffeas \inst11|AB1[1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|AB1[1]~feeder_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|AB1 [1]), - .prn(vcc)); -// synopsys translate_off -defparam \inst11|AB1[1] .is_wysiwyg = "true"; -defparam \inst11|AB1[1] .power_up = "low"; -// synopsys translate_on +// Location: LCCOMB_X54_Y40_N30 +fiftyfivenm_lcell_comb \inst|Add1~24 ( +// Equation(s): +// \inst|Add1~24_combout = (\inst|IR [4] & ((\inst|Add1~1_combout ) # ((\inst|WideOr3~1_combout & \inst|Add1~23_combout )))) # (!\inst|IR [4] & (\inst|WideOr3~1_combout & ((\inst|Add1~23_combout )))) -// Location: FF_X50_Y46_N1 -dffeas \inst11|AB[1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst11|AB1 [1]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|AB [1]), - .prn(vcc)); + .dataa(\inst|IR [4]), + .datab(\inst|WideOr3~1_combout ), + .datac(\inst|Add1~1_combout ), + .datad(\inst|Add1~23_combout ), + .cin(gnd), + .combout(\inst|Add1~24_combout ), + .cout()); // synopsys translate_off -defparam \inst11|AB[1] .is_wysiwyg = "true"; -defparam \inst11|AB[1] .power_up = "low"; +defparam \inst|Add1~24 .lut_mask = 16'hECA0; +defparam \inst|Add1~24 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOIBUF_X34_Y0_N15 -fiftyfivenm_io_ibuf \ENCODER_H2~input ( - .i(ENCODER_H2), - .ibar(gnd), - .nsleep(vcc), - .o(\ENCODER_H2~input_o )); -// synopsys translate_off -defparam \ENCODER_H2~input .bus_hold = "false"; -defparam \ENCODER_H2~input .listen_to_nsleep_signal = "false"; -defparam \ENCODER_H2~input .simulate_z_as = "z"; -// synopsys translate_on +// Location: LCCOMB_X55_Y40_N12 +fiftyfivenm_lcell_comb \inst|Add1~20 ( +// Equation(s): +// \inst|Add1~20_combout = (\inst|AC [3] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) -// Location: FF_X43_Y38_N7 -dffeas \inst11|AB1[0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\ENCODER_H2~input_o ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|AB1 [0]), - .prn(vcc)); + .dataa(\inst|AC [3]), + .datab(\inst|state.ex_add~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_addi~q ), + .cin(gnd), + .combout(\inst|Add1~20_combout ), + .cout()); // synopsys translate_off -defparam \inst11|AB1[0] .is_wysiwyg = "true"; -defparam \inst11|AB1[0] .power_up = "low"; +defparam \inst|Add1~20 .lut_mask = 16'hAAA8; +defparam \inst|Add1~20 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y46_N23 -dffeas \inst11|AB[0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst11|AB1 [0]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|AB [0]), - .prn(vcc)); +// Location: LCCOMB_X58_Y39_N0 +fiftyfivenm_lcell_comb \inst|Add1~18 ( +// Equation(s): +// \inst|Add1~18_combout = (\inst|altsyncram_component|auto_generated|q_a [3] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [3] & ((\inst|state.ex_sub~q ))) + + .dataa(\inst|altsyncram_component|auto_generated|q_a [3]), + .datab(\inst|state.ex_add~q ), + .datac(gnd), + .datad(\inst|state.ex_sub~q ), + .cin(gnd), + .combout(\inst|Add1~18_combout ), + .cout()); // synopsys translate_off -defparam \inst11|AB[0] .is_wysiwyg = "true"; -defparam \inst11|AB[0] .power_up = "low"; +defparam \inst|Add1~18 .lut_mask = 16'h5588; +defparam \inst|Add1~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N24 -fiftyfivenm_lcell_comb \inst11|Selector3~2 ( +// Location: LCCOMB_X55_Y40_N2 +fiftyfivenm_lcell_comb \inst|Add1~19 ( // Equation(s): -// \inst11|Selector3~2_combout = (\inst11|state.AB_11~q & ((\inst11|AB [1]) # (\inst11|AB [0]))) # (!\inst11|state.AB_11~q & (\inst11|AB [1] & \inst11|AB [0])) +// \inst|Add1~19_combout = (\inst|Add1~18_combout & ((\inst|WideOr3~1_combout ) # ((\inst|IR [3] & \inst|Add1~1_combout )))) # (!\inst|Add1~18_combout & (\inst|IR [3] & ((\inst|Add1~1_combout )))) - .dataa(gnd), - .datab(\inst11|state.AB_11~q ), - .datac(\inst11|AB [1]), - .datad(\inst11|AB [0]), + .dataa(\inst|Add1~18_combout ), + .datab(\inst|IR [3]), + .datac(\inst|WideOr3~1_combout ), + .datad(\inst|Add1~1_combout ), .cin(gnd), - .combout(\inst11|Selector3~2_combout ), + .combout(\inst|Add1~19_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector3~2 .lut_mask = 16'hFCC0; -defparam \inst11|Selector3~2 .sum_lutc_input = "datac"; +defparam \inst|Add1~19 .lut_mask = 16'hECA0; +defparam \inst|Add1~19 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N30 -fiftyfivenm_lcell_comb \inst11|Selector20~0 ( +// Location: LCCOMB_X55_Y40_N24 +fiftyfivenm_lcell_comb \inst|Add1~21 ( // Equation(s): -// \inst11|Selector20~0_combout = \inst11|AB [1] $ (\inst11|AB [0]) +// \inst|Add1~21_combout = ((\inst|Add1~20_combout $ (\inst|Add1~19_combout $ (!\inst|Add1~17 )))) # (GND) +// \inst|Add1~22 = CARRY((\inst|Add1~20_combout & ((\inst|Add1~19_combout ) # (!\inst|Add1~17 ))) # (!\inst|Add1~20_combout & (\inst|Add1~19_combout & !\inst|Add1~17 ))) - .dataa(gnd), - .datab(gnd), - .datac(\inst11|AB [1]), - .datad(\inst11|AB [0]), - .cin(gnd), - .combout(\inst11|Selector20~0_combout ), - .cout()); + .dataa(\inst|Add1~20_combout ), + .datab(\inst|Add1~19_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~17 ), + .combout(\inst|Add1~21_combout ), + .cout(\inst|Add1~22 )); // synopsys translate_off -defparam \inst11|Selector20~0 .lut_mask = 16'h0FF0; -defparam \inst11|Selector20~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~21 .lut_mask = 16'h698E; +defparam \inst|Add1~21 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N2 -fiftyfivenm_lcell_comb \inst11|Selector2~2 ( +// Location: LCCOMB_X55_Y40_N26 +fiftyfivenm_lcell_comb \inst|Add1~26 ( // Equation(s): -// \inst11|Selector2~2_combout = (\inst11|AB [1] & ((\inst11|AB [0]) # ((\inst11|Selector2~0_combout & \inst10|state.Init~q )))) # (!\inst11|AB [1] & (((\inst10|state.Init~q )))) +// \inst|Add1~26_combout = (\inst|Add1~25_combout & ((\inst|Add1~24_combout & (\inst|Add1~22 & VCC)) # (!\inst|Add1~24_combout & (!\inst|Add1~22 )))) # (!\inst|Add1~25_combout & ((\inst|Add1~24_combout & (!\inst|Add1~22 )) # (!\inst|Add1~24_combout & +// ((\inst|Add1~22 ) # (GND))))) +// \inst|Add1~27 = CARRY((\inst|Add1~25_combout & (!\inst|Add1~24_combout & !\inst|Add1~22 )) # (!\inst|Add1~25_combout & ((!\inst|Add1~22 ) # (!\inst|Add1~24_combout )))) - .dataa(\inst11|Selector2~0_combout ), - .datab(\inst11|AB [1]), - .datac(\inst10|state.Init~q ), - .datad(\inst11|AB [0]), - .cin(gnd), - .combout(\inst11|Selector2~2_combout ), - .cout()); + .dataa(\inst|Add1~25_combout ), + .datab(\inst|Add1~24_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~22 ), + .combout(\inst|Add1~26_combout ), + .cout(\inst|Add1~27 )); // synopsys translate_off -defparam \inst11|Selector2~2 .lut_mask = 16'hFCB0; -defparam \inst11|Selector2~2 .sum_lutc_input = "datac"; +defparam \inst|Add1~26 .lut_mask = 16'h9617; +defparam \inst|Add1~26 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N20 -fiftyfivenm_lcell_comb \inst11|Selector2~3 ( +// Location: LCCOMB_X55_Y40_N28 +fiftyfivenm_lcell_comb \inst|Add1~31 ( // Equation(s): -// \inst11|Selector2~3_combout = (\inst11|Selector2~2_combout & (((\inst11|state.AB_10~q & !\inst11|Selector2~1_combout )))) # (!\inst11|Selector2~2_combout & (\inst11|AB [1])) +// \inst|Add1~31_combout = ((\inst|Add1~30_combout $ (\inst|Add1~29_combout $ (!\inst|Add1~27 )))) # (GND) +// \inst|Add1~32 = CARRY((\inst|Add1~30_combout & ((\inst|Add1~29_combout ) # (!\inst|Add1~27 ))) # (!\inst|Add1~30_combout & (\inst|Add1~29_combout & !\inst|Add1~27 ))) - .dataa(\inst11|Selector2~2_combout ), - .datab(\inst11|AB [1]), - .datac(\inst11|state.AB_10~q ), - .datad(\inst11|Selector2~1_combout ), - .cin(gnd), - .combout(\inst11|Selector2~3_combout ), - .cout()); + .dataa(\inst|Add1~30_combout ), + .datab(\inst|Add1~29_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~27 ), + .combout(\inst|Add1~31_combout ), + .cout(\inst|Add1~32 )); // synopsys translate_off -defparam \inst11|Selector2~3 .lut_mask = 16'h44E4; -defparam \inst11|Selector2~3 .sum_lutc_input = "datac"; +defparam \inst|Add1~31 .lut_mask = 16'h698E; +defparam \inst|Add1~31 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y46_N21 -dffeas \inst11|state.AB_10 ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|Selector2~3_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|state.AB_10~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y40_N30 +fiftyfivenm_lcell_comb \inst|Add1~36 ( +// Equation(s): +// \inst|Add1~36_combout = (\inst|Add1~34_combout & ((\inst|Add1~35_combout & (\inst|Add1~32 & VCC)) # (!\inst|Add1~35_combout & (!\inst|Add1~32 )))) # (!\inst|Add1~34_combout & ((\inst|Add1~35_combout & (!\inst|Add1~32 )) # (!\inst|Add1~35_combout & +// ((\inst|Add1~32 ) # (GND))))) +// \inst|Add1~37 = CARRY((\inst|Add1~34_combout & (!\inst|Add1~35_combout & !\inst|Add1~32 )) # (!\inst|Add1~34_combout & ((!\inst|Add1~32 ) # (!\inst|Add1~35_combout )))) + + .dataa(\inst|Add1~34_combout ), + .datab(\inst|Add1~35_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~32 ), + .combout(\inst|Add1~36_combout ), + .cout(\inst|Add1~37 )); // synopsys translate_off -defparam \inst11|state.AB_10 .is_wysiwyg = "true"; -defparam \inst11|state.AB_10 .power_up = "low"; +defparam \inst|Add1~36 .lut_mask = 16'h9617; +defparam \inst|Add1~36 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N4 -fiftyfivenm_lcell_comb \inst11|Selector3~0 ( +// Location: LCCOMB_X57_Y39_N8 +fiftyfivenm_lcell_comb \inst|Selector21~1 ( // Equation(s): -// \inst11|Selector3~0_combout = (!\inst11|state.AB_01~q & !\inst11|state.AB_10~q ) +// \inst|Selector21~1_combout = (\inst|AC [6] & (((\inst|altsyncram_component|auto_generated|q_a [6] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst11|state.AB_01~q ), - .datab(gnd), - .datac(gnd), - .datad(\inst11|state.AB_10~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [6]), + .datab(\inst|state.ex_and~q ), + .datac(\inst|AC [6]), + .datad(\inst|Selector27~6_combout ), .cin(gnd), - .combout(\inst11|Selector3~0_combout ), + .combout(\inst|Selector21~1_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector3~0 .lut_mask = 16'h0055; -defparam \inst11|Selector3~0 .sum_lutc_input = "datac"; +defparam \inst|Selector21~1 .lut_mask = 16'h80F0; +defparam \inst|Selector21~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N12 -fiftyfivenm_lcell_comb \inst11|Selector3~1 ( +// Location: LCCOMB_X55_Y37_N8 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[26]~16 ( // Equation(s): -// \inst11|Selector3~1_combout = (\inst10|state.Init~q & (!\inst11|Selector3~0_combout )) # (!\inst10|state.Init~q & ((\inst11|AB [1] $ (!\inst11|AB [0])))) +// \inst|shifter|auto_generated|sbit_w[26]~16_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [11]))) # (!\inst|IR [4] & (\inst|AC [9])))) - .dataa(\inst10|state.Init~q ), - .datab(\inst11|Selector3~0_combout ), - .datac(\inst11|AB [1]), - .datad(\inst11|AB [0]), + .dataa(\inst|IR [4]), + .datab(\inst|IR [0]), + .datac(\inst|AC [9]), + .datad(\inst|AC [11]), .cin(gnd), - .combout(\inst11|Selector3~1_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[26]~16_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector3~1 .lut_mask = 16'h7227; -defparam \inst11|Selector3~1 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[26]~16 .lut_mask = 16'hC840; +defparam \inst|shifter|auto_generated|sbit_w[26]~16 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N2 -fiftyfivenm_lcell_comb \inst11|Selector3~3 ( +// Location: LCCOMB_X55_Y37_N6 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[26]~17 ( // Equation(s): -// \inst11|Selector3~3_combout = (!\inst11|state.AB_01~q & (!\inst11|state.AB_10~q & (\inst10|state.Init~q & \inst11|state.AB_11~q ))) +// \inst|shifter|auto_generated|sbit_w[26]~17_combout = (\inst|shifter|auto_generated|sbit_w[26]~16_combout ) # ((\inst|AC [10] & !\inst|IR [0])) - .dataa(\inst11|state.AB_01~q ), - .datab(\inst11|state.AB_10~q ), - .datac(\inst10|state.Init~q ), - .datad(\inst11|state.AB_11~q ), + .dataa(\inst|AC [10]), + .datab(\inst|IR [0]), + .datac(\inst|shifter|auto_generated|sbit_w[26]~16_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst11|Selector3~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector3~3 .lut_mask = 16'h1000; -defparam \inst11|Selector3~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[26]~17 .lut_mask = 16'hF2F2; +defparam \inst|shifter|auto_generated|sbit_w[26]~17 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N16 -fiftyfivenm_lcell_comb \inst11|Selector3~4 ( +// Location: LCCOMB_X56_Y39_N14 +fiftyfivenm_lcell_comb \inst|Selector19~1 ( // Equation(s): -// \inst11|Selector3~4_combout = (\inst11|Selector3~2_combout & ((\inst11|Selector3~1_combout ) # ((!\inst11|Selector20~0_combout & \inst11|Selector3~3_combout )))) # (!\inst11|Selector3~2_combout & (!\inst11|Selector20~0_combout & -// ((\inst11|Selector3~3_combout )))) +// \inst|Selector19~1_combout = (\inst|AC [8] & (((\inst|altsyncram_component|auto_generated|q_a [8] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst11|Selector3~2_combout ), - .datab(\inst11|Selector20~0_combout ), - .datac(\inst11|Selector3~1_combout ), - .datad(\inst11|Selector3~3_combout ), + .dataa(\inst|Selector27~6_combout ), + .datab(\inst|altsyncram_component|auto_generated|q_a [8]), + .datac(\inst|AC [8]), + .datad(\inst|state.ex_and~q ), .cin(gnd), - .combout(\inst11|Selector3~4_combout ), + .combout(\inst|Selector19~1_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector3~4 .lut_mask = 16'hB3A0; -defparam \inst11|Selector3~4 .sum_lutc_input = "datac"; +defparam \inst|Selector19~1 .lut_mask = 16'hD050; +defparam \inst|Selector19~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y46_N17 -dffeas \inst11|state.AB_11 ( +// Location: FF_X58_Y38_N13 +dffeas \inst|IR[8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|Selector3~4_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [8]), + .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(vcc), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|state.AB_11~q ), + .q(\inst|IR [8]), .prn(vcc)); // synopsys translate_off -defparam \inst11|state.AB_11 .is_wysiwyg = "true"; -defparam \inst11|state.AB_11 .power_up = "low"; +defparam \inst|IR[8] .is_wysiwyg = "true"; +defparam \inst|IR[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N26 -fiftyfivenm_lcell_comb \inst11|Selector2~0 ( +// Location: LCCOMB_X59_Y38_N18 +fiftyfivenm_lcell_comb \inst|Add1~43 ( // Equation(s): -// \inst11|Selector2~0_combout = (!\inst11|state.AB_00~q & !\inst11|state.AB_11~q ) +// \inst|Add1~43_combout = (\inst|altsyncram_component|auto_generated|q_a [8] & (!\inst|state.ex_sub~q & \inst|state.ex_add~q )) # (!\inst|altsyncram_component|auto_generated|q_a [8] & (\inst|state.ex_sub~q )) - .dataa(\inst11|state.AB_00~q ), - .datab(gnd), - .datac(gnd), - .datad(\inst11|state.AB_11~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [8]), + .datab(\inst|state.ex_sub~q ), + .datac(\inst|state.ex_add~q ), + .datad(gnd), .cin(gnd), - .combout(\inst11|Selector2~0_combout ), + .combout(\inst|Add1~43_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector2~0 .lut_mask = 16'h0055; -defparam \inst11|Selector2~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~43 .lut_mask = 16'h6464; +defparam \inst|Add1~43 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N10 -fiftyfivenm_lcell_comb \inst11|Selector2~1 ( +// Location: LCCOMB_X58_Y38_N12 +fiftyfivenm_lcell_comb \inst|Add1~44 ( // Equation(s): -// \inst11|Selector2~1_combout = (\inst11|AB [1] & (\inst11|Selector2~0_combout $ (((!\inst11|AB [0]))))) # (!\inst11|AB [1] & ((\inst11|AB [0] & (!\inst11|Selector2~0_combout )) # (!\inst11|AB [0] & ((!\inst11|Selector3~0_combout ))))) +// \inst|Add1~44_combout = (\inst|WideOr3~1_combout & ((\inst|Add1~43_combout ) # ((\inst|Add1~1_combout & \inst|IR [8])))) # (!\inst|WideOr3~1_combout & (\inst|Add1~1_combout & (\inst|IR [8]))) - .dataa(\inst11|Selector2~0_combout ), - .datab(\inst11|AB [1]), - .datac(\inst11|Selector3~0_combout ), - .datad(\inst11|AB [0]), + .dataa(\inst|WideOr3~1_combout ), + .datab(\inst|Add1~1_combout ), + .datac(\inst|IR [8]), + .datad(\inst|Add1~43_combout ), .cin(gnd), - .combout(\inst11|Selector2~1_combout ), + .combout(\inst|Add1~44_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector2~1 .lut_mask = 16'h9947; -defparam \inst11|Selector2~1 .sum_lutc_input = "datac"; +defparam \inst|Add1~44 .lut_mask = 16'hEAC0; +defparam \inst|Add1~44 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N12 -fiftyfivenm_lcell_comb \inst11|Selector4~0 ( +// Location: LCCOMB_X58_Y39_N26 +fiftyfivenm_lcell_comb \inst|Add1~45 ( // Equation(s): -// \inst11|Selector4~0_combout = (!\inst11|AB [1] & (\inst11|AB [0] & ((\inst11|state.AB_00~q ) # (\inst11|state.AB_11~q )))) +// \inst|Add1~45_combout = (\inst|AC [8] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) - .dataa(\inst11|state.AB_00~q ), - .datab(\inst11|state.AB_11~q ), - .datac(\inst11|AB [1]), - .datad(\inst11|AB [0]), + .dataa(\inst|state.ex_add~q ), + .datab(\inst|AC [8]), + .datac(\inst|state.ex_addi~q ), + .datad(\inst|state.ex_sub~q ), .cin(gnd), - .combout(\inst11|Selector4~0_combout ), + .combout(\inst|Add1~45_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector4~0 .lut_mask = 16'h0E00; -defparam \inst11|Selector4~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~45 .lut_mask = 16'hCCC8; +defparam \inst|Add1~45 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N18 -fiftyfivenm_lcell_comb \inst11|Selector4~1 ( +// Location: LCCOMB_X56_Y41_N10 +fiftyfivenm_lcell_comb \inst|Add1~38 ( // Equation(s): -// \inst11|Selector4~1_combout = (\inst11|Selector2~1_combout & ((\inst11|Selector4~0_combout ))) # (!\inst11|Selector2~1_combout & (\inst11|state.AB_01~q )) +// \inst|Add1~38_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [7])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [7] & \inst|state.ex_add~q )) - .dataa(\inst11|state.AB_01~q ), + .dataa(\inst|state.ex_sub~q ), .datab(gnd), - .datac(\inst11|Selector2~1_combout ), - .datad(\inst11|Selector4~0_combout ), - .cin(gnd), - .combout(\inst11|Selector4~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst11|Selector4~1 .lut_mask = 16'hFA0A; -defparam \inst11|Selector4~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y46_N6 -fiftyfivenm_lcell_comb \inst11|Selector4~2 ( -// Equation(s): -// \inst11|Selector4~2_combout = (\inst10|state.Init~q & (\inst11|Selector4~1_combout )) # (!\inst10|state.Init~q & (\inst11|AB [0] & ((\inst11|Selector4~1_combout ) # (!\inst11|AB [1])))) - - .dataa(\inst11|Selector4~1_combout ), - .datab(\inst11|AB [1]), - .datac(\inst10|state.Init~q ), - .datad(\inst11|AB [0]), + .datac(\inst|altsyncram_component|auto_generated|q_a [7]), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst11|Selector4~2_combout ), + .combout(\inst|Add1~38_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector4~2 .lut_mask = 16'hABA0; -defparam \inst11|Selector4~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y46_N7 -dffeas \inst11|state.AB_01 ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|Selector4~2_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|state.AB_01~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst11|state.AB_01 .is_wysiwyg = "true"; -defparam \inst11|state.AB_01 .power_up = "low"; +defparam \inst|Add1~38 .lut_mask = 16'h5A0A; +defparam \inst|Add1~38 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N30 -fiftyfivenm_lcell_comb \inst11|Selector1~1 ( +// Location: LCCOMB_X56_Y41_N28 +fiftyfivenm_lcell_comb \inst|Add1~39 ( // Equation(s): -// \inst11|Selector1~1_combout = (\inst11|state.AB_01~q ) # ((\inst11|state.AB_10~q ) # ((\inst11|state.AB_00~q ) # (!\inst10|state.Init~q ))) +// \inst|Add1~39_combout = (\inst|WideOr3~1_combout & ((\inst|Add1~38_combout ) # ((\inst|Add1~1_combout & \inst|IR [7])))) # (!\inst|WideOr3~1_combout & (\inst|Add1~1_combout & (\inst|IR [7]))) - .dataa(\inst11|state.AB_01~q ), - .datab(\inst11|state.AB_10~q ), - .datac(\inst10|state.Init~q ), - .datad(\inst11|state.AB_00~q ), + .dataa(\inst|WideOr3~1_combout ), + .datab(\inst|Add1~1_combout ), + .datac(\inst|IR [7]), + .datad(\inst|Add1~38_combout ), .cin(gnd), - .combout(\inst11|Selector1~1_combout ), + .combout(\inst|Add1~39_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector1~1 .lut_mask = 16'hFFEF; -defparam \inst11|Selector1~1 .sum_lutc_input = "datac"; +defparam \inst|Add1~39 .lut_mask = 16'hEAC0; +defparam \inst|Add1~39 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N8 -fiftyfivenm_lcell_comb \inst11|Selector1~0 ( +// Location: LCCOMB_X56_Y40_N14 +fiftyfivenm_lcell_comb \inst|Selector20~1 ( // Equation(s): -// \inst11|Selector1~0_combout = (\inst11|state.AB_00~q & (((\inst11|AB [0] & \inst11|AB [1])) # (!\inst11|Selector3~0_combout ))) +// \inst|Selector20~1_combout = (\inst|AC [7] & (((\inst|altsyncram_component|auto_generated|q_a [7] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst11|state.AB_00~q ), - .datab(\inst11|AB [0]), - .datac(\inst11|AB [1]), - .datad(\inst11|Selector3~0_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [7]), + .datab(\inst|AC [7]), + .datac(\inst|Selector27~6_combout ), + .datad(\inst|state.ex_and~q ), .cin(gnd), - .combout(\inst11|Selector1~0_combout ), + .combout(\inst|Selector20~1_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector1~0 .lut_mask = 16'h80AA; -defparam \inst11|Selector1~0 .sum_lutc_input = "datac"; +defparam \inst|Selector20~1 .lut_mask = 16'h8C0C; +defparam \inst|Selector20~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N14 -fiftyfivenm_lcell_comb \inst11|Selector1~2 ( +// Location: LCCOMB_X55_Y37_N18 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[23]~34 ( // Equation(s): -// \inst11|Selector1~2_combout = (\inst11|Selector1~0_combout ) # ((\inst11|Selector1~1_combout & (!\inst11|AB [1] & !\inst11|AB [0]))) +// \inst|shifter|auto_generated|sbit_w[23]~34_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [8]))) # (!\inst|IR [4] & (\inst|AC [6])))) - .dataa(\inst11|Selector1~1_combout ), - .datab(\inst11|AB [1]), - .datac(\inst11|Selector1~0_combout ), - .datad(\inst11|AB [0]), + .dataa(\inst|AC [6]), + .datab(\inst|AC [8]), + .datac(\inst|IR [4]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst11|Selector1~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[23]~34_combout ), .cout()); // synopsys translate_off -defparam \inst11|Selector1~2 .lut_mask = 16'hF0F2; -defparam \inst11|Selector1~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y46_N15 -dffeas \inst11|state.AB_00 ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|Selector1~2_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|state.AB_00~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst11|state.AB_00 .is_wysiwyg = "true"; -defparam \inst11|state.AB_00 .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[23]~34 .lut_mask = 16'hCA00; +defparam \inst|shifter|auto_generated|sbit_w[23]~34 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N22 -fiftyfivenm_lcell_comb \inst11|Add1~2 ( +// Location: LCCOMB_X55_Y37_N4 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[23]~35 ( // Equation(s): -// \inst11|Add1~2_combout = (\inst11|AB [0] & (((\inst11|state.AB_10~q )))) # (!\inst11|AB [0] & (\inst11|AB [1] & ((\inst11|state.AB_00~q ) # (\inst11|state.AB_10~q )))) +// \inst|shifter|auto_generated|sbit_w[23]~35_combout = (\inst|shifter|auto_generated|sbit_w[23]~34_combout ) # ((!\inst|IR [0] & \inst|AC [7])) - .dataa(\inst11|state.AB_00~q ), - .datab(\inst11|AB [1]), - .datac(\inst11|AB [0]), - .datad(\inst11|state.AB_10~q ), + .dataa(gnd), + .datab(\inst|IR [0]), + .datac(\inst|AC [7]), + .datad(\inst|shifter|auto_generated|sbit_w[23]~34_combout ), .cin(gnd), - .combout(\inst11|Add1~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~2 .lut_mask = 16'hFC08; -defparam \inst11|Add1~2 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[23]~35 .lut_mask = 16'hFF30; +defparam \inst|shifter|auto_generated|sbit_w[23]~35 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N0 -fiftyfivenm_lcell_comb \inst11|Add1~1 ( +// Location: LCCOMB_X58_Y37_N6 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[21]~37 ( // Equation(s): -// \inst11|Add1~1_combout = (\inst11|AB [0] & (((\inst11|state.AB_11~q )))) # (!\inst11|AB [0] & (!\inst11|AB [1] & ((\inst11|state.AB_01~q ) # (\inst11|state.AB_11~q )))) +// \inst|shifter|auto_generated|sbit_w[21]~37_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [6]))) # (!\inst|IR [4] & (\inst|AC [4])))) - .dataa(\inst11|state.AB_01~q ), - .datab(\inst11|AB [0]), - .datac(\inst11|AB [1]), - .datad(\inst11|state.AB_11~q ), + .dataa(\inst|AC [4]), + .datab(\inst|AC [6]), + .datac(\inst|IR [4]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst11|Add1~1_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[21]~37_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~1 .lut_mask = 16'hCF02; -defparam \inst11|Add1~1 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[21]~37 .lut_mask = 16'hCA00; +defparam \inst|shifter|auto_generated|sbit_w[21]~37 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y46_N28 -fiftyfivenm_lcell_comb \inst11|Add1~3 ( +// Location: LCCOMB_X58_Y37_N24 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[21]~38 ( // Equation(s): -// \inst11|Add1~3_combout = (\inst11|Add1~2_combout ) # (\inst11|Add1~1_combout ) +// \inst|shifter|auto_generated|sbit_w[21]~38_combout = (\inst|shifter|auto_generated|sbit_w[21]~37_combout ) # ((\inst|AC [5] & !\inst|IR [0])) - .dataa(gnd), + .dataa(\inst|shifter|auto_generated|sbit_w[21]~37_combout ), .datab(gnd), - .datac(\inst11|Add1~2_combout ), - .datad(\inst11|Add1~1_combout ), + .datac(\inst|AC [5]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst11|Add1~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~3 .lut_mask = 16'hFFF0; -defparam \inst11|Add1~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[21]~38 .lut_mask = 16'hAAFA; +defparam \inst|shifter|auto_generated|sbit_w[21]~38 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N22 -fiftyfivenm_lcell_comb \inst11|Add1~6 ( +// Location: LCCOMB_X57_Y38_N4 +fiftyfivenm_lcell_comb \inst3|I2C_RDY_EN~0 ( // Equation(s): -// \inst11|Add1~6_combout = (\inst10|state.Init~q & \inst11|count [3]) +// \inst3|I2C_RDY_EN~0_combout = (\inst|IR [4] & \inst|IR [1]) .dataa(gnd), .datab(gnd), - .datac(\inst10|state.Init~q ), - .datad(\inst11|count [3]), + .datac(\inst|IR [4]), + .datad(\inst|IR [1]), .cin(gnd), - .combout(\inst11|Add1~6_combout ), + .combout(\inst3|I2C_RDY_EN~0_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~6 .lut_mask = 16'hF000; -defparam \inst11|Add1~6 .sum_lutc_input = "datac"; +defparam \inst3|I2C_RDY_EN~0 .lut_mask = 16'hF000; +defparam \inst3|I2C_RDY_EN~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N0 -fiftyfivenm_lcell_comb \inst11|count[0]~16 ( +// Location: LCCOMB_X57_Y37_N0 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[39]~61 ( // Equation(s): -// \inst11|count[0]~16_combout = (\inst11|Add1~0_combout & (\inst10|state.Init~q $ (VCC))) # (!\inst11|Add1~0_combout & (\inst10|state.Init~q & VCC)) -// \inst11|count[0]~17 = CARRY((\inst11|Add1~0_combout & \inst10|state.Init~q )) +// \inst|shifter|auto_generated|sbit_w[39]~61_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[21]~38_combout ) # ((\inst|shifter|auto_generated|sbit_w[25]~49_combout & \inst3|I2C_RDY_EN~0_combout )))) # +// (!\inst3|TIMER_EN~3_combout & (((\inst|shifter|auto_generated|sbit_w[25]~49_combout & \inst3|I2C_RDY_EN~0_combout )))) - .dataa(\inst11|Add1~0_combout ), - .datab(\inst10|state.Init~q ), - .datac(gnd), - .datad(vcc), + .dataa(\inst3|TIMER_EN~3_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), + .datad(\inst3|I2C_RDY_EN~0_combout ), .cin(gnd), - .combout(\inst11|count[0]~16_combout ), - .cout(\inst11|count[0]~17 )); + .combout(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[0]~16 .lut_mask = 16'h6688; -defparam \inst11|count[0]~16 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[39]~61 .lut_mask = 16'hF888; +defparam \inst|shifter|auto_generated|sbit_w[39]~61 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N8 -fiftyfivenm_lcell_comb \inst11|count[9]~18 ( +// Location: LCCOMB_X57_Y37_N22 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[39]~62 ( // Equation(s): -// \inst11|count[9]~18_combout = (\inst10|state.Init~q & ((\inst11|Selector20~0_combout & (!\inst11|Selector2~0_combout )) # (!\inst11|Selector20~0_combout & ((!\inst11|Selector3~0_combout ))))) +// \inst|shifter|auto_generated|sbit_w[39]~62_combout = (\inst|shifter|auto_generated|sbit_w[39]~61_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[23]~35_combout )) - .dataa(\inst11|Selector2~0_combout ), - .datab(\inst11|Selector3~0_combout ), - .datac(\inst10|state.Init~q ), - .datad(\inst11|Selector20~0_combout ), + .dataa(gnd), + .datab(\inst|IR [1]), + .datac(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), .cin(gnd), - .combout(\inst11|count[9]~18_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[39]~62_combout ), .cout()); // synopsys translate_off -defparam \inst11|count[9]~18 .lut_mask = 16'h5030; -defparam \inst11|count[9]~18 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y45_N1 -dffeas \inst11|count[0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[0]~16_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst11|count[9]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|count [0]), - .prn(vcc)); -// synopsys translate_off -defparam \inst11|count[0] .is_wysiwyg = "true"; -defparam \inst11|count[0] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[39]~62 .lut_mask = 16'hFF30; +defparam \inst|shifter|auto_generated|sbit_w[39]~62 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N4 -fiftyfivenm_lcell_comb \inst11|Add1~0 ( +// Location: LCCOMB_X57_Y34_N0 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[17]~29 ( // Equation(s): -// \inst11|Add1~0_combout = (\inst10|state.Init~q & \inst11|count [0]) +// \inst|shifter|auto_generated|sbit_w[17]~29_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [2])) # (!\inst|IR [4] & ((\inst|AC [0]))))) - .dataa(gnd), - .datab(gnd), - .datac(\inst10|state.Init~q ), - .datad(\inst11|count [0]), + .dataa(\inst|AC [2]), + .datab(\inst|IR [0]), + .datac(\inst|AC [0]), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst11|Add1~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[17]~29_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~0 .lut_mask = 16'hF000; -defparam \inst11|Add1~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[17]~29 .lut_mask = 16'h88C0; +defparam \inst|shifter|auto_generated|sbit_w[17]~29 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N2 -fiftyfivenm_lcell_comb \inst11|count[1]~19 ( +// Location: LCCOMB_X57_Y34_N12 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[35]~64 ( // Equation(s): -// \inst11|count[1]~19_combout = (\inst11|Add1~4_combout & ((\inst11|Add1~3_combout & (\inst11|count[0]~17 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[0]~17 )))) # (!\inst11|Add1~4_combout & ((\inst11|Add1~3_combout & (!\inst11|count[0]~17 )) -// # (!\inst11|Add1~3_combout & ((\inst11|count[0]~17 ) # (GND))))) -// \inst11|count[1]~20 = CARRY((\inst11|Add1~4_combout & (!\inst11|Add1~3_combout & !\inst11|count[0]~17 )) # (!\inst11|Add1~4_combout & ((!\inst11|count[0]~17 ) # (!\inst11|Add1~3_combout )))) +// \inst|shifter|auto_generated|sbit_w[35]~64_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[17]~29_combout ) # ((!\inst|IR [0] & \inst|AC [1])))) - .dataa(\inst11|Add1~4_combout ), - .datab(\inst11|Add1~3_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst11|count[0]~17 ), - .combout(\inst11|count[1]~19_combout ), - .cout(\inst11|count[1]~20 )); + .dataa(\inst|shifter|auto_generated|sbit_w[17]~29_combout ), + .datab(\inst3|TIMER_EN~3_combout ), + .datac(\inst|IR [0]), + .datad(\inst|AC [1]), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[35]~64_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[1]~19 .lut_mask = 16'h9617; -defparam \inst11|count[1]~19 .sum_lutc_input = "cin"; +defparam \inst|shifter|auto_generated|sbit_w[35]~64 .lut_mask = 16'h8C88; +defparam \inst|shifter|auto_generated|sbit_w[35]~64 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N3 -dffeas \inst11|count[1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[1]~19_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst11|count[9]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|count [1]), - .prn(vcc)); +// Location: LCCOMB_X57_Y34_N18 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[35]~63 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[35]~63_combout = (!\inst|IR [1] & ((\inst|shifter|auto_generated|sbit_w[19]~31_combout ) # ((!\inst|IR [0] & \inst|AC [3])))) + + .dataa(\inst|IR [0]), + .datab(\inst|AC [3]), + .datac(\inst|IR [1]), + .datad(\inst|shifter|auto_generated|sbit_w[19]~31_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[35]~63_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[1] .is_wysiwyg = "true"; -defparam \inst11|count[1] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[35]~63 .lut_mask = 16'h0F04; +defparam \inst|shifter|auto_generated|sbit_w[35]~63 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N26 -fiftyfivenm_lcell_comb \inst11|Add1~4 ( +// Location: LCCOMB_X57_Y34_N14 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[35]~65 ( // Equation(s): -// \inst11|Add1~4_combout = (\inst10|state.Init~q & \inst11|count [1]) +// \inst|shifter|auto_generated|sbit_w[35]~65_combout = (\inst|shifter|auto_generated|sbit_w[35]~64_combout ) # ((\inst|shifter|auto_generated|sbit_w[35]~63_combout ) # ((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[21]~38_combout ))) - .dataa(gnd), - .datab(\inst10|state.Init~q ), - .datac(\inst11|count [1]), - .datad(gnd), + .dataa(\inst|shifter|auto_generated|sbit_w[35]~64_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[35]~63_combout ), + .datac(\inst3|I2C_RDY_EN~0_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), .cin(gnd), - .combout(\inst11|Add1~4_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[35]~65_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~4 .lut_mask = 16'hC0C0; -defparam \inst11|Add1~4 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[35]~65 .lut_mask = 16'hFEEE; +defparam \inst|shifter|auto_generated|sbit_w[35]~65 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N4 -fiftyfivenm_lcell_comb \inst11|count[2]~21 ( +// Location: LCCOMB_X55_Y37_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[27]~44 ( // Equation(s): -// \inst11|count[2]~21_combout = ((\inst11|Add1~5_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[1]~20 )))) # (GND) -// \inst11|count[2]~22 = CARRY((\inst11|Add1~5_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[1]~20 ))) # (!\inst11|Add1~5_combout & (\inst11|Add1~3_combout & !\inst11|count[1]~20 ))) +// \inst|shifter|auto_generated|sbit_w[27]~44_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [12]))) # (!\inst|IR [4] & (\inst|AC [10])))) - .dataa(\inst11|Add1~5_combout ), - .datab(\inst11|Add1~3_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst11|count[1]~20 ), - .combout(\inst11|count[2]~21_combout ), - .cout(\inst11|count[2]~22 )); + .dataa(\inst|AC [10]), + .datab(\inst|AC [12]), + .datac(\inst|IR [4]), + .datad(\inst|IR [0]), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[27]~44_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[2]~21 .lut_mask = 16'h698E; -defparam \inst11|count[2]~21 .sum_lutc_input = "cin"; +defparam \inst|shifter|auto_generated|sbit_w[27]~44 .lut_mask = 16'hCA00; +defparam \inst|shifter|auto_generated|sbit_w[27]~44 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N5 -dffeas \inst11|count[2] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[2]~21_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst11|count[9]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|count [2]), - .prn(vcc)); +// Location: LCCOMB_X55_Y37_N20 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[27]~45 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[27]~45_combout = (\inst|shifter|auto_generated|sbit_w[27]~44_combout ) # ((!\inst|IR [0] & \inst|AC [11])) + + .dataa(\inst|shifter|auto_generated|sbit_w[27]~44_combout ), + .datab(\inst|IR [0]), + .datac(\inst|AC [11]), + .datad(gnd), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[2] .is_wysiwyg = "true"; -defparam \inst11|count[2] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[27]~45 .lut_mask = 16'hBABA; +defparam \inst|shifter|auto_generated|sbit_w[27]~45 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N16 -fiftyfivenm_lcell_comb \inst11|Add1~5 ( +// Location: LCCOMB_X60_Y37_N22 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[29]~41 ( // Equation(s): -// \inst11|Add1~5_combout = (\inst10|state.Init~q & \inst11|count [2]) +// \inst|shifter|auto_generated|sbit_w[29]~41_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [14]))) # (!\inst|IR [4] & (\inst|AC [12])))) - .dataa(gnd), - .datab(\inst10|state.Init~q ), - .datac(gnd), - .datad(\inst11|count [2]), + .dataa(\inst|IR [0]), + .datab(\inst|IR [4]), + .datac(\inst|AC [12]), + .datad(\inst|AC [14]), .cin(gnd), - .combout(\inst11|Add1~5_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[29]~41_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~5 .lut_mask = 16'hCC00; -defparam \inst11|Add1~5 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[29]~41 .lut_mask = 16'hA820; +defparam \inst|shifter|auto_generated|sbit_w[29]~41 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N6 -fiftyfivenm_lcell_comb \inst11|count[3]~23 ( +// Location: LCCOMB_X60_Y37_N8 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[29]~42 ( // Equation(s): -// \inst11|count[3]~23_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~6_combout & (\inst11|count[2]~22 & VCC)) # (!\inst11|Add1~6_combout & (!\inst11|count[2]~22 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~6_combout & (!\inst11|count[2]~22 )) -// # (!\inst11|Add1~6_combout & ((\inst11|count[2]~22 ) # (GND))))) -// \inst11|count[3]~24 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~6_combout & !\inst11|count[2]~22 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[2]~22 ) # (!\inst11|Add1~6_combout )))) +// \inst|shifter|auto_generated|sbit_w[29]~42_combout = (\inst|shifter|auto_generated|sbit_w[29]~41_combout ) # ((\inst|AC [13] & !\inst|IR [0])) - .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~6_combout ), + .dataa(\inst|AC [13]), + .datab(\inst|IR [0]), .datac(gnd), - .datad(vcc), - .cin(\inst11|count[2]~22 ), - .combout(\inst11|count[3]~23_combout ), - .cout(\inst11|count[3]~24 )); -// synopsys translate_off -defparam \inst11|count[3]~23 .lut_mask = 16'h9617; -defparam \inst11|count[3]~23 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: FF_X50_Y45_N7 -dffeas \inst11|count[3] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[3]~23_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst11|count[9]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|count [3]), - .prn(vcc)); + .datad(\inst|shifter|auto_generated|sbit_w[29]~41_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[3] .is_wysiwyg = "true"; -defparam \inst11|count[3] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[29]~42 .lut_mask = 16'hFF22; +defparam \inst|shifter|auto_generated|sbit_w[29]~42 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N20 -fiftyfivenm_lcell_comb \inst13|inst1[3]~32 ( +// Location: LCCOMB_X57_Y37_N14 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[43]~67 ( // Equation(s): -// \inst13|inst1[3]~32_combout = (\inst13|inst1[3]~31_combout & (\inst13|inst1[3]~30_combout & ((\inst11|count [3]) # (!\inst11|tri_enable~combout )))) +// \inst|shifter|auto_generated|sbit_w[43]~67_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[25]~49_combout ) # ((\inst|shifter|auto_generated|sbit_w[29]~42_combout & \inst3|I2C_RDY_EN~0_combout )))) # +// (!\inst3|TIMER_EN~3_combout & (\inst|shifter|auto_generated|sbit_w[29]~42_combout & ((\inst3|I2C_RDY_EN~0_combout )))) - .dataa(\inst13|inst1[3]~31_combout ), - .datab(\inst13|inst1[3]~30_combout ), - .datac(\inst11|tri_enable~combout ), - .datad(\inst11|count [3]), + .dataa(\inst3|TIMER_EN~3_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), + .datad(\inst3|I2C_RDY_EN~0_combout ), .cin(gnd), - .combout(\inst13|inst1[3]~32_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[3]~32 .lut_mask = 16'h8808; -defparam \inst13|inst1[3]~32 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[43]~67 .lut_mask = 16'hECA0; +defparam \inst|shifter|auto_generated|sbit_w[43]~67 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N14 -fiftyfivenm_lcell_comb \inst5|count_10Hz[0]~19 ( +// Location: LCCOMB_X57_Y37_N4 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[43]~68 ( // Equation(s): -// \inst5|count_10Hz[0]~19_combout = \inst5|count_10Hz [0] $ (VCC) -// \inst5|count_10Hz[0]~20 = CARRY(\inst5|count_10Hz [0]) +// \inst|shifter|auto_generated|sbit_w[43]~68_combout = (\inst|shifter|auto_generated|sbit_w[43]~67_combout ) # ((\inst|shifter|auto_generated|sbit_w[27]~45_combout & !\inst|IR [1])) - .dataa(gnd), - .datab(\inst5|count_10Hz [0]), - .datac(gnd), - .datad(vcc), + .dataa(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), + .datab(gnd), + .datac(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), + .datad(\inst|IR [1]), .cin(gnd), - .combout(\inst5|count_10Hz[0]~19_combout ), - .cout(\inst5|count_10Hz[0]~20 )); + .combout(\inst|shifter|auto_generated|sbit_w[43]~68_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[0]~19 .lut_mask = 16'h33CC; -defparam \inst5|count_10Hz[0]~19 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[43]~68 .lut_mask = 16'hF0FA; +defparam \inst|shifter|auto_generated|sbit_w[43]~68 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N26 -fiftyfivenm_lcell_comb \inst5|LessThan4~3 ( +// Location: LCCOMB_X58_Y34_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[55]~79 ( // Equation(s): -// \inst5|LessThan4~3_combout = (!\inst5|count_10Hz [12] & (!\inst5|count_10Hz [10] & (!\inst5|count_10Hz [11] & !\inst5|count_10Hz [9]))) +// \inst|shifter|auto_generated|sbit_w[55]~79_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[43]~68_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[35]~65_combout )))) - .dataa(\inst5|count_10Hz [12]), - .datab(\inst5|count_10Hz [10]), - .datac(\inst5|count_10Hz [11]), - .datad(\inst5|count_10Hz [9]), + .dataa(\inst|shifter|auto_generated|sbit_w[35]~65_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[43]~68_combout ), + .datac(\inst|IR [2]), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst5|LessThan4~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[55]~79_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan4~3 .lut_mask = 16'h0001; -defparam \inst5|LessThan4~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[55]~79 .lut_mask = 16'hC0A0; +defparam \inst|shifter|auto_generated|sbit_w[55]~79 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N4 -fiftyfivenm_lcell_comb \inst5|LessThan4~1 ( +// Location: LCCOMB_X58_Y34_N24 +fiftyfivenm_lcell_comb \inst|Selector20~4 ( // Equation(s): -// \inst5|LessThan4~1_combout = (((!\inst5|count_10Hz [1]) # (!\inst5|count_10Hz [0])) # (!\inst5|count_10Hz [2])) # (!\inst5|count_10Hz [3]) +// \inst|Selector20~4_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[55]~79_combout ) # ((\inst|shifter|auto_generated|sbit_w[39]~62_combout & !\inst|IR [2])))) - .dataa(\inst5|count_10Hz [3]), - .datab(\inst5|count_10Hz [2]), - .datac(\inst5|count_10Hz [0]), - .datad(\inst5|count_10Hz [1]), + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[39]~62_combout ), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[55]~79_combout ), .cin(gnd), - .combout(\inst5|LessThan4~1_combout ), + .combout(\inst|Selector20~4_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan4~1 .lut_mask = 16'h7FFF; -defparam \inst5|LessThan4~1 .sum_lutc_input = "datac"; +defparam \inst|Selector20~4 .lut_mask = 16'hAA08; +defparam \inst|Selector20~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N10 -fiftyfivenm_lcell_comb \inst5|LessThan4~0 ( +// Location: LCCOMB_X55_Y39_N0 +fiftyfivenm_lcell_comb \inst|Add1~41 ( // Equation(s): -// \inst5|LessThan4~0_combout = (!\inst5|count_10Hz [7] & (!\inst5|count_10Hz [6] & !\inst5|count_10Hz [5])) +// \inst|Add1~41_combout = ((\inst|Add1~39_combout $ (\inst|Add1~40_combout $ (!\inst|Add1~37 )))) # (GND) +// \inst|Add1~42 = CARRY((\inst|Add1~39_combout & ((\inst|Add1~40_combout ) # (!\inst|Add1~37 ))) # (!\inst|Add1~39_combout & (\inst|Add1~40_combout & !\inst|Add1~37 ))) - .dataa(gnd), - .datab(\inst5|count_10Hz [7]), - .datac(\inst5|count_10Hz [6]), - .datad(\inst5|count_10Hz [5]), - .cin(gnd), - .combout(\inst5|LessThan4~0_combout ), - .cout()); + .dataa(\inst|Add1~39_combout ), + .datab(\inst|Add1~40_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~37 ), + .combout(\inst|Add1~41_combout ), + .cout(\inst|Add1~42 )); // synopsys translate_off -defparam \inst5|LessThan4~0 .lut_mask = 16'h0003; -defparam \inst5|LessThan4~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~41 .lut_mask = 16'h698E; +defparam \inst|Add1~41 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N12 -fiftyfivenm_lcell_comb \inst5|LessThan4~2 ( +// Location: LCCOMB_X56_Y40_N2 +fiftyfivenm_lcell_comb \inst|Selector20~2 ( // Equation(s): -// \inst5|LessThan4~2_combout = ((\inst5|LessThan4~0_combout & ((\inst5|LessThan4~1_combout ) # (!\inst5|count_10Hz [4])))) # (!\inst5|count_10Hz [8]) +// \inst|Selector20~2_combout = (\inst|altsyncram_component|auto_generated|q_a [7] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [7])))) # (!\inst|altsyncram_component|auto_generated|q_a [7] & (\inst|state.ex_xor~q & ((\inst|AC +// [7])))) - .dataa(\inst5|count_10Hz [4]), - .datab(\inst5|LessThan4~1_combout ), - .datac(\inst5|count_10Hz [8]), - .datad(\inst5|LessThan4~0_combout ), + .dataa(\inst|state.ex_xor~q ), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [7]), + .datad(\inst|AC [7]), .cin(gnd), - .combout(\inst5|LessThan4~2_combout ), + .combout(\inst|Selector20~2_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan4~2 .lut_mask = 16'hDF0F; -defparam \inst5|LessThan4~2 .sum_lutc_input = "datac"; +defparam \inst|Selector20~2 .lut_mask = 16'hCAE0; +defparam \inst|Selector20~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N20 -fiftyfivenm_lcell_comb \inst5|LessThan4~4 ( +// Location: LCCOMB_X56_Y40_N8 +fiftyfivenm_lcell_comb \inst|Selector20~3 ( // Equation(s): -// \inst5|LessThan4~4_combout = (!\inst5|count_10Hz [14] & (((\inst5|LessThan4~3_combout & \inst5|LessThan4~2_combout )) # (!\inst5|count_10Hz [13]))) +// \inst|Selector20~3_combout = (\inst|Selector20~2_combout ) # ((\inst|Selector19~0_combout ) # ((\inst|Add1~41_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst5|count_10Hz [14]), - .datab(\inst5|count_10Hz [13]), - .datac(\inst5|LessThan4~3_combout ), - .datad(\inst5|LessThan4~2_combout ), + .dataa(\inst|Add1~41_combout ), + .datab(\inst|Selector20~2_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector19~0_combout ), .cin(gnd), - .combout(\inst5|LessThan4~4_combout ), + .combout(\inst|Selector20~3_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan4~4 .lut_mask = 16'h5111; -defparam \inst5|LessThan4~4 .sum_lutc_input = "datac"; +defparam \inst|Selector20~3 .lut_mask = 16'hFFEC; +defparam \inst|Selector20~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N24 -fiftyfivenm_lcell_comb \inst5|LessThan4~6 ( +// Location: LCCOMB_X56_Y38_N20 +fiftyfivenm_lcell_comb \inst|Selector20~5 ( // Equation(s): -// \inst5|LessThan4~6_combout = (!\inst5|LessThan4~5_combout & !\inst5|LessThan4~4_combout ) +// \inst|Selector20~5_combout = (\inst|Selector20~4_combout ) # ((\inst|Selector20~3_combout ) # ((\inst|IR [7] & \inst|state.ex_loadi~q ))) - .dataa(gnd), - .datab(gnd), - .datac(\inst5|LessThan4~5_combout ), - .datad(\inst5|LessThan4~4_combout ), + .dataa(\inst|Selector20~4_combout ), + .datab(\inst|IR [7]), + .datac(\inst|state.ex_loadi~q ), + .datad(\inst|Selector20~3_combout ), .cin(gnd), - .combout(\inst5|LessThan4~6_combout ), + .combout(\inst|Selector20~5_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan4~6 .lut_mask = 16'h000F; -defparam \inst5|LessThan4~6 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X1_Y38_N15 -dffeas \inst5|count_10Hz[0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[0]~19_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10Hz [0]), - .prn(vcc)); -// synopsys translate_off -defparam \inst5|count_10Hz[0] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[0] .power_up = "low"; +defparam \inst|Selector20~5 .lut_mask = 16'hFFEA; +defparam \inst|Selector20~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N16 -fiftyfivenm_lcell_comb \inst5|count_10Hz[1]~21 ( +// Location: LCCOMB_X58_Y38_N2 +fiftyfivenm_lcell_comb \inst11|tri_enable~0 ( // Equation(s): -// \inst5|count_10Hz[1]~21_combout = (\inst5|count_10Hz [1] & (!\inst5|count_10Hz[0]~20 )) # (!\inst5|count_10Hz [1] & ((\inst5|count_10Hz[0]~20 ) # (GND))) -// \inst5|count_10Hz[1]~22 = CARRY((!\inst5|count_10Hz[0]~20 ) # (!\inst5|count_10Hz [1])) - - .dataa(gnd), - .datab(\inst5|count_10Hz [1]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[0]~20 ), - .combout(\inst5|count_10Hz[1]~21_combout ), - .cout(\inst5|count_10Hz[1]~22 )); -// synopsys translate_off -defparam \inst5|count_10Hz[1]~21 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[1]~21 .sum_lutc_input = "cin"; -// synopsys translate_on +// \inst11|tri_enable~0_combout = (!\inst|IR [2] & (\inst|IR [5] & (!\inst|IO_WRITE_int~q & !\inst|IR [3]))) -// Location: FF_X1_Y38_N17 -dffeas \inst5|count_10Hz[1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[1]~21_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10Hz [1]), - .prn(vcc)); + .dataa(\inst|IR [2]), + .datab(\inst|IR [5]), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst|IR [3]), + .cin(gnd), + .combout(\inst11|tri_enable~0_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[1] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[1] .power_up = "low"; +defparam \inst11|tri_enable~0 .lut_mask = 16'h0004; +defparam \inst11|tri_enable~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N18 -fiftyfivenm_lcell_comb \inst5|count_10Hz[2]~23 ( +// Location: LCCOMB_X55_Y38_N26 +fiftyfivenm_lcell_comb \inst|state~34 ( // Equation(s): -// \inst5|count_10Hz[2]~23_combout = (\inst5|count_10Hz [2] & (\inst5|count_10Hz[1]~22 $ (GND))) # (!\inst5|count_10Hz [2] & (!\inst5|count_10Hz[1]~22 & VCC)) -// \inst5|count_10Hz[2]~24 = CARRY((\inst5|count_10Hz [2] & !\inst5|count_10Hz[1]~22 )) +// \inst|state~34_combout = (\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state~32_combout )) - .dataa(gnd), - .datab(\inst5|count_10Hz [2]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[1]~22 ), - .combout(\inst5|count_10Hz[2]~23_combout ), - .cout(\inst5|count_10Hz[2]~24 )); + .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|state~32_combout ), + .cin(gnd), + .combout(\inst|state~34_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[2]~23 .lut_mask = 16'hC30C; -defparam \inst5|count_10Hz[2]~23 .sum_lutc_input = "cin"; +defparam \inst|state~34 .lut_mask = 16'hA000; +defparam \inst|state~34 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y38_N19 -dffeas \inst5|count_10Hz[2] ( +// Location: FF_X55_Y38_N27 +dffeas \inst|state.ex_out ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[2]~23_combout ), + .d(\inst|state~34_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [2]), + .q(\inst|state.ex_out~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[2] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[2] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X1_Y38_N20 -fiftyfivenm_lcell_comb \inst5|count_10Hz[3]~25 ( -// Equation(s): -// \inst5|count_10Hz[3]~25_combout = (\inst5|count_10Hz [3] & (!\inst5|count_10Hz[2]~24 )) # (!\inst5|count_10Hz [3] & ((\inst5|count_10Hz[2]~24 ) # (GND))) -// \inst5|count_10Hz[3]~26 = CARRY((!\inst5|count_10Hz[2]~24 ) # (!\inst5|count_10Hz [3])) - - .dataa(gnd), - .datab(\inst5|count_10Hz [3]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[2]~24 ), - .combout(\inst5|count_10Hz[3]~25_combout ), - .cout(\inst5|count_10Hz[3]~26 )); -// synopsys translate_off -defparam \inst5|count_10Hz[3]~25 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[3]~25 .sum_lutc_input = "cin"; +defparam \inst|state.ex_out .is_wysiwyg = "true"; +defparam \inst|state.ex_out .power_up = "low"; // synopsys translate_on -// Location: FF_X1_Y38_N21 -dffeas \inst5|count_10Hz[3] ( +// Location: FF_X55_Y38_N1 +dffeas \inst|state.ex_out2 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[3]~25_combout ), - .asdata(vcc), - .clrn(vcc), + .d(gnd), + .asdata(\inst|state.ex_out~q ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), + .sclr(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [3]), + .q(\inst|state.ex_out2~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[3] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[3] .power_up = "low"; +defparam \inst|state.ex_out2 .is_wysiwyg = "true"; +defparam \inst|state.ex_out2 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N22 -fiftyfivenm_lcell_comb \inst5|count_10Hz[4]~27 ( +// Location: LCCOMB_X54_Y38_N14 +fiftyfivenm_lcell_comb \inst|Selector29~0 ( // Equation(s): -// \inst5|count_10Hz[4]~27_combout = (\inst5|count_10Hz [4] & (\inst5|count_10Hz[3]~26 $ (GND))) # (!\inst5|count_10Hz [4] & (!\inst5|count_10Hz[3]~26 & VCC)) -// \inst5|count_10Hz[4]~28 = CARRY((\inst5|count_10Hz [4] & !\inst5|count_10Hz[3]~26 )) - - .dataa(\inst5|count_10Hz [4]), - .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[3]~26 ), - .combout(\inst5|count_10Hz[4]~27_combout ), - .cout(\inst5|count_10Hz[4]~28 )); -// synopsys translate_off -defparam \inst5|count_10Hz[4]~27 .lut_mask = 16'hA50A; -defparam \inst5|count_10Hz[4]~27 .sum_lutc_input = "cin"; -// synopsys translate_on +// \inst|Selector29~0_combout = (\inst10|state.Init~q & (!\inst|state.fetch~q & (!\inst|state.ex_in2~q & \inst|IO_CYCLE~q ))) -// Location: FF_X1_Y38_N23 -dffeas \inst5|count_10Hz[4] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[4]~27_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10Hz [4]), - .prn(vcc)); + .dataa(\inst10|state.Init~q ), + .datab(\inst|state.fetch~q ), + .datac(\inst|state.ex_in2~q ), + .datad(\inst|IO_CYCLE~q ), + .cin(gnd), + .combout(\inst|Selector29~0_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[4] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[4] .power_up = "low"; +defparam \inst|Selector29~0 .lut_mask = 16'h0200; +defparam \inst|Selector29~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N24 -fiftyfivenm_lcell_comb \inst5|count_10Hz[5]~29 ( +// Location: LCCOMB_X55_Y38_N0 +fiftyfivenm_lcell_comb \inst|Selector29~1 ( // Equation(s): -// \inst5|count_10Hz[5]~29_combout = (\inst5|count_10Hz [5] & (!\inst5|count_10Hz[4]~28 )) # (!\inst5|count_10Hz [5] & ((\inst5|count_10Hz[4]~28 ) # (GND))) -// \inst5|count_10Hz[5]~30 = CARRY((!\inst5|count_10Hz[4]~28 ) # (!\inst5|count_10Hz [5])) +// \inst|Selector29~1_combout = (\inst|state.ex_out~q ) # ((\inst|state.ex_in~q ) # ((!\inst|state.ex_out2~q & \inst|Selector29~0_combout ))) - .dataa(gnd), - .datab(\inst5|count_10Hz [5]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[4]~28 ), - .combout(\inst5|count_10Hz[5]~29_combout ), - .cout(\inst5|count_10Hz[5]~30 )); + .dataa(\inst|state.ex_out~q ), + .datab(\inst|state.ex_in~q ), + .datac(\inst|state.ex_out2~q ), + .datad(\inst|Selector29~0_combout ), + .cin(gnd), + .combout(\inst|Selector29~1_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[5]~29 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[5]~29 .sum_lutc_input = "cin"; +defparam \inst|Selector29~1 .lut_mask = 16'hEFEE; +defparam \inst|Selector29~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y38_N25 -dffeas \inst5|count_10Hz[5] ( +// Location: FF_X58_Y38_N15 +dffeas \inst|IO_CYCLE ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[5]~29_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst|Selector29~1_combout ), .clrn(vcc), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [5]), + .q(\inst|IO_CYCLE~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[5] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[5] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X1_Y38_N26 -fiftyfivenm_lcell_comb \inst5|count_10Hz[6]~31 ( -// Equation(s): -// \inst5|count_10Hz[6]~31_combout = (\inst5|count_10Hz [6] & (\inst5|count_10Hz[5]~30 $ (GND))) # (!\inst5|count_10Hz [6] & (!\inst5|count_10Hz[5]~30 & VCC)) -// \inst5|count_10Hz[6]~32 = CARRY((\inst5|count_10Hz [6] & !\inst5|count_10Hz[5]~30 )) - - .dataa(\inst5|count_10Hz [6]), - .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[5]~30 ), - .combout(\inst5|count_10Hz[6]~31_combout ), - .cout(\inst5|count_10Hz[6]~32 )); -// synopsys translate_off -defparam \inst5|count_10Hz[6]~31 .lut_mask = 16'hA50A; -defparam \inst5|count_10Hz[6]~31 .sum_lutc_input = "cin"; +defparam \inst|IO_CYCLE .is_wysiwyg = "true"; +defparam \inst|IO_CYCLE .power_up = "low"; // synopsys translate_on -// Location: FF_X1_Y38_N27 -dffeas \inst5|count_10Hz[6] ( +// Location: FF_X58_Y38_N11 +dffeas \inst|IR[9] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[6]~31_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [9]), .clrn(vcc), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), + .sclr(gnd), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [6]), + .q(\inst|IR [9]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[6] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[6] .power_up = "low"; +defparam \inst|IR[9] .is_wysiwyg = "true"; +defparam \inst|IR[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N28 -fiftyfivenm_lcell_comb \inst5|count_10Hz[7]~33 ( +// Location: LCCOMB_X58_Y38_N0 +fiftyfivenm_lcell_comb \inst3|SWITCH_EN~0 ( // Equation(s): -// \inst5|count_10Hz[7]~33_combout = (\inst5|count_10Hz [7] & (!\inst5|count_10Hz[6]~32 )) # (!\inst5|count_10Hz [7] & ((\inst5|count_10Hz[6]~32 ) # (GND))) -// \inst5|count_10Hz[7]~34 = CARRY((!\inst5|count_10Hz[6]~32 ) # (!\inst5|count_10Hz [7])) +// \inst3|SWITCH_EN~0_combout = (\inst|IO_CYCLE~q & (!\inst|IR [10] & (!\inst|IR [9] & !\inst|IR [8]))) - .dataa(gnd), - .datab(\inst5|count_10Hz [7]), + .dataa(\inst|IO_CYCLE~q ), + .datab(\inst|IR [10]), + .datac(\inst|IR [9]), + .datad(\inst|IR [8]), + .cin(gnd), + .combout(\inst3|SWITCH_EN~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst3|SWITCH_EN~0 .lut_mask = 16'h0002; +defparam \inst3|SWITCH_EN~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y38_N14 +fiftyfivenm_lcell_comb \inst13|inst12~0 ( +// Equation(s): +// \inst13|inst12~0_combout = (\inst|IR [4] & (!\inst|IR [1] & \inst|IR [7])) + + .dataa(\inst|IR [4]), + .datab(\inst|IR [1]), .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[6]~32 ), - .combout(\inst5|count_10Hz[7]~33_combout ), - .cout(\inst5|count_10Hz[7]~34 )); + .datad(\inst|IR [7]), + .cin(gnd), + .combout(\inst13|inst12~0_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[7]~33 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[7]~33 .sum_lutc_input = "cin"; +defparam \inst13|inst12~0 .lut_mask = 16'h2200; +defparam \inst13|inst12~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y38_N29 -dffeas \inst5|count_10Hz[7] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[7]~33_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10Hz [7]), - .prn(vcc)); +// Location: LCCOMB_X59_Y38_N26 +fiftyfivenm_lcell_comb \inst11|tri_enable~1 ( +// Equation(s): +// \inst11|tri_enable~1_combout = (\inst11|tri_enable~0_combout & (\inst|IR [6] & (\inst3|SWITCH_EN~0_combout & \inst13|inst12~0_combout ))) + + .dataa(\inst11|tri_enable~0_combout ), + .datab(\inst|IR [6]), + .datac(\inst3|SWITCH_EN~0_combout ), + .datad(\inst13|inst12~0_combout ), + .cin(gnd), + .combout(\inst11|tri_enable~1_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[7] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[7] .power_up = "low"; +defparam \inst11|tri_enable~1 .lut_mask = 16'h8000; +defparam \inst11|tri_enable~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N30 -fiftyfivenm_lcell_comb \inst5|count_10Hz[8]~35 ( +// Location: LCCOMB_X59_Y40_N24 +fiftyfivenm_lcell_comb \inst13|inst4 ( // Equation(s): -// \inst5|count_10Hz[8]~35_combout = (\inst5|count_10Hz [8] & (\inst5|count_10Hz[7]~34 $ (GND))) # (!\inst5|count_10Hz [8] & (!\inst5|count_10Hz[7]~34 & VCC)) -// \inst5|count_10Hz[8]~36 = CARRY((\inst5|count_10Hz [8] & !\inst5|count_10Hz[7]~34 )) +// \inst13|inst4~combout = (\inst3|I2C_RDY_EN~0_combout & (\inst|IR [7] & (!\inst|IO_WRITE_int~q & \inst3|TIMER_EN~1_combout ))) - .dataa(\inst5|count_10Hz [8]), - .datab(gnd), + .dataa(\inst3|I2C_RDY_EN~0_combout ), + .datab(\inst|IR [7]), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst3|TIMER_EN~1_combout ), + .cin(gnd), + .combout(\inst13|inst4~combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst4 .lut_mask = 16'h0800; +defparam \inst13|inst4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X61_Y39_N0 +fiftyfivenm_lcell_comb \inst10|count[0]~16 ( +// Equation(s): +// \inst10|count[0]~16_combout = \inst10|count [0] $ (VCC) +// \inst10|count[0]~17 = CARRY(\inst10|count [0]) + + .dataa(gnd), + .datab(\inst10|count [0]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[7]~34 ), - .combout(\inst5|count_10Hz[8]~35_combout ), - .cout(\inst5|count_10Hz[8]~36 )); + .cin(gnd), + .combout(\inst10|count[0]~16_combout ), + .cout(\inst10|count[0]~17 )); // synopsys translate_off -defparam \inst5|count_10Hz[8]~35 .lut_mask = 16'hA50A; -defparam \inst5|count_10Hz[8]~35 .sum_lutc_input = "cin"; +defparam \inst10|count[0]~16 .lut_mask = 16'h33CC; +defparam \inst10|count[0]~16 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y38_N31 -dffeas \inst5|count_10Hz[8] ( +// Location: IOIBUF_X49_Y54_N29 +fiftyfivenm_io_ibuf \KEY1~input ( + .i(KEY1), + .ibar(gnd), + .nsleep(vcc), + .o(\KEY1~input_o )); +// synopsys translate_off +defparam \KEY1~input .bus_hold = "false"; +defparam \KEY1~input .listen_to_nsleep_signal = "false"; +defparam \KEY1~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X57_Y39_N13 +dffeas \inst10|state.BTN_high ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[8]~35_combout ), - .asdata(vcc), - .clrn(vcc), + .d(gnd), + .asdata(\KEY1~input_o ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), + .sclr(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [8]), + .q(\inst10|state.BTN_high~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[8] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[8] .power_up = "low"; +defparam \inst10|state.BTN_high .is_wysiwyg = "true"; +defparam \inst10|state.BTN_high .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N0 -fiftyfivenm_lcell_comb \inst5|count_10Hz[9]~37 ( +// Location: LCCOMB_X57_Y39_N12 +fiftyfivenm_lcell_comb \inst10|count[9]~18 ( // Equation(s): -// \inst5|count_10Hz[9]~37_combout = (\inst5|count_10Hz [9] & (!\inst5|count_10Hz[8]~36 )) # (!\inst5|count_10Hz [9] & ((\inst5|count_10Hz[8]~36 ) # (GND))) -// \inst5|count_10Hz[9]~38 = CARRY((!\inst5|count_10Hz[8]~36 ) # (!\inst5|count_10Hz [9])) +// \inst10|count[9]~18_combout = (\inst10|state.Init~q & (\KEY1~input_o $ (\inst10|state.BTN_high~q ))) - .dataa(gnd), - .datab(\inst5|count_10Hz [9]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10Hz[8]~36 ), - .combout(\inst5|count_10Hz[9]~37_combout ), - .cout(\inst5|count_10Hz[9]~38 )); + .dataa(\KEY1~input_o ), + .datab(gnd), + .datac(\inst10|state.BTN_high~q ), + .datad(\inst10|state.Init~q ), + .cin(gnd), + .combout(\inst10|count[9]~18_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[9]~37 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[9]~37 .sum_lutc_input = "cin"; +defparam \inst10|count[9]~18 .lut_mask = 16'h5A00; +defparam \inst10|count[9]~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y37_N1 -dffeas \inst5|count_10Hz[9] ( +// Location: FF_X61_Y39_N1 +dffeas \inst10|count[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[9]~37_combout ), + .d(\inst10|count[0]~16_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [9]), + .q(\inst10|count [0]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[9] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[9] .power_up = "low"; +defparam \inst10|count[0] .is_wysiwyg = "true"; +defparam \inst10|count[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N2 -fiftyfivenm_lcell_comb \inst5|count_10Hz[10]~39 ( +// Location: LCCOMB_X61_Y39_N2 +fiftyfivenm_lcell_comb \inst10|count[1]~19 ( // Equation(s): -// \inst5|count_10Hz[10]~39_combout = (\inst5|count_10Hz [10] & (\inst5|count_10Hz[9]~38 $ (GND))) # (!\inst5|count_10Hz [10] & (!\inst5|count_10Hz[9]~38 & VCC)) -// \inst5|count_10Hz[10]~40 = CARRY((\inst5|count_10Hz [10] & !\inst5|count_10Hz[9]~38 )) +// \inst10|count[1]~19_combout = (\inst10|count [1] & (!\inst10|count[0]~17 )) # (!\inst10|count [1] & ((\inst10|count[0]~17 ) # (GND))) +// \inst10|count[1]~20 = CARRY((!\inst10|count[0]~17 ) # (!\inst10|count [1])) .dataa(gnd), - .datab(\inst5|count_10Hz [10]), + .datab(\inst10|count [1]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[9]~38 ), - .combout(\inst5|count_10Hz[10]~39_combout ), - .cout(\inst5|count_10Hz[10]~40 )); + .cin(\inst10|count[0]~17 ), + .combout(\inst10|count[1]~19_combout ), + .cout(\inst10|count[1]~20 )); // synopsys translate_off -defparam \inst5|count_10Hz[10]~39 .lut_mask = 16'hC30C; -defparam \inst5|count_10Hz[10]~39 .sum_lutc_input = "cin"; +defparam \inst10|count[1]~19 .lut_mask = 16'h3C3F; +defparam \inst10|count[1]~19 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N3 -dffeas \inst5|count_10Hz[10] ( +// Location: FF_X61_Y39_N3 +dffeas \inst10|count[1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[10]~39_combout ), + .d(\inst10|count[1]~19_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [10]), + .q(\inst10|count [1]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[10] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[10] .power_up = "low"; +defparam \inst10|count[1] .is_wysiwyg = "true"; +defparam \inst10|count[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N4 -fiftyfivenm_lcell_comb \inst5|count_10Hz[11]~41 ( +// Location: LCCOMB_X61_Y39_N4 +fiftyfivenm_lcell_comb \inst10|count[2]~21 ( // Equation(s): -// \inst5|count_10Hz[11]~41_combout = (\inst5|count_10Hz [11] & (!\inst5|count_10Hz[10]~40 )) # (!\inst5|count_10Hz [11] & ((\inst5|count_10Hz[10]~40 ) # (GND))) -// \inst5|count_10Hz[11]~42 = CARRY((!\inst5|count_10Hz[10]~40 ) # (!\inst5|count_10Hz [11])) +// \inst10|count[2]~21_combout = (\inst10|count [2] & (\inst10|count[1]~20 $ (GND))) # (!\inst10|count [2] & (!\inst10|count[1]~20 & VCC)) +// \inst10|count[2]~22 = CARRY((\inst10|count [2] & !\inst10|count[1]~20 )) .dataa(gnd), - .datab(\inst5|count_10Hz [11]), + .datab(\inst10|count [2]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[10]~40 ), - .combout(\inst5|count_10Hz[11]~41_combout ), - .cout(\inst5|count_10Hz[11]~42 )); + .cin(\inst10|count[1]~20 ), + .combout(\inst10|count[2]~21_combout ), + .cout(\inst10|count[2]~22 )); // synopsys translate_off -defparam \inst5|count_10Hz[11]~41 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[11]~41 .sum_lutc_input = "cin"; +defparam \inst10|count[2]~21 .lut_mask = 16'hC30C; +defparam \inst10|count[2]~21 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N5 -dffeas \inst5|count_10Hz[11] ( +// Location: FF_X61_Y39_N5 +dffeas \inst10|count[2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[11]~41_combout ), + .d(\inst10|count[2]~21_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [11]), + .q(\inst10|count [2]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[11] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[11] .power_up = "low"; +defparam \inst10|count[2] .is_wysiwyg = "true"; +defparam \inst10|count[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N6 -fiftyfivenm_lcell_comb \inst5|count_10Hz[12]~43 ( +// Location: LCCOMB_X61_Y39_N6 +fiftyfivenm_lcell_comb \inst10|count[3]~23 ( // Equation(s): -// \inst5|count_10Hz[12]~43_combout = (\inst5|count_10Hz [12] & (\inst5|count_10Hz[11]~42 $ (GND))) # (!\inst5|count_10Hz [12] & (!\inst5|count_10Hz[11]~42 & VCC)) -// \inst5|count_10Hz[12]~44 = CARRY((\inst5|count_10Hz [12] & !\inst5|count_10Hz[11]~42 )) +// \inst10|count[3]~23_combout = (\inst10|count [3] & (!\inst10|count[2]~22 )) # (!\inst10|count [3] & ((\inst10|count[2]~22 ) # (GND))) +// \inst10|count[3]~24 = CARRY((!\inst10|count[2]~22 ) # (!\inst10|count [3])) - .dataa(\inst5|count_10Hz [12]), + .dataa(\inst10|count [3]), .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[11]~42 ), - .combout(\inst5|count_10Hz[12]~43_combout ), - .cout(\inst5|count_10Hz[12]~44 )); + .cin(\inst10|count[2]~22 ), + .combout(\inst10|count[3]~23_combout ), + .cout(\inst10|count[3]~24 )); // synopsys translate_off -defparam \inst5|count_10Hz[12]~43 .lut_mask = 16'hA50A; -defparam \inst5|count_10Hz[12]~43 .sum_lutc_input = "cin"; +defparam \inst10|count[3]~23 .lut_mask = 16'h5A5F; +defparam \inst10|count[3]~23 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N7 -dffeas \inst5|count_10Hz[12] ( +// Location: FF_X61_Y39_N7 +dffeas \inst10|count[3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[12]~43_combout ), + .d(\inst10|count[3]~23_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [12]), + .q(\inst10|count [3]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[12] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[12] .power_up = "low"; +defparam \inst10|count[3] .is_wysiwyg = "true"; +defparam \inst10|count[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N8 -fiftyfivenm_lcell_comb \inst5|count_10Hz[13]~45 ( +// Location: LCCOMB_X61_Y39_N8 +fiftyfivenm_lcell_comb \inst10|count[4]~25 ( // Equation(s): -// \inst5|count_10Hz[13]~45_combout = (\inst5|count_10Hz [13] & (!\inst5|count_10Hz[12]~44 )) # (!\inst5|count_10Hz [13] & ((\inst5|count_10Hz[12]~44 ) # (GND))) -// \inst5|count_10Hz[13]~46 = CARRY((!\inst5|count_10Hz[12]~44 ) # (!\inst5|count_10Hz [13])) +// \inst10|count[4]~25_combout = (\inst10|count [4] & (\inst10|count[3]~24 $ (GND))) # (!\inst10|count [4] & (!\inst10|count[3]~24 & VCC)) +// \inst10|count[4]~26 = CARRY((\inst10|count [4] & !\inst10|count[3]~24 )) .dataa(gnd), - .datab(\inst5|count_10Hz [13]), + .datab(\inst10|count [4]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[12]~44 ), - .combout(\inst5|count_10Hz[13]~45_combout ), - .cout(\inst5|count_10Hz[13]~46 )); + .cin(\inst10|count[3]~24 ), + .combout(\inst10|count[4]~25_combout ), + .cout(\inst10|count[4]~26 )); // synopsys translate_off -defparam \inst5|count_10Hz[13]~45 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[13]~45 .sum_lutc_input = "cin"; +defparam \inst10|count[4]~25 .lut_mask = 16'hC30C; +defparam \inst10|count[4]~25 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N9 -dffeas \inst5|count_10Hz[13] ( +// Location: FF_X61_Y39_N9 +dffeas \inst10|count[4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[13]~45_combout ), + .d(\inst10|count[4]~25_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [13]), + .q(\inst10|count [4]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[13] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[13] .power_up = "low"; +defparam \inst10|count[4] .is_wysiwyg = "true"; +defparam \inst10|count[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N10 -fiftyfivenm_lcell_comb \inst5|count_10Hz[14]~47 ( +// Location: LCCOMB_X61_Y39_N10 +fiftyfivenm_lcell_comb \inst10|count[5]~27 ( // Equation(s): -// \inst5|count_10Hz[14]~47_combout = (\inst5|count_10Hz [14] & (\inst5|count_10Hz[13]~46 $ (GND))) # (!\inst5|count_10Hz [14] & (!\inst5|count_10Hz[13]~46 & VCC)) -// \inst5|count_10Hz[14]~48 = CARRY((\inst5|count_10Hz [14] & !\inst5|count_10Hz[13]~46 )) +// \inst10|count[5]~27_combout = (\inst10|count [5] & (!\inst10|count[4]~26 )) # (!\inst10|count [5] & ((\inst10|count[4]~26 ) # (GND))) +// \inst10|count[5]~28 = CARRY((!\inst10|count[4]~26 ) # (!\inst10|count [5])) - .dataa(\inst5|count_10Hz [14]), + .dataa(\inst10|count [5]), .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[13]~46 ), - .combout(\inst5|count_10Hz[14]~47_combout ), - .cout(\inst5|count_10Hz[14]~48 )); + .cin(\inst10|count[4]~26 ), + .combout(\inst10|count[5]~27_combout ), + .cout(\inst10|count[5]~28 )); // synopsys translate_off -defparam \inst5|count_10Hz[14]~47 .lut_mask = 16'hA50A; -defparam \inst5|count_10Hz[14]~47 .sum_lutc_input = "cin"; +defparam \inst10|count[5]~27 .lut_mask = 16'h5A5F; +defparam \inst10|count[5]~27 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N11 -dffeas \inst5|count_10Hz[14] ( +// Location: FF_X61_Y39_N11 +dffeas \inst10|count[5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[14]~47_combout ), + .d(\inst10|count[5]~27_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [14]), + .q(\inst10|count [5]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[14] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[14] .power_up = "low"; +defparam \inst10|count[5] .is_wysiwyg = "true"; +defparam \inst10|count[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N12 -fiftyfivenm_lcell_comb \inst5|count_10Hz[15]~49 ( +// Location: LCCOMB_X61_Y39_N12 +fiftyfivenm_lcell_comb \inst10|count[6]~29 ( // Equation(s): -// \inst5|count_10Hz[15]~49_combout = (\inst5|count_10Hz [15] & (!\inst5|count_10Hz[14]~48 )) # (!\inst5|count_10Hz [15] & ((\inst5|count_10Hz[14]~48 ) # (GND))) -// \inst5|count_10Hz[15]~50 = CARRY((!\inst5|count_10Hz[14]~48 ) # (!\inst5|count_10Hz [15])) +// \inst10|count[6]~29_combout = (\inst10|count [6] & (\inst10|count[5]~28 $ (GND))) # (!\inst10|count [6] & (!\inst10|count[5]~28 & VCC)) +// \inst10|count[6]~30 = CARRY((\inst10|count [6] & !\inst10|count[5]~28 )) - .dataa(\inst5|count_10Hz [15]), - .datab(gnd), + .dataa(gnd), + .datab(\inst10|count [6]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[14]~48 ), - .combout(\inst5|count_10Hz[15]~49_combout ), - .cout(\inst5|count_10Hz[15]~50 )); + .cin(\inst10|count[5]~28 ), + .combout(\inst10|count[6]~29_combout ), + .cout(\inst10|count[6]~30 )); // synopsys translate_off -defparam \inst5|count_10Hz[15]~49 .lut_mask = 16'h5A5F; -defparam \inst5|count_10Hz[15]~49 .sum_lutc_input = "cin"; +defparam \inst10|count[6]~29 .lut_mask = 16'hC30C; +defparam \inst10|count[6]~29 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N13 -dffeas \inst5|count_10Hz[15] ( +// Location: LCCOMB_X62_Y39_N8 +fiftyfivenm_lcell_comb \inst10|count[6]~feeder ( +// Equation(s): +// \inst10|count[6]~feeder_combout = \inst10|count[6]~29_combout + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst10|count[6]~29_combout ), + .cin(gnd), + .combout(\inst10|count[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst10|count[6]~feeder .lut_mask = 16'hFF00; +defparam \inst10|count[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X62_Y39_N9 +dffeas \inst10|count[6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[15]~49_combout ), + .d(\inst10|count[6]~feeder_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [15]), + .q(\inst10|count [6]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[15] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[15] .power_up = "low"; +defparam \inst10|count[6] .is_wysiwyg = "true"; +defparam \inst10|count[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N14 -fiftyfivenm_lcell_comb \inst5|count_10Hz[16]~51 ( +// Location: LCCOMB_X61_Y39_N14 +fiftyfivenm_lcell_comb \inst10|count[7]~31 ( // Equation(s): -// \inst5|count_10Hz[16]~51_combout = (\inst5|count_10Hz [16] & (\inst5|count_10Hz[15]~50 $ (GND))) # (!\inst5|count_10Hz [16] & (!\inst5|count_10Hz[15]~50 & VCC)) -// \inst5|count_10Hz[16]~52 = CARRY((\inst5|count_10Hz [16] & !\inst5|count_10Hz[15]~50 )) +// \inst10|count[7]~31_combout = (\inst10|count [7] & (!\inst10|count[6]~30 )) # (!\inst10|count [7] & ((\inst10|count[6]~30 ) # (GND))) +// \inst10|count[7]~32 = CARRY((!\inst10|count[6]~30 ) # (!\inst10|count [7])) .dataa(gnd), - .datab(\inst5|count_10Hz [16]), + .datab(\inst10|count [7]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[15]~50 ), - .combout(\inst5|count_10Hz[16]~51_combout ), - .cout(\inst5|count_10Hz[16]~52 )); + .cin(\inst10|count[6]~30 ), + .combout(\inst10|count[7]~31_combout ), + .cout(\inst10|count[7]~32 )); // synopsys translate_off -defparam \inst5|count_10Hz[16]~51 .lut_mask = 16'hC30C; -defparam \inst5|count_10Hz[16]~51 .sum_lutc_input = "cin"; +defparam \inst10|count[7]~31 .lut_mask = 16'h3C3F; +defparam \inst10|count[7]~31 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y37_N15 -dffeas \inst5|count_10Hz[16] ( +// Location: FF_X61_Y39_N15 +dffeas \inst10|count[7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[16]~51_combout ), + .d(\inst10|count[7]~31_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), + .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10Hz [16]), + .q(\inst10|count [7]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10Hz[16] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[16] .power_up = "low"; +defparam \inst10|count[7] .is_wysiwyg = "true"; +defparam \inst10|count[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N16 -fiftyfivenm_lcell_comb \inst5|count_10Hz[17]~53 ( +// Location: LCCOMB_X59_Y37_N26 +fiftyfivenm_lcell_comb \inst13|inst1[7]~102 ( // Equation(s): -// \inst5|count_10Hz[17]~53_combout = (\inst5|count_10Hz [17] & (!\inst5|count_10Hz[16]~52 )) # (!\inst5|count_10Hz [17] & ((\inst5|count_10Hz[16]~52 ) # (GND))) -// \inst5|count_10Hz[17]~54 = CARRY((!\inst5|count_10Hz[16]~52 ) # (!\inst5|count_10Hz [17])) +// \inst13|inst1[7]~102_combout = (!\inst13|inst4~combout & (((\inst10|count [7]) # (\inst|IR [0])) # (!\inst11|tri_enable~1_combout ))) + + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst10|count [7]), + .datad(\inst|IR [0]), + .cin(gnd), + .combout(\inst13|inst1[7]~102_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[7]~102 .lut_mask = 16'h3331; +defparam \inst13|inst1[7]~102 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y38_N0 +fiftyfivenm_lcell_comb \inst3|TIMER_EN~2 ( +// Equation(s): +// \inst3|TIMER_EN~2_combout = (!\inst|IR [7] & (!\inst|IR [4] & \inst|IR [1])) .dataa(gnd), - .datab(\inst5|count_10Hz [17]), + .datab(\inst|IR [7]), + .datac(\inst|IR [4]), + .datad(\inst|IR [1]), + .cin(gnd), + .combout(\inst3|TIMER_EN~2_combout ), + .cout()); +// synopsys translate_off +defparam \inst3|TIMER_EN~2 .lut_mask = 16'h0300; +defparam \inst3|TIMER_EN~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X1_Y37_N14 +fiftyfivenm_lcell_comb \inst5|count_10Hz[0]~19 ( +// Equation(s): +// \inst5|count_10Hz[0]~19_combout = \inst5|count_10Hz [0] $ (VCC) +// \inst5|count_10Hz[0]~20 = CARRY(\inst5|count_10Hz [0]) + + .dataa(gnd), + .datab(\inst5|count_10Hz [0]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10Hz[16]~52 ), - .combout(\inst5|count_10Hz[17]~53_combout ), - .cout(\inst5|count_10Hz[17]~54 )); + .cin(gnd), + .combout(\inst5|count_10Hz[0]~19_combout ), + .cout(\inst5|count_10Hz[0]~20 )); // synopsys translate_off -defparam \inst5|count_10Hz[17]~53 .lut_mask = 16'h3C3F; -defparam \inst5|count_10Hz[17]~53 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[0]~19 .lut_mask = 16'h33CC; +defparam \inst5|count_10Hz[0]~19 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y37_N17 -dffeas \inst5|count_10Hz[17] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[17]~53_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10Hz [17]), - .prn(vcc)); +// Location: LCCOMB_X1_Y36_N26 +fiftyfivenm_lcell_comb \inst5|LessThan5~3 ( +// Equation(s): +// \inst5|LessThan5~3_combout = (!\inst5|count_10Hz [12] & (!\inst5|count_10Hz [10] & (!\inst5|count_10Hz [11] & !\inst5|count_10Hz [9]))) + + .dataa(\inst5|count_10Hz [12]), + .datab(\inst5|count_10Hz [10]), + .datac(\inst5|count_10Hz [11]), + .datad(\inst5|count_10Hz [9]), + .cin(gnd), + .combout(\inst5|LessThan5~3_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[17] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[17] .power_up = "low"; +defparam \inst5|LessThan5~3 .lut_mask = 16'h0001; +defparam \inst5|LessThan5~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N18 -fiftyfivenm_lcell_comb \inst5|count_10Hz[18]~55 ( +// Location: LCCOMB_X1_Y37_N0 +fiftyfivenm_lcell_comb \inst5|LessThan5~0 ( // Equation(s): -// \inst5|count_10Hz[18]~55_combout = \inst5|count_10Hz[17]~54 $ (!\inst5|count_10Hz [18]) +// \inst5|LessThan5~0_combout = (!\inst5|count_10Hz [5] & (!\inst5|count_10Hz [6] & !\inst5|count_10Hz [7])) .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst5|count_10Hz [18]), - .cin(\inst5|count_10Hz[17]~54 ), - .combout(\inst5|count_10Hz[18]~55_combout ), + .datab(\inst5|count_10Hz [5]), + .datac(\inst5|count_10Hz [6]), + .datad(\inst5|count_10Hz [7]), + .cin(gnd), + .combout(\inst5|LessThan5~0_combout ), .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[18]~55 .lut_mask = 16'hF00F; -defparam \inst5|count_10Hz[18]~55 .sum_lutc_input = "cin"; +defparam \inst5|LessThan5~0 .lut_mask = 16'h0003; +defparam \inst5|LessThan5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y37_N19 -dffeas \inst5|count_10Hz[18] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10Hz[18]~55_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan4~6_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10Hz [18]), - .prn(vcc)); +// Location: LCCOMB_X1_Y37_N10 +fiftyfivenm_lcell_comb \inst5|LessThan5~1 ( +// Equation(s): +// \inst5|LessThan5~1_combout = (((!\inst5|count_10Hz [2]) # (!\inst5|count_10Hz [0])) # (!\inst5|count_10Hz [3])) # (!\inst5|count_10Hz [1]) + + .dataa(\inst5|count_10Hz [1]), + .datab(\inst5|count_10Hz [3]), + .datac(\inst5|count_10Hz [0]), + .datad(\inst5|count_10Hz [2]), + .cin(gnd), + .combout(\inst5|LessThan5~1_combout ), + .cout()); // synopsys translate_off -defparam \inst5|count_10Hz[18] .is_wysiwyg = "true"; -defparam \inst5|count_10Hz[18] .power_up = "low"; +defparam \inst5|LessThan5~1 .lut_mask = 16'h7FFF; +defparam \inst5|LessThan5~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N22 -fiftyfivenm_lcell_comb \inst5|LessThan4~5 ( +// Location: LCCOMB_X1_Y37_N4 +fiftyfivenm_lcell_comb \inst5|LessThan5~2 ( // Equation(s): -// \inst5|LessThan4~5_combout = (((!\inst5|count_10Hz [18]) # (!\inst5|count_10Hz [16])) # (!\inst5|count_10Hz [17])) # (!\inst5|count_10Hz [15]) +// \inst5|LessThan5~2_combout = ((\inst5|LessThan5~0_combout & ((\inst5|LessThan5~1_combout ) # (!\inst5|count_10Hz [4])))) # (!\inst5|count_10Hz [8]) - .dataa(\inst5|count_10Hz [15]), - .datab(\inst5|count_10Hz [17]), - .datac(\inst5|count_10Hz [16]), - .datad(\inst5|count_10Hz [18]), + .dataa(\inst5|count_10Hz [4]), + .datab(\inst5|LessThan5~0_combout ), + .datac(\inst5|count_10Hz [8]), + .datad(\inst5|LessThan5~1_combout ), .cin(gnd), - .combout(\inst5|LessThan4~5_combout ), + .combout(\inst5|LessThan5~2_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan4~5 .lut_mask = 16'h7FFF; -defparam \inst5|LessThan4~5 .sum_lutc_input = "datac"; +defparam \inst5|LessThan5~2 .lut_mask = 16'hCF4F; +defparam \inst5|LessThan5~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X1_Y37_N28 -fiftyfivenm_lcell_comb \inst5|clock_10Hz_int~0 ( +// Location: LCCOMB_X1_Y36_N24 +fiftyfivenm_lcell_comb \inst5|LessThan5~4 ( // Equation(s): -// \inst5|clock_10Hz_int~0_combout = \inst5|clock_10Hz_int~q $ (((!\inst5|LessThan4~5_combout & !\inst5|LessThan4~4_combout ))) +// \inst5|LessThan5~4_combout = (!\inst5|count_10Hz [14] & (((\inst5|LessThan5~3_combout & \inst5|LessThan5~2_combout )) # (!\inst5|count_10Hz [13]))) - .dataa(\inst5|LessThan4~5_combout ), + .dataa(\inst5|count_10Hz [14]), + .datab(\inst5|count_10Hz [13]), + .datac(\inst5|LessThan5~3_combout ), + .datad(\inst5|LessThan5~2_combout ), + .cin(gnd), + .combout(\inst5|LessThan5~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst5|LessThan5~4 .lut_mask = 16'h5111; +defparam \inst5|LessThan5~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X1_Y36_N20 +fiftyfivenm_lcell_comb \inst5|LessThan5~6 ( +// Equation(s): +// \inst5|LessThan5~6_combout = (!\inst5|LessThan5~5_combout & !\inst5|LessThan5~4_combout ) + + .dataa(gnd), .datab(gnd), - .datac(\inst5|clock_10Hz_int~q ), - .datad(\inst5|LessThan4~4_combout ), + .datac(\inst5|LessThan5~5_combout ), + .datad(\inst5|LessThan5~4_combout ), .cin(gnd), - .combout(\inst5|clock_10Hz_int~0_combout ), + .combout(\inst5|LessThan5~6_combout ), .cout()); // synopsys translate_off -defparam \inst5|clock_10Hz_int~0 .lut_mask = 16'hF0A5; -defparam \inst5|clock_10Hz_int~0 .sum_lutc_input = "datac"; +defparam \inst5|LessThan5~6 .lut_mask = 16'h000F; +defparam \inst5|LessThan5~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X1_Y37_N29 -dffeas \inst5|clock_10Hz_int ( +// Location: FF_X1_Y37_N15 +dffeas \inst5|count_10Hz[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|clock_10Hz_int~0_combout ), + .d(\inst5|count_10Hz[0]~19_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|clock_10Hz_int~q ), + .q(\inst5|count_10Hz [0]), .prn(vcc)); // synopsys translate_off -defparam \inst5|clock_10Hz_int .is_wysiwyg = "true"; -defparam \inst5|clock_10Hz_int .power_up = "low"; +defparam \inst5|count_10Hz[0] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X1_Y38_N8 -fiftyfivenm_lcell_comb \inst5|clock_10Hz~feeder ( +// Location: LCCOMB_X1_Y37_N16 +fiftyfivenm_lcell_comb \inst5|count_10Hz[1]~21 ( // Equation(s): -// \inst5|clock_10Hz~feeder_combout = \inst5|clock_10Hz_int~q +// \inst5|count_10Hz[1]~21_combout = (\inst5|count_10Hz [1] & (!\inst5|count_10Hz[0]~20 )) # (!\inst5|count_10Hz [1] & ((\inst5|count_10Hz[0]~20 ) # (GND))) +// \inst5|count_10Hz[1]~22 = CARRY((!\inst5|count_10Hz[0]~20 ) # (!\inst5|count_10Hz [1])) .dataa(gnd), - .datab(gnd), + .datab(\inst5|count_10Hz [1]), .datac(gnd), - .datad(\inst5|clock_10Hz_int~q ), - .cin(gnd), - .combout(\inst5|clock_10Hz~feeder_combout ), - .cout()); + .datad(vcc), + .cin(\inst5|count_10Hz[0]~20 ), + .combout(\inst5|count_10Hz[1]~21_combout ), + .cout(\inst5|count_10Hz[1]~22 )); // synopsys translate_off -defparam \inst5|clock_10Hz~feeder .lut_mask = 16'hFF00; -defparam \inst5|clock_10Hz~feeder .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[1]~21 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[1]~21 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X1_Y38_N9 -dffeas \inst5|clock_10Hz ( +// Location: FF_X1_Y37_N17 +dffeas \inst5|count_10Hz[1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|clock_10Hz~feeder_combout ), + .d(\inst5|count_10Hz[1]~21_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|clock_10Hz~q ), + .q(\inst5|count_10Hz [1]), .prn(vcc)); // synopsys translate_off -defparam \inst5|clock_10Hz .is_wysiwyg = "true"; -defparam \inst5|clock_10Hz .power_up = "low"; -// synopsys translate_on - -// Location: CLKCTRL_G0 -fiftyfivenm_clkctrl \inst5|clock_10Hz~clkctrl ( - .ena(vcc), - .inclk({vcc,vcc,vcc,\inst5|clock_10Hz~q }), - .clkselect(2'b00), - .devclrn(devclrn), - .devpor(devpor), - .outclk(\inst5|clock_10Hz~clkctrl_outclk )); -// synopsys translate_off -defparam \inst5|clock_10Hz~clkctrl .clock_type = "global clock"; -defparam \inst5|clock_10Hz~clkctrl .ena_register_mode = "none"; +defparam \inst5|count_10Hz[1] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N30 -fiftyfivenm_lcell_comb \inst4|COUNT[0]~45 ( +// Location: LCCOMB_X1_Y37_N18 +fiftyfivenm_lcell_comb \inst5|count_10Hz[2]~23 ( // Equation(s): -// \inst4|COUNT[0]~45_combout = !\inst4|COUNT [0] +// \inst5|count_10Hz[2]~23_combout = (\inst5|count_10Hz [2] & (\inst5|count_10Hz[1]~22 $ (GND))) # (!\inst5|count_10Hz [2] & (!\inst5|count_10Hz[1]~22 & VCC)) +// \inst5|count_10Hz[2]~24 = CARRY((\inst5|count_10Hz [2] & !\inst5|count_10Hz[1]~22 )) .dataa(gnd), - .datab(gnd), - .datac(\inst4|COUNT [0]), - .datad(gnd), - .cin(gnd), - .combout(\inst4|COUNT[0]~45_combout ), - .cout()); -// synopsys translate_off -defparam \inst4|COUNT[0]~45 .lut_mask = 16'h0F0F; -defparam \inst4|COUNT[0]~45 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y43_N6 -fiftyfivenm_lcell_comb \inst4|process_0~0 ( -// Equation(s): -// \inst4|process_0~0_combout = ((\inst|IO_WRITE_int~q & (\inst3|TIMER_EN~2_combout & \inst3|TIMER_EN~1_combout ))) # (!\inst13|inst14|data_out[7]~0_combout ) - - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst13|inst14|data_out[7]~0_combout ), - .datac(\inst3|TIMER_EN~2_combout ), - .datad(\inst3|TIMER_EN~1_combout ), - .cin(gnd), - .combout(\inst4|process_0~0_combout ), - .cout()); + .datab(\inst5|count_10Hz [2]), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_10Hz[1]~22 ), + .combout(\inst5|count_10Hz[2]~23_combout ), + .cout(\inst5|count_10Hz[2]~24 )); // synopsys translate_off -defparam \inst4|process_0~0 .lut_mask = 16'hB333; -defparam \inst4|process_0~0 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[2]~23 .lut_mask = 16'hC30C; +defparam \inst5|count_10Hz[2]~23 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N31 -dffeas \inst4|COUNT[0] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[0]~45_combout ), +// Location: FF_X1_Y37_N19 +dffeas \inst5|count_10Hz[2] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[2]~23_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [0]), + .q(\inst5|count_10Hz [2]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[0] .is_wysiwyg = "true"; -defparam \inst4|COUNT[0] .power_up = "low"; +defparam \inst5|count_10Hz[2] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N0 -fiftyfivenm_lcell_comb \inst4|COUNT[1]~15 ( +// Location: LCCOMB_X1_Y37_N20 +fiftyfivenm_lcell_comb \inst5|count_10Hz[3]~25 ( // Equation(s): -// \inst4|COUNT[1]~15_combout = (\inst4|COUNT [0] & (\inst4|COUNT [1] $ (VCC))) # (!\inst4|COUNT [0] & (\inst4|COUNT [1] & VCC)) -// \inst4|COUNT[1]~16 = CARRY((\inst4|COUNT [0] & \inst4|COUNT [1])) +// \inst5|count_10Hz[3]~25_combout = (\inst5|count_10Hz [3] & (!\inst5|count_10Hz[2]~24 )) # (!\inst5|count_10Hz [3] & ((\inst5|count_10Hz[2]~24 ) # (GND))) +// \inst5|count_10Hz[3]~26 = CARRY((!\inst5|count_10Hz[2]~24 ) # (!\inst5|count_10Hz [3])) - .dataa(\inst4|COUNT [0]), - .datab(\inst4|COUNT [1]), + .dataa(gnd), + .datab(\inst5|count_10Hz [3]), .datac(gnd), .datad(vcc), - .cin(gnd), - .combout(\inst4|COUNT[1]~15_combout ), - .cout(\inst4|COUNT[1]~16 )); + .cin(\inst5|count_10Hz[2]~24 ), + .combout(\inst5|count_10Hz[3]~25_combout ), + .cout(\inst5|count_10Hz[3]~26 )); // synopsys translate_off -defparam \inst4|COUNT[1]~15 .lut_mask = 16'h6688; -defparam \inst4|COUNT[1]~15 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[3]~25 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[3]~25 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N1 -dffeas \inst4|COUNT[1] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[1]~15_combout ), +// Location: FF_X1_Y37_N21 +dffeas \inst5|count_10Hz[3] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[3]~25_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [1]), + .q(\inst5|count_10Hz [3]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[1] .is_wysiwyg = "true"; -defparam \inst4|COUNT[1] .power_up = "low"; +defparam \inst5|count_10Hz[3] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N2 -fiftyfivenm_lcell_comb \inst4|COUNT[2]~17 ( +// Location: LCCOMB_X1_Y37_N22 +fiftyfivenm_lcell_comb \inst5|count_10Hz[4]~27 ( // Equation(s): -// \inst4|COUNT[2]~17_combout = (\inst4|COUNT [2] & (!\inst4|COUNT[1]~16 )) # (!\inst4|COUNT [2] & ((\inst4|COUNT[1]~16 ) # (GND))) -// \inst4|COUNT[2]~18 = CARRY((!\inst4|COUNT[1]~16 ) # (!\inst4|COUNT [2])) +// \inst5|count_10Hz[4]~27_combout = (\inst5|count_10Hz [4] & (\inst5|count_10Hz[3]~26 $ (GND))) # (!\inst5|count_10Hz [4] & (!\inst5|count_10Hz[3]~26 & VCC)) +// \inst5|count_10Hz[4]~28 = CARRY((\inst5|count_10Hz [4] & !\inst5|count_10Hz[3]~26 )) - .dataa(gnd), - .datab(\inst4|COUNT [2]), + .dataa(\inst5|count_10Hz [4]), + .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[1]~16 ), - .combout(\inst4|COUNT[2]~17_combout ), - .cout(\inst4|COUNT[2]~18 )); + .cin(\inst5|count_10Hz[3]~26 ), + .combout(\inst5|count_10Hz[4]~27_combout ), + .cout(\inst5|count_10Hz[4]~28 )); // synopsys translate_off -defparam \inst4|COUNT[2]~17 .lut_mask = 16'h3C3F; -defparam \inst4|COUNT[2]~17 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[4]~27 .lut_mask = 16'hA50A; +defparam \inst5|count_10Hz[4]~27 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N3 -dffeas \inst4|COUNT[2] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[2]~17_combout ), +// Location: FF_X1_Y37_N23 +dffeas \inst5|count_10Hz[4] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[4]~27_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [2]), + .q(\inst5|count_10Hz [4]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[2] .is_wysiwyg = "true"; -defparam \inst4|COUNT[2] .power_up = "low"; +defparam \inst5|count_10Hz[4] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N4 -fiftyfivenm_lcell_comb \inst4|COUNT[3]~19 ( +// Location: LCCOMB_X1_Y37_N24 +fiftyfivenm_lcell_comb \inst5|count_10Hz[5]~29 ( // Equation(s): -// \inst4|COUNT[3]~19_combout = (\inst4|COUNT [3] & (\inst4|COUNT[2]~18 $ (GND))) # (!\inst4|COUNT [3] & (!\inst4|COUNT[2]~18 & VCC)) -// \inst4|COUNT[3]~20 = CARRY((\inst4|COUNT [3] & !\inst4|COUNT[2]~18 )) +// \inst5|count_10Hz[5]~29_combout = (\inst5|count_10Hz [5] & (!\inst5|count_10Hz[4]~28 )) # (!\inst5|count_10Hz [5] & ((\inst5|count_10Hz[4]~28 ) # (GND))) +// \inst5|count_10Hz[5]~30 = CARRY((!\inst5|count_10Hz[4]~28 ) # (!\inst5|count_10Hz [5])) .dataa(gnd), - .datab(\inst4|COUNT [3]), + .datab(\inst5|count_10Hz [5]), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[2]~18 ), - .combout(\inst4|COUNT[3]~19_combout ), - .cout(\inst4|COUNT[3]~20 )); -// synopsys translate_off -defparam \inst4|COUNT[3]~19 .lut_mask = 16'hC30C; -defparam \inst4|COUNT[3]~19 .sum_lutc_input = "cin"; + .cin(\inst5|count_10Hz[4]~28 ), + .combout(\inst5|count_10Hz[5]~29_combout ), + .cout(\inst5|count_10Hz[5]~30 )); +// synopsys translate_off +defparam \inst5|count_10Hz[5]~29 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[5]~29 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N5 -dffeas \inst4|COUNT[3] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[3]~19_combout ), +// Location: FF_X1_Y37_N25 +dffeas \inst5|count_10Hz[5] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[5]~29_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [3]), + .q(\inst5|count_10Hz [5]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[3] .is_wysiwyg = "true"; -defparam \inst4|COUNT[3] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y42_N26 -fiftyfivenm_lcell_comb \inst13|inst1[3]~33 ( -// Equation(s): -// \inst13|inst1[3]~33_combout = (\inst13|inst1[3]~92_combout & (\inst13|inst1[3]~32_combout & ((\inst4|COUNT [3]) # (!\inst4|IO_OUT~combout )))) - - .dataa(\inst13|inst1[3]~92_combout ), - .datab(\inst13|inst1[3]~32_combout ), - .datac(\inst4|IO_OUT~combout ), - .datad(\inst4|COUNT [3]), - .cin(gnd), - .combout(\inst13|inst1[3]~33_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[3]~33 .lut_mask = 16'h8808; -defparam \inst13|inst1[3]~33 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[5] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N6 -fiftyfivenm_lcell_comb \inst4|COUNT[4]~21 ( +// Location: LCCOMB_X1_Y37_N26 +fiftyfivenm_lcell_comb \inst5|count_10Hz[6]~31 ( // Equation(s): -// \inst4|COUNT[4]~21_combout = (\inst4|COUNT [4] & (!\inst4|COUNT[3]~20 )) # (!\inst4|COUNT [4] & ((\inst4|COUNT[3]~20 ) # (GND))) -// \inst4|COUNT[4]~22 = CARRY((!\inst4|COUNT[3]~20 ) # (!\inst4|COUNT [4])) +// \inst5|count_10Hz[6]~31_combout = (\inst5|count_10Hz [6] & (\inst5|count_10Hz[5]~30 $ (GND))) # (!\inst5|count_10Hz [6] & (!\inst5|count_10Hz[5]~30 & VCC)) +// \inst5|count_10Hz[6]~32 = CARRY((\inst5|count_10Hz [6] & !\inst5|count_10Hz[5]~30 )) - .dataa(\inst4|COUNT [4]), + .dataa(\inst5|count_10Hz [6]), .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[3]~20 ), - .combout(\inst4|COUNT[4]~21_combout ), - .cout(\inst4|COUNT[4]~22 )); + .cin(\inst5|count_10Hz[5]~30 ), + .combout(\inst5|count_10Hz[6]~31_combout ), + .cout(\inst5|count_10Hz[6]~32 )); // synopsys translate_off -defparam \inst4|COUNT[4]~21 .lut_mask = 16'h5A5F; -defparam \inst4|COUNT[4]~21 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[6]~31 .lut_mask = 16'hA50A; +defparam \inst5|count_10Hz[6]~31 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N7 -dffeas \inst4|COUNT[4] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[4]~21_combout ), +// Location: FF_X1_Y37_N27 +dffeas \inst5|count_10Hz[6] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[6]~31_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [4]), + .q(\inst5|count_10Hz [6]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[4] .is_wysiwyg = "true"; -defparam \inst4|COUNT[4] .power_up = "low"; +defparam \inst5|count_10Hz[6] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N8 -fiftyfivenm_lcell_comb \inst4|COUNT[5]~23 ( +// Location: LCCOMB_X1_Y37_N28 +fiftyfivenm_lcell_comb \inst5|count_10Hz[7]~33 ( // Equation(s): -// \inst4|COUNT[5]~23_combout = (\inst4|COUNT [5] & (\inst4|COUNT[4]~22 $ (GND))) # (!\inst4|COUNT [5] & (!\inst4|COUNT[4]~22 & VCC)) -// \inst4|COUNT[5]~24 = CARRY((\inst4|COUNT [5] & !\inst4|COUNT[4]~22 )) +// \inst5|count_10Hz[7]~33_combout = (\inst5|count_10Hz [7] & (!\inst5|count_10Hz[6]~32 )) # (!\inst5|count_10Hz [7] & ((\inst5|count_10Hz[6]~32 ) # (GND))) +// \inst5|count_10Hz[7]~34 = CARRY((!\inst5|count_10Hz[6]~32 ) # (!\inst5|count_10Hz [7])) .dataa(gnd), - .datab(\inst4|COUNT [5]), + .datab(\inst5|count_10Hz [7]), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[4]~22 ), - .combout(\inst4|COUNT[5]~23_combout ), - .cout(\inst4|COUNT[5]~24 )); + .cin(\inst5|count_10Hz[6]~32 ), + .combout(\inst5|count_10Hz[7]~33_combout ), + .cout(\inst5|count_10Hz[7]~34 )); // synopsys translate_off -defparam \inst4|COUNT[5]~23 .lut_mask = 16'hC30C; -defparam \inst4|COUNT[5]~23 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[7]~33 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[7]~33 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N9 -dffeas \inst4|COUNT[5] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[5]~23_combout ), +// Location: FF_X1_Y37_N29 +dffeas \inst5|count_10Hz[7] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[7]~33_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [5]), + .q(\inst5|count_10Hz [7]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[5] .is_wysiwyg = "true"; -defparam \inst4|COUNT[5] .power_up = "low"; +defparam \inst5|count_10Hz[7] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N10 -fiftyfivenm_lcell_comb \inst4|COUNT[6]~25 ( +// Location: LCCOMB_X1_Y37_N30 +fiftyfivenm_lcell_comb \inst5|count_10Hz[8]~35 ( // Equation(s): -// \inst4|COUNT[6]~25_combout = (\inst4|COUNT [6] & (!\inst4|COUNT[5]~24 )) # (!\inst4|COUNT [6] & ((\inst4|COUNT[5]~24 ) # (GND))) -// \inst4|COUNT[6]~26 = CARRY((!\inst4|COUNT[5]~24 ) # (!\inst4|COUNT [6])) +// \inst5|count_10Hz[8]~35_combout = (\inst5|count_10Hz [8] & (\inst5|count_10Hz[7]~34 $ (GND))) # (!\inst5|count_10Hz [8] & (!\inst5|count_10Hz[7]~34 & VCC)) +// \inst5|count_10Hz[8]~36 = CARRY((\inst5|count_10Hz [8] & !\inst5|count_10Hz[7]~34 )) - .dataa(\inst4|COUNT [6]), + .dataa(\inst5|count_10Hz [8]), .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[5]~24 ), - .combout(\inst4|COUNT[6]~25_combout ), - .cout(\inst4|COUNT[6]~26 )); + .cin(\inst5|count_10Hz[7]~34 ), + .combout(\inst5|count_10Hz[8]~35_combout ), + .cout(\inst5|count_10Hz[8]~36 )); // synopsys translate_off -defparam \inst4|COUNT[6]~25 .lut_mask = 16'h5A5F; -defparam \inst4|COUNT[6]~25 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[8]~35 .lut_mask = 16'hA50A; +defparam \inst5|count_10Hz[8]~35 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N11 -dffeas \inst4|COUNT[6] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[6]~25_combout ), +// Location: FF_X1_Y37_N31 +dffeas \inst5|count_10Hz[8] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[8]~35_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [6]), + .q(\inst5|count_10Hz [8]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[6] .is_wysiwyg = "true"; -defparam \inst4|COUNT[6] .power_up = "low"; +defparam \inst5|count_10Hz[8] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N12 -fiftyfivenm_lcell_comb \inst4|COUNT[7]~27 ( +// Location: LCCOMB_X1_Y36_N0 +fiftyfivenm_lcell_comb \inst5|count_10Hz[9]~37 ( // Equation(s): -// \inst4|COUNT[7]~27_combout = (\inst4|COUNT [7] & (\inst4|COUNT[6]~26 $ (GND))) # (!\inst4|COUNT [7] & (!\inst4|COUNT[6]~26 & VCC)) -// \inst4|COUNT[7]~28 = CARRY((\inst4|COUNT [7] & !\inst4|COUNT[6]~26 )) +// \inst5|count_10Hz[9]~37_combout = (\inst5|count_10Hz [9] & (!\inst5|count_10Hz[8]~36 )) # (!\inst5|count_10Hz [9] & ((\inst5|count_10Hz[8]~36 ) # (GND))) +// \inst5|count_10Hz[9]~38 = CARRY((!\inst5|count_10Hz[8]~36 ) # (!\inst5|count_10Hz [9])) - .dataa(\inst4|COUNT [7]), - .datab(gnd), + .dataa(gnd), + .datab(\inst5|count_10Hz [9]), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[6]~26 ), - .combout(\inst4|COUNT[7]~27_combout ), - .cout(\inst4|COUNT[7]~28 )); + .cin(\inst5|count_10Hz[8]~36 ), + .combout(\inst5|count_10Hz[9]~37_combout ), + .cout(\inst5|count_10Hz[9]~38 )); // synopsys translate_off -defparam \inst4|COUNT[7]~27 .lut_mask = 16'hA50A; -defparam \inst4|COUNT[7]~27 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[9]~37 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[9]~37 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N13 -dffeas \inst4|COUNT[7] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[7]~27_combout ), +// Location: FF_X1_Y36_N1 +dffeas \inst5|count_10Hz[9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[9]~37_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [7]), + .q(\inst5|count_10Hz [9]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[7] .is_wysiwyg = "true"; -defparam \inst4|COUNT[7] .power_up = "low"; +defparam \inst5|count_10Hz[9] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N14 -fiftyfivenm_lcell_comb \inst4|COUNT[8]~29 ( +// Location: LCCOMB_X1_Y36_N2 +fiftyfivenm_lcell_comb \inst5|count_10Hz[10]~39 ( // Equation(s): -// \inst4|COUNT[8]~29_combout = (\inst4|COUNT [8] & (!\inst4|COUNT[7]~28 )) # (!\inst4|COUNT [8] & ((\inst4|COUNT[7]~28 ) # (GND))) -// \inst4|COUNT[8]~30 = CARRY((!\inst4|COUNT[7]~28 ) # (!\inst4|COUNT [8])) +// \inst5|count_10Hz[10]~39_combout = (\inst5|count_10Hz [10] & (\inst5|count_10Hz[9]~38 $ (GND))) # (!\inst5|count_10Hz [10] & (!\inst5|count_10Hz[9]~38 & VCC)) +// \inst5|count_10Hz[10]~40 = CARRY((\inst5|count_10Hz [10] & !\inst5|count_10Hz[9]~38 )) .dataa(gnd), - .datab(\inst4|COUNT [8]), + .datab(\inst5|count_10Hz [10]), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[7]~28 ), - .combout(\inst4|COUNT[8]~29_combout ), - .cout(\inst4|COUNT[8]~30 )); + .cin(\inst5|count_10Hz[9]~38 ), + .combout(\inst5|count_10Hz[10]~39_combout ), + .cout(\inst5|count_10Hz[10]~40 )); // synopsys translate_off -defparam \inst4|COUNT[8]~29 .lut_mask = 16'h3C3F; -defparam \inst4|COUNT[8]~29 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[10]~39 .lut_mask = 16'hC30C; +defparam \inst5|count_10Hz[10]~39 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N15 -dffeas \inst4|COUNT[8] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[8]~29_combout ), +// Location: FF_X1_Y36_N3 +dffeas \inst5|count_10Hz[10] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[10]~39_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [8]), + .q(\inst5|count_10Hz [10]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[8] .is_wysiwyg = "true"; -defparam \inst4|COUNT[8] .power_up = "low"; +defparam \inst5|count_10Hz[10] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N16 -fiftyfivenm_lcell_comb \inst4|COUNT[9]~31 ( +// Location: LCCOMB_X1_Y36_N4 +fiftyfivenm_lcell_comb \inst5|count_10Hz[11]~41 ( // Equation(s): -// \inst4|COUNT[9]~31_combout = (\inst4|COUNT [9] & (\inst4|COUNT[8]~30 $ (GND))) # (!\inst4|COUNT [9] & (!\inst4|COUNT[8]~30 & VCC)) -// \inst4|COUNT[9]~32 = CARRY((\inst4|COUNT [9] & !\inst4|COUNT[8]~30 )) +// \inst5|count_10Hz[11]~41_combout = (\inst5|count_10Hz [11] & (!\inst5|count_10Hz[10]~40 )) # (!\inst5|count_10Hz [11] & ((\inst5|count_10Hz[10]~40 ) # (GND))) +// \inst5|count_10Hz[11]~42 = CARRY((!\inst5|count_10Hz[10]~40 ) # (!\inst5|count_10Hz [11])) .dataa(gnd), - .datab(\inst4|COUNT [9]), + .datab(\inst5|count_10Hz [11]), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[8]~30 ), - .combout(\inst4|COUNT[9]~31_combout ), - .cout(\inst4|COUNT[9]~32 )); + .cin(\inst5|count_10Hz[10]~40 ), + .combout(\inst5|count_10Hz[11]~41_combout ), + .cout(\inst5|count_10Hz[11]~42 )); // synopsys translate_off -defparam \inst4|COUNT[9]~31 .lut_mask = 16'hC30C; -defparam \inst4|COUNT[9]~31 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[11]~41 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[11]~41 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N17 -dffeas \inst4|COUNT[9] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[9]~31_combout ), +// Location: FF_X1_Y36_N5 +dffeas \inst5|count_10Hz[11] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[11]~41_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [9]), + .q(\inst5|count_10Hz [11]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[9] .is_wysiwyg = "true"; -defparam \inst4|COUNT[9] .power_up = "low"; +defparam \inst5|count_10Hz[11] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N18 -fiftyfivenm_lcell_comb \inst4|COUNT[10]~33 ( +// Location: LCCOMB_X1_Y36_N6 +fiftyfivenm_lcell_comb \inst5|count_10Hz[12]~43 ( // Equation(s): -// \inst4|COUNT[10]~33_combout = (\inst4|COUNT [10] & (!\inst4|COUNT[9]~32 )) # (!\inst4|COUNT [10] & ((\inst4|COUNT[9]~32 ) # (GND))) -// \inst4|COUNT[10]~34 = CARRY((!\inst4|COUNT[9]~32 ) # (!\inst4|COUNT [10])) +// \inst5|count_10Hz[12]~43_combout = (\inst5|count_10Hz [12] & (\inst5|count_10Hz[11]~42 $ (GND))) # (!\inst5|count_10Hz [12] & (!\inst5|count_10Hz[11]~42 & VCC)) +// \inst5|count_10Hz[12]~44 = CARRY((\inst5|count_10Hz [12] & !\inst5|count_10Hz[11]~42 )) - .dataa(gnd), - .datab(\inst4|COUNT [10]), + .dataa(\inst5|count_10Hz [12]), + .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[9]~32 ), - .combout(\inst4|COUNT[10]~33_combout ), - .cout(\inst4|COUNT[10]~34 )); + .cin(\inst5|count_10Hz[11]~42 ), + .combout(\inst5|count_10Hz[12]~43_combout ), + .cout(\inst5|count_10Hz[12]~44 )); // synopsys translate_off -defparam \inst4|COUNT[10]~33 .lut_mask = 16'h3C3F; -defparam \inst4|COUNT[10]~33 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[12]~43 .lut_mask = 16'hA50A; +defparam \inst5|count_10Hz[12]~43 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N19 -dffeas \inst4|COUNT[10] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[10]~33_combout ), +// Location: FF_X1_Y36_N7 +dffeas \inst5|count_10Hz[12] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[12]~43_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [10]), + .q(\inst5|count_10Hz [12]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[10] .is_wysiwyg = "true"; -defparam \inst4|COUNT[10] .power_up = "low"; +defparam \inst5|count_10Hz[12] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N20 -fiftyfivenm_lcell_comb \inst4|COUNT[11]~35 ( +// Location: LCCOMB_X1_Y36_N8 +fiftyfivenm_lcell_comb \inst5|count_10Hz[13]~45 ( // Equation(s): -// \inst4|COUNT[11]~35_combout = (\inst4|COUNT [11] & (\inst4|COUNT[10]~34 $ (GND))) # (!\inst4|COUNT [11] & (!\inst4|COUNT[10]~34 & VCC)) -// \inst4|COUNT[11]~36 = CARRY((\inst4|COUNT [11] & !\inst4|COUNT[10]~34 )) +// \inst5|count_10Hz[13]~45_combout = (\inst5|count_10Hz [13] & (!\inst5|count_10Hz[12]~44 )) # (!\inst5|count_10Hz [13] & ((\inst5|count_10Hz[12]~44 ) # (GND))) +// \inst5|count_10Hz[13]~46 = CARRY((!\inst5|count_10Hz[12]~44 ) # (!\inst5|count_10Hz [13])) .dataa(gnd), - .datab(\inst4|COUNT [11]), + .datab(\inst5|count_10Hz [13]), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[10]~34 ), - .combout(\inst4|COUNT[11]~35_combout ), - .cout(\inst4|COUNT[11]~36 )); + .cin(\inst5|count_10Hz[12]~44 ), + .combout(\inst5|count_10Hz[13]~45_combout ), + .cout(\inst5|count_10Hz[13]~46 )); // synopsys translate_off -defparam \inst4|COUNT[11]~35 .lut_mask = 16'hC30C; -defparam \inst4|COUNT[11]~35 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[13]~45 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[13]~45 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N21 -dffeas \inst4|COUNT[11] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[11]~35_combout ), +// Location: FF_X1_Y36_N9 +dffeas \inst5|count_10Hz[13] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[13]~45_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [11]), + .q(\inst5|count_10Hz [13]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[11] .is_wysiwyg = "true"; -defparam \inst4|COUNT[11] .power_up = "low"; +defparam \inst5|count_10Hz[13] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[13] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N22 -fiftyfivenm_lcell_comb \inst4|COUNT[12]~37 ( +// Location: LCCOMB_X1_Y36_N10 +fiftyfivenm_lcell_comb \inst5|count_10Hz[14]~47 ( // Equation(s): -// \inst4|COUNT[12]~37_combout = (\inst4|COUNT [12] & (!\inst4|COUNT[11]~36 )) # (!\inst4|COUNT [12] & ((\inst4|COUNT[11]~36 ) # (GND))) -// \inst4|COUNT[12]~38 = CARRY((!\inst4|COUNT[11]~36 ) # (!\inst4|COUNT [12])) +// \inst5|count_10Hz[14]~47_combout = (\inst5|count_10Hz [14] & (\inst5|count_10Hz[13]~46 $ (GND))) # (!\inst5|count_10Hz [14] & (!\inst5|count_10Hz[13]~46 & VCC)) +// \inst5|count_10Hz[14]~48 = CARRY((\inst5|count_10Hz [14] & !\inst5|count_10Hz[13]~46 )) - .dataa(\inst4|COUNT [12]), + .dataa(\inst5|count_10Hz [14]), .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[11]~36 ), - .combout(\inst4|COUNT[12]~37_combout ), - .cout(\inst4|COUNT[12]~38 )); + .cin(\inst5|count_10Hz[13]~46 ), + .combout(\inst5|count_10Hz[14]~47_combout ), + .cout(\inst5|count_10Hz[14]~48 )); // synopsys translate_off -defparam \inst4|COUNT[12]~37 .lut_mask = 16'h5A5F; -defparam \inst4|COUNT[12]~37 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[14]~47 .lut_mask = 16'hA50A; +defparam \inst5|count_10Hz[14]~47 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N23 -dffeas \inst4|COUNT[12] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[12]~37_combout ), +// Location: FF_X1_Y36_N11 +dffeas \inst5|count_10Hz[14] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[14]~47_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [12]), + .q(\inst5|count_10Hz [14]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[12] .is_wysiwyg = "true"; -defparam \inst4|COUNT[12] .power_up = "low"; +defparam \inst5|count_10Hz[14] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[14] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N24 -fiftyfivenm_lcell_comb \inst4|COUNT[13]~39 ( +// Location: LCCOMB_X1_Y36_N12 +fiftyfivenm_lcell_comb \inst5|count_10Hz[15]~49 ( // Equation(s): -// \inst4|COUNT[13]~39_combout = (\inst4|COUNT [13] & (\inst4|COUNT[12]~38 $ (GND))) # (!\inst4|COUNT [13] & (!\inst4|COUNT[12]~38 & VCC)) -// \inst4|COUNT[13]~40 = CARRY((\inst4|COUNT [13] & !\inst4|COUNT[12]~38 )) +// \inst5|count_10Hz[15]~49_combout = (\inst5|count_10Hz [15] & (!\inst5|count_10Hz[14]~48 )) # (!\inst5|count_10Hz [15] & ((\inst5|count_10Hz[14]~48 ) # (GND))) +// \inst5|count_10Hz[15]~50 = CARRY((!\inst5|count_10Hz[14]~48 ) # (!\inst5|count_10Hz [15])) - .dataa(gnd), - .datab(\inst4|COUNT [13]), + .dataa(\inst5|count_10Hz [15]), + .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst4|COUNT[12]~38 ), - .combout(\inst4|COUNT[13]~39_combout ), - .cout(\inst4|COUNT[13]~40 )); + .cin(\inst5|count_10Hz[14]~48 ), + .combout(\inst5|count_10Hz[15]~49_combout ), + .cout(\inst5|count_10Hz[15]~50 )); // synopsys translate_off -defparam \inst4|COUNT[13]~39 .lut_mask = 16'hC30C; -defparam \inst4|COUNT[13]~39 .sum_lutc_input = "cin"; +defparam \inst5|count_10Hz[15]~49 .lut_mask = 16'h5A5F; +defparam \inst5|count_10Hz[15]~49 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X52_Y43_N25 -dffeas \inst4|COUNT[13] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[13]~39_combout ), +// Location: FF_X1_Y36_N13 +dffeas \inst5|count_10Hz[15] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[15]~49_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), - .sclr(gnd), + .sclr(\inst5|LessThan5~6_combout ), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [13]), + .q(\inst5|count_10Hz [15]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[13] .is_wysiwyg = "true"; -defparam \inst4|COUNT[13] .power_up = "low"; +defparam \inst5|count_10Hz[15] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[15] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N0 -fiftyfivenm_lcell_comb \inst13|inst1[13]~77 ( +// Location: LCCOMB_X1_Y36_N14 +fiftyfivenm_lcell_comb \inst5|count_10Hz[16]~51 ( // Equation(s): -// \inst13|inst1[13]~77_combout = (!\inst3|SWITCH_EN~combout & (!\inst13|inst4~combout & ((\inst4|COUNT [13]) # (!\inst4|IO_OUT~combout )))) +// \inst5|count_10Hz[16]~51_combout = (\inst5|count_10Hz [16] & (\inst5|count_10Hz[15]~50 $ (GND))) # (!\inst5|count_10Hz [16] & (!\inst5|count_10Hz[15]~50 & VCC)) +// \inst5|count_10Hz[16]~52 = CARRY((\inst5|count_10Hz [16] & !\inst5|count_10Hz[15]~50 )) - .dataa(\inst3|SWITCH_EN~combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst13|inst4~combout ), - .datad(\inst4|COUNT [13]), - .cin(gnd), - .combout(\inst13|inst1[13]~77_combout ), - .cout()); + .dataa(gnd), + .datab(\inst5|count_10Hz [16]), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_10Hz[15]~50 ), + .combout(\inst5|count_10Hz[16]~51_combout ), + .cout(\inst5|count_10Hz[16]~52 )); // synopsys translate_off -defparam \inst13|inst1[13]~77 .lut_mask = 16'h0501; -defparam \inst13|inst1[13]~77 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[16]~51 .lut_mask = 16'hC30C; +defparam \inst5|count_10Hz[16]~51 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N20 -fiftyfivenm_lcell_comb \inst|Add1~70 ( -// Equation(s): -// \inst|Add1~70_combout = (\inst|AC [13] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_sub~q )))) - - .dataa(\inst|AC [13]), - .datab(\inst|state.ex_addi~q ), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_sub~q ), - .cin(gnd), - .combout(\inst|Add1~70_combout ), - .cout()); +// Location: FF_X1_Y36_N15 +dffeas \inst5|count_10Hz[16] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[16]~51_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan5~6_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_10Hz [16]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~70 .lut_mask = 16'hAAA8; -defparam \inst|Add1~70 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[16] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[16] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N28 -fiftyfivenm_lcell_comb \inst|Add1~68 ( +// Location: LCCOMB_X1_Y36_N16 +fiftyfivenm_lcell_comb \inst5|count_10Hz[17]~53 ( // Equation(s): -// \inst|Add1~68_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [13])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state.ex_add~q )) +// \inst5|count_10Hz[17]~53_combout = (\inst5|count_10Hz [17] & (!\inst5|count_10Hz[16]~52 )) # (!\inst5|count_10Hz [17] & ((\inst5|count_10Hz[16]~52 ) # (GND))) +// \inst5|count_10Hz[17]~54 = CARRY((!\inst5|count_10Hz[16]~52 ) # (!\inst5|count_10Hz [17])) .dataa(gnd), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|state.ex_add~q ), - .cin(gnd), - .combout(\inst|Add1~68_combout ), - .cout()); + .datab(\inst5|count_10Hz [17]), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_10Hz[16]~52 ), + .combout(\inst5|count_10Hz[17]~53_combout ), + .cout(\inst5|count_10Hz[17]~54 )); // synopsys translate_off -defparam \inst|Add1~68 .lut_mask = 16'h3C0C; -defparam \inst|Add1~68 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[17]~53 .lut_mask = 16'h3C3F; +defparam \inst5|count_10Hz[17]~53 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N18 -fiftyfivenm_lcell_comb \inst|Add1~69 ( -// Equation(s): -// \inst|Add1~69_combout = (\inst|Add1~1_combout & ((\inst|IR [10]) # ((\inst|WideOr3~1_combout & \inst|Add1~68_combout )))) # (!\inst|Add1~1_combout & (((\inst|WideOr3~1_combout & \inst|Add1~68_combout )))) - - .dataa(\inst|Add1~1_combout ), - .datab(\inst|IR [10]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~68_combout ), - .cin(gnd), - .combout(\inst|Add1~69_combout ), - .cout()); +// Location: FF_X1_Y36_N17 +dffeas \inst5|count_10Hz[17] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[17]~53_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan5~6_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_10Hz [17]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~69 .lut_mask = 16'hF888; -defparam \inst|Add1~69 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[17] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[17] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N8 -fiftyfivenm_lcell_comb \inst|Add1~63 ( +// Location: LCCOMB_X1_Y36_N18 +fiftyfivenm_lcell_comb \inst5|count_10Hz[18]~55 ( // Equation(s): -// \inst|Add1~63_combout = (\inst|altsyncram_component|auto_generated|q_a [12] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [12] & ((\inst|state.ex_sub~q ))) +// \inst5|count_10Hz[18]~55_combout = \inst5|count_10Hz[17]~54 $ (!\inst5|count_10Hz [18]) - .dataa(\inst|altsyncram_component|auto_generated|q_a [12]), + .dataa(gnd), .datab(gnd), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_sub~q ), - .cin(gnd), - .combout(\inst|Add1~63_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Add1~63 .lut_mask = 16'h55A0; -defparam \inst|Add1~63 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y39_N18 -fiftyfivenm_lcell_comb \inst|Add1~64 ( -// Equation(s): -// \inst|Add1~64_combout = (\inst|Add1~63_combout & ((\inst|WideOr3~1_combout ) # ((\inst|IR [10] & \inst|Add1~1_combout )))) # (!\inst|Add1~63_combout & (\inst|IR [10] & ((\inst|Add1~1_combout )))) - - .dataa(\inst|Add1~63_combout ), - .datab(\inst|IR [10]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~1_combout ), - .cin(gnd), - .combout(\inst|Add1~64_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Add1~64 .lut_mask = 16'hECA0; -defparam \inst|Add1~64 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y42_N4 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[20]~12 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[20]~12_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [5])) # (!\inst|IR [4] & ((\inst|AC [3]))))) - - .dataa(\inst|IR [4]), - .datab(\inst|AC [5]), - .datac(\inst|IR [0]), - .datad(\inst|AC [3]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[20]~12_combout ), + .datac(gnd), + .datad(\inst5|count_10Hz [18]), + .cin(\inst5|count_10Hz[17]~54 ), + .combout(\inst5|count_10Hz[18]~55_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[20]~12 .lut_mask = 16'hD080; -defparam \inst|shifter|auto_generated|sbit_w[20]~12 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[18]~55 .lut_mask = 16'hF00F; +defparam \inst5|count_10Hz[18]~55 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N24 -fiftyfivenm_lcell_comb \inst|Selector27~4 ( -// Equation(s): -// \inst|Selector27~4_combout = (\inst|IR [4] & (\inst|IR [3] & \inst|state.ex_shift~q )) - - .dataa(\inst|IR [4]), - .datab(gnd), - .datac(\inst|IR [3]), - .datad(\inst|state.ex_shift~q ), - .cin(gnd), - .combout(\inst|Selector27~4_combout ), - .cout()); +// Location: FF_X1_Y36_N19 +dffeas \inst5|count_10Hz[18] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|count_10Hz[18]~55_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\inst5|LessThan5~6_combout ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|count_10Hz [18]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector27~4 .lut_mask = 16'hA000; -defparam \inst|Selector27~4 .sum_lutc_input = "datac"; +defparam \inst5|count_10Hz[18] .is_wysiwyg = "true"; +defparam \inst5|count_10Hz[18] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N28 -fiftyfivenm_lcell_comb \inst3|TIMER_EN~3 ( +// Location: LCCOMB_X1_Y36_N22 +fiftyfivenm_lcell_comb \inst5|LessThan5~5 ( // Equation(s): -// \inst3|TIMER_EN~3_combout = (!\inst|IR [4] & \inst|IR [1]) +// \inst5|LessThan5~5_combout = (((!\inst5|count_10Hz [18]) # (!\inst5|count_10Hz [16])) # (!\inst5|count_10Hz [17])) # (!\inst5|count_10Hz [15]) - .dataa(gnd), - .datab(\inst|IR [4]), - .datac(gnd), - .datad(\inst|IR [1]), + .dataa(\inst5|count_10Hz [15]), + .datab(\inst5|count_10Hz [17]), + .datac(\inst5|count_10Hz [16]), + .datad(\inst5|count_10Hz [18]), .cin(gnd), - .combout(\inst3|TIMER_EN~3_combout ), + .combout(\inst5|LessThan5~5_combout ), .cout()); // synopsys translate_off -defparam \inst3|TIMER_EN~3 .lut_mask = 16'h3300; -defparam \inst3|TIMER_EN~3 .sum_lutc_input = "datac"; +defparam \inst5|LessThan5~5 .lut_mask = 16'h7FFF; +defparam \inst5|LessThan5~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N20 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[28]~21 ( +// Location: LCCOMB_X1_Y36_N28 +fiftyfivenm_lcell_comb \inst5|clock_10Hz_int~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[28]~21_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [13]))) # (!\inst|IR [4] & (\inst|AC [11])))) +// \inst5|clock_10Hz_int~0_combout = \inst5|clock_10Hz_int~q $ (((!\inst5|LessThan5~5_combout & !\inst5|LessThan5~4_combout ))) - .dataa(\inst|AC [11]), - .datab(\inst|AC [13]), - .datac(\inst|IR [4]), - .datad(\inst|IR [0]), + .dataa(\inst5|LessThan5~5_combout ), + .datab(gnd), + .datac(\inst5|clock_10Hz_int~q ), + .datad(\inst5|LessThan5~4_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[28]~21_combout ), + .combout(\inst5|clock_10Hz_int~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[28]~21 .lut_mask = 16'hCA00; -defparam \inst|shifter|auto_generated|sbit_w[28]~21 .sum_lutc_input = "datac"; +defparam \inst5|clock_10Hz_int~0 .lut_mask = 16'hF0A5; +defparam \inst5|clock_10Hz_int~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N30 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[28]~22 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[28]~22_combout = (\inst|shifter|auto_generated|sbit_w[28]~21_combout ) # ((!\inst|IR [0] & \inst|AC [12])) - - .dataa(\inst|IR [0]), - .datab(\inst|shifter|auto_generated|sbit_w[28]~21_combout ), - .datac(\inst|AC [12]), - .datad(gnd), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), - .cout()); +// Location: FF_X1_Y36_N29 +dffeas \inst5|clock_10Hz_int ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst5|clock_10Hz_int~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|clock_10Hz_int~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[28]~22 .lut_mask = 16'hDCDC; -defparam \inst|shifter|auto_generated|sbit_w[28]~22 .sum_lutc_input = "datac"; +defparam \inst5|clock_10Hz_int .is_wysiwyg = "true"; +defparam \inst5|clock_10Hz_int .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N6 -fiftyfivenm_lcell_comb \inst|Selector19~2 ( -// Equation(s): -// \inst|Selector19~2_combout = (\inst|altsyncram_component|auto_generated|q_a [8] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [8])))) # (!\inst|altsyncram_component|auto_generated|q_a [8] & (\inst|state.ex_xor~q & (\inst|AC -// [8]))) - - .dataa(\inst|state.ex_xor~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [8]), - .datac(\inst|AC [8]), - .datad(\inst|Selector27~1_combout ), - .cin(gnd), - .combout(\inst|Selector19~2_combout ), - .cout()); +// Location: FF_X2_Y38_N3 +dffeas \inst5|clock_10Hz ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\inst5|clock_10Hz_int~q ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst5|clock_10Hz~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector19~2 .lut_mask = 16'hEC28; -defparam \inst|Selector19~2 .sum_lutc_input = "datac"; +defparam \inst5|clock_10Hz .is_wysiwyg = "true"; +defparam \inst5|clock_10Hz .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N2 -fiftyfivenm_lcell_comb \inst|Add1~43 ( -// Equation(s): -// \inst|Add1~43_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [8]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [8])) - - .dataa(\inst|state.ex_add~q ), - .datab(gnd), - .datac(\inst|state.ex_sub~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [8]), - .cin(gnd), - .combout(\inst|Add1~43_combout ), - .cout()); +// Location: CLKCTRL_G2 +fiftyfivenm_clkctrl \inst5|clock_10Hz~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\inst5|clock_10Hz~q }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\inst5|clock_10Hz~clkctrl_outclk )); // synopsys translate_off -defparam \inst|Add1~43 .lut_mask = 16'h0AF0; -defparam \inst|Add1~43 .sum_lutc_input = "datac"; +defparam \inst5|clock_10Hz~clkctrl .clock_type = "global clock"; +defparam \inst5|clock_10Hz~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N8 -fiftyfivenm_lcell_comb \inst|Add1~44 ( +// Location: LCCOMB_X60_Y40_N30 +fiftyfivenm_lcell_comb \inst4|COUNT[0]~45 ( // Equation(s): -// \inst|Add1~44_combout = (\inst|Add1~43_combout & ((\inst|WideOr3~1_combout ) # ((\inst|Add1~1_combout & \inst|IR [8])))) # (!\inst|Add1~43_combout & (\inst|Add1~1_combout & (\inst|IR [8]))) +// \inst4|COUNT[0]~45_combout = !\inst4|COUNT [0] - .dataa(\inst|Add1~43_combout ), - .datab(\inst|Add1~1_combout ), - .datac(\inst|IR [8]), - .datad(\inst|WideOr3~1_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst4|COUNT [0]), + .datad(gnd), .cin(gnd), - .combout(\inst|Add1~44_combout ), + .combout(\inst4|COUNT[0]~45_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~44 .lut_mask = 16'hEAC0; -defparam \inst|Add1~44 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[0]~45 .lut_mask = 16'h0F0F; +defparam \inst4|COUNT[0]~45 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N24 -fiftyfivenm_lcell_comb \inst|Add1~45 ( +// Location: LCCOMB_X59_Y40_N26 +fiftyfivenm_lcell_comb \inst4|process_0~0 ( // Equation(s): -// \inst|Add1~45_combout = (\inst|AC [8] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_add~q )))) +// \inst4|process_0~0_combout = ((\inst3|TIMER_EN~1_combout & (\inst|IO_WRITE_int~q & \inst3|TIMER_EN~2_combout ))) # (!\inst13|inst14|data_out[7]~0_combout ) - .dataa(\inst|state.ex_sub~q ), - .datab(\inst|state.ex_addi~q ), - .datac(\inst|state.ex_add~q ), - .datad(\inst|AC [8]), + .dataa(\inst13|inst14|data_out[7]~0_combout ), + .datab(\inst3|TIMER_EN~1_combout ), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst3|TIMER_EN~2_combout ), .cin(gnd), - .combout(\inst|Add1~45_combout ), + .combout(\inst4|process_0~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~45 .lut_mask = 16'hFE00; -defparam \inst|Add1~45 .sum_lutc_input = "datac"; +defparam \inst4|process_0~0 .lut_mask = 16'hD555; +defparam \inst4|process_0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N0 -fiftyfivenm_lcell_comb \inst|Add1~41 ( -// Equation(s): -// \inst|Add1~41_combout = ((\inst|Add1~40_combout $ (\inst|Add1~39_combout $ (!\inst|Add1~37 )))) # (GND) -// \inst|Add1~42 = CARRY((\inst|Add1~40_combout & ((\inst|Add1~39_combout ) # (!\inst|Add1~37 ))) # (!\inst|Add1~40_combout & (\inst|Add1~39_combout & !\inst|Add1~37 ))) - - .dataa(\inst|Add1~40_combout ), - .datab(\inst|Add1~39_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~37 ), - .combout(\inst|Add1~41_combout ), - .cout(\inst|Add1~42 )); +// Location: FF_X60_Y40_N31 +dffeas \inst4|COUNT[0] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[0]~45_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [0]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~41 .lut_mask = 16'h698E; -defparam \inst|Add1~41 .sum_lutc_input = "cin"; +defparam \inst4|COUNT[0] .is_wysiwyg = "true"; +defparam \inst4|COUNT[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N2 -fiftyfivenm_lcell_comb \inst|Add1~46 ( +// Location: LCCOMB_X60_Y40_N0 +fiftyfivenm_lcell_comb \inst4|COUNT[1]~15 ( // Equation(s): -// \inst|Add1~46_combout = (\inst|Add1~44_combout & ((\inst|Add1~45_combout & (\inst|Add1~42 & VCC)) # (!\inst|Add1~45_combout & (!\inst|Add1~42 )))) # (!\inst|Add1~44_combout & ((\inst|Add1~45_combout & (!\inst|Add1~42 )) # (!\inst|Add1~45_combout & -// ((\inst|Add1~42 ) # (GND))))) -// \inst|Add1~47 = CARRY((\inst|Add1~44_combout & (!\inst|Add1~45_combout & !\inst|Add1~42 )) # (!\inst|Add1~44_combout & ((!\inst|Add1~42 ) # (!\inst|Add1~45_combout )))) +// \inst4|COUNT[1]~15_combout = (\inst4|COUNT [0] & (\inst4|COUNT [1] $ (VCC))) # (!\inst4|COUNT [0] & (\inst4|COUNT [1] & VCC)) +// \inst4|COUNT[1]~16 = CARRY((\inst4|COUNT [0] & \inst4|COUNT [1])) - .dataa(\inst|Add1~44_combout ), - .datab(\inst|Add1~45_combout ), + .dataa(\inst4|COUNT [0]), + .datab(\inst4|COUNT [1]), .datac(gnd), .datad(vcc), - .cin(\inst|Add1~42 ), - .combout(\inst|Add1~46_combout ), - .cout(\inst|Add1~47 )); -// synopsys translate_off -defparam \inst|Add1~46 .lut_mask = 16'h9617; -defparam \inst|Add1~46 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: LCCOMB_X45_Y40_N4 -fiftyfivenm_lcell_comb \inst|Selector19~3 ( -// Equation(s): -// \inst|Selector19~3_combout = (\inst|Selector19~2_combout ) # ((\inst|Selector19~0_combout ) # ((\inst|Add1~46_combout & \inst|AC[2]~0_combout ))) - - .dataa(\inst|Selector19~2_combout ), - .datab(\inst|Selector19~0_combout ), - .datac(\inst|Add1~46_combout ), - .datad(\inst|AC[2]~0_combout ), .cin(gnd), - .combout(\inst|Selector19~3_combout ), - .cout()); + .combout(\inst4|COUNT[1]~15_combout ), + .cout(\inst4|COUNT[1]~16 )); // synopsys translate_off -defparam \inst|Selector19~3 .lut_mask = 16'hFEEE; -defparam \inst|Selector19~3 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[1]~15 .lut_mask = 16'h6688; +defparam \inst4|COUNT[1]~15 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N6 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[56]~24 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[56]~24_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[44]~23_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[36]~14_combout ))))) - - .dataa(\inst|IR [4]), - .datab(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), - .datad(\inst|IR [2]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[56]~24_combout ), - .cout()); +// Location: FF_X60_Y40_N1 +dffeas \inst4|COUNT[1] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[1]~15_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [1]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[56]~24 .lut_mask = 16'hD800; -defparam \inst|shifter|auto_generated|sbit_w[56]~24 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[1] .is_wysiwyg = "true"; +defparam \inst4|COUNT[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N28 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[26]~16 ( +// Location: LCCOMB_X60_Y40_N2 +fiftyfivenm_lcell_comb \inst4|COUNT[2]~17 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[26]~16_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [11]))) # (!\inst|IR [4] & (\inst|AC [9])))) +// \inst4|COUNT[2]~17_combout = (\inst4|COUNT [2] & (!\inst4|COUNT[1]~16 )) # (!\inst4|COUNT [2] & ((\inst4|COUNT[1]~16 ) # (GND))) +// \inst4|COUNT[2]~18 = CARRY((!\inst4|COUNT[1]~16 ) # (!\inst4|COUNT [2])) - .dataa(\inst|IR [4]), - .datab(\inst|AC [9]), - .datac(\inst|AC [11]), - .datad(\inst|IR [0]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[26]~16_combout ), - .cout()); + .dataa(gnd), + .datab(\inst4|COUNT [2]), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[1]~16 ), + .combout(\inst4|COUNT[2]~17_combout ), + .cout(\inst4|COUNT[2]~18 )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[26]~16 .lut_mask = 16'hE400; -defparam \inst|shifter|auto_generated|sbit_w[26]~16 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[2]~17 .lut_mask = 16'h3C3F; +defparam \inst4|COUNT[2]~17 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N18 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[26]~17 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[26]~17_combout = (\inst|shifter|auto_generated|sbit_w[26]~16_combout ) # ((!\inst|IR [0] & \inst|AC [10])) - - .dataa(gnd), - .datab(\inst|IR [0]), - .datac(\inst|AC [10]), - .datad(\inst|shifter|auto_generated|sbit_w[26]~16_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), - .cout()); +// Location: FF_X60_Y40_N3 +dffeas \inst4|COUNT[2] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[2]~17_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [2]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[26]~17 .lut_mask = 16'hFF30; -defparam \inst|shifter|auto_generated|sbit_w[26]~17 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[2] .is_wysiwyg = "true"; +defparam \inst4|COUNT[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N20 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[22]~9 ( +// Location: LCCOMB_X60_Y40_N4 +fiftyfivenm_lcell_comb \inst4|COUNT[3]~19 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[22]~9_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [7])) # (!\inst|IR [4] & ((\inst|AC [5]))))) +// \inst4|COUNT[3]~19_combout = (\inst4|COUNT [3] & (\inst4|COUNT[2]~18 $ (GND))) # (!\inst4|COUNT [3] & (!\inst4|COUNT[2]~18 & VCC)) +// \inst4|COUNT[3]~20 = CARRY((\inst4|COUNT [3] & !\inst4|COUNT[2]~18 )) - .dataa(\inst|AC [7]), - .datab(\inst|IR [0]), - .datac(\inst|AC [5]), - .datad(\inst|IR [4]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[22]~9_combout ), - .cout()); + .dataa(gnd), + .datab(\inst4|COUNT [3]), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[2]~18 ), + .combout(\inst4|COUNT[3]~19_combout ), + .cout(\inst4|COUNT[3]~20 )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[22]~9 .lut_mask = 16'h88C0; -defparam \inst|shifter|auto_generated|sbit_w[22]~9 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[3]~19 .lut_mask = 16'hC30C; +defparam \inst4|COUNT[3]~19 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N18 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[22]~10 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[22]~10_combout = (\inst|shifter|auto_generated|sbit_w[22]~9_combout ) # ((\inst|AC [6] & !\inst|IR [0])) - - .dataa(\inst|AC [6]), - .datab(gnd), - .datac(\inst|IR [0]), - .datad(\inst|shifter|auto_generated|sbit_w[22]~9_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), - .cout()); +// Location: FF_X60_Y40_N5 +dffeas \inst4|COUNT[3] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[3]~19_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [3]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[22]~10 .lut_mask = 16'hFF0A; -defparam \inst|shifter|auto_generated|sbit_w[22]~10 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[3] .is_wysiwyg = "true"; +defparam \inst4|COUNT[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N30 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[40]~25 ( +// Location: LCCOMB_X60_Y40_N6 +fiftyfivenm_lcell_comb \inst4|COUNT[4]~21 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[40]~25_combout = (\inst|IR [1] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[26]~17_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[22]~10_combout ))))) +// \inst4|COUNT[4]~21_combout = (\inst4|COUNT [4] & (!\inst4|COUNT[3]~20 )) # (!\inst4|COUNT [4] & ((\inst4|COUNT[3]~20 ) # (GND))) +// \inst4|COUNT[4]~22 = CARRY((!\inst4|COUNT[3]~20 ) # (!\inst4|COUNT [4])) - .dataa(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), - .datac(\inst|IR [1]), - .datad(\inst|IR [4]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[40]~25_combout ), - .cout()); + .dataa(\inst4|COUNT [4]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[3]~20 ), + .combout(\inst4|COUNT[4]~21_combout ), + .cout(\inst4|COUNT[4]~22 )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[40]~25 .lut_mask = 16'hA0C0; -defparam \inst|shifter|auto_generated|sbit_w[40]~25 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[4]~21 .lut_mask = 16'h5A5F; +defparam \inst4|COUNT[4]~21 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N0 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[40]~28 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[40]~28_combout = (\inst|shifter|auto_generated|sbit_w[40]~25_combout ) # ((\inst|shifter|auto_generated|sbit_w[24]~27_combout & !\inst|IR [1])) - - .dataa(\inst|shifter|auto_generated|sbit_w[40]~25_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), - .datac(\inst|IR [1]), - .datad(gnd), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), - .cout()); +// Location: FF_X60_Y40_N7 +dffeas \inst4|COUNT[4] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[4]~21_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [4]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[40]~28 .lut_mask = 16'hAEAE; -defparam \inst|shifter|auto_generated|sbit_w[40]~28 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[4] .is_wysiwyg = "true"; +defparam \inst4|COUNT[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N2 -fiftyfivenm_lcell_comb \inst|Selector19~5 ( +// Location: LCCOMB_X60_Y40_N8 +fiftyfivenm_lcell_comb \inst4|COUNT[5]~23 ( // Equation(s): -// \inst|Selector19~5_combout = (\inst|shifter|auto_generated|sbit_w[56]~24_combout ) # ((\inst|shifter|auto_generated|sbit_w[40]~28_combout & !\inst|IR [2])) +// \inst4|COUNT[5]~23_combout = (\inst4|COUNT [5] & (\inst4|COUNT[4]~22 $ (GND))) # (!\inst4|COUNT [5] & (!\inst4|COUNT[4]~22 & VCC)) +// \inst4|COUNT[5]~24 = CARRY((\inst4|COUNT [5] & !\inst4|COUNT[4]~22 )) - .dataa(\inst|shifter|auto_generated|sbit_w[56]~24_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), + .dataa(gnd), + .datab(\inst4|COUNT [5]), .datac(gnd), - .datad(\inst|IR [2]), - .cin(gnd), - .combout(\inst|Selector19~5_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector19~5 .lut_mask = 16'hAAEE; -defparam \inst|Selector19~5 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y42_N4 -fiftyfivenm_lcell_comb \inst|Selector19~6 ( -// Equation(s): -// \inst|Selector19~6_combout = (\inst|IR [8] & ((\inst|state.ex_loadi~q ) # ((\inst|Selector20~0_combout & \inst|Selector19~5_combout )))) # (!\inst|IR [8] & (\inst|Selector20~0_combout & ((\inst|Selector19~5_combout )))) - - .dataa(\inst|IR [8]), - .datab(\inst|Selector20~0_combout ), - .datac(\inst|state.ex_loadi~q ), - .datad(\inst|Selector19~5_combout ), - .cin(gnd), - .combout(\inst|Selector19~6_combout ), - .cout()); + .datad(vcc), + .cin(\inst4|COUNT[4]~22 ), + .combout(\inst4|COUNT[5]~23_combout ), + .cout(\inst4|COUNT[5]~24 )); // synopsys translate_off -defparam \inst|Selector19~6 .lut_mask = 16'hECA0; -defparam \inst|Selector19~6 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[5]~23 .lut_mask = 16'hC30C; +defparam \inst4|COUNT[5]~23 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N8 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[32]~4 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[32]~4_combout = (\inst|IR [4] & (\inst|AC [1] & (\inst|IR [0] & !\inst|IR [1]))) - - .dataa(\inst|IR [4]), - .datab(\inst|AC [1]), - .datac(\inst|IR [0]), - .datad(\inst|IR [1]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[32]~4_combout ), - .cout()); +// Location: FF_X60_Y40_N9 +dffeas \inst4|COUNT[5] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[5]~23_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [5]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[32]~4 .lut_mask = 16'h0080; -defparam \inst|shifter|auto_generated|sbit_w[32]~4 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[5] .is_wysiwyg = "true"; +defparam \inst4|COUNT[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N10 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[32]~5 ( +// Location: LCCOMB_X60_Y40_N10 +fiftyfivenm_lcell_comb \inst4|COUNT[6]~25 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[32]~5_combout = (\inst|shifter|auto_generated|sbit_w[32]~4_combout ) # ((!\inst|IR [1] & (!\inst|IR [0] & \inst|AC [0]))) +// \inst4|COUNT[6]~25_combout = (\inst4|COUNT [6] & (!\inst4|COUNT[5]~24 )) # (!\inst4|COUNT [6] & ((\inst4|COUNT[5]~24 ) # (GND))) +// \inst4|COUNT[6]~26 = CARRY((!\inst4|COUNT[5]~24 ) # (!\inst4|COUNT [6])) - .dataa(\inst|IR [1]), - .datab(\inst|shifter|auto_generated|sbit_w[32]~4_combout ), - .datac(\inst|IR [0]), - .datad(\inst|AC [0]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[32]~5_combout ), - .cout()); + .dataa(\inst4|COUNT [6]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[5]~24 ), + .combout(\inst4|COUNT[6]~25_combout ), + .cout(\inst4|COUNT[6]~26 )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[32]~5 .lut_mask = 16'hCDCC; -defparam \inst|shifter|auto_generated|sbit_w[32]~5 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[6]~25 .lut_mask = 16'h5A5F; +defparam \inst4|COUNT[6]~25 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N4 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[48]~8 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[48]~8_combout = (!\inst|IR [2] & ((\inst|shifter|auto_generated|sbit_w[32]~5_combout ) # ((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[18]~7_combout )))) - - .dataa(\inst|IR [2]), - .datab(\inst3|I2C_RDY_EN~0_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[32]~5_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[48]~8_combout ), - .cout()); +// Location: FF_X60_Y40_N11 +dffeas \inst4|COUNT[6] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[6]~25_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [6]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[48]~8 .lut_mask = 16'h5450; -defparam \inst|shifter|auto_generated|sbit_w[48]~8 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[6] .is_wysiwyg = "true"; +defparam \inst4|COUNT[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N28 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[48]~15 ( +// Location: LCCOMB_X60_Y40_N12 +fiftyfivenm_lcell_comb \inst4|COUNT[7]~27 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[48]~15_combout = (\inst|shifter|auto_generated|sbit_w[48]~8_combout ) # ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[36]~14_combout & \inst|IR [2]))) +// \inst4|COUNT[7]~27_combout = (\inst4|COUNT [7] & (\inst4|COUNT[6]~26 $ (GND))) # (!\inst4|COUNT [7] & (!\inst4|COUNT[6]~26 & VCC)) +// \inst4|COUNT[7]~28 = CARRY((\inst4|COUNT [7] & !\inst4|COUNT[6]~26 )) - .dataa(\inst|IR [4]), - .datab(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[48]~8_combout ), - .datad(\inst|IR [2]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[48]~15_combout ), - .cout()); + .dataa(\inst4|COUNT [7]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[6]~26 ), + .combout(\inst4|COUNT[7]~27_combout ), + .cout(\inst4|COUNT[7]~28 )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[48]~15 .lut_mask = 16'hF8F0; -defparam \inst|shifter|auto_generated|sbit_w[48]~15 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[7]~27 .lut_mask = 16'hA50A; +defparam \inst4|COUNT[7]~27 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N10 -fiftyfivenm_lcell_comb \inst|Selector19~7 ( -// Equation(s): -// \inst|Selector19~7_combout = (\inst|Selector19~3_combout ) # ((\inst|Selector19~6_combout ) # ((\inst|Selector19~4_combout & \inst|shifter|auto_generated|sbit_w[48]~15_combout ))) - - .dataa(\inst|Selector19~4_combout ), - .datab(\inst|Selector19~3_combout ), - .datac(\inst|Selector19~6_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[48]~15_combout ), - .cin(gnd), - .combout(\inst|Selector19~7_combout ), - .cout()); +// Location: FF_X60_Y40_N13 +dffeas \inst4|COUNT[7] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[7]~27_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [7]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector19~7 .lut_mask = 16'hFEFC; -defparam \inst|Selector19~7 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[7] .is_wysiwyg = "true"; +defparam \inst4|COUNT[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N12 -fiftyfivenm_lcell_comb \inst|Selector19~1 ( +// Location: LCCOMB_X59_Y37_N8 +fiftyfivenm_lcell_comb \inst4|IO_BUS|dout[7]~2 ( // Equation(s): -// \inst|Selector19~1_combout = (\inst|AC [8] & (((\inst|altsyncram_component|auto_generated|q_a [8] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) +// \inst4|IO_BUS|dout[7]~2_combout = (\inst|IO_WRITE_int~q ) # (((\inst4|COUNT [7]) # (!\inst3|TIMER_EN~1_combout )) # (!\inst3|TIMER_EN~2_combout )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [8]), - .datab(\inst|state.ex_and~q ), - .datac(\inst|Selector27~6_combout ), - .datad(\inst|AC [8]), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|TIMER_EN~2_combout ), + .datac(\inst4|COUNT [7]), + .datad(\inst3|TIMER_EN~1_combout ), .cin(gnd), - .combout(\inst|Selector19~1_combout ), + .combout(\inst4|IO_BUS|dout[7]~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector19~1 .lut_mask = 16'h8F00; -defparam \inst|Selector19~1 .sum_lutc_input = "datac"; +defparam \inst4|IO_BUS|dout[7]~2 .lut_mask = 16'hFBFF; +defparam \inst4|IO_BUS|dout[7]~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N8 -fiftyfivenm_lcell_comb \inst|Selector19~8 ( +// Location: LCCOMB_X60_Y38_N18 +fiftyfivenm_lcell_comb \inst11|tri_enable ( // Equation(s): -// \inst|Selector19~8_combout = (\inst|Selector19~7_combout ) # (\inst|Selector19~1_combout ) +// \inst11|tri_enable~combout = (\inst11|tri_enable~1_combout & \inst|IR [0]) - .dataa(\inst|Selector19~7_combout ), + .dataa(\inst11|tri_enable~1_combout ), .datab(gnd), .datac(gnd), - .datad(\inst|Selector19~1_combout ), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector19~8_combout ), + .combout(\inst11|tri_enable~combout ), .cout()); // synopsys translate_off -defparam \inst|Selector19~8 .lut_mask = 16'hFFAA; -defparam \inst|Selector19~8 .sum_lutc_input = "datac"; +defparam \inst11|tri_enable .lut_mask = 16'hAA00; +defparam \inst11|tri_enable .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N16 -fiftyfivenm_lcell_comb \inst11|Add1~11 ( +// Location: LCCOMB_X59_Y35_N0 +fiftyfivenm_lcell_comb \inst11|Add1~10 ( // Equation(s): -// \inst11|Add1~11_combout = (\inst10|state.Init~q & \inst11|count [8]) +// \inst11|Add1~10_combout = (\inst10|state.Init~q & \inst11|count [7]) .dataa(\inst10|state.Init~q ), .datab(gnd), - .datac(\inst11|count [8]), + .datac(\inst11|count [7]), .datad(gnd), .cin(gnd), - .combout(\inst11|Add1~11_combout ), + .combout(\inst11|Add1~10_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~11 .lut_mask = 16'hA0A0; -defparam \inst11|Add1~11 .sum_lutc_input = "datac"; +defparam \inst11|Add1~10 .lut_mask = 16'hA0A0; +defparam \inst11|Add1~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N8 -fiftyfivenm_lcell_comb \inst11|count[4]~25 ( +// Location: IOIBUF_X34_Y0_N15 +fiftyfivenm_io_ibuf \ENCODER_H2~input ( + .i(ENCODER_H2), + .ibar(gnd), + .nsleep(vcc), + .o(\ENCODER_H2~input_o )); +// synopsys translate_off +defparam \ENCODER_H2~input .bus_hold = "false"; +defparam \ENCODER_H2~input .listen_to_nsleep_signal = "false"; +defparam \ENCODER_H2~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y38_N14 +fiftyfivenm_lcell_comb \inst11|AB1[0]~feeder ( // Equation(s): -// \inst11|count[4]~25_combout = ((\inst11|Add1~7_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[3]~24 )))) # (GND) -// \inst11|count[4]~26 = CARRY((\inst11|Add1~7_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[3]~24 ))) # (!\inst11|Add1~7_combout & (\inst11|Add1~3_combout & !\inst11|count[3]~24 ))) +// \inst11|AB1[0]~feeder_combout = \ENCODER_H2~input_o - .dataa(\inst11|Add1~7_combout ), - .datab(\inst11|Add1~3_combout ), + .dataa(gnd), + .datab(gnd), .datac(gnd), - .datad(vcc), - .cin(\inst11|count[3]~24 ), - .combout(\inst11|count[4]~25_combout ), - .cout(\inst11|count[4]~26 )); + .datad(\ENCODER_H2~input_o ), + .cin(gnd), + .combout(\inst11|AB1[0]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[4]~25 .lut_mask = 16'h698E; -defparam \inst11|count[4]~25 .sum_lutc_input = "cin"; +defparam \inst11|AB1[0]~feeder .lut_mask = 16'hFF00; +defparam \inst11|AB1[0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N9 -dffeas \inst11|count[4] ( +// Location: FF_X46_Y38_N15 +dffeas \inst11|AB1[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[4]~25_combout ), + .d(\inst11|AB1[0]~feeder_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [4]), + .q(\inst11|AB1 [0]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[4] .is_wysiwyg = "true"; -defparam \inst11|count[4] .power_up = "low"; +defparam \inst11|AB1[0] .is_wysiwyg = "true"; +defparam \inst11|AB1[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N24 -fiftyfivenm_lcell_comb \inst11|Add1~7 ( -// Equation(s): -// \inst11|Add1~7_combout = (\inst10|state.Init~q & \inst11|count [4]) +// Location: FF_X51_Y38_N3 +dffeas \inst11|AB[0] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\inst11|AB1 [0]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst11|AB [0]), + .prn(vcc)); +// synopsys translate_off +defparam \inst11|AB[0] .is_wysiwyg = "true"; +defparam \inst11|AB[0] .power_up = "low"; +// synopsys translate_on - .dataa(gnd), - .datab(gnd), - .datac(\inst10|state.Init~q ), - .datad(\inst11|count [4]), - .cin(gnd), - .combout(\inst11|Add1~7_combout ), - .cout()); +// Location: IOIBUF_X34_Y0_N8 +fiftyfivenm_io_ibuf \ENCODER_H1~input ( + .i(ENCODER_H1), + .ibar(gnd), + .nsleep(vcc), + .o(\ENCODER_H1~input_o )); // synopsys translate_off -defparam \inst11|Add1~7 .lut_mask = 16'hF000; -defparam \inst11|Add1~7 .sum_lutc_input = "datac"; +defparam \ENCODER_H1~input .bus_hold = "false"; +defparam \ENCODER_H1~input .listen_to_nsleep_signal = "false"; +defparam \ENCODER_H1~input .simulate_z_as = "z"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N10 -fiftyfivenm_lcell_comb \inst11|count[5]~27 ( +// Location: LCCOMB_X46_Y38_N4 +fiftyfivenm_lcell_comb \inst11|AB1[1]~feeder ( // Equation(s): -// \inst11|count[5]~27_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~8_combout & (\inst11|count[4]~26 & VCC)) # (!\inst11|Add1~8_combout & (!\inst11|count[4]~26 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~8_combout & (!\inst11|count[4]~26 )) -// # (!\inst11|Add1~8_combout & ((\inst11|count[4]~26 ) # (GND))))) -// \inst11|count[5]~28 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~8_combout & !\inst11|count[4]~26 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[4]~26 ) # (!\inst11|Add1~8_combout )))) +// \inst11|AB1[1]~feeder_combout = \ENCODER_H1~input_o - .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~8_combout ), + .dataa(gnd), + .datab(gnd), .datac(gnd), - .datad(vcc), - .cin(\inst11|count[4]~26 ), - .combout(\inst11|count[5]~27_combout ), - .cout(\inst11|count[5]~28 )); + .datad(\ENCODER_H1~input_o ), + .cin(gnd), + .combout(\inst11|AB1[1]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[5]~27 .lut_mask = 16'h9617; -defparam \inst11|count[5]~27 .sum_lutc_input = "cin"; +defparam \inst11|AB1[1]~feeder .lut_mask = 16'hFF00; +defparam \inst11|AB1[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N11 -dffeas \inst11|count[5] ( +// Location: FF_X46_Y38_N5 +dffeas \inst11|AB1[1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[5]~27_combout ), + .d(\inst11|AB1[1]~feeder_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [5]), + .q(\inst11|AB1 [1]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[5] .is_wysiwyg = "true"; -defparam \inst11|count[5] .power_up = "low"; +defparam \inst11|AB1[1] .is_wysiwyg = "true"; +defparam \inst11|AB1[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y45_N4 -fiftyfivenm_lcell_comb \inst11|Add1~8 ( +// Location: FF_X51_Y38_N25 +dffeas \inst11|AB[1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\inst11|AB1 [1]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst11|AB [1]), + .prn(vcc)); +// synopsys translate_off +defparam \inst11|AB[1] .is_wysiwyg = "true"; +defparam \inst11|AB[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y38_N10 +fiftyfivenm_lcell_comb \inst11|Selector2~0 ( // Equation(s): -// \inst11|Add1~8_combout = (\inst10|state.Init~q & \inst11|count [5]) +// \inst11|Selector2~0_combout = (\inst11|AB [1] & ((\inst11|AB [0]) # ((\inst11|Selector4~0_combout & \inst10|state.Init~q )))) # (!\inst11|AB [1] & (((\inst10|state.Init~q )))) - .dataa(\inst10|state.Init~q ), - .datab(gnd), - .datac(\inst11|count [5]), - .datad(gnd), + .dataa(\inst11|AB [0]), + .datab(\inst11|Selector4~0_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst11|AB [1]), .cin(gnd), - .combout(\inst11|Add1~8_combout ), + .combout(\inst11|Selector2~0_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~8 .lut_mask = 16'hA0A0; -defparam \inst11|Add1~8 .sum_lutc_input = "datac"; +defparam \inst11|Selector2~0 .lut_mask = 16'hEAF0; +defparam \inst11|Selector2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N12 -fiftyfivenm_lcell_comb \inst11|count[6]~29 ( +// Location: LCCOMB_X51_Y38_N28 +fiftyfivenm_lcell_comb \inst11|Selector2~1 ( // Equation(s): -// \inst11|count[6]~29_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~9_combout $ (!\inst11|count[5]~28 )))) # (GND) -// \inst11|count[6]~30 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~9_combout ) # (!\inst11|count[5]~28 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~9_combout & !\inst11|count[5]~28 ))) +// \inst11|Selector2~1_combout = (\inst11|Selector2~0_combout & (((\inst11|state.AB_10~q & !\inst11|Selector4~1_combout )))) # (!\inst11|Selector2~0_combout & (\inst11|AB [1])) - .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~9_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst11|count[5]~28 ), - .combout(\inst11|count[6]~29_combout ), - .cout(\inst11|count[6]~30 )); + .dataa(\inst11|Selector2~0_combout ), + .datab(\inst11|AB [1]), + .datac(\inst11|state.AB_10~q ), + .datad(\inst11|Selector4~1_combout ), + .cin(gnd), + .combout(\inst11|Selector2~1_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[6]~29 .lut_mask = 16'h698E; -defparam \inst11|count[6]~29 .sum_lutc_input = "cin"; +defparam \inst11|Selector2~1 .lut_mask = 16'h44E4; +defparam \inst11|Selector2~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N13 -dffeas \inst11|count[6] ( +// Location: FF_X51_Y38_N29 +dffeas \inst11|state.AB_10 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[6]~29_combout ), + .d(\inst11|Selector2~1_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [6]), + .q(\inst11|state.AB_10~q ), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[6] .is_wysiwyg = "true"; -defparam \inst11|count[6] .power_up = "low"; +defparam \inst11|state.AB_10 .is_wysiwyg = "true"; +defparam \inst11|state.AB_10 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N14 -fiftyfivenm_lcell_comb \inst11|Add1~9 ( +// Location: LCCOMB_X51_Y38_N18 +fiftyfivenm_lcell_comb \inst11|Selector1~1 ( // Equation(s): -// \inst11|Add1~9_combout = (\inst10|state.Init~q & \inst11|count [6]) +// \inst11|Selector1~1_combout = (\inst11|state.AB_00~q ) # ((\inst11|state.AB_10~q ) # ((\inst11|state.AB_01~q ) # (!\inst10|state.Init~q ))) - .dataa(gnd), - .datab(gnd), + .dataa(\inst11|state.AB_00~q ), + .datab(\inst11|state.AB_10~q ), .datac(\inst10|state.Init~q ), - .datad(\inst11|count [6]), + .datad(\inst11|state.AB_01~q ), .cin(gnd), - .combout(\inst11|Add1~9_combout ), + .combout(\inst11|Selector1~1_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~9 .lut_mask = 16'hF000; -defparam \inst11|Add1~9 .sum_lutc_input = "datac"; +defparam \inst11|Selector1~1 .lut_mask = 16'hFFEF; +defparam \inst11|Selector1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N14 -fiftyfivenm_lcell_comb \inst11|count[7]~31 ( +// Location: LCCOMB_X51_Y38_N8 +fiftyfivenm_lcell_comb \inst11|Selector1~0 ( // Equation(s): -// \inst11|count[7]~31_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~10_combout & (\inst11|count[6]~30 & VCC)) # (!\inst11|Add1~10_combout & (!\inst11|count[6]~30 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~10_combout & (!\inst11|count[6]~30 -// )) # (!\inst11|Add1~10_combout & ((\inst11|count[6]~30 ) # (GND))))) -// \inst11|count[7]~32 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~10_combout & !\inst11|count[6]~30 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[6]~30 ) # (!\inst11|Add1~10_combout )))) +// \inst11|Selector1~0_combout = (\inst11|state.AB_00~q & (((\inst11|AB [0] & \inst11|AB [1])) # (!\inst11|Selector3~0_combout ))) - .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~10_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst11|count[6]~30 ), - .combout(\inst11|count[7]~31_combout ), - .cout(\inst11|count[7]~32 )); + .dataa(\inst11|Selector3~0_combout ), + .datab(\inst11|AB [0]), + .datac(\inst11|state.AB_00~q ), + .datad(\inst11|AB [1]), + .cin(gnd), + .combout(\inst11|Selector1~0_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[7]~31 .lut_mask = 16'h9617; -defparam \inst11|count[7]~31 .sum_lutc_input = "cin"; +defparam \inst11|Selector1~0 .lut_mask = 16'hD050; +defparam \inst11|Selector1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N15 -dffeas \inst11|count[7] ( +// Location: LCCOMB_X51_Y38_N30 +fiftyfivenm_lcell_comb \inst11|Selector1~2 ( +// Equation(s): +// \inst11|Selector1~2_combout = (\inst11|Selector1~0_combout ) # ((!\inst11|AB [0] & (\inst11|Selector1~1_combout & !\inst11|AB [1]))) + + .dataa(\inst11|AB [0]), + .datab(\inst11|Selector1~1_combout ), + .datac(\inst11|Selector1~0_combout ), + .datad(\inst11|AB [1]), + .cin(gnd), + .combout(\inst11|Selector1~2_combout ), + .cout()); +// synopsys translate_off +defparam \inst11|Selector1~2 .lut_mask = 16'hF0F4; +defparam \inst11|Selector1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y38_N31 +dffeas \inst11|state.AB_00 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[7]~31_combout ), + .d(\inst11|Selector1~2_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [7]), + .q(\inst11|state.AB_00~q ), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[7] .is_wysiwyg = "true"; -defparam \inst11|count[7] .power_up = "low"; +defparam \inst11|state.AB_00 .is_wysiwyg = "true"; +defparam \inst11|state.AB_00 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y38_N16 +fiftyfivenm_lcell_comb \inst11|Selector4~0 ( +// Equation(s): +// \inst11|Selector4~0_combout = (!\inst11|state.AB_11~q & !\inst11|state.AB_00~q ) + + .dataa(\inst11|state.AB_11~q ), + .datab(gnd), + .datac(\inst11|state.AB_00~q ), + .datad(gnd), + .cin(gnd), + .combout(\inst11|Selector4~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst11|Selector4~0 .lut_mask = 16'h0505; +defparam \inst11|Selector4~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y38_N12 +fiftyfivenm_lcell_comb \inst11|Selector4~1 ( +// Equation(s): +// \inst11|Selector4~1_combout = (\inst11|AB [0] & (\inst11|Selector4~0_combout $ (((!\inst11|AB [1]))))) # (!\inst11|AB [0] & ((\inst11|AB [1] & (!\inst11|Selector4~0_combout )) # (!\inst11|AB [1] & ((!\inst11|Selector3~0_combout ))))) + + .dataa(\inst11|AB [0]), + .datab(\inst11|Selector4~0_combout ), + .datac(\inst11|Selector3~0_combout ), + .datad(\inst11|AB [1]), + .cin(gnd), + .combout(\inst11|Selector4~1_combout ), + .cout()); +// synopsys translate_off +defparam \inst11|Selector4~1 .lut_mask = 16'h9927; +defparam \inst11|Selector4~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N28 -fiftyfivenm_lcell_comb \inst11|Add1~10 ( +// Location: LCCOMB_X51_Y38_N20 +fiftyfivenm_lcell_comb \inst11|Selector4~2 ( // Equation(s): -// \inst11|Add1~10_combout = (\inst10|state.Init~q & \inst11|count [7]) +// \inst11|Selector4~2_combout = (\inst11|AB [0] & (!\inst11|AB [1] & ((\inst11|state.AB_11~q ) # (\inst11|state.AB_00~q )))) - .dataa(gnd), - .datab(gnd), - .datac(\inst10|state.Init~q ), - .datad(\inst11|count [7]), + .dataa(\inst11|state.AB_11~q ), + .datab(\inst11|AB [0]), + .datac(\inst11|state.AB_00~q ), + .datad(\inst11|AB [1]), .cin(gnd), - .combout(\inst11|Add1~10_combout ), + .combout(\inst11|Selector4~2_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~10 .lut_mask = 16'hF000; -defparam \inst11|Add1~10 .sum_lutc_input = "datac"; +defparam \inst11|Selector4~2 .lut_mask = 16'h00C8; +defparam \inst11|Selector4~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N16 -fiftyfivenm_lcell_comb \inst11|count[8]~33 ( +// Location: LCCOMB_X51_Y38_N22 +fiftyfivenm_lcell_comb \inst11|Selector4~3 ( // Equation(s): -// \inst11|count[8]~33_combout = ((\inst11|Add1~11_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[7]~32 )))) # (GND) -// \inst11|count[8]~34 = CARRY((\inst11|Add1~11_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[7]~32 ))) # (!\inst11|Add1~11_combout & (\inst11|Add1~3_combout & !\inst11|count[7]~32 ))) +// \inst11|Selector4~3_combout = (\inst11|Selector4~1_combout & (\inst11|Selector4~2_combout )) # (!\inst11|Selector4~1_combout & ((\inst11|state.AB_01~q ))) - .dataa(\inst11|Add1~11_combout ), - .datab(\inst11|Add1~3_combout ), + .dataa(\inst11|Selector4~1_combout ), + .datab(\inst11|Selector4~2_combout ), .datac(gnd), - .datad(vcc), - .cin(\inst11|count[7]~32 ), - .combout(\inst11|count[8]~33_combout ), - .cout(\inst11|count[8]~34 )); + .datad(\inst11|state.AB_01~q ), + .cin(gnd), + .combout(\inst11|Selector4~3_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[8]~33 .lut_mask = 16'h698E; -defparam \inst11|count[8]~33 .sum_lutc_input = "cin"; +defparam \inst11|Selector4~3 .lut_mask = 16'hDD88; +defparam \inst11|Selector4~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N17 -dffeas \inst11|count[8] ( +// Location: LCCOMB_X51_Y38_N6 +fiftyfivenm_lcell_comb \inst11|Selector4~4 ( +// Equation(s): +// \inst11|Selector4~4_combout = (\inst10|state.Init~q & (\inst11|Selector4~3_combout )) # (!\inst10|state.Init~q & (\inst11|AB [0] & ((\inst11|Selector4~3_combout ) # (!\inst11|AB [1])))) + + .dataa(\inst11|Selector4~3_combout ), + .datab(\inst11|AB [0]), + .datac(\inst10|state.Init~q ), + .datad(\inst11|AB [1]), + .cin(gnd), + .combout(\inst11|Selector4~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst11|Selector4~4 .lut_mask = 16'hA8AC; +defparam \inst11|Selector4~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y38_N7 +dffeas \inst11|state.AB_01 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[8]~33_combout ), + .d(\inst11|Selector4~4_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [8]), + .q(\inst11|state.AB_01~q ), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[8] .is_wysiwyg = "true"; -defparam \inst11|count[8] .power_up = "low"; +defparam \inst11|state.AB_01 .is_wysiwyg = "true"; +defparam \inst11|state.AB_01 .power_up = "low"; // synopsys translate_on -// Location: IOIBUF_X56_Y54_N1 -fiftyfivenm_io_ibuf \SW[8]~input ( - .i(SW[8]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[8]~input_o )); -// synopsys translate_off -defparam \SW[8]~input .bus_hold = "false"; -defparam \SW[8]~input .listen_to_nsleep_signal = "false"; -defparam \SW[8]~input .simulate_z_as = "z"; -// synopsys translate_on +// Location: LCCOMB_X51_Y38_N0 +fiftyfivenm_lcell_comb \inst11|Selector3~0 ( +// Equation(s): +// \inst11|Selector3~0_combout = (!\inst11|state.AB_01~q & !\inst11|state.AB_10~q ) -// Location: FF_X50_Y42_N13 -dffeas \inst7|B_DI[8] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\SW[8]~input_o ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst7|B_DI [8]), - .prn(vcc)); + .dataa(\inst11|state.AB_01~q ), + .datab(gnd), + .datac(gnd), + .datad(\inst11|state.AB_10~q ), + .cin(gnd), + .combout(\inst11|Selector3~0_combout ), + .cout()); // synopsys translate_off -defparam \inst7|B_DI[8] .is_wysiwyg = "true"; -defparam \inst7|B_DI[8] .power_up = "low"; +defparam \inst11|Selector3~0 .lut_mask = 16'h0055; +defparam \inst11|Selector3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N12 -fiftyfivenm_lcell_comb \inst13|inst1[8]~56 ( +// Location: LCCOMB_X51_Y38_N4 +fiftyfivenm_lcell_comb \inst11|Selector3~1 ( // Equation(s): -// \inst13|inst1[8]~56_combout = (\inst11|count [8] & (((\inst7|B_DI [8]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst11|count [8] & (!\inst11|tri_enable~combout & ((\inst7|B_DI [8]) # (!\inst3|SWITCH_EN~combout )))) +// \inst11|Selector3~1_combout = (\inst10|state.Init~q & (!\inst11|Selector3~0_combout )) # (!\inst10|state.Init~q & ((\inst11|AB [0] $ (!\inst11|AB [1])))) - .dataa(\inst11|count [8]), - .datab(\inst11|tri_enable~combout ), - .datac(\inst7|B_DI [8]), - .datad(\inst3|SWITCH_EN~combout ), + .dataa(\inst11|Selector3~0_combout ), + .datab(\inst11|AB [0]), + .datac(\inst10|state.Init~q ), + .datad(\inst11|AB [1]), .cin(gnd), - .combout(\inst13|inst1[8]~56_combout ), + .combout(\inst11|Selector3~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[8]~56 .lut_mask = 16'hB0BB; -defparam \inst13|inst1[8]~56 .sum_lutc_input = "datac"; +defparam \inst11|Selector3~1 .lut_mask = 16'h5C53; +defparam \inst11|Selector3~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N4 -fiftyfivenm_lcell_comb \inst10|tri_enable ( +// Location: LCCOMB_X51_Y38_N14 +fiftyfivenm_lcell_comb \inst11|Selector3~3 ( // Equation(s): -// \inst10|tri_enable~combout = (\inst11|tri_enable~1_combout & !\inst|IR [0]) +// \inst11|Selector3~3_combout = (\inst11|state.AB_11~q & (!\inst11|state.AB_10~q & (\inst10|state.Init~q & !\inst11|state.AB_01~q ))) - .dataa(\inst11|tri_enable~1_combout ), - .datab(gnd), - .datac(gnd), - .datad(\inst|IR [0]), + .dataa(\inst11|state.AB_11~q ), + .datab(\inst11|state.AB_10~q ), + .datac(\inst10|state.Init~q ), + .datad(\inst11|state.AB_01~q ), .cin(gnd), - .combout(\inst10|tri_enable~combout ), + .combout(\inst11|Selector3~3_combout ), .cout()); // synopsys translate_off -defparam \inst10|tri_enable .lut_mask = 16'h00AA; -defparam \inst10|tri_enable .sum_lutc_input = "datac"; +defparam \inst11|Selector3~3 .lut_mask = 16'h0020; +defparam \inst11|Selector3~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N14 -fiftyfivenm_lcell_comb \inst10|count[7]~31 ( +// Location: LCCOMB_X54_Y40_N4 +fiftyfivenm_lcell_comb \inst11|Selector3~2 ( // Equation(s): -// \inst10|count[7]~31_combout = (\inst10|count [7] & (!\inst10|count[6]~30 )) # (!\inst10|count [7] & ((\inst10|count[6]~30 ) # (GND))) -// \inst10|count[7]~32 = CARRY((!\inst10|count[6]~30 ) # (!\inst10|count [7])) +// \inst11|Selector3~2_combout = (\inst11|AB [1] & ((\inst11|AB [0]) # (\inst11|state.AB_11~q ))) # (!\inst11|AB [1] & (\inst11|AB [0] & \inst11|state.AB_11~q )) - .dataa(gnd), - .datab(\inst10|count [7]), + .dataa(\inst11|AB [1]), + .datab(\inst11|AB [0]), .datac(gnd), - .datad(vcc), - .cin(\inst10|count[6]~30 ), - .combout(\inst10|count[7]~31_combout ), - .cout(\inst10|count[7]~32 )); + .datad(\inst11|state.AB_11~q ), + .cin(gnd), + .combout(\inst11|Selector3~2_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[7]~31 .lut_mask = 16'h3C3F; -defparam \inst10|count[7]~31 .sum_lutc_input = "cin"; +defparam \inst11|Selector3~2 .lut_mask = 16'hEE88; +defparam \inst11|Selector3~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N15 -dffeas \inst10|count[7] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[7]~31_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst10|count [7]), - .prn(vcc)); +// Location: LCCOMB_X54_Y40_N12 +fiftyfivenm_lcell_comb \inst11|Selector20~0 ( +// Equation(s): +// \inst11|Selector20~0_combout = \inst11|AB [1] $ (\inst11|AB [0]) + + .dataa(\inst11|AB [1]), + .datab(gnd), + .datac(gnd), + .datad(\inst11|AB [0]), + .cin(gnd), + .combout(\inst11|Selector20~0_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[7] .is_wysiwyg = "true"; -defparam \inst10|count[7] .power_up = "low"; +defparam \inst11|Selector20~0 .lut_mask = 16'h55AA; +defparam \inst11|Selector20~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N16 -fiftyfivenm_lcell_comb \inst10|count[8]~33 ( +// Location: LCCOMB_X54_Y40_N6 +fiftyfivenm_lcell_comb \inst11|Selector3~4 ( // Equation(s): -// \inst10|count[8]~33_combout = (\inst10|count [8] & (\inst10|count[7]~32 $ (GND))) # (!\inst10|count [8] & (!\inst10|count[7]~32 & VCC)) -// \inst10|count[8]~34 = CARRY((\inst10|count [8] & !\inst10|count[7]~32 )) +// \inst11|Selector3~4_combout = (\inst11|Selector3~1_combout & ((\inst11|Selector3~2_combout ) # ((\inst11|Selector3~3_combout & !\inst11|Selector20~0_combout )))) # (!\inst11|Selector3~1_combout & (\inst11|Selector3~3_combout & +// ((!\inst11|Selector20~0_combout )))) - .dataa(gnd), - .datab(\inst10|count [8]), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[7]~32 ), - .combout(\inst10|count[8]~33_combout ), - .cout(\inst10|count[8]~34 )); + .dataa(\inst11|Selector3~1_combout ), + .datab(\inst11|Selector3~3_combout ), + .datac(\inst11|Selector3~2_combout ), + .datad(\inst11|Selector20~0_combout ), + .cin(gnd), + .combout(\inst11|Selector3~4_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[8]~33 .lut_mask = 16'hC30C; -defparam \inst10|count[8]~33 .sum_lutc_input = "cin"; +defparam \inst11|Selector3~4 .lut_mask = 16'hA0EC; +defparam \inst11|Selector3~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N17 -dffeas \inst10|count[8] ( +// Location: FF_X54_Y40_N7 +dffeas \inst11|state.AB_11 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[8]~33_combout ), + .d(\inst11|Selector3~4_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [8]), + .q(\inst11|state.AB_11~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[8] .is_wysiwyg = "true"; -defparam \inst10|count[8] .power_up = "low"; +defparam \inst11|state.AB_11 .is_wysiwyg = "true"; +defparam \inst11|state.AB_11 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N16 -fiftyfivenm_lcell_comb \inst13|inst1[8]~57 ( +// Location: LCCOMB_X51_Y38_N24 +fiftyfivenm_lcell_comb \inst11|Add1~1 ( // Equation(s): -// \inst13|inst1[8]~57_combout = (!\inst13|inst4~combout & (\inst13|inst1[8]~56_combout & ((\inst10|count [8]) # (!\inst10|tri_enable~combout )))) +// \inst11|Add1~1_combout = (\inst11|AB [0] & (\inst11|state.AB_11~q )) # (!\inst11|AB [0] & (!\inst11|AB [1] & ((\inst11|state.AB_11~q ) # (\inst11|state.AB_01~q )))) - .dataa(\inst13|inst4~combout ), - .datab(\inst13|inst1[8]~56_combout ), - .datac(\inst10|tri_enable~combout ), - .datad(\inst10|count [8]), + .dataa(\inst11|state.AB_11~q ), + .datab(\inst11|AB [0]), + .datac(\inst11|AB [1]), + .datad(\inst11|state.AB_01~q ), .cin(gnd), - .combout(\inst13|inst1[8]~57_combout ), + .combout(\inst11|Add1~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[8]~57 .lut_mask = 16'h4404; -defparam \inst13|inst1[8]~57 .sum_lutc_input = "datac"; +defparam \inst11|Add1~1 .lut_mask = 16'h8B8A; +defparam \inst11|Add1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N18 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~1 ( +// Location: LCCOMB_X51_Y38_N2 +fiftyfivenm_lcell_comb \inst11|Add1~2 ( // Equation(s): -// \inst13|inst|Decoder0~1_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst11|Add1~2_combout = (\inst11|AB [0] & (((\inst11|state.AB_10~q )))) # (!\inst11|AB [0] & (\inst11|AB [1] & ((\inst11|state.AB_00~q ) # (\inst11|state.AB_10~q )))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(\inst11|state.AB_00~q ), + .datab(\inst11|state.AB_10~q ), + .datac(\inst11|AB [0]), + .datad(\inst11|AB [1]), .cin(gnd), - .combout(\inst13|inst|Decoder0~1_combout ), + .combout(\inst11|Add1~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~1 .lut_mask = 16'h8000; -defparam \inst13|inst|Decoder0~1 .sum_lutc_input = "datac"; +defparam \inst11|Add1~2 .lut_mask = 16'hCEC0; +defparam \inst11|Add1~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N20 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[0]~0 ( +// Location: LCCOMB_X65_Y38_N26 +fiftyfivenm_lcell_comb \inst11|Add1~3 ( // Equation(s): -// \inst13|inst|data_rx[0]~0_combout = (\inst13|inst|Decoder0~1_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~1_combout & ((\inst13|inst|data_rx [0]))) +// \inst11|Add1~3_combout = (\inst11|Add1~1_combout ) # (\inst11|Add1~2_combout ) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [0]), - .datad(\inst13|inst|Decoder0~1_combout ), + .dataa(gnd), + .datab(\inst11|Add1~1_combout ), + .datac(gnd), + .datad(\inst11|Add1~2_combout ), .cin(gnd), - .combout(\inst13|inst|data_rx[0]~0_combout ), + .combout(\inst11|Add1~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[0]~0 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[0]~0 .sum_lutc_input = "datac"; +defparam \inst11|Add1~3 .lut_mask = 16'hFFCC; +defparam \inst11|Add1~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X47_Y38_N21 -dffeas \inst13|inst|data_rx[0] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[0]~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rx [0]), - .prn(vcc)); +// Location: LCCOMB_X60_Y35_N0 +fiftyfivenm_lcell_comb \inst11|count[0]~16 ( +// Equation(s): +// \inst11|count[0]~16_combout = (\inst10|state.Init~q & (\inst11|Add1~0_combout $ (VCC))) # (!\inst10|state.Init~q & (\inst11|Add1~0_combout & VCC)) +// \inst11|count[0]~17 = CARRY((\inst10|state.Init~q & \inst11|Add1~0_combout )) + + .dataa(\inst10|state.Init~q ), + .datab(\inst11|Add1~0_combout ), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\inst11|count[0]~16_combout ), + .cout(\inst11|count[0]~17 )); // synopsys translate_off -defparam \inst13|inst|data_rx[0] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[0] .power_up = "low"; +defparam \inst11|count[0]~16 .lut_mask = 16'h6688; +defparam \inst11|count[0]~16 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N4 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[0]~feeder ( +// Location: LCCOMB_X51_Y38_N26 +fiftyfivenm_lcell_comb \inst11|count[7]~18 ( // Equation(s): -// \inst13|inst|data_rd[0]~feeder_combout = \inst13|inst|data_rx [0] +// \inst11|count[7]~18_combout = (\inst10|state.Init~q & ((\inst11|Selector20~0_combout & ((!\inst11|Selector4~0_combout ))) # (!\inst11|Selector20~0_combout & (!\inst11|Selector3~0_combout )))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst|data_rx [0]), + .dataa(\inst11|Selector20~0_combout ), + .datab(\inst11|Selector3~0_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst11|Selector4~0_combout ), .cin(gnd), - .combout(\inst13|inst|data_rd[0]~feeder_combout ), + .combout(\inst11|count[7]~18_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[0]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|data_rd[0]~feeder .sum_lutc_input = "datac"; +defparam \inst11|count[7]~18 .lut_mask = 16'h10B0; +defparam \inst11|count[7]~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N5 -dffeas \inst13|inst|data_rd[0] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[0]~feeder_combout ), +// Location: FF_X60_Y35_N1 +dffeas \inst11|count[0] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[0]~16_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst|state~14_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rd [0]), + .q(\inst11|count [0]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rd[0] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[0] .power_up = "low"; +defparam \inst11|count[0] .is_wysiwyg = "true"; +defparam \inst11|count[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y38_N28 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~5 ( +// Location: LCCOMB_X59_Y35_N24 +fiftyfivenm_lcell_comb \inst11|Add1~0 ( // Equation(s): -// \inst13|inst|Decoder0~5_combout = (!\inst13|inst|bit_cnt [2] & (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & \inst13|inst|Decoder0~0_combout ))) +// \inst11|Add1~0_combout = (\inst10|state.Init~q & \inst11|count [0]) - .dataa(\inst13|inst|bit_cnt [2]), - .datab(\inst13|inst|bit_cnt [0]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(\inst10|state.Init~q ), + .datab(gnd), + .datac(\inst11|count [0]), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst|Decoder0~5_combout ), + .combout(\inst11|Add1~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~5 .lut_mask = 16'h4000; -defparam \inst13|inst|Decoder0~5 .sum_lutc_input = "datac"; +defparam \inst11|Add1~0 .lut_mask = 16'hA0A0; +defparam \inst11|Add1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y38_N24 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[4]~4 ( +// Location: LCCOMB_X60_Y35_N2 +fiftyfivenm_lcell_comb \inst11|count[1]~19 ( // Equation(s): -// \inst13|inst|data_rx[4]~4_combout = (\inst13|inst|Decoder0~5_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~5_combout & ((\inst13|inst|data_rx [4]))) +// \inst11|count[1]~19_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~4_combout & (\inst11|count[0]~17 & VCC)) # (!\inst11|Add1~4_combout & (!\inst11|count[0]~17 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~4_combout & (!\inst11|count[0]~17 )) +// # (!\inst11|Add1~4_combout & ((\inst11|count[0]~17 ) # (GND))))) +// \inst11|count[1]~20 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~4_combout & !\inst11|count[0]~17 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[0]~17 ) # (!\inst11|Add1~4_combout )))) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [4]), - .datad(\inst13|inst|Decoder0~5_combout ), - .cin(gnd), - .combout(\inst13|inst|data_rx[4]~4_combout ), - .cout()); + .dataa(\inst11|Add1~3_combout ), + .datab(\inst11|Add1~4_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[0]~17 ), + .combout(\inst11|count[1]~19_combout ), + .cout(\inst11|count[1]~20 )); // synopsys translate_off -defparam \inst13|inst|data_rx[4]~4 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[4]~4 .sum_lutc_input = "datac"; +defparam \inst11|count[1]~19 .lut_mask = 16'h9617; +defparam \inst11|count[1]~19 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X46_Y38_N25 -dffeas \inst13|inst|data_rx[4] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[4]~4_combout ), +// Location: FF_X60_Y35_N3 +dffeas \inst11|count[1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[1]~19_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rx [4]), + .q(\inst11|count [1]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rx[4] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[4] .power_up = "low"; +defparam \inst11|count[1] .is_wysiwyg = "true"; +defparam \inst11|count[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N20 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[4]~feeder ( +// Location: LCCOMB_X59_Y35_N30 +fiftyfivenm_lcell_comb \inst11|Add1~4 ( // Equation(s): -// \inst13|inst|data_rd[4]~feeder_combout = \inst13|inst|data_rx [4] +// \inst11|Add1~4_combout = (\inst10|state.Init~q & \inst11|count [1]) .dataa(gnd), .datab(gnd), - .datac(\inst13|inst|data_rx [4]), - .datad(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [1]), .cin(gnd), - .combout(\inst13|inst|data_rd[4]~feeder_combout ), + .combout(\inst11|Add1~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[4]~feeder .lut_mask = 16'hF0F0; -defparam \inst13|inst|data_rd[4]~feeder .sum_lutc_input = "datac"; +defparam \inst11|Add1~4 .lut_mask = 16'hF000; +defparam \inst11|Add1~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N21 -dffeas \inst13|inst|data_rd[4] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[4]~feeder_combout ), +// Location: LCCOMB_X60_Y35_N4 +fiftyfivenm_lcell_comb \inst11|count[2]~21 ( +// Equation(s): +// \inst11|count[2]~21_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~5_combout $ (!\inst11|count[1]~20 )))) # (GND) +// \inst11|count[2]~22 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~5_combout ) # (!\inst11|count[1]~20 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~5_combout & !\inst11|count[1]~20 ))) + + .dataa(\inst11|Add1~3_combout ), + .datab(\inst11|Add1~5_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[1]~20 ), + .combout(\inst11|count[2]~21_combout ), + .cout(\inst11|count[2]~22 )); +// synopsys translate_off +defparam \inst11|count[2]~21 .lut_mask = 16'h698E; +defparam \inst11|count[2]~21 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X60_Y35_N5 +dffeas \inst11|count[2] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[2]~21_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst|state~14_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rd [4]), + .q(\inst11|count [2]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rd[4] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[4] .power_up = "low"; +defparam \inst11|count[2] .is_wysiwyg = "true"; +defparam \inst11|count[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N28 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[12]~15 ( +// Location: LCCOMB_X59_Y35_N4 +fiftyfivenm_lcell_comb \inst11|Add1~5 ( // Equation(s): -// \inst13|inst14|data_out[12]~15_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [4]))) +// \inst11|Add1~5_combout = (\inst10|state.Init~q & \inst11|count [2]) - .dataa(\inst13|inst14|prev_busy~q ), - .datab(\inst13|inst|busy~q ), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst|data_rd [4]), + .dataa(gnd), + .datab(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [2]), .cin(gnd), - .combout(\inst13|inst14|data_out[12]~15_combout ), + .combout(\inst11|Add1~5_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[12]~15 .lut_mask = 16'h2000; -defparam \inst13|inst14|data_out[12]~15 .sum_lutc_input = "datac"; +defparam \inst11|Add1~5 .lut_mask = 16'hF000; +defparam \inst11|Add1~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N6 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[15]~11 ( +// Location: LCCOMB_X60_Y35_N6 +fiftyfivenm_lcell_comb \inst11|count[3]~23 ( // Equation(s): -// \inst13|inst14|data_out[15]~11_combout = (\inst13|inst14|data_out[7]~0_combout & ((\inst13|inst14|tx_addr[7]~0_combout ) # ((\inst13|inst14|state.Rx2~q & \inst13|inst14|state_machine~0_combout )))) +// \inst11|count[3]~23_combout = (\inst11|Add1~6_combout & ((\inst11|Add1~3_combout & (\inst11|count[2]~22 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[2]~22 )))) # (!\inst11|Add1~6_combout & ((\inst11|Add1~3_combout & (!\inst11|count[2]~22 )) +// # (!\inst11|Add1~3_combout & ((\inst11|count[2]~22 ) # (GND))))) +// \inst11|count[3]~24 = CARRY((\inst11|Add1~6_combout & (!\inst11|Add1~3_combout & !\inst11|count[2]~22 )) # (!\inst11|Add1~6_combout & ((!\inst11|count[2]~22 ) # (!\inst11|Add1~3_combout )))) - .dataa(\inst13|inst14|state.Rx2~q ), - .datab(\inst13|inst14|data_out[7]~0_combout ), - .datac(\inst13|inst14|state_machine~0_combout ), - .datad(\inst13|inst14|tx_addr[7]~0_combout ), - .cin(gnd), - .combout(\inst13|inst14|data_out[15]~11_combout ), - .cout()); + .dataa(\inst11|Add1~6_combout ), + .datab(\inst11|Add1~3_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[2]~22 ), + .combout(\inst11|count[3]~23_combout ), + .cout(\inst11|count[3]~24 )); // synopsys translate_off -defparam \inst13|inst14|data_out[15]~11 .lut_mask = 16'hCC80; -defparam \inst13|inst14|data_out[15]~11 .sum_lutc_input = "datac"; +defparam \inst11|count[3]~23 .lut_mask = 16'h9617; +defparam \inst11|count[3]~23 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X51_Y38_N29 -dffeas \inst13|inst14|data_out[12] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[12]~15_combout ), +// Location: FF_X60_Y35_N7 +dffeas \inst11|count[3] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[3]~23_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[15]~11_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [12]), + .q(\inst11|count [3]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[12] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[12] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y41_N0 -fiftyfivenm_lcell_comb \inst13|inst1[12]~76 ( -// Equation(s): -// \inst13|inst1[12]~76_combout = (\inst|IO_WRITE_int~q & (\inst|AC [12])) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [12]) # (!\inst3|I2C_DATA_EN~combout )))) - - .dataa(\inst|AC [12]), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst|IO_WRITE_int~q ), - .datad(\inst13|inst14|data_out [12]), - .cin(gnd), - .combout(\inst13|inst1[12]~76_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[12]~76 .lut_mask = 16'hAFA3; -defparam \inst13|inst1[12]~76 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y41_N20 -fiftyfivenm_lcell_comb \inst13|inst1[12]~74 ( -// Equation(s): -// \inst13|inst1[12]~74_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [12]) # (!\inst4|IO_OUT~combout )))) - - .dataa(\inst13|inst4~combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst3|SWITCH_EN~combout ), - .datad(\inst4|COUNT [12]), - .cin(gnd), - .combout(\inst13|inst1[12]~74_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[12]~74 .lut_mask = 16'h0501; -defparam \inst13|inst1[12]~74 .sum_lutc_input = "datac"; +defparam \inst11|count[3] .is_wysiwyg = "true"; +defparam \inst11|count[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N18 -fiftyfivenm_lcell_comb \inst11|Add1~15 ( +// Location: LCCOMB_X59_Y35_N16 +fiftyfivenm_lcell_comb \inst11|Add1~6 ( // Equation(s): -// \inst11|Add1~15_combout = (\inst11|count [12] & \inst10|state.Init~q ) +// \inst11|Add1~6_combout = (\inst10|state.Init~q & \inst11|count [3]) - .dataa(\inst11|count [12]), + .dataa(gnd), .datab(gnd), .datac(\inst10|state.Init~q ), - .datad(gnd), + .datad(\inst11|count [3]), .cin(gnd), - .combout(\inst11|Add1~15_combout ), + .combout(\inst11|Add1~6_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~15 .lut_mask = 16'hA0A0; -defparam \inst11|Add1~15 .sum_lutc_input = "datac"; +defparam \inst11|Add1~6 .lut_mask = 16'hF000; +defparam \inst11|Add1~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N18 -fiftyfivenm_lcell_comb \inst11|count[9]~35 ( +// Location: LCCOMB_X60_Y35_N8 +fiftyfivenm_lcell_comb \inst11|count[4]~25 ( // Equation(s): -// \inst11|count[9]~35_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~12_combout & (\inst11|count[8]~34 & VCC)) # (!\inst11|Add1~12_combout & (!\inst11|count[8]~34 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~12_combout & (!\inst11|count[8]~34 -// )) # (!\inst11|Add1~12_combout & ((\inst11|count[8]~34 ) # (GND))))) -// \inst11|count[9]~36 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~12_combout & !\inst11|count[8]~34 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[8]~34 ) # (!\inst11|Add1~12_combout )))) +// \inst11|count[4]~25_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~7_combout $ (!\inst11|count[3]~24 )))) # (GND) +// \inst11|count[4]~26 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~7_combout ) # (!\inst11|count[3]~24 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~7_combout & !\inst11|count[3]~24 ))) .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~12_combout ), + .datab(\inst11|Add1~7_combout ), .datac(gnd), .datad(vcc), - .cin(\inst11|count[8]~34 ), - .combout(\inst11|count[9]~35_combout ), - .cout(\inst11|count[9]~36 )); + .cin(\inst11|count[3]~24 ), + .combout(\inst11|count[4]~25_combout ), + .cout(\inst11|count[4]~26 )); // synopsys translate_off -defparam \inst11|count[9]~35 .lut_mask = 16'h9617; -defparam \inst11|count[9]~35 .sum_lutc_input = "cin"; +defparam \inst11|count[4]~25 .lut_mask = 16'h698E; +defparam \inst11|count[4]~25 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y45_N19 -dffeas \inst11|count[9] ( +// Location: FF_X60_Y35_N9 +dffeas \inst11|count[4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[9]~35_combout ), + .d(\inst11|count[4]~25_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [9]), + .q(\inst11|count [4]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[9] .is_wysiwyg = "true"; -defparam \inst11|count[9] .power_up = "low"; +defparam \inst11|count[4] .is_wysiwyg = "true"; +defparam \inst11|count[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N22 -fiftyfivenm_lcell_comb \inst11|Add1~12 ( +// Location: LCCOMB_X59_Y35_N22 +fiftyfivenm_lcell_comb \inst11|Add1~7 ( // Equation(s): -// \inst11|Add1~12_combout = (\inst11|count [9] & \inst10|state.Init~q ) +// \inst11|Add1~7_combout = (\inst10|state.Init~q & \inst11|count [4]) - .dataa(\inst11|count [9]), + .dataa(\inst10|state.Init~q ), .datab(gnd), - .datac(gnd), - .datad(\inst10|state.Init~q ), + .datac(\inst11|count [4]), + .datad(gnd), .cin(gnd), - .combout(\inst11|Add1~12_combout ), + .combout(\inst11|Add1~7_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~12 .lut_mask = 16'hAA00; -defparam \inst11|Add1~12 .sum_lutc_input = "datac"; +defparam \inst11|Add1~7 .lut_mask = 16'hA0A0; +defparam \inst11|Add1~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N20 -fiftyfivenm_lcell_comb \inst11|count[10]~37 ( +// Location: LCCOMB_X60_Y35_N10 +fiftyfivenm_lcell_comb \inst11|count[5]~27 ( // Equation(s): -// \inst11|count[10]~37_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~13_combout $ (!\inst11|count[9]~36 )))) # (GND) -// \inst11|count[10]~38 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~13_combout ) # (!\inst11|count[9]~36 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~13_combout & !\inst11|count[9]~36 ))) +// \inst11|count[5]~27_combout = (\inst11|Add1~8_combout & ((\inst11|Add1~3_combout & (\inst11|count[4]~26 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[4]~26 )))) # (!\inst11|Add1~8_combout & ((\inst11|Add1~3_combout & (!\inst11|count[4]~26 )) +// # (!\inst11|Add1~3_combout & ((\inst11|count[4]~26 ) # (GND))))) +// \inst11|count[5]~28 = CARRY((\inst11|Add1~8_combout & (!\inst11|Add1~3_combout & !\inst11|count[4]~26 )) # (!\inst11|Add1~8_combout & ((!\inst11|count[4]~26 ) # (!\inst11|Add1~3_combout )))) - .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~13_combout ), + .dataa(\inst11|Add1~8_combout ), + .datab(\inst11|Add1~3_combout ), .datac(gnd), .datad(vcc), - .cin(\inst11|count[9]~36 ), - .combout(\inst11|count[10]~37_combout ), - .cout(\inst11|count[10]~38 )); + .cin(\inst11|count[4]~26 ), + .combout(\inst11|count[5]~27_combout ), + .cout(\inst11|count[5]~28 )); // synopsys translate_off -defparam \inst11|count[10]~37 .lut_mask = 16'h698E; -defparam \inst11|count[10]~37 .sum_lutc_input = "cin"; +defparam \inst11|count[5]~27 .lut_mask = 16'h9617; +defparam \inst11|count[5]~27 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y45_N21 -dffeas \inst11|count[10] ( +// Location: FF_X60_Y35_N11 +dffeas \inst11|count[5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[10]~37_combout ), + .d(\inst11|count[5]~27_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [10]), + .q(\inst11|count [5]), .prn(vcc)); -// synopsys translate_off -defparam \inst11|count[10] .is_wysiwyg = "true"; -defparam \inst11|count[10] .power_up = "low"; +// synopsys translate_off +defparam \inst11|count[5] .is_wysiwyg = "true"; +defparam \inst11|count[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N10 -fiftyfivenm_lcell_comb \inst11|Add1~13 ( +// Location: LCCOMB_X59_Y35_N12 +fiftyfivenm_lcell_comb \inst11|Add1~8 ( // Equation(s): -// \inst11|Add1~13_combout = (\inst11|count [10] & \inst10|state.Init~q ) +// \inst11|Add1~8_combout = (\inst10|state.Init~q & \inst11|count [5]) - .dataa(\inst11|count [10]), + .dataa(\inst10|state.Init~q ), .datab(gnd), - .datac(\inst10|state.Init~q ), + .datac(\inst11|count [5]), .datad(gnd), .cin(gnd), - .combout(\inst11|Add1~13_combout ), + .combout(\inst11|Add1~8_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~13 .lut_mask = 16'hA0A0; -defparam \inst11|Add1~13 .sum_lutc_input = "datac"; +defparam \inst11|Add1~8 .lut_mask = 16'hA0A0; +defparam \inst11|Add1~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N22 -fiftyfivenm_lcell_comb \inst11|count[11]~39 ( +// Location: LCCOMB_X60_Y35_N12 +fiftyfivenm_lcell_comb \inst11|count[6]~29 ( // Equation(s): -// \inst11|count[11]~39_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~14_combout & (\inst11|count[10]~38 & VCC)) # (!\inst11|Add1~14_combout & (!\inst11|count[10]~38 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~14_combout & -// (!\inst11|count[10]~38 )) # (!\inst11|Add1~14_combout & ((\inst11|count[10]~38 ) # (GND))))) -// \inst11|count[11]~40 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~14_combout & !\inst11|count[10]~38 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[10]~38 ) # (!\inst11|Add1~14_combout )))) +// \inst11|count[6]~29_combout = ((\inst11|Add1~9_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[5]~28 )))) # (GND) +// \inst11|count[6]~30 = CARRY((\inst11|Add1~9_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[5]~28 ))) # (!\inst11|Add1~9_combout & (\inst11|Add1~3_combout & !\inst11|count[5]~28 ))) - .dataa(\inst11|Add1~3_combout ), - .datab(\inst11|Add1~14_combout ), + .dataa(\inst11|Add1~9_combout ), + .datab(\inst11|Add1~3_combout ), .datac(gnd), .datad(vcc), - .cin(\inst11|count[10]~38 ), - .combout(\inst11|count[11]~39_combout ), - .cout(\inst11|count[11]~40 )); + .cin(\inst11|count[5]~28 ), + .combout(\inst11|count[6]~29_combout ), + .cout(\inst11|count[6]~30 )); // synopsys translate_off -defparam \inst11|count[11]~39 .lut_mask = 16'h9617; -defparam \inst11|count[11]~39 .sum_lutc_input = "cin"; +defparam \inst11|count[6]~29 .lut_mask = 16'h698E; +defparam \inst11|count[6]~29 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y45_N23 -dffeas \inst11|count[11] ( +// Location: FF_X60_Y35_N13 +dffeas \inst11|count[6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[11]~39_combout ), + .d(\inst11|count[6]~29_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [11]), + .q(\inst11|count [6]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[11] .is_wysiwyg = "true"; -defparam \inst11|count[11] .power_up = "low"; +defparam \inst11|count[6] .is_wysiwyg = "true"; +defparam \inst11|count[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N10 -fiftyfivenm_lcell_comb \inst11|Add1~14 ( +// Location: LCCOMB_X59_Y35_N14 +fiftyfivenm_lcell_comb \inst11|Add1~9 ( // Equation(s): -// \inst11|Add1~14_combout = (\inst10|state.Init~q & \inst11|count [11]) +// \inst11|Add1~9_combout = (\inst10|state.Init~q & \inst11|count [6]) .dataa(\inst10|state.Init~q ), .datab(gnd), - .datac(gnd), - .datad(\inst11|count [11]), + .datac(\inst11|count [6]), + .datad(gnd), .cin(gnd), - .combout(\inst11|Add1~14_combout ), + .combout(\inst11|Add1~9_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~14 .lut_mask = 16'hAA00; -defparam \inst11|Add1~14 .sum_lutc_input = "datac"; +defparam \inst11|Add1~9 .lut_mask = 16'hA0A0; +defparam \inst11|Add1~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N24 -fiftyfivenm_lcell_comb \inst11|count[12]~41 ( +// Location: LCCOMB_X60_Y35_N14 +fiftyfivenm_lcell_comb \inst11|count[7]~31 ( // Equation(s): -// \inst11|count[12]~41_combout = ((\inst11|Add1~15_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[11]~40 )))) # (GND) -// \inst11|count[12]~42 = CARRY((\inst11|Add1~15_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[11]~40 ))) # (!\inst11|Add1~15_combout & (\inst11|Add1~3_combout & !\inst11|count[11]~40 ))) +// \inst11|count[7]~31_combout = (\inst11|Add1~10_combout & ((\inst11|Add1~3_combout & (\inst11|count[6]~30 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[6]~30 )))) # (!\inst11|Add1~10_combout & ((\inst11|Add1~3_combout & (!\inst11|count[6]~30 +// )) # (!\inst11|Add1~3_combout & ((\inst11|count[6]~30 ) # (GND))))) +// \inst11|count[7]~32 = CARRY((\inst11|Add1~10_combout & (!\inst11|Add1~3_combout & !\inst11|count[6]~30 )) # (!\inst11|Add1~10_combout & ((!\inst11|count[6]~30 ) # (!\inst11|Add1~3_combout )))) - .dataa(\inst11|Add1~15_combout ), + .dataa(\inst11|Add1~10_combout ), .datab(\inst11|Add1~3_combout ), .datac(gnd), .datad(vcc), - .cin(\inst11|count[11]~40 ), - .combout(\inst11|count[12]~41_combout ), - .cout(\inst11|count[12]~42 )); + .cin(\inst11|count[6]~30 ), + .combout(\inst11|count[7]~31_combout ), + .cout(\inst11|count[7]~32 )); // synopsys translate_off -defparam \inst11|count[12]~41 .lut_mask = 16'h698E; -defparam \inst11|count[12]~41 .sum_lutc_input = "cin"; +defparam \inst11|count[7]~31 .lut_mask = 16'h9617; +defparam \inst11|count[7]~31 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y45_N25 -dffeas \inst11|count[12] ( +// Location: FF_X60_Y35_N15 +dffeas \inst11|count[7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[12]~41_combout ), + .d(\inst11|count[7]~31_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [12]), + .q(\inst11|count [7]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[12] .is_wysiwyg = "true"; -defparam \inst11|count[12] .power_up = "low"; +defparam \inst11|count[7] .is_wysiwyg = "true"; +defparam \inst11|count[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N18 -fiftyfivenm_lcell_comb \inst10|count[9]~35 ( +// Location: LCCOMB_X57_Y38_N6 +fiftyfivenm_lcell_comb \inst3|PWM_EN~0 ( // Equation(s): -// \inst10|count[9]~35_combout = (\inst10|count [9] & (!\inst10|count[8]~34 )) # (!\inst10|count [9] & ((\inst10|count[8]~34 ) # (GND))) -// \inst10|count[9]~36 = CARRY((!\inst10|count[8]~34 ) # (!\inst10|count [9])) +// \inst3|PWM_EN~0_combout = (!\inst|IR [1] & (!\inst|IR [4] & !\inst|IR [7])) .dataa(gnd), - .datab(\inst10|count [9]), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[8]~34 ), - .combout(\inst10|count[9]~35_combout ), - .cout(\inst10|count[9]~36 )); + .datab(\inst|IR [1]), + .datac(\inst|IR [4]), + .datad(\inst|IR [7]), + .cin(gnd), + .combout(\inst3|PWM_EN~0_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[9]~35 .lut_mask = 16'h3C3F; -defparam \inst10|count[9]~35 .sum_lutc_input = "cin"; +defparam \inst3|PWM_EN~0 .lut_mask = 16'h0003; +defparam \inst3|PWM_EN~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N19 -dffeas \inst10|count[9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[9]~35_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst10|count [9]), - .prn(vcc)); +// Location: LCCOMB_X58_Y38_N20 +fiftyfivenm_lcell_comb \inst3|SWITCH_EN~1 ( +// Equation(s): +// \inst3|SWITCH_EN~1_combout = (!\inst|IR [3] & (!\inst|IR [5] & (!\inst|IR [6] & \inst3|SWITCH_EN~0_combout ))) + + .dataa(\inst|IR [3]), + .datab(\inst|IR [5]), + .datac(\inst|IR [6]), + .datad(\inst3|SWITCH_EN~0_combout ), + .cin(gnd), + .combout(\inst3|SWITCH_EN~1_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[9] .is_wysiwyg = "true"; -defparam \inst10|count[9] .power_up = "low"; +defparam \inst3|SWITCH_EN~1 .lut_mask = 16'h0100; +defparam \inst3|SWITCH_EN~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N20 -fiftyfivenm_lcell_comb \inst10|count[10]~37 ( +// Location: LCCOMB_X58_Y38_N22 +fiftyfivenm_lcell_comb \inst3|SWITCH_EN ( // Equation(s): -// \inst10|count[10]~37_combout = (\inst10|count [10] & (\inst10|count[9]~36 $ (GND))) # (!\inst10|count [10] & (!\inst10|count[9]~36 & VCC)) -// \inst10|count[10]~38 = CARRY((\inst10|count [10] & !\inst10|count[9]~36 )) +// \inst3|SWITCH_EN~combout = LCELL((!\inst|IR [2] & (\inst3|PWM_EN~0_combout & (!\inst|IR [0] & \inst3|SWITCH_EN~1_combout )))) - .dataa(gnd), - .datab(\inst10|count [10]), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[9]~36 ), - .combout(\inst10|count[10]~37_combout ), - .cout(\inst10|count[10]~38 )); + .dataa(\inst|IR [2]), + .datab(\inst3|PWM_EN~0_combout ), + .datac(\inst|IR [0]), + .datad(\inst3|SWITCH_EN~1_combout ), + .cin(gnd), + .combout(\inst3|SWITCH_EN~combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[10]~37 .lut_mask = 16'hC30C; -defparam \inst10|count[10]~37 .sum_lutc_input = "cin"; +defparam \inst3|SWITCH_EN .lut_mask = 16'h0400; +defparam \inst3|SWITCH_EN .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N21 -dffeas \inst10|count[10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[10]~37_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), +// Location: CLKCTRL_G7 +fiftyfivenm_clkctrl \inst3|SWITCH_EN~clkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\inst3|SWITCH_EN~combout }), + .clkselect(2'b00), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [10]), - .prn(vcc)); + .outclk(\inst3|SWITCH_EN~clkctrl_outclk )); // synopsys translate_off -defparam \inst10|count[10] .is_wysiwyg = "true"; -defparam \inst10|count[10] .power_up = "low"; +defparam \inst3|SWITCH_EN~clkctrl .clock_type = "global clock"; +defparam \inst3|SWITCH_EN~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N22 -fiftyfivenm_lcell_comb \inst10|count[11]~39 ( -// Equation(s): -// \inst10|count[11]~39_combout = (\inst10|count [11] & (!\inst10|count[10]~38 )) # (!\inst10|count [11] & ((\inst10|count[10]~38 ) # (GND))) -// \inst10|count[11]~40 = CARRY((!\inst10|count[10]~38 ) # (!\inst10|count [11])) - - .dataa(\inst10|count [11]), - .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst10|count[10]~38 ), - .combout(\inst10|count[11]~39_combout ), - .cout(\inst10|count[11]~40 )); +// Location: IOIBUF_X58_Y54_N29 +fiftyfivenm_io_ibuf \SW[7]~input ( + .i(SW[7]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[7]~input_o )); // synopsys translate_off -defparam \inst10|count[11]~39 .lut_mask = 16'h5A5F; -defparam \inst10|count[11]~39 .sum_lutc_input = "cin"; +defparam \SW[7]~input .bus_hold = "false"; +defparam \SW[7]~input .listen_to_nsleep_signal = "false"; +defparam \SW[7]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: FF_X50_Y44_N23 -dffeas \inst10|count[11] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[11]~39_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), +// Location: FF_X58_Y37_N9 +dffeas \inst7|B_DI[7] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[7]~input_o ), + .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [11]), + .q(\inst7|B_DI [7]), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[11] .is_wysiwyg = "true"; -defparam \inst10|count[11] .power_up = "low"; +defparam \inst7|B_DI[7] .is_wysiwyg = "true"; +defparam \inst7|B_DI[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N24 -fiftyfivenm_lcell_comb \inst10|count[12]~41 ( +// Location: LCCOMB_X58_Y37_N8 +fiftyfivenm_lcell_comb \inst13|inst1[7]~55 ( // Equation(s): -// \inst10|count[12]~41_combout = (\inst10|count [12] & (\inst10|count[11]~40 $ (GND))) # (!\inst10|count [12] & (!\inst10|count[11]~40 & VCC)) -// \inst10|count[12]~42 = CARRY((\inst10|count [12] & !\inst10|count[11]~40 )) +// \inst13|inst1[7]~55_combout = (\inst|IO_WRITE_int~q & (\inst|AC [7] & ((\inst7|B_DI [7]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [7])) # (!\inst3|SWITCH_EN~combout ))) + + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|SWITCH_EN~combout ), + .datac(\inst7|B_DI [7]), + .datad(\inst|AC [7]), + .cin(gnd), + .combout(\inst13|inst1[7]~55_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[7]~55 .lut_mask = 16'hF351; +defparam \inst13|inst1[7]~55 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y38_N16 +fiftyfivenm_lcell_comb \inst3|I2C_DATA_EN ( +// Equation(s): +// \inst3|I2C_DATA_EN~combout = (!\inst|IR [2] & (\inst13|inst12~0_combout & (\inst|IR [0] & \inst3|SWITCH_EN~1_combout ))) + + .dataa(\inst|IR [2]), + .datab(\inst13|inst12~0_combout ), + .datac(\inst|IR [0]), + .datad(\inst3|SWITCH_EN~1_combout ), + .cin(gnd), + .combout(\inst3|I2C_DATA_EN~combout ), + .cout()); +// synopsys translate_off +defparam \inst3|I2C_DATA_EN .lut_mask = 16'h4000; +defparam \inst3|I2C_DATA_EN .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X59_Y35_N8 +fiftyfivenm_lcell_comb \inst11|Add1~12 ( +// Equation(s): +// \inst11|Add1~12_combout = (\inst10|state.Init~q & \inst11|count [9]) .dataa(gnd), - .datab(\inst10|count [12]), + .datab(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [9]), + .cin(gnd), + .combout(\inst11|Add1~12_combout ), + .cout()); +// synopsys translate_off +defparam \inst11|Add1~12 .lut_mask = 16'hF000; +defparam \inst11|Add1~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y35_N16 +fiftyfivenm_lcell_comb \inst11|count[8]~33 ( +// Equation(s): +// \inst11|count[8]~33_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~11_combout $ (!\inst11|count[7]~32 )))) # (GND) +// \inst11|count[8]~34 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~11_combout ) # (!\inst11|count[7]~32 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~11_combout & !\inst11|count[7]~32 ))) + + .dataa(\inst11|Add1~3_combout ), + .datab(\inst11|Add1~11_combout ), .datac(gnd), .datad(vcc), - .cin(\inst10|count[11]~40 ), - .combout(\inst10|count[12]~41_combout ), - .cout(\inst10|count[12]~42 )); + .cin(\inst11|count[7]~32 ), + .combout(\inst11|count[8]~33_combout ), + .cout(\inst11|count[8]~34 )); // synopsys translate_off -defparam \inst10|count[12]~41 .lut_mask = 16'hC30C; -defparam \inst10|count[12]~41 .sum_lutc_input = "cin"; +defparam \inst11|count[8]~33 .lut_mask = 16'h698E; +defparam \inst11|count[8]~33 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y44_N25 -dffeas \inst10|count[12] ( +// Location: FF_X60_Y35_N17 +dffeas \inst11|count[8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[12]~41_combout ), + .d(\inst11|count[8]~33_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [12]), + .q(\inst11|count [8]), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[12] .is_wysiwyg = "true"; -defparam \inst10|count[12] .power_up = "low"; +defparam \inst11|count[8] .is_wysiwyg = "true"; +defparam \inst11|count[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N12 -fiftyfivenm_lcell_comb \inst13|inst1[12]~75 ( +// Location: LCCOMB_X59_Y35_N2 +fiftyfivenm_lcell_comb \inst11|Add1~11 ( // Equation(s): -// \inst13|inst1[12]~75_combout = ((\inst|IR [0] & (\inst11|count [12])) # (!\inst|IR [0] & ((\inst10|count [12])))) # (!\inst11|tri_enable~1_combout ) +// \inst11|Add1~11_combout = (\inst10|state.Init~q & \inst11|count [8]) - .dataa(\inst11|tri_enable~1_combout ), - .datab(\inst11|count [12]), - .datac(\inst|IR [0]), - .datad(\inst10|count [12]), + .dataa(gnd), + .datab(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [8]), .cin(gnd), - .combout(\inst13|inst1[12]~75_combout ), + .combout(\inst11|Add1~11_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[12]~75 .lut_mask = 16'hDFD5; -defparam \inst13|inst1[12]~75 .sum_lutc_input = "datac"; +defparam \inst11|Add1~11 .lut_mask = 16'hF000; +defparam \inst11|Add1~11 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N28 -fiftyfivenm_lcell_comb \inst13|inst1[12]~95 ( +// Location: LCCOMB_X60_Y35_N18 +fiftyfivenm_lcell_comb \inst11|count[9]~35 ( // Equation(s): -// \inst13|inst1[12]~95_combout = ((\inst13|inst1[12]~76_combout & (\inst13|inst1[12]~74_combout & \inst13|inst1[12]~75_combout ))) # (!\inst13|inst1[0]~18_combout ) +// \inst11|count[9]~35_combout = (\inst11|Add1~12_combout & ((\inst11|Add1~3_combout & (\inst11|count[8]~34 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[8]~34 )))) # (!\inst11|Add1~12_combout & ((\inst11|Add1~3_combout & (!\inst11|count[8]~34 +// )) # (!\inst11|Add1~3_combout & ((\inst11|count[8]~34 ) # (GND))))) +// \inst11|count[9]~36 = CARRY((\inst11|Add1~12_combout & (!\inst11|Add1~3_combout & !\inst11|count[8]~34 )) # (!\inst11|Add1~12_combout & ((!\inst11|count[8]~34 ) # (!\inst11|Add1~3_combout )))) - .dataa(\inst13|inst1[12]~76_combout ), - .datab(\inst13|inst1[12]~74_combout ), - .datac(\inst13|inst1[12]~75_combout ), - .datad(\inst13|inst1[0]~18_combout ), - .cin(gnd), - .combout(\inst13|inst1[12]~95_combout ), - .cout()); + .dataa(\inst11|Add1~12_combout ), + .datab(\inst11|Add1~3_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[8]~34 ), + .combout(\inst11|count[9]~35_combout ), + .cout(\inst11|count[9]~36 )); // synopsys translate_off -defparam \inst13|inst1[12]~95 .lut_mask = 16'h80FF; -defparam \inst13|inst1[12]~95 .sum_lutc_input = "datac"; +defparam \inst11|count[9]~35 .lut_mask = 16'h9617; +defparam \inst11|count[9]~35 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y37_N23 -dffeas \inst13|inst14|cmd_in[4] ( - .clk(\inst13|inst12~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[12]~95_combout ), +// Location: FF_X60_Y35_N19 +dffeas \inst11|count[9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[9]~35_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|cmd_in [4]), + .q(\inst11|count [9]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|cmd_in[4] .is_wysiwyg = "true"; -defparam \inst13|inst14|cmd_in[4] .power_up = "low"; +defparam \inst11|count[9] .is_wysiwyg = "true"; +defparam \inst11|count[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N26 -fiftyfivenm_lcell_comb \inst10|count[13]~43 ( +// Location: LCCOMB_X60_Y39_N0 +fiftyfivenm_lcell_comb \inst13|inst1[9]~104 ( // Equation(s): -// \inst10|count[13]~43_combout = (\inst10|count [13] & (!\inst10|count[12]~42 )) # (!\inst10|count [13] & ((\inst10|count[12]~42 ) # (GND))) -// \inst10|count[13]~44 = CARRY((!\inst10|count[12]~42 ) # (!\inst10|count [13])) +// \inst13|inst1[9]~104_combout = ((\inst11|count [9]) # (!\inst|IR [0])) # (!\inst11|tri_enable~1_combout ) - .dataa(\inst10|count [13]), - .datab(gnd), + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst|IR [0]), .datac(gnd), - .datad(vcc), - .cin(\inst10|count[12]~42 ), - .combout(\inst10|count[13]~43_combout ), - .cout(\inst10|count[13]~44 )); + .datad(\inst11|count [9]), + .cin(gnd), + .combout(\inst13|inst1[9]~104_combout ), + .cout()); // synopsys translate_off -defparam \inst10|count[13]~43 .lut_mask = 16'h5A5F; -defparam \inst10|count[13]~43 .sum_lutc_input = "cin"; +defparam \inst13|inst1[9]~104 .lut_mask = 16'hFF77; +defparam \inst13|inst1[9]~104 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N27 -dffeas \inst10|count[13] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[13]~43_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), +// Location: IOIBUF_X69_Y54_N1 +fiftyfivenm_io_ibuf \SW[9]~input ( + .i(SW[9]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[9]~input_o )); +// synopsys translate_off +defparam \SW[9]~input .bus_hold = "false"; +defparam \SW[9]~input .listen_to_nsleep_signal = "false"; +defparam \SW[9]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X60_Y39_N15 +dffeas \inst7|B_DI[9] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[9]~input_o ), + .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [13]), + .q(\inst7|B_DI [9]), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[13] .is_wysiwyg = "true"; -defparam \inst10|count[13] .power_up = "low"; +defparam \inst7|B_DI[9] .is_wysiwyg = "true"; +defparam \inst7|B_DI[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y46_N0 -fiftyfivenm_lcell_comb \inst11|Add1~16 ( +// Location: LCCOMB_X60_Y39_N14 +fiftyfivenm_lcell_comb \inst13|inst1[9]~64 ( // Equation(s): -// \inst11|Add1~16_combout = (\inst10|state.Init~q & \inst11|count [13]) +// \inst13|inst1[9]~64_combout = (\inst|IO_WRITE_int~q & (\inst|AC [9] & ((\inst7|B_DI [9]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [9])) # (!\inst3|SWITCH_EN~combout ))) - .dataa(gnd), - .datab(gnd), - .datac(\inst10|state.Init~q ), - .datad(\inst11|count [13]), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|SWITCH_EN~combout ), + .datac(\inst7|B_DI [9]), + .datad(\inst|AC [9]), .cin(gnd), - .combout(\inst11|Add1~16_combout ), + .combout(\inst13|inst1[9]~64_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~16 .lut_mask = 16'hF000; -defparam \inst11|Add1~16 .sum_lutc_input = "datac"; +defparam \inst13|inst1[9]~64 .lut_mask = 16'hF351; +defparam \inst13|inst1[9]~64 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N26 -fiftyfivenm_lcell_comb \inst11|count[13]~43 ( +// Location: LCCOMB_X62_Y36_N22 +fiftyfivenm_lcell_comb \inst13|inst14|state_machine~1 ( // Equation(s): -// \inst11|count[13]~43_combout = (\inst11|Add1~16_combout & ((\inst11|Add1~3_combout & (\inst11|count[12]~42 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[12]~42 )))) # (!\inst11|Add1~16_combout & ((\inst11|Add1~3_combout & -// (!\inst11|count[12]~42 )) # (!\inst11|Add1~3_combout & ((\inst11|count[12]~42 ) # (GND))))) -// \inst11|count[13]~44 = CARRY((\inst11|Add1~16_combout & (!\inst11|Add1~3_combout & !\inst11|count[12]~42 )) # (!\inst11|Add1~16_combout & ((!\inst11|count[12]~42 ) # (!\inst11|Add1~3_combout )))) +// \inst13|inst14|state_machine~1_combout = (!\inst13|inst14|prev_busy~q & \inst13|inst|busy~q ) - .dataa(\inst11|Add1~16_combout ), - .datab(\inst11|Add1~3_combout ), + .dataa(gnd), + .datab(\inst13|inst14|prev_busy~q ), .datac(gnd), - .datad(vcc), - .cin(\inst11|count[12]~42 ), - .combout(\inst11|count[13]~43_combout ), - .cout(\inst11|count[13]~44 )); -// synopsys translate_off -defparam \inst11|count[13]~43 .lut_mask = 16'h9617; -defparam \inst11|count[13]~43 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: FF_X50_Y45_N27 -dffeas \inst11|count[13] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[13]~43_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst11|count[9]~18_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst11|count [13]), - .prn(vcc)); + .datad(\inst13|inst|busy~q ), + .cin(gnd), + .combout(\inst13|inst14|state_machine~1_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[13] .is_wysiwyg = "true"; -defparam \inst11|count[13] .power_up = "low"; +defparam \inst13|inst14|state_machine~1 .lut_mask = 16'h3300; +defparam \inst13|inst14|state_machine~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N30 -fiftyfivenm_lcell_comb \inst13|inst1[13]~78 ( +// Location: LCCOMB_X57_Y38_N2 +fiftyfivenm_lcell_comb \inst13|inst6 ( // Equation(s): -// \inst13|inst1[13]~78_combout = ((\inst|IR [0] & ((\inst11|count [13]))) # (!\inst|IR [0] & (\inst10|count [13]))) # (!\inst11|tri_enable~1_combout ) +// \inst13|inst6~combout = LCELL((\inst3|TIMER_EN~1_combout & (\inst3|I2C_RDY_EN~0_combout & (\inst|IR [7] & \inst|IO_WRITE_int~q )))) - .dataa(\inst10|count [13]), - .datab(\inst11|tri_enable~1_combout ), - .datac(\inst11|count [13]), - .datad(\inst|IR [0]), + .dataa(\inst3|TIMER_EN~1_combout ), + .datab(\inst3|I2C_RDY_EN~0_combout ), + .datac(\inst|IR [7]), + .datad(\inst|IO_WRITE_int~q ), .cin(gnd), - .combout(\inst13|inst1[13]~78_combout ), + .combout(\inst13|inst6~combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[13]~78 .lut_mask = 16'hF3BB; -defparam \inst13|inst1[13]~78 .sum_lutc_input = "datac"; +defparam \inst13|inst6 .lut_mask = 16'h8000; +defparam \inst13|inst6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N2 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~6 ( +// Location: LCCOMB_X57_Y38_N8 +fiftyfivenm_lcell_comb \inst13|inst14|go~feeder ( // Equation(s): -// \inst13|inst|Decoder0~6_combout = (!\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & (!\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst13|inst14|go~feeder_combout = VCC - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst|Decoder0~6_combout ), + .combout(\inst13|inst14|go~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~6 .lut_mask = 16'h0400; -defparam \inst13|inst|Decoder0~6 .sum_lutc_input = "datac"; +defparam \inst13|inst14|go~feeder .lut_mask = 16'hFFFF; +defparam \inst13|inst14|go~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N4 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[5]~5 ( +// Location: LCCOMB_X61_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[0]~19 ( // Equation(s): -// \inst13|inst|data_rx[5]~5_combout = (\inst13|inst|Decoder0~6_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~6_combout & ((\inst13|inst|data_rx [5]))) +// \inst13|inst14|data_out[0]~19_combout = (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx1~q & \inst13|inst14|prev_busy~q )) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [5]), - .datad(\inst13|inst|Decoder0~6_combout ), + .dataa(\inst13|inst|busy~q ), + .datab(\inst13|inst14|state.Rx1~q ), + .datac(gnd), + .datad(\inst13|inst14|prev_busy~q ), .cin(gnd), - .combout(\inst13|inst|data_rx[5]~5_combout ), + .combout(\inst13|inst14|data_out[0]~19_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[5]~5 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[5]~5 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[0]~19 .lut_mask = 16'h4400; +defparam \inst13|inst14|data_out[0]~19 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X47_Y38_N5 -dffeas \inst13|inst|data_rx[5] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[5]~5_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rx [5]), - .prn(vcc)); +// Location: LCCOMB_X61_Y36_N22 +fiftyfivenm_lcell_comb \inst13|inst14|Selector22~0 ( +// Equation(s): +// \inst13|inst14|Selector22~0_combout = (!\inst13|inst|busy~q & (\inst13|inst14|state.Tx1~q & \inst13|inst14|prev_busy~q )) + + .dataa(\inst13|inst|busy~q ), + .datab(\inst13|inst14|state.Tx1~q ), + .datac(gnd), + .datad(\inst13|inst14|prev_busy~q ), + .cin(gnd), + .combout(\inst13|inst14|Selector22~0_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[5] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[5] .power_up = "low"; +defparam \inst13|inst14|Selector22~0 .lut_mask = 16'h4400; +defparam \inst13|inst14|Selector22~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N10 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[5]~feeder ( +// Location: LCCOMB_X61_Y39_N16 +fiftyfivenm_lcell_comb \inst10|count[8]~33 ( // Equation(s): -// \inst13|inst|data_rd[5]~feeder_combout = \inst13|inst|data_rx [5] +// \inst10|count[8]~33_combout = (\inst10|count [8] & (\inst10|count[7]~32 $ (GND))) # (!\inst10|count [8] & (!\inst10|count[7]~32 & VCC)) +// \inst10|count[8]~34 = CARRY((\inst10|count [8] & !\inst10|count[7]~32 )) .dataa(gnd), - .datab(gnd), + .datab(\inst10|count [8]), .datac(gnd), - .datad(\inst13|inst|data_rx [5]), - .cin(gnd), - .combout(\inst13|inst|data_rd[5]~feeder_combout ), - .cout()); + .datad(vcc), + .cin(\inst10|count[7]~32 ), + .combout(\inst10|count[8]~33_combout ), + .cout(\inst10|count[8]~34 )); // synopsys translate_off -defparam \inst13|inst|data_rd[5]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|data_rd[5]~feeder .sum_lutc_input = "datac"; +defparam \inst10|count[8]~33 .lut_mask = 16'hC30C; +defparam \inst10|count[8]~33 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X51_Y38_N11 -dffeas \inst13|inst|data_rd[5] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[5]~feeder_combout ), +// Location: FF_X61_Y39_N17 +dffeas \inst10|count[8] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[8]~33_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst|state~14_combout ), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rd [5]), + .q(\inst10|count [8]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rd[5] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[5] .power_up = "low"; +defparam \inst10|count[8] .is_wysiwyg = "true"; +defparam \inst10|count[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N18 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[13]~16 ( +// Location: LCCOMB_X60_Y39_N6 +fiftyfivenm_lcell_comb \inst13|inst1[8]~103 ( // Equation(s): -// \inst13|inst14|data_out[13]~16_combout = (\inst13|inst14|prev_busy~q & (\inst13|inst|data_rd [5] & (\inst13|inst14|state.Rx2~q & !\inst13|inst|busy~q ))) +// \inst13|inst1[8]~103_combout = (!\inst13|inst4~combout & (((\inst10|count [8]) # (\inst|IR [0])) # (!\inst11|tri_enable~1_combout ))) - .dataa(\inst13|inst14|prev_busy~q ), - .datab(\inst13|inst|data_rd [5]), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst10|count [8]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst14|data_out[13]~16_combout ), + .combout(\inst13|inst1[8]~103_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[13]~16 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[13]~16 .sum_lutc_input = "datac"; +defparam \inst13|inst1[8]~103 .lut_mask = 16'h3331; +defparam \inst13|inst1[8]~103 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X56_Y54_N1 +fiftyfivenm_io_ibuf \SW[8]~input ( + .i(SW[8]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[8]~input_o )); +// synopsys translate_off +defparam \SW[8]~input .bus_hold = "false"; +defparam \SW[8]~input .listen_to_nsleep_signal = "false"; +defparam \SW[8]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: FF_X51_Y38_N19 -dffeas \inst13|inst14|data_out[13] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[13]~16_combout ), - .asdata(vcc), +// Location: FF_X58_Y39_N5 +dffeas \inst7|B_DI[8] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[8]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[15]~11_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [13]), + .q(\inst7|B_DI [8]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[13] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[13] .power_up = "low"; +defparam \inst7|B_DI[8] .is_wysiwyg = "true"; +defparam \inst7|B_DI[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N2 -fiftyfivenm_lcell_comb \inst13|inst1[13]~79 ( +// Location: LCCOMB_X58_Y39_N4 +fiftyfivenm_lcell_comb \inst13|inst1[8]~59 ( // Equation(s): -// \inst13|inst1[13]~79_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [13])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [13])) # (!\inst3|I2C_DATA_EN~combout ))) +// \inst13|inst1[8]~59_combout = (\inst|IO_WRITE_int~q & (\inst|AC [8] & ((\inst7|B_DI [8]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [8]) # (!\inst3|SWITCH_EN~combout )))) .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst|AC [13]), - .datad(\inst13|inst14|data_out [13]), - .cin(gnd), - .combout(\inst13|inst1[13]~79_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[13]~79 .lut_mask = 16'hF5B1; -defparam \inst13|inst1[13]~79 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y41_N20 -fiftyfivenm_lcell_comb \inst13|inst1[13]~96 ( -// Equation(s): -// \inst13|inst1[13]~96_combout = ((\inst13|inst1[13]~77_combout & (\inst13|inst1[13]~78_combout & \inst13|inst1[13]~79_combout ))) # (!\inst13|inst1[0]~18_combout ) - - .dataa(\inst13|inst1[13]~77_combout ), - .datab(\inst13|inst1[0]~18_combout ), - .datac(\inst13|inst1[13]~78_combout ), - .datad(\inst13|inst1[13]~79_combout ), + .datab(\inst|AC [8]), + .datac(\inst7|B_DI [8]), + .datad(\inst3|SWITCH_EN~combout ), .cin(gnd), - .combout(\inst13|inst1[13]~96_combout ), + .combout(\inst13|inst1[8]~59_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[13]~96 .lut_mask = 16'hB333; -defparam \inst13|inst1[13]~96 .sum_lutc_input = "datac"; +defparam \inst13|inst1[8]~59 .lut_mask = 16'hD0DD; +defparam \inst13|inst1[8]~59 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N28 -fiftyfivenm_lcell_comb \inst13|inst14|cmd_in[5]~feeder ( +// Location: LCCOMB_X61_Y39_N18 +fiftyfivenm_lcell_comb \inst10|count[9]~35 ( // Equation(s): -// \inst13|inst14|cmd_in[5]~feeder_combout = \inst13|inst1[13]~96_combout +// \inst10|count[9]~35_combout = (\inst10|count [9] & (!\inst10|count[8]~34 )) # (!\inst10|count [9] & ((\inst10|count[8]~34 ) # (GND))) +// \inst10|count[9]~36 = CARRY((!\inst10|count[8]~34 ) # (!\inst10|count [9])) - .dataa(\inst13|inst1[13]~96_combout ), - .datab(gnd), + .dataa(gnd), + .datab(\inst10|count [9]), .datac(gnd), - .datad(gnd), - .cin(gnd), - .combout(\inst13|inst14|cmd_in[5]~feeder_combout ), - .cout()); + .datad(vcc), + .cin(\inst10|count[8]~34 ), + .combout(\inst10|count[9]~35_combout ), + .cout(\inst10|count[9]~36 )); // synopsys translate_off -defparam \inst13|inst14|cmd_in[5]~feeder .lut_mask = 16'hAAAA; -defparam \inst13|inst14|cmd_in[5]~feeder .sum_lutc_input = "datac"; +defparam \inst10|count[9]~35 .lut_mask = 16'h3C3F; +defparam \inst10|count[9]~35 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y37_N29 -dffeas \inst13|inst14|cmd_in[5] ( - .clk(\inst13|inst12~clkctrl_outclk ), - .d(\inst13|inst14|cmd_in[5]~feeder_combout ), +// Location: FF_X61_Y39_N19 +dffeas \inst10|count[9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[9]~35_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|cmd_in [5]), + .q(\inst10|count [9]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|cmd_in[5] .is_wysiwyg = "true"; -defparam \inst13|inst14|cmd_in[5] .power_up = "low"; +defparam \inst10|count[9] .is_wysiwyg = "true"; +defparam \inst10|count[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N12 -fiftyfivenm_lcell_comb \inst13|inst14|Equal0~0 ( +// Location: LCCOMB_X61_Y39_N20 +fiftyfivenm_lcell_comb \inst10|count[10]~37 ( // Equation(s): -// \inst13|inst14|Equal0~0_combout = (!\inst13|inst14|cmd_in [4] & \inst13|inst14|cmd_in [5]) +// \inst10|count[10]~37_combout = (\inst10|count [10] & (\inst10|count[9]~36 $ (GND))) # (!\inst10|count [10] & (!\inst10|count[9]~36 & VCC)) +// \inst10|count[10]~38 = CARRY((\inst10|count [10] & !\inst10|count[9]~36 )) .dataa(gnd), - .datab(\inst13|inst14|cmd_in [4]), + .datab(\inst10|count [10]), .datac(gnd), - .datad(\inst13|inst14|cmd_in [5]), - .cin(gnd), - .combout(\inst13|inst14|Equal0~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst14|Equal0~0 .lut_mask = 16'h3300; -defparam \inst13|inst14|Equal0~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y38_N14 -fiftyfivenm_lcell_comb \inst13|inst14|Selector17~0 ( -// Equation(s): -// \inst13|inst14|Selector17~0_combout = (\inst13|inst14|state_machine~0_combout & (\inst13|inst14|tx_addr[7]~0_combout & ((\inst13|inst14|Equal0~0_combout )))) # (!\inst13|inst14|state_machine~0_combout & ((\inst13|inst14|state.Tx2~q ) # -// ((\inst13|inst14|tx_addr[7]~0_combout & \inst13|inst14|Equal0~0_combout )))) - - .dataa(\inst13|inst14|state_machine~0_combout ), - .datab(\inst13|inst14|tx_addr[7]~0_combout ), - .datac(\inst13|inst14|state.Tx2~q ), - .datad(\inst13|inst14|Equal0~0_combout ), - .cin(gnd), - .combout(\inst13|inst14|Selector17~0_combout ), - .cout()); + .datad(vcc), + .cin(\inst10|count[9]~36 ), + .combout(\inst10|count[10]~37_combout ), + .cout(\inst10|count[10]~38 )); // synopsys translate_off -defparam \inst13|inst14|Selector17~0 .lut_mask = 16'hDC50; -defparam \inst13|inst14|Selector17~0 .sum_lutc_input = "datac"; +defparam \inst10|count[10]~37 .lut_mask = 16'hC30C; +defparam \inst10|count[10]~37 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y38_N15 -dffeas \inst13|inst14|state.Tx2 ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector17~0_combout ), +// Location: FF_X61_Y39_N21 +dffeas \inst10|count[10] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[10]~37_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|state.Tx2~q ), + .q(\inst10|count [10]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|state.Tx2 .is_wysiwyg = "true"; -defparam \inst13|inst14|state.Tx2 .power_up = "low"; +defparam \inst10|count[10] .is_wysiwyg = "true"; +defparam \inst10|count[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N20 -fiftyfivenm_lcell_comb \inst13|inst14|Selector18~0 ( +// Location: LCCOMB_X61_Y39_N22 +fiftyfivenm_lcell_comb \inst10|count[11]~39 ( // Equation(s): -// \inst13|inst14|Selector18~0_combout = (!\inst13|inst14|state.idle~q & (\inst13|inst14|go~q & (\inst13|inst14|cmd_in [4] & !\inst13|inst14|cmd_in [5]))) +// \inst10|count[11]~39_combout = (\inst10|count [11] & (!\inst10|count[10]~38 )) # (!\inst10|count [11] & ((\inst10|count[10]~38 ) # (GND))) +// \inst10|count[11]~40 = CARRY((!\inst10|count[10]~38 ) # (!\inst10|count [11])) - .dataa(\inst13|inst14|state.idle~q ), - .datab(\inst13|inst14|go~q ), - .datac(\inst13|inst14|cmd_in [4]), - .datad(\inst13|inst14|cmd_in [5]), - .cin(gnd), - .combout(\inst13|inst14|Selector18~0_combout ), - .cout()); + .dataa(\inst10|count [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst10|count[10]~38 ), + .combout(\inst10|count[11]~39_combout ), + .cout(\inst10|count[11]~40 )); // synopsys translate_off -defparam \inst13|inst14|Selector18~0 .lut_mask = 16'h0040; -defparam \inst13|inst14|Selector18~0 .sum_lutc_input = "datac"; +defparam \inst10|count[11]~39 .lut_mask = 16'h5A5F; +defparam \inst10|count[11]~39 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y37_N21 -dffeas \inst13|inst14|state.Tx1p ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector18~0_combout ), +// Location: FF_X61_Y39_N23 +dffeas \inst10|count[11] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[11]~39_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|state.Tx1p~q ), + .q(\inst10|count [11]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|state.Tx1p .is_wysiwyg = "true"; -defparam \inst13|inst14|state.Tx1p .power_up = "low"; +defparam \inst10|count[11] .is_wysiwyg = "true"; +defparam \inst10|count[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N4 -fiftyfivenm_lcell_comb \inst13|inst14|Selector19~0 ( +// Location: LCCOMB_X61_Y39_N24 +fiftyfivenm_lcell_comb \inst10|count[12]~41 ( // Equation(s): -// \inst13|inst14|Selector19~0_combout = (\inst13|inst14|state.Tx1p~q ) # ((\inst13|inst14|state_machine~0_combout & (\inst13|inst14|state.Tx2~q )) # (!\inst13|inst14|state_machine~0_combout & ((\inst13|inst14|state.Tx1~q )))) +// \inst10|count[12]~41_combout = (\inst10|count [12] & (\inst10|count[11]~40 $ (GND))) # (!\inst10|count [12] & (!\inst10|count[11]~40 & VCC)) +// \inst10|count[12]~42 = CARRY((\inst10|count [12] & !\inst10|count[11]~40 )) - .dataa(\inst13|inst14|state_machine~0_combout ), - .datab(\inst13|inst14|state.Tx2~q ), - .datac(\inst13|inst14|state.Tx1~q ), - .datad(\inst13|inst14|state.Tx1p~q ), - .cin(gnd), - .combout(\inst13|inst14|Selector19~0_combout ), - .cout()); + .dataa(gnd), + .datab(\inst10|count [12]), + .datac(gnd), + .datad(vcc), + .cin(\inst10|count[11]~40 ), + .combout(\inst10|count[12]~41_combout ), + .cout(\inst10|count[12]~42 )); // synopsys translate_off -defparam \inst13|inst14|Selector19~0 .lut_mask = 16'hFFD8; -defparam \inst13|inst14|Selector19~0 .sum_lutc_input = "datac"; +defparam \inst10|count[12]~41 .lut_mask = 16'hC30C; +defparam \inst10|count[12]~41 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y38_N5 -dffeas \inst13|inst14|state.Tx1 ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector19~0_combout ), +// Location: FF_X61_Y39_N25 +dffeas \inst10|count[12] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[12]~41_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|state.Tx1~q ), + .q(\inst10|count [12]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|state.Tx1 .is_wysiwyg = "true"; -defparam \inst13|inst14|state.Tx1 .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y38_N8 -fiftyfivenm_lcell_comb \inst13|inst14|Selector22~0 ( -// Equation(s): -// \inst13|inst14|Selector22~0_combout = (\inst13|inst14|state.Tx1~q & (\inst13|inst14|prev_busy~q & !\inst13|inst|busy~q )) - - .dataa(gnd), - .datab(\inst13|inst14|state.Tx1~q ), - .datac(\inst13|inst14|prev_busy~q ), - .datad(\inst13|inst|busy~q ), - .cin(gnd), - .combout(\inst13|inst14|Selector22~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst14|Selector22~0 .lut_mask = 16'h00C0; -defparam \inst13|inst14|Selector22~0 .sum_lutc_input = "datac"; +defparam \inst10|count[12] .is_wysiwyg = "true"; +defparam \inst10|count[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N28 -fiftyfivenm_lcell_comb \inst13|inst1[8]~59 ( +// Location: LCCOMB_X61_Y39_N26 +fiftyfivenm_lcell_comb \inst10|count[13]~43 ( // Equation(s): -// \inst13|inst1[8]~59_combout = (\inst13|inst1[8]~58_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst10|count[13]~43_combout = (\inst10|count [13] & (!\inst10|count[12]~42 )) # (!\inst10|count [13] & ((\inst10|count[12]~42 ) # (GND))) +// \inst10|count[13]~44 = CARRY((!\inst10|count[12]~42 ) # (!\inst10|count [13])) - .dataa(gnd), + .dataa(\inst10|count [13]), .datab(gnd), - .datac(\inst13|inst1[8]~58_combout ), - .datad(\inst13|inst1[0]~18_combout ), - .cin(gnd), - .combout(\inst13|inst1[8]~59_combout ), - .cout()); + .datac(gnd), + .datad(vcc), + .cin(\inst10|count[12]~42 ), + .combout(\inst10|count[13]~43_combout ), + .cout(\inst10|count[13]~44 )); // synopsys translate_off -defparam \inst13|inst1[8]~59 .lut_mask = 16'hF0FF; -defparam \inst13|inst1[8]~59 .sum_lutc_input = "datac"; +defparam \inst10|count[13]~43 .lut_mask = 16'h5A5F; +defparam \inst10|count[13]~43 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y37_N11 -dffeas \inst13|inst14|cmd_in[0] ( - .clk(\inst13|inst12~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[8]~59_combout ), +// Location: FF_X61_Y39_N27 +dffeas \inst10|count[13] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[13]~43_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|cmd_in [0]), + .q(\inst10|count [13]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|cmd_in[0] .is_wysiwyg = "true"; -defparam \inst13|inst14|cmd_in[0] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y37_N16 -fiftyfivenm_lcell_comb \inst13|inst14|Selector21~1 ( -// Equation(s): -// \inst13|inst14|Selector21~1_combout = (\inst13|inst14|go~q & (!\inst13|inst14|state.idle~q & (\inst13|inst14|cmd_in [5] $ (!\inst13|inst14|cmd_in [4])))) - - .dataa(\inst13|inst14|go~q ), - .datab(\inst13|inst14|cmd_in [5]), - .datac(\inst13|inst14|cmd_in [4]), - .datad(\inst13|inst14|state.idle~q ), - .cin(gnd), - .combout(\inst13|inst14|Selector21~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst14|Selector21~1 .lut_mask = 16'h0082; -defparam \inst13|inst14|Selector21~1 .sum_lutc_input = "datac"; +defparam \inst10|count[13] .is_wysiwyg = "true"; +defparam \inst10|count[13] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N2 -fiftyfivenm_lcell_comb \inst13|inst14|Selector20~2 ( +// Location: LCCOMB_X59_Y35_N6 +fiftyfivenm_lcell_comb \inst11|Add1~16 ( // Equation(s): -// \inst13|inst14|Selector20~2_combout = (\inst13|inst14|cmd_in [1] & (!\inst13|inst14|cmd_in [0] & ((\inst13|inst14|Selector22~0_combout ) # (\inst13|inst14|Selector21~1_combout )))) +// \inst11|Add1~16_combout = (\inst10|state.Init~q & \inst11|count [13]) - .dataa(\inst13|inst14|cmd_in [1]), - .datab(\inst13|inst14|Selector22~0_combout ), - .datac(\inst13|inst14|cmd_in [0]), - .datad(\inst13|inst14|Selector21~1_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [13]), .cin(gnd), - .combout(\inst13|inst14|Selector20~2_combout ), + .combout(\inst11|Add1~16_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector20~2 .lut_mask = 16'h0A08; -defparam \inst13|inst14|Selector20~2 .sum_lutc_input = "datac"; +defparam \inst11|Add1~16 .lut_mask = 16'hF000; +defparam \inst11|Add1~16 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N26 -fiftyfivenm_lcell_comb \inst13|inst14|Selector20~3 ( -// Equation(s): -// \inst13|inst14|Selector20~3_combout = (\inst13|inst14|Selector20~2_combout ) # ((\inst13|inst14|state.Rx2~q & ((\inst13|inst|busy~q ) # (!\inst13|inst14|prev_busy~q )))) - - .dataa(\inst13|inst14|prev_busy~q ), - .datab(\inst13|inst|busy~q ), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst14|Selector20~2_combout ), - .cin(gnd), - .combout(\inst13|inst14|Selector20~3_combout ), - .cout()); +// Location: LCCOMB_X60_Y35_N20 +fiftyfivenm_lcell_comb \inst11|count[10]~37 ( +// Equation(s): +// \inst11|count[10]~37_combout = ((\inst11|Add1~13_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[9]~36 )))) # (GND) +// \inst11|count[10]~38 = CARRY((\inst11|Add1~13_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[9]~36 ))) # (!\inst11|Add1~13_combout & (\inst11|Add1~3_combout & !\inst11|count[9]~36 ))) + + .dataa(\inst11|Add1~13_combout ), + .datab(\inst11|Add1~3_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[9]~36 ), + .combout(\inst11|count[10]~37_combout ), + .cout(\inst11|count[10]~38 )); // synopsys translate_off -defparam \inst13|inst14|Selector20~3 .lut_mask = 16'hFFD0; -defparam \inst13|inst14|Selector20~3 .sum_lutc_input = "datac"; +defparam \inst11|count[10]~37 .lut_mask = 16'h698E; +defparam \inst11|count[10]~37 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y37_N27 -dffeas \inst13|inst14|state.Rx2 ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector20~3_combout ), +// Location: FF_X60_Y35_N21 +dffeas \inst11|count[10] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[10]~37_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|state.Rx2~q ), + .q(\inst11|count [10]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|state.Rx2 .is_wysiwyg = "true"; -defparam \inst13|inst14|state.Rx2 .power_up = "low"; +defparam \inst11|count[10] .is_wysiwyg = "true"; +defparam \inst11|count[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N12 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[8]~10 ( +// Location: LCCOMB_X59_Y35_N26 +fiftyfivenm_lcell_comb \inst11|Add1~13 ( // Equation(s): -// \inst13|inst14|data_out[8]~10_combout = (\inst13|inst14|prev_busy~q & (\inst13|inst|data_rd [0] & (\inst13|inst14|state.Rx2~q & !\inst13|inst|busy~q ))) +// \inst11|Add1~13_combout = (\inst10|state.Init~q & \inst11|count [10]) - .dataa(\inst13|inst14|prev_busy~q ), - .datab(\inst13|inst|data_rd [0]), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst10|state.Init~q ), + .datab(gnd), + .datac(\inst11|count [10]), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst14|data_out[8]~10_combout ), + .combout(\inst11|Add1~13_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[8]~10 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[8]~10 .sum_lutc_input = "datac"; +defparam \inst11|Add1~13 .lut_mask = 16'hA0A0; +defparam \inst11|Add1~13 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N13 -dffeas \inst13|inst14|data_out[8] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[8]~10_combout ), +// Location: LCCOMB_X60_Y35_N22 +fiftyfivenm_lcell_comb \inst11|count[11]~39 ( +// Equation(s): +// \inst11|count[11]~39_combout = (\inst11|Add1~14_combout & ((\inst11|Add1~3_combout & (\inst11|count[10]~38 & VCC)) # (!\inst11|Add1~3_combout & (!\inst11|count[10]~38 )))) # (!\inst11|Add1~14_combout & ((\inst11|Add1~3_combout & +// (!\inst11|count[10]~38 )) # (!\inst11|Add1~3_combout & ((\inst11|count[10]~38 ) # (GND))))) +// \inst11|count[11]~40 = CARRY((\inst11|Add1~14_combout & (!\inst11|Add1~3_combout & !\inst11|count[10]~38 )) # (!\inst11|Add1~14_combout & ((!\inst11|count[10]~38 ) # (!\inst11|Add1~3_combout )))) + + .dataa(\inst11|Add1~14_combout ), + .datab(\inst11|Add1~3_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[10]~38 ), + .combout(\inst11|count[11]~39_combout ), + .cout(\inst11|count[11]~40 )); +// synopsys translate_off +defparam \inst11|count[11]~39 .lut_mask = 16'h9617; +defparam \inst11|count[11]~39 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X60_Y35_N23 +dffeas \inst11|count[11] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[11]~39_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[15]~11_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [8]), + .q(\inst11|count [11]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[8] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[8] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y39_N30 -fiftyfivenm_lcell_comb \inst13|inst1[8]~55 ( -// Equation(s): -// \inst13|inst1[8]~55_combout = (\inst|IO_WRITE_int~q & (\inst|AC [8])) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [8]) # (!\inst3|I2C_DATA_EN~combout )))) - - .dataa(\inst|AC [8]), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst|IO_WRITE_int~q ), - .datad(\inst13|inst14|data_out [8]), - .cin(gnd), - .combout(\inst13|inst1[8]~55_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[8]~55 .lut_mask = 16'hAFA3; -defparam \inst13|inst1[8]~55 .sum_lutc_input = "datac"; +defparam \inst11|count[11] .is_wysiwyg = "true"; +defparam \inst11|count[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N26 -fiftyfivenm_lcell_comb \inst13|inst1[8]~58 ( +// Location: LCCOMB_X59_Y38_N12 +fiftyfivenm_lcell_comb \inst11|Add1~14 ( // Equation(s): -// \inst13|inst1[8]~58_combout = (\inst13|inst1[8]~57_combout & (\inst13|inst1[8]~55_combout & ((\inst4|COUNT [8]) # (!\inst4|IO_OUT~combout )))) +// \inst11|Add1~14_combout = (\inst10|state.Init~q & \inst11|count [11]) - .dataa(\inst13|inst1[8]~57_combout ), - .datab(\inst13|inst1[8]~55_combout ), - .datac(\inst4|IO_OUT~combout ), - .datad(\inst4|COUNT [8]), + .dataa(gnd), + .datab(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [11]), .cin(gnd), - .combout(\inst13|inst1[8]~58_combout ), + .combout(\inst11|Add1~14_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[8]~58 .lut_mask = 16'h8808; -defparam \inst13|inst1[8]~58 .sum_lutc_input = "datac"; +defparam \inst11|Add1~14 .lut_mask = 16'hF000; +defparam \inst11|Add1~14 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N24 -fiftyfivenm_lcell_comb \inst|Selector19~9 ( +// Location: LCCOMB_X60_Y35_N24 +fiftyfivenm_lcell_comb \inst11|count[12]~41 ( // Equation(s): -// \inst|Selector19~9_combout = (\inst|Selector19~8_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[8]~58_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst11|count[12]~41_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~15_combout $ (!\inst11|count[11]~40 )))) # (GND) +// \inst11|count[12]~42 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~15_combout ) # (!\inst11|count[11]~40 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~15_combout & !\inst11|count[11]~40 ))) - .dataa(\inst|Selector19~8_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[8]~58_combout ), - .datad(\inst13|inst1[0]~18_combout ), - .cin(gnd), - .combout(\inst|Selector19~9_combout ), - .cout()); + .dataa(\inst11|Add1~3_combout ), + .datab(\inst11|Add1~15_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[11]~40 ), + .combout(\inst11|count[12]~41_combout ), + .cout(\inst11|count[12]~42 )); // synopsys translate_off -defparam \inst|Selector19~9 .lut_mask = 16'hEAEE; -defparam \inst|Selector19~9 .sum_lutc_input = "datac"; +defparam \inst11|count[12]~41 .lut_mask = 16'h698E; +defparam \inst11|count[12]~41 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y39_N25 -dffeas \inst|AC[8] ( +// Location: FF_X60_Y35_N25 +dffeas \inst11|count[12] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector19~9_combout ), + .d(\inst11|count[12]~41_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [8]), + .q(\inst11|count [12]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[8] .is_wysiwyg = "true"; -defparam \inst|AC[8] .power_up = "low"; +defparam \inst11|count[12] .is_wysiwyg = "true"; +defparam \inst11|count[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N20 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[24]~26 ( +// Location: LCCOMB_X59_Y35_N20 +fiftyfivenm_lcell_comb \inst11|Add1~15 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[24]~26_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [9]))) # (!\inst|IR [4] & (\inst|AC [7])))) +// \inst11|Add1~15_combout = (\inst10|state.Init~q & \inst11|count [12]) - .dataa(\inst|IR [0]), - .datab(\inst|AC [7]), - .datac(\inst|IR [4]), - .datad(\inst|AC [9]), + .dataa(gnd), + .datab(gnd), + .datac(\inst10|state.Init~q ), + .datad(\inst11|count [12]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[24]~26_combout ), + .combout(\inst11|Add1~15_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[24]~26 .lut_mask = 16'hA808; -defparam \inst|shifter|auto_generated|sbit_w[24]~26 .sum_lutc_input = "datac"; +defparam \inst11|Add1~15 .lut_mask = 16'hF000; +defparam \inst11|Add1~15 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N2 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[24]~27 ( +// Location: LCCOMB_X60_Y35_N26 +fiftyfivenm_lcell_comb \inst11|count[13]~43 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[24]~27_combout = (\inst|shifter|auto_generated|sbit_w[24]~26_combout ) # ((\inst|AC [8] & !\inst|IR [0])) +// \inst11|count[13]~43_combout = (\inst11|Add1~3_combout & ((\inst11|Add1~16_combout & (\inst11|count[12]~42 & VCC)) # (!\inst11|Add1~16_combout & (!\inst11|count[12]~42 )))) # (!\inst11|Add1~3_combout & ((\inst11|Add1~16_combout & +// (!\inst11|count[12]~42 )) # (!\inst11|Add1~16_combout & ((\inst11|count[12]~42 ) # (GND))))) +// \inst11|count[13]~44 = CARRY((\inst11|Add1~3_combout & (!\inst11|Add1~16_combout & !\inst11|count[12]~42 )) # (!\inst11|Add1~3_combout & ((!\inst11|count[12]~42 ) # (!\inst11|Add1~16_combout )))) - .dataa(\inst|AC [8]), - .datab(\inst|IR [0]), + .dataa(\inst11|Add1~3_combout ), + .datab(\inst11|Add1~16_combout ), .datac(gnd), - .datad(\inst|shifter|auto_generated|sbit_w[24]~26_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), - .cout()); + .datad(vcc), + .cin(\inst11|count[12]~42 ), + .combout(\inst11|count[13]~43_combout ), + .cout(\inst11|count[13]~44 )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[24]~27 .lut_mask = 16'hFF22; -defparam \inst|shifter|auto_generated|sbit_w[24]~27 .sum_lutc_input = "datac"; +defparam \inst11|count[13]~43 .lut_mask = 16'h9617; +defparam \inst11|count[13]~43 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N10 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[42]~58 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[42]~58_combout = (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[28]~22_combout ) # ((\inst3|TIMER_EN~3_combout & \inst|shifter|auto_generated|sbit_w[24]~27_combout )))) # -// (!\inst3|I2C_RDY_EN~0_combout & (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[24]~27_combout )))) - - .dataa(\inst3|I2C_RDY_EN~0_combout ), - .datab(\inst3|TIMER_EN~3_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[42]~58_combout ), - .cout()); +// Location: FF_X60_Y35_N27 +dffeas \inst11|count[13] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[13]~43_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst11|count[7]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst11|count [13]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[42]~58 .lut_mask = 16'hECA0; -defparam \inst|shifter|auto_generated|sbit_w[42]~58 .sum_lutc_input = "datac"; +defparam \inst11|count[13] .is_wysiwyg = "true"; +defparam \inst11|count[13] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N4 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[42]~59 ( +// Location: LCCOMB_X59_Y36_N0 +fiftyfivenm_lcell_comb \inst13|inst1[13]~82 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[42]~59_combout = (\inst|shifter|auto_generated|sbit_w[42]~58_combout ) # ((\inst|shifter|auto_generated|sbit_w[26]~17_combout & !\inst|IR [1])) +// \inst13|inst1[13]~82_combout = (\inst|IR [0] & ((\inst11|count [13]))) # (!\inst|IR [0] & (\inst10|count [13])) - .dataa(\inst|shifter|auto_generated|sbit_w[42]~58_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), - .datac(\inst|IR [1]), - .datad(gnd), + .dataa(\inst10|count [13]), + .datab(\inst11|count [13]), + .datac(gnd), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), + .combout(\inst13|inst1[13]~82_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[42]~59 .lut_mask = 16'hAEAE; -defparam \inst|shifter|auto_generated|sbit_w[42]~59 .sum_lutc_input = "datac"; +defparam \inst13|inst1[13]~82 .lut_mask = 16'hCCAA; +defparam \inst13|inst1[13]~82 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N8 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[46]~56 ( +// Location: LCCOMB_X59_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst1[13]~83 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[46]~56_combout = (\inst|IR [1] & (\inst|AC [15] & (\inst|IR [4]))) # (!\inst|IR [1] & (((\inst|shifter|auto_generated|sbit_w[30]~19_combout )))) +// \inst13|inst1[13]~83_combout = (\inst13|inst1[13]~82_combout & (((\inst|AC [13])) # (!\inst|IO_WRITE_int~q ))) # (!\inst13|inst1[13]~82_combout & (!\inst11|tri_enable~1_combout & ((\inst|AC [13]) # (!\inst|IO_WRITE_int~q )))) - .dataa(\inst|AC [15]), - .datab(\inst|IR [1]), - .datac(\inst|IR [4]), - .datad(\inst|shifter|auto_generated|sbit_w[30]~19_combout ), + .dataa(\inst13|inst1[13]~82_combout ), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst11|tri_enable~1_combout ), + .datad(\inst|AC [13]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[46]~56_combout ), + .combout(\inst13|inst1[13]~83_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[46]~56 .lut_mask = 16'hB380; -defparam \inst|shifter|auto_generated|sbit_w[46]~56 .sum_lutc_input = "datac"; +defparam \inst13|inst1[13]~83 .lut_mask = 16'hAF23; +defparam \inst13|inst1[13]~83 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N26 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[46]~79 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[46]~79_combout = (\inst|shifter|auto_generated|sbit_w[46]~56_combout ) # ((!\inst|IR [4] & (\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[28]~22_combout ))) - - .dataa(\inst|IR [4]), - .datab(\inst|IR [1]), - .datac(\inst|shifter|auto_generated|sbit_w[46]~56_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[46]~79_combout ), - .cout()); +// Location: IOIBUF_X38_Y0_N29 +fiftyfivenm_io_ibuf \GSENSOR_SDI~input ( + .i(GSENSOR_SDI), + .ibar(gnd), + .nsleep(vcc), + .o(\GSENSOR_SDI~input_o )); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[46]~79 .lut_mask = 16'hF4F0; -defparam \inst|shifter|auto_generated|sbit_w[46]~79 .sum_lutc_input = "datac"; +defparam \GSENSOR_SDI~input .bus_hold = "false"; +defparam \GSENSOR_SDI~input .listen_to_nsleep_signal = "false"; +defparam \GSENSOR_SDI~input .simulate_z_as = "z"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N10 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[62]~74 ( +// Location: LCCOMB_X56_Y35_N30 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[62]~74_combout = (\inst|IR [2] & (\inst|IR [4] & ((\inst|AC [15])))) # (!\inst|IR [2] & (((\inst|shifter|auto_generated|sbit_w[46]~79_combout )))) +// \inst13|inst|Decoder0~0_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & (\inst1|altpll_component|auto_generated|wire_pll1_locked & \inst13|inst|state.rd~q )) - .dataa(\inst|IR [4]), - .datab(\inst|shifter|auto_generated|sbit_w[46]~79_combout ), - .datac(\inst|IR [2]), - .datad(\inst|AC [15]), + .dataa(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datab(gnd), + .datac(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .datad(\inst13|inst|state.rd~q ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[62]~74_combout ), + .combout(\inst13|inst|Decoder0~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[62]~74 .lut_mask = 16'hAC0C; -defparam \inst|shifter|auto_generated|sbit_w[62]~74 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~0 .lut_mask = 16'hA000; +defparam \inst13|inst|Decoder0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N0 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[62]~75 ( +// Location: LCCOMB_X55_Y34_N12 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~6 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[62]~75_combout = (\inst|shifter|auto_generated|sbit_w[62]~74_combout ) # ((\inst|shifter|auto_generated|sbit_w[42]~59_combout & (!\inst|IR [4] & \inst|IR [2]))) +// \inst13|inst|Decoder0~6_combout = (!\inst13|inst|bit_cnt [2] & (!\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & \inst13|inst|Decoder0~0_combout ))) - .dataa(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), - .datab(\inst|IR [4]), - .datac(\inst|IR [2]), - .datad(\inst|shifter|auto_generated|sbit_w[62]~74_combout ), + .dataa(\inst13|inst|bit_cnt [2]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|bit_cnt [1]), + .datad(\inst13|inst|Decoder0~0_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[62]~75_combout ), + .combout(\inst13|inst|Decoder0~6_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[62]~75 .lut_mask = 16'hFF20; -defparam \inst|shifter|auto_generated|sbit_w[62]~75 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~6 .lut_mask = 16'h1000; +defparam \inst13|inst|Decoder0~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[54]~76 ( +// Location: LCCOMB_X55_Y34_N4 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[5]~5 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[54]~76_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[42]~59_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[34]~55_combout ))))) +// \inst13|inst|data_rx[5]~5_combout = (\inst13|inst|Decoder0~6_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~6_combout & ((\inst13|inst|data_rx [5]))) - .dataa(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), - .datac(\inst|IR [4]), - .datad(\inst|IR [2]), + .dataa(gnd), + .datab(\GSENSOR_SDI~input_o ), + .datac(\inst13|inst|data_rx [5]), + .datad(\inst13|inst|Decoder0~6_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[54]~76_combout ), + .combout(\inst13|inst|data_rx[5]~5_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[54]~76 .lut_mask = 16'hAC00; -defparam \inst|shifter|auto_generated|sbit_w[54]~76 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[5]~5 .lut_mask = 16'hCCF0; +defparam \inst13|inst|data_rx[5]~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N6 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[38]~51 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[38]~51_combout = (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[24]~27_combout ) # ((\inst3|TIMER_EN~3_combout & \inst|shifter|auto_generated|sbit_w[20]~13_combout )))) # -// (!\inst3|I2C_RDY_EN~0_combout & (\inst3|TIMER_EN~3_combout & (\inst|shifter|auto_generated|sbit_w[20]~13_combout ))) - - .dataa(\inst3|I2C_RDY_EN~0_combout ), - .datab(\inst3|TIMER_EN~3_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[20]~13_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[38]~51_combout ), - .cout()); +// Location: FF_X55_Y34_N5 +dffeas \inst13|inst|data_rx[5] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[5]~5_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rx [5]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[38]~51 .lut_mask = 16'hEAC0; -defparam \inst|shifter|auto_generated|sbit_w[38]~51 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[5] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N8 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[38]~52 ( +// Location: LCCOMB_X56_Y34_N22 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[5]~feeder ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[38]~52_combout = (\inst|shifter|auto_generated|sbit_w[38]~51_combout ) # ((\inst|shifter|auto_generated|sbit_w[22]~10_combout & !\inst|IR [1])) +// \inst13|inst|data_rd[5]~feeder_combout = \inst13|inst|data_rx [5] - .dataa(\inst|shifter|auto_generated|sbit_w[38]~51_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), - .datac(\inst|IR [1]), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|data_rx [5]), .datad(gnd), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), + .combout(\inst13|inst|data_rd[5]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[38]~52 .lut_mask = 16'hAEAE; -defparam \inst|shifter|auto_generated|sbit_w[38]~52 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[5]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst|data_rd[5]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N20 -fiftyfivenm_lcell_comb \inst|Selector13~2 ( -// Equation(s): -// \inst|Selector13~2_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[54]~76_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[38]~52_combout )))) - - .dataa(\inst|Selector19~4_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[54]~76_combout ), - .datac(\inst|IR [2]), - .datad(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), - .cin(gnd), - .combout(\inst|Selector13~2_combout ), - .cout()); +// Location: FF_X56_Y34_N23 +dffeas \inst13|inst|data_rd[5] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[5]~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst|state~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rd [5]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector13~2 .lut_mask = 16'h8A88; -defparam \inst|Selector13~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[5] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N30 -fiftyfivenm_lcell_comb \inst|Selector13~1 ( +// Location: LCCOMB_X59_Y36_N6 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[13]~16 ( // Equation(s): -// \inst|Selector13~1_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & ((\inst|state.ex_load~q ) # (\inst|state.ex_or~q ))) +// \inst13|inst14|data_out[13]~16_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst|data_rd [5] & \inst13|inst14|state.Rx2~q ))) - .dataa(\inst|state.ex_load~q ), - .datab(\inst|state.ex_or~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [14]), - .datad(gnd), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst|data_rd [5]), + .datad(\inst13|inst14|state.Rx2~q ), .cin(gnd), - .combout(\inst|Selector13~1_combout ), + .combout(\inst13|inst14|data_out[13]~16_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector13~1 .lut_mask = 16'hE0E0; -defparam \inst|Selector13~1 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[13]~16 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[13]~16 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N26 -fiftyfivenm_lcell_comb \inst|Selector13~3 ( +// Location: LCCOMB_X61_Y36_N18 +fiftyfivenm_lcell_comb \inst13|inst14|state_machine~0 ( // Equation(s): -// \inst|Selector13~3_combout = (\inst|Selector13~2_combout ) # ((\inst|Selector13~1_combout ) # ((\inst|shifter|auto_generated|sbit_w[62]~75_combout & \inst|Selector20~0_combout ))) +// \inst13|inst14|state_machine~0_combout = (!\inst13|inst|busy~q & \inst13|inst14|prev_busy~q ) - .dataa(\inst|shifter|auto_generated|sbit_w[62]~75_combout ), - .datab(\inst|Selector13~2_combout ), - .datac(\inst|Selector20~0_combout ), - .datad(\inst|Selector13~1_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|busy~q ), + .datad(\inst13|inst14|prev_busy~q ), .cin(gnd), - .combout(\inst|Selector13~3_combout ), + .combout(\inst13|inst14|state_machine~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector13~3 .lut_mask = 16'hFFEC; -defparam \inst|Selector13~3 .sum_lutc_input = "datac"; +defparam \inst13|inst14|state_machine~0 .lut_mask = 16'h0F00; +defparam \inst13|inst14|state_machine~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N28 -fiftyfivenm_lcell_comb \inst|Selector13~4 ( +// Location: LCCOMB_X60_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[15]~11 ( // Equation(s): -// \inst|Selector13~4_combout = (\inst|Selector13~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [14] $ (\inst|AC [14])))) +// \inst13|inst14|data_out[15]~11_combout = (\inst13|inst14|data_out[7]~0_combout & ((\inst13|inst14|tx_addr[7]~0_combout ) # ((\inst13|inst14|state.Rx2~q & \inst13|inst14|state_machine~0_combout )))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), - .datab(\inst|state.ex_xor~q ), - .datac(\inst|Selector13~3_combout ), - .datad(\inst|AC [14]), + .dataa(\inst13|inst14|state.Rx2~q ), + .datab(\inst13|inst14|data_out[7]~0_combout ), + .datac(\inst13|inst14|tx_addr[7]~0_combout ), + .datad(\inst13|inst14|state_machine~0_combout ), .cin(gnd), - .combout(\inst|Selector13~4_combout ), + .combout(\inst13|inst14|data_out[15]~11_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector13~4 .lut_mask = 16'hF4F8; -defparam \inst|Selector13~4 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[15]~11 .lut_mask = 16'hC8C0; +defparam \inst13|inst14|data_out[15]~11 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N10 -fiftyfivenm_lcell_comb \inst|Add1~73 ( +// Location: FF_X59_Y36_N7 +dffeas \inst13|inst14|data_out[13] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[13]~16_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[15]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|data_out [13]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|data_out[13] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[13] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X59_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst1[13]~84 ( // Equation(s): -// \inst|Add1~73_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [14])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state.ex_add~q )) +// \inst13|inst1[13]~84_combout = (\inst13|inst1[13]~83_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [13]) # (!\inst3|I2C_DATA_EN~combout )))) - .dataa(gnd), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [14]), - .datad(\inst|state.ex_add~q ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(\inst13|inst1[13]~83_combout ), + .datad(\inst13|inst14|data_out [13]), .cin(gnd), - .combout(\inst|Add1~73_combout ), + .combout(\inst13|inst1[13]~84_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~73 .lut_mask = 16'h3C0C; -defparam \inst|Add1~73 .sum_lutc_input = "datac"; +defparam \inst13|inst1[13]~84 .lut_mask = 16'hF0B0; +defparam \inst13|inst1[13]~84 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N20 -fiftyfivenm_lcell_comb \inst|Add1~74 ( +// Location: LCCOMB_X59_Y40_N16 +fiftyfivenm_lcell_comb \inst4|IO_OUT ( // Equation(s): -// \inst|Add1~74_combout = (\inst|Add1~1_combout & ((\inst|IR [10]) # ((\inst|WideOr3~1_combout & \inst|Add1~73_combout )))) # (!\inst|Add1~1_combout & (((\inst|WideOr3~1_combout & \inst|Add1~73_combout )))) +// \inst4|IO_OUT~combout = (!\inst|IO_WRITE_int~q & (\inst3|TIMER_EN~1_combout & \inst3|TIMER_EN~2_combout )) - .dataa(\inst|Add1~1_combout ), - .datab(\inst|IR [10]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~73_combout ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|TIMER_EN~1_combout ), + .datac(gnd), + .datad(\inst3|TIMER_EN~2_combout ), .cin(gnd), - .combout(\inst|Add1~74_combout ), + .combout(\inst4|IO_OUT~combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~74 .lut_mask = 16'hF888; -defparam \inst|Add1~74 .sum_lutc_input = "datac"; +defparam \inst4|IO_OUT .lut_mask = 16'h4400; +defparam \inst4|IO_OUT .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N18 -fiftyfivenm_lcell_comb \inst|Add1~75 ( +// Location: LCCOMB_X60_Y40_N14 +fiftyfivenm_lcell_comb \inst4|COUNT[8]~29 ( // Equation(s): -// \inst|Add1~75_combout = (\inst|AC [14] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_sub~q )))) +// \inst4|COUNT[8]~29_combout = (\inst4|COUNT [8] & (!\inst4|COUNT[7]~28 )) # (!\inst4|COUNT [8] & ((\inst4|COUNT[7]~28 ) # (GND))) +// \inst4|COUNT[8]~30 = CARRY((!\inst4|COUNT[7]~28 ) # (!\inst4|COUNT [8])) - .dataa(\inst|AC [14]), - .datab(\inst|state.ex_addi~q ), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_sub~q ), - .cin(gnd), - .combout(\inst|Add1~75_combout ), - .cout()); + .dataa(gnd), + .datab(\inst4|COUNT [8]), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[7]~28 ), + .combout(\inst4|COUNT[8]~29_combout ), + .cout(\inst4|COUNT[8]~30 )); // synopsys translate_off -defparam \inst|Add1~75 .lut_mask = 16'hAAA8; -defparam \inst|Add1~75 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[8]~29 .lut_mask = 16'h3C3F; +defparam \inst4|COUNT[8]~29 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N12 -fiftyfivenm_lcell_comb \inst|Add1~71 ( +// Location: FF_X60_Y40_N15 +dffeas \inst4|COUNT[8] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[8]~29_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [8]), + .prn(vcc)); +// synopsys translate_off +defparam \inst4|COUNT[8] .is_wysiwyg = "true"; +defparam \inst4|COUNT[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y40_N16 +fiftyfivenm_lcell_comb \inst4|COUNT[9]~31 ( // Equation(s): -// \inst|Add1~71_combout = ((\inst|Add1~70_combout $ (\inst|Add1~69_combout $ (!\inst|Add1~67 )))) # (GND) -// \inst|Add1~72 = CARRY((\inst|Add1~70_combout & ((\inst|Add1~69_combout ) # (!\inst|Add1~67 ))) # (!\inst|Add1~70_combout & (\inst|Add1~69_combout & !\inst|Add1~67 ))) +// \inst4|COUNT[9]~31_combout = (\inst4|COUNT [9] & (\inst4|COUNT[8]~30 $ (GND))) # (!\inst4|COUNT [9] & (!\inst4|COUNT[8]~30 & VCC)) +// \inst4|COUNT[9]~32 = CARRY((\inst4|COUNT [9] & !\inst4|COUNT[8]~30 )) - .dataa(\inst|Add1~70_combout ), - .datab(\inst|Add1~69_combout ), + .dataa(gnd), + .datab(\inst4|COUNT [9]), .datac(gnd), .datad(vcc), - .cin(\inst|Add1~67 ), - .combout(\inst|Add1~71_combout ), - .cout(\inst|Add1~72 )); + .cin(\inst4|COUNT[8]~30 ), + .combout(\inst4|COUNT[9]~31_combout ), + .cout(\inst4|COUNT[9]~32 )); // synopsys translate_off -defparam \inst|Add1~71 .lut_mask = 16'h698E; -defparam \inst|Add1~71 .sum_lutc_input = "cin"; +defparam \inst4|COUNT[9]~31 .lut_mask = 16'hC30C; +defparam \inst4|COUNT[9]~31 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N14 -fiftyfivenm_lcell_comb \inst|Add1~76 ( +// Location: FF_X60_Y40_N17 +dffeas \inst4|COUNT[9] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[9]~31_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [9]), + .prn(vcc)); +// synopsys translate_off +defparam \inst4|COUNT[9] .is_wysiwyg = "true"; +defparam \inst4|COUNT[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y40_N18 +fiftyfivenm_lcell_comb \inst4|COUNT[10]~33 ( // Equation(s): -// \inst|Add1~76_combout = (\inst|Add1~74_combout & ((\inst|Add1~75_combout & (\inst|Add1~72 & VCC)) # (!\inst|Add1~75_combout & (!\inst|Add1~72 )))) # (!\inst|Add1~74_combout & ((\inst|Add1~75_combout & (!\inst|Add1~72 )) # (!\inst|Add1~75_combout & -// ((\inst|Add1~72 ) # (GND))))) -// \inst|Add1~77 = CARRY((\inst|Add1~74_combout & (!\inst|Add1~75_combout & !\inst|Add1~72 )) # (!\inst|Add1~74_combout & ((!\inst|Add1~72 ) # (!\inst|Add1~75_combout )))) +// \inst4|COUNT[10]~33_combout = (\inst4|COUNT [10] & (!\inst4|COUNT[9]~32 )) # (!\inst4|COUNT [10] & ((\inst4|COUNT[9]~32 ) # (GND))) +// \inst4|COUNT[10]~34 = CARRY((!\inst4|COUNT[9]~32 ) # (!\inst4|COUNT [10])) - .dataa(\inst|Add1~74_combout ), - .datab(\inst|Add1~75_combout ), + .dataa(gnd), + .datab(\inst4|COUNT [10]), .datac(gnd), .datad(vcc), - .cin(\inst|Add1~72 ), - .combout(\inst|Add1~76_combout ), - .cout(\inst|Add1~77 )); + .cin(\inst4|COUNT[9]~32 ), + .combout(\inst4|COUNT[10]~33_combout ), + .cout(\inst4|COUNT[10]~34 )); // synopsys translate_off -defparam \inst|Add1~76 .lut_mask = 16'h9617; -defparam \inst|Add1~76 .sum_lutc_input = "cin"; +defparam \inst4|COUNT[10]~33 .lut_mask = 16'h3C3F; +defparam \inst4|COUNT[10]~33 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N20 -fiftyfivenm_lcell_comb \inst|Selector13~0 ( +// Location: FF_X60_Y40_N19 +dffeas \inst4|COUNT[10] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[10]~33_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [10]), + .prn(vcc)); +// synopsys translate_off +defparam \inst4|COUNT[10] .is_wysiwyg = "true"; +defparam \inst4|COUNT[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y40_N20 +fiftyfivenm_lcell_comb \inst4|COUNT[11]~35 ( // Equation(s): -// \inst|Selector13~0_combout = (\inst|AC [14] & (((\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) +// \inst4|COUNT[11]~35_combout = (\inst4|COUNT [11] & (\inst4|COUNT[10]~34 $ (GND))) # (!\inst4|COUNT [11] & (!\inst4|COUNT[10]~34 & VCC)) +// \inst4|COUNT[11]~36 = CARRY((\inst4|COUNT [11] & !\inst4|COUNT[10]~34 )) - .dataa(\inst|Selector27~6_combout ), - .datab(\inst|altsyncram_component|auto_generated|q_a [14]), - .datac(\inst|state.ex_and~q ), - .datad(\inst|AC [14]), - .cin(gnd), - .combout(\inst|Selector13~0_combout ), - .cout()); + .dataa(gnd), + .datab(\inst4|COUNT [11]), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[10]~34 ), + .combout(\inst4|COUNT[11]~35_combout ), + .cout(\inst4|COUNT[11]~36 )); // synopsys translate_off -defparam \inst|Selector13~0 .lut_mask = 16'hD500; -defparam \inst|Selector13~0 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[11]~35 .lut_mask = 16'hC30C; +defparam \inst4|COUNT[11]~35 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N18 -fiftyfivenm_lcell_comb \inst|Selector13~5 ( -// Equation(s): -// \inst|Selector13~5_combout = (\inst|Selector13~4_combout ) # ((\inst|Selector13~0_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~76_combout ))) - - .dataa(\inst|AC[2]~0_combout ), - .datab(\inst|Selector13~4_combout ), - .datac(\inst|Add1~76_combout ), - .datad(\inst|Selector13~0_combout ), - .cin(gnd), - .combout(\inst|Selector13~5_combout ), - .cout()); +// Location: FF_X60_Y40_N21 +dffeas \inst4|COUNT[11] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[11]~35_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [11]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector13~5 .lut_mask = 16'hFFEC; -defparam \inst|Selector13~5 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[11] .is_wysiwyg = "true"; +defparam \inst4|COUNT[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N10 -fiftyfivenm_lcell_comb \inst|Selector16~0 ( +// Location: LCCOMB_X60_Y40_N22 +fiftyfivenm_lcell_comb \inst4|COUNT[12]~37 ( // Equation(s): -// \inst|Selector16~0_combout = (!\inst|Selector19~0_combout & ((!\inst|IR [10]) # (!\inst|state.ex_loadi~q ))) +// \inst4|COUNT[12]~37_combout = (\inst4|COUNT [12] & (!\inst4|COUNT[11]~36 )) # (!\inst4|COUNT [12] & ((\inst4|COUNT[11]~36 ) # (GND))) +// \inst4|COUNT[12]~38 = CARRY((!\inst4|COUNT[11]~36 ) # (!\inst4|COUNT [12])) - .dataa(gnd), - .datab(\inst|state.ex_loadi~q ), - .datac(\inst|Selector19~0_combout ), - .datad(\inst|IR [10]), - .cin(gnd), - .combout(\inst|Selector16~0_combout ), - .cout()); + .dataa(\inst4|COUNT [12]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[11]~36 ), + .combout(\inst4|COUNT[12]~37_combout ), + .cout(\inst4|COUNT[12]~38 )); // synopsys translate_off -defparam \inst|Selector16~0 .lut_mask = 16'h030F; -defparam \inst|Selector16~0 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[12]~37 .lut_mask = 16'h5A5F; +defparam \inst4|COUNT[12]~37 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N8 -fiftyfivenm_lcell_comb \inst|Selector13~6 ( -// Equation(s): -// \inst|Selector13~6_combout = (\inst|Selector13~5_combout ) # (((\inst|state.ex_in2~q & !\inst13|inst1[0]~18_combout )) # (!\inst|Selector16~0_combout )) - - .dataa(\inst|Selector13~5_combout ), - .datab(\inst|Selector16~0_combout ), - .datac(\inst|state.ex_in2~q ), - .datad(\inst13|inst1[0]~18_combout ), - .cin(gnd), - .combout(\inst|Selector13~6_combout ), - .cout()); +// Location: FF_X60_Y40_N23 +dffeas \inst4|COUNT[12] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[12]~37_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [12]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector13~6 .lut_mask = 16'hBBFB; -defparam \inst|Selector13~6 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[12] .is_wysiwyg = "true"; +defparam \inst4|COUNT[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N28 -fiftyfivenm_lcell_comb \inst10|count[14]~45 ( +// Location: LCCOMB_X60_Y40_N24 +fiftyfivenm_lcell_comb \inst4|COUNT[13]~39 ( // Equation(s): -// \inst10|count[14]~45_combout = (\inst10|count [14] & (\inst10|count[13]~44 $ (GND))) # (!\inst10|count [14] & (!\inst10|count[13]~44 & VCC)) -// \inst10|count[14]~46 = CARRY((\inst10|count [14] & !\inst10|count[13]~44 )) +// \inst4|COUNT[13]~39_combout = (\inst4|COUNT [13] & (\inst4|COUNT[12]~38 $ (GND))) # (!\inst4|COUNT [13] & (!\inst4|COUNT[12]~38 & VCC)) +// \inst4|COUNT[13]~40 = CARRY((\inst4|COUNT [13] & !\inst4|COUNT[12]~38 )) .dataa(gnd), - .datab(\inst10|count [14]), + .datab(\inst4|COUNT [13]), .datac(gnd), .datad(vcc), - .cin(\inst10|count[13]~44 ), - .combout(\inst10|count[14]~45_combout ), - .cout(\inst10|count[14]~46 )); + .cin(\inst4|COUNT[12]~38 ), + .combout(\inst4|COUNT[13]~39_combout ), + .cout(\inst4|COUNT[13]~40 )); // synopsys translate_off -defparam \inst10|count[14]~45 .lut_mask = 16'hC30C; -defparam \inst10|count[14]~45 .sum_lutc_input = "cin"; +defparam \inst4|COUNT[13]~39 .lut_mask = 16'hC30C; +defparam \inst4|COUNT[13]~39 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X50_Y44_N29 -dffeas \inst10|count[14] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[14]~45_combout ), +// Location: FF_X60_Y40_N25 +dffeas \inst4|COUNT[13] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[13]~39_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(!\inst4|process_0~0_combout ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [14]), + .q(\inst4|COUNT [13]), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[14] .is_wysiwyg = "true"; -defparam \inst10|count[14] .power_up = "low"; +defparam \inst4|COUNT[13] .is_wysiwyg = "true"; +defparam \inst4|COUNT[13] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N4 -fiftyfivenm_lcell_comb \inst11|Add1~17 ( +// Location: LCCOMB_X59_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst1[13]~81 ( // Equation(s): -// \inst11|Add1~17_combout = (\inst10|state.Init~q & \inst11|count [14]) +// \inst13|inst1[13]~81_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [13]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst10|state.Init~q ), + .dataa(\inst13|inst4~combout ), + .datab(\inst4|IO_OUT~combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst4|COUNT [13]), + .cin(gnd), + .combout(\inst13|inst1[13]~81_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[13]~81 .lut_mask = 16'h0501; +defparam \inst13|inst1[13]~81 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X63_Y37_N28 +fiftyfivenm_lcell_comb \inst13|inst1[13]~85 ( +// Equation(s): +// \inst13|inst1[13]~85_combout = ((\inst13|inst1[13]~84_combout & \inst13|inst1[13]~81_combout )) # (!\inst13|inst1[0]~24_combout ) + + .dataa(\inst13|inst1[13]~84_combout ), .datab(gnd), - .datac(\inst11|count [14]), - .datad(gnd), + .datac(\inst13|inst1[13]~81_combout ), + .datad(\inst13|inst1[0]~24_combout ), .cin(gnd), - .combout(\inst11|Add1~17_combout ), + .combout(\inst13|inst1[13]~85_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~17 .lut_mask = 16'hA0A0; -defparam \inst11|Add1~17 .sum_lutc_input = "datac"; +defparam \inst13|inst1[13]~85 .lut_mask = 16'hA0FF; +defparam \inst13|inst1[13]~85 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N28 -fiftyfivenm_lcell_comb \inst11|count[14]~45 ( +// Location: LCCOMB_X62_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst14|cmd_in[5]~feeder ( // Equation(s): -// \inst11|count[14]~45_combout = ((\inst11|Add1~17_combout $ (\inst11|Add1~3_combout $ (!\inst11|count[13]~44 )))) # (GND) -// \inst11|count[14]~46 = CARRY((\inst11|Add1~17_combout & ((\inst11|Add1~3_combout ) # (!\inst11|count[13]~44 ))) # (!\inst11|Add1~17_combout & (\inst11|Add1~3_combout & !\inst11|count[13]~44 ))) +// \inst13|inst14|cmd_in[5]~feeder_combout = \inst13|inst1[13]~85_combout - .dataa(\inst11|Add1~17_combout ), - .datab(\inst11|Add1~3_combout ), + .dataa(gnd), + .datab(\inst13|inst1[13]~85_combout ), .datac(gnd), - .datad(vcc), - .cin(\inst11|count[13]~44 ), - .combout(\inst11|count[14]~45_combout ), - .cout(\inst11|count[14]~46 )); + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst14|cmd_in[5]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst11|count[14]~45 .lut_mask = 16'h698E; -defparam \inst11|count[14]~45 .sum_lutc_input = "cin"; +defparam \inst13|inst14|cmd_in[5]~feeder .lut_mask = 16'hCCCC; +defparam \inst13|inst14|cmd_in[5]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N29 -dffeas \inst11|count[14] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[14]~45_combout ), +// Location: FF_X62_Y36_N15 +dffeas \inst13|inst14|cmd_in[5] ( + .clk(\inst13|inst12~clkctrl_outclk ), + .d(\inst13|inst14|cmd_in[5]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [14]), + .q(\inst13|inst14|cmd_in [5]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[14] .is_wysiwyg = "true"; -defparam \inst11|count[14] .power_up = "low"; +defparam \inst13|inst14|cmd_in[5] .is_wysiwyg = "true"; +defparam \inst13|inst14|cmd_in[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X62_Y37_N20 +fiftyfivenm_lcell_comb \inst13|inst1[12]~76 ( +// Equation(s): +// \inst13|inst1[12]~76_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [12]) # (!\inst4|IO_OUT~combout )))) + + .dataa(\inst4|IO_OUT~combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst4|COUNT [12]), + .cin(gnd), + .combout(\inst13|inst1[12]~76_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[12]~76 .lut_mask = 16'h0301; +defparam \inst13|inst1[12]~76 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N10 -fiftyfivenm_lcell_comb \inst13|inst1[14]~82 ( +// Location: LCCOMB_X60_Y37_N28 +fiftyfivenm_lcell_comb \inst13|inst1[12]~77 ( // Equation(s): -// \inst13|inst1[14]~82_combout = (\inst|IR [0] & ((\inst11|count [14]))) # (!\inst|IR [0] & (\inst10|count [14])) +// \inst13|inst1[12]~77_combout = (\inst|IR [0] & (\inst11|count [12])) # (!\inst|IR [0] & ((\inst10|count [12]))) .dataa(gnd), - .datab(\inst10|count [14]), - .datac(\inst|IR [0]), - .datad(\inst11|count [14]), + .datab(\inst11|count [12]), + .datac(\inst10|count [12]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst1[14]~82_combout ), + .combout(\inst13|inst1[12]~77_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[14]~82 .lut_mask = 16'hFC0C; -defparam \inst13|inst1[14]~82 .sum_lutc_input = "datac"; +defparam \inst13|inst1[12]~77 .lut_mask = 16'hCCF0; +defparam \inst13|inst1[12]~77 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N24 -fiftyfivenm_lcell_comb \inst13|inst1[14]~83 ( +// Location: LCCOMB_X60_Y37_N18 +fiftyfivenm_lcell_comb \inst13|inst1[12]~78 ( // Equation(s): -// \inst13|inst1[14]~83_combout = (\inst|IO_WRITE_int~q & (\inst|AC [14] & ((\inst13|inst1[14]~82_combout ) # (!\inst11|tri_enable~1_combout )))) # (!\inst|IO_WRITE_int~q & ((\inst13|inst1[14]~82_combout ) # ((!\inst11|tri_enable~1_combout )))) +// \inst13|inst1[12]~78_combout = (\inst11|tri_enable~1_combout & (\inst13|inst1[12]~77_combout & ((\inst|AC [12]) # (!\inst|IO_WRITE_int~q )))) # (!\inst11|tri_enable~1_combout & (((\inst|AC [12])) # (!\inst|IO_WRITE_int~q ))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst13|inst1[14]~82_combout ), - .datac(\inst|AC [14]), - .datad(\inst11|tri_enable~1_combout ), + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst|AC [12]), + .datad(\inst13|inst1[12]~77_combout ), .cin(gnd), - .combout(\inst13|inst1[14]~83_combout ), + .combout(\inst13|inst1[12]~78_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[14]~83 .lut_mask = 16'hC4F5; -defparam \inst13|inst1[14]~83 .sum_lutc_input = "datac"; +defparam \inst13|inst1[12]~78 .lut_mask = 16'hF351; +defparam \inst13|inst1[12]~78 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N28 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~7 ( +// Location: LCCOMB_X55_Y34_N18 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~5 ( // Equation(s): -// \inst13|inst|Decoder0~7_combout = (\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [1] & (!\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst13|inst|Decoder0~5_combout = (!\inst13|inst|bit_cnt [2] & (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & \inst13|inst|Decoder0~0_combout ))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), + .dataa(\inst13|inst|bit_cnt [2]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|bit_cnt [1]), .datad(\inst13|inst|Decoder0~0_combout ), .cin(gnd), - .combout(\inst13|inst|Decoder0~7_combout ), + .combout(\inst13|inst|Decoder0~5_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~7 .lut_mask = 16'h0200; -defparam \inst13|inst|Decoder0~7 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~5 .lut_mask = 16'h4000; +defparam \inst13|inst|Decoder0~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N26 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[6]~6 ( +// Location: LCCOMB_X55_Y34_N14 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[4]~4 ( // Equation(s): -// \inst13|inst|data_rx[6]~6_combout = (\inst13|inst|Decoder0~7_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~7_combout & ((\inst13|inst|data_rx [6]))) +// \inst13|inst|data_rx[4]~4_combout = (\inst13|inst|Decoder0~5_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~5_combout & ((\inst13|inst|data_rx [4]))) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [6]), - .datad(\inst13|inst|Decoder0~7_combout ), + .dataa(gnd), + .datab(\GSENSOR_SDI~input_o ), + .datac(\inst13|inst|data_rx [4]), + .datad(\inst13|inst|Decoder0~5_combout ), .cin(gnd), - .combout(\inst13|inst|data_rx[6]~6_combout ), + .combout(\inst13|inst|data_rx[4]~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[6]~6 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[6]~6 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[4]~4 .lut_mask = 16'hCCF0; +defparam \inst13|inst|data_rx[4]~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X47_Y38_N27 -dffeas \inst13|inst|data_rx[6] ( +// Location: FF_X55_Y34_N15 +dffeas \inst13|inst|data_rx[4] ( .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[6]~6_combout ), + .d(\inst13|inst|data_rx[4]~4_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -12277,34 +12461,34 @@ dffeas \inst13|inst|data_rx[6] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rx [6]), + .q(\inst13|inst|data_rx [4]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rx[6] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[6] .power_up = "low"; +defparam \inst13|inst|data_rx[4] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N16 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[6]~feeder ( +// Location: LCCOMB_X56_Y34_N4 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[4]~feeder ( // Equation(s): -// \inst13|inst|data_rd[6]~feeder_combout = \inst13|inst|data_rx [6] +// \inst13|inst|data_rd[4]~feeder_combout = \inst13|inst|data_rx [4] .dataa(gnd), .datab(gnd), - .datac(\inst13|inst|data_rx [6]), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst|data_rx [4]), .cin(gnd), - .combout(\inst13|inst|data_rd[6]~feeder_combout ), + .combout(\inst13|inst|data_rd[4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[6]~feeder .lut_mask = 16'hF0F0; -defparam \inst13|inst|data_rd[6]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[4]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst|data_rd[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N17 -dffeas \inst13|inst|data_rd[6] ( +// Location: FF_X56_Y34_N5 +dffeas \inst13|inst|data_rd[4] ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[6]~feeder_combout ), + .d(\inst13|inst|data_rd[4]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -12313,34 +12497,34 @@ dffeas \inst13|inst|data_rd[6] ( .ena(\inst13|inst|state~14_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rd [6]), + .q(\inst13|inst|data_rd [4]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rd[6] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[6] .power_up = "low"; +defparam \inst13|inst|data_rd[4] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N0 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[14]~17 ( +// Location: LCCOMB_X60_Y36_N0 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[12]~15 ( // Equation(s): -// \inst13|inst14|data_out[14]~17_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [6]))) +// \inst13|inst14|data_out[12]~15_combout = (\inst13|inst14|state.Rx2~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [4]))) - .dataa(\inst13|inst14|prev_busy~q ), + .dataa(\inst13|inst14|state.Rx2~q ), .datab(\inst13|inst|busy~q ), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst|data_rd [6]), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [4]), .cin(gnd), - .combout(\inst13|inst14|data_out[14]~17_combout ), + .combout(\inst13|inst14|data_out[12]~15_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[14]~17 .lut_mask = 16'h2000; -defparam \inst13|inst14|data_out[14]~17 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[12]~15 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[12]~15 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N1 -dffeas \inst13|inst14|data_out[14] ( +// Location: FF_X60_Y36_N1 +dffeas \inst13|inst14|data_out[12] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[14]~17_combout ), + .d(\inst13|inst14|data_out[12]~15_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -12349,2137 +12533,2302 @@ dffeas \inst13|inst14|data_out[14] ( .ena(\inst13|inst14|data_out[15]~11_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [14]), + .q(\inst13|inst14|data_out [12]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[14] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[14] .power_up = "low"; +defparam \inst13|inst14|data_out[12] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N26 -fiftyfivenm_lcell_comb \inst13|inst1[14]~84 ( +// Location: LCCOMB_X61_Y37_N16 +fiftyfivenm_lcell_comb \inst13|inst1[12]~79 ( // Equation(s): -// \inst13|inst1[14]~84_combout = (\inst13|inst1[14]~83_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [14]) # (!\inst3|I2C_DATA_EN~combout )))) +// \inst13|inst1[12]~79_combout = (\inst13|inst1[12]~78_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [12]) # (!\inst3|I2C_DATA_EN~combout )))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst13|inst1[14]~83_combout ), + .dataa(\inst13|inst1[12]~78_combout ), + .datab(\inst|IO_WRITE_int~q ), .datac(\inst3|I2C_DATA_EN~combout ), - .datad(\inst13|inst14|data_out [14]), + .datad(\inst13|inst14|data_out [12]), .cin(gnd), - .combout(\inst13|inst1[14]~84_combout ), + .combout(\inst13|inst1[12]~79_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[14]~84 .lut_mask = 16'hCC8C; -defparam \inst13|inst1[14]~84 .sum_lutc_input = "datac"; +defparam \inst13|inst1[12]~79 .lut_mask = 16'hAA8A; +defparam \inst13|inst1[12]~79 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N26 -fiftyfivenm_lcell_comb \inst4|COUNT[14]~41 ( +// Location: LCCOMB_X62_Y37_N0 +fiftyfivenm_lcell_comb \inst13|inst1[12]~80 ( // Equation(s): -// \inst4|COUNT[14]~41_combout = (\inst4|COUNT [14] & (!\inst4|COUNT[13]~40 )) # (!\inst4|COUNT [14] & ((\inst4|COUNT[13]~40 ) # (GND))) -// \inst4|COUNT[14]~42 = CARRY((!\inst4|COUNT[13]~40 ) # (!\inst4|COUNT [14])) +// \inst13|inst1[12]~80_combout = ((\inst13|inst1[12]~76_combout & \inst13|inst1[12]~79_combout )) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst4|COUNT [14]), + .dataa(\inst13|inst1[12]~76_combout ), .datab(gnd), + .datac(\inst13|inst1[12]~79_combout ), + .datad(\inst13|inst1[0]~24_combout ), + .cin(gnd), + .combout(\inst13|inst1[12]~80_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[12]~80 .lut_mask = 16'hA0FF; +defparam \inst13|inst1[12]~80 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X62_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst14|cmd_in[4]~feeder ( +// Equation(s): +// \inst13|inst14|cmd_in[4]~feeder_combout = \inst13|inst1[12]~80_combout + + .dataa(gnd), + .datab(\inst13|inst1[12]~80_combout ), .datac(gnd), - .datad(vcc), - .cin(\inst4|COUNT[13]~40 ), - .combout(\inst4|COUNT[14]~41_combout ), - .cout(\inst4|COUNT[14]~42 )); + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst14|cmd_in[4]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst4|COUNT[14]~41 .lut_mask = 16'h5A5F; -defparam \inst4|COUNT[14]~41 .sum_lutc_input = "cin"; +defparam \inst13|inst14|cmd_in[4]~feeder .lut_mask = 16'hCCCC; +defparam \inst13|inst14|cmd_in[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y43_N27 -dffeas \inst4|COUNT[14] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[14]~41_combout ), +// Location: FF_X62_Y36_N21 +dffeas \inst13|inst14|cmd_in[4] ( + .clk(\inst13|inst12~clkctrl_outclk ), + .d(\inst13|inst14|cmd_in[4]~feeder_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [14]), + .q(\inst13|inst14|cmd_in [4]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[14] .is_wysiwyg = "true"; -defparam \inst4|COUNT[14] .power_up = "low"; +defparam \inst13|inst14|cmd_in[4] .is_wysiwyg = "true"; +defparam \inst13|inst14|cmd_in[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N18 -fiftyfivenm_lcell_comb \inst13|inst1[14]~81 ( +// Location: LCCOMB_X62_Y36_N18 +fiftyfivenm_lcell_comb \inst13|inst14|Selector21~1 ( // Equation(s): -// \inst13|inst1[14]~81_combout = (!\inst3|SWITCH_EN~combout & (!\inst13|inst4~combout & ((\inst4|COUNT [14]) # (!\inst4|IO_OUT~combout )))) +// \inst13|inst14|Selector21~1_combout = (!\inst13|inst14|state.idle~q & (\inst13|inst14|go~q & (\inst13|inst14|cmd_in [5] $ (!\inst13|inst14|cmd_in [4])))) - .dataa(\inst3|SWITCH_EN~combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst13|inst4~combout ), - .datad(\inst4|COUNT [14]), + .dataa(\inst13|inst14|state.idle~q ), + .datab(\inst13|inst14|go~q ), + .datac(\inst13|inst14|cmd_in [5]), + .datad(\inst13|inst14|cmd_in [4]), .cin(gnd), - .combout(\inst13|inst1[14]~81_combout ), + .combout(\inst13|inst14|Selector21~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[14]~81 .lut_mask = 16'h0501; -defparam \inst13|inst1[14]~81 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector21~1 .lut_mask = 16'h4004; +defparam \inst13|inst14|Selector21~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N12 -fiftyfivenm_lcell_comb \inst|Selector13~7 ( +// Location: LCCOMB_X61_Y36_N6 +fiftyfivenm_lcell_comb \inst13|inst14|Selector20~2 ( // Equation(s): -// \inst|Selector13~7_combout = (\inst|Selector13~6_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[14]~84_combout & \inst13|inst1[14]~81_combout ))) +// \inst13|inst14|Selector20~2_combout = (!\inst13|inst14|cmd_in [0] & (\inst13|inst14|cmd_in [1] & ((\inst13|inst14|Selector22~0_combout ) # (\inst13|inst14|Selector21~1_combout )))) - .dataa(\inst|state.ex_in2~q ), - .datab(\inst|Selector13~6_combout ), - .datac(\inst13|inst1[14]~84_combout ), - .datad(\inst13|inst1[14]~81_combout ), + .dataa(\inst13|inst14|cmd_in [0]), + .datab(\inst13|inst14|Selector22~0_combout ), + .datac(\inst13|inst14|cmd_in [1]), + .datad(\inst13|inst14|Selector21~1_combout ), .cin(gnd), - .combout(\inst|Selector13~7_combout ), + .combout(\inst13|inst14|Selector20~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector13~7 .lut_mask = 16'hECCC; -defparam \inst|Selector13~7 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector20~2 .lut_mask = 16'h5040; +defparam \inst13|inst14|Selector20~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y41_N13 -dffeas \inst|AC[14] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector13~7_combout ), +// Location: LCCOMB_X61_Y36_N30 +fiftyfivenm_lcell_comb \inst13|inst14|Selector20~3 ( +// Equation(s): +// \inst13|inst14|Selector20~3_combout = (\inst13|inst14|Selector20~2_combout ) # ((\inst13|inst14|state.Rx2~q & ((\inst13|inst|busy~q ) # (!\inst13|inst14|prev_busy~q )))) + + .dataa(\inst13|inst|busy~q ), + .datab(\inst13|inst14|prev_busy~q ), + .datac(\inst13|inst14|state.Rx2~q ), + .datad(\inst13|inst14|Selector20~2_combout ), + .cin(gnd), + .combout(\inst13|inst14|Selector20~3_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst14|Selector20~3 .lut_mask = 16'hFFB0; +defparam \inst13|inst14|Selector20~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X61_Y36_N31 +dffeas \inst13|inst14|state.Rx2 ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector20~3_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [14]), + .q(\inst13|inst14|state.Rx2~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[14] .is_wysiwyg = "true"; -defparam \inst|AC[14] .power_up = "low"; +defparam \inst13|inst14|state.Rx2 .is_wysiwyg = "true"; +defparam \inst13|inst14|state.Rx2 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N4 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[30]~18 ( +// Location: LCCOMB_X56_Y34_N20 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~1 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[30]~18_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [15]))) # (!\inst|IR [4] & (\inst|AC [13])))) +// \inst13|inst|Decoder0~1_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [2] & (\inst13|inst|Decoder0~0_combout & \inst13|inst|bit_cnt [1]))) - .dataa(\inst|IR [4]), - .datab(\inst|AC [13]), - .datac(\inst|AC [15]), - .datad(\inst|IR [0]), + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|bit_cnt [2]), + .datac(\inst13|inst|Decoder0~0_combout ), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[30]~18_combout ), + .combout(\inst13|inst|Decoder0~1_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[30]~18 .lut_mask = 16'hE400; -defparam \inst|shifter|auto_generated|sbit_w[30]~18 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~1 .lut_mask = 16'h8000; +defparam \inst13|inst|Decoder0~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[30]~19 ( +// Location: LCCOMB_X56_Y34_N28 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[0]~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[30]~19_combout = (\inst|shifter|auto_generated|sbit_w[30]~18_combout ) # ((\inst|AC [14] & !\inst|IR [0])) +// \inst13|inst|data_rx[0]~0_combout = (\inst13|inst|Decoder0~1_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~1_combout & ((\inst13|inst|data_rx [0]))) - .dataa(\inst|AC [14]), + .dataa(\GSENSOR_SDI~input_o ), .datab(gnd), - .datac(\inst|shifter|auto_generated|sbit_w[30]~18_combout ), - .datad(\inst|IR [0]), + .datac(\inst13|inst|data_rx [0]), + .datad(\inst13|inst|Decoder0~1_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[30]~19_combout ), + .combout(\inst13|inst|data_rx[0]~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[30]~19 .lut_mask = 16'hF0FA; -defparam \inst|shifter|auto_generated|sbit_w[30]~19 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[0]~0 .lut_mask = 16'hAAF0; +defparam \inst13|inst|data_rx[0]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N12 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[44]~20 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[44]~20_combout = (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[30]~19_combout ) # ((\inst3|TIMER_EN~3_combout & \inst|shifter|auto_generated|sbit_w[26]~17_combout )))) # -// (!\inst3|I2C_RDY_EN~0_combout & (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[26]~17_combout )))) - - .dataa(\inst3|I2C_RDY_EN~0_combout ), - .datab(\inst3|TIMER_EN~3_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[30]~19_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[44]~20_combout ), - .cout()); +// Location: FF_X56_Y34_N29 +dffeas \inst13|inst|data_rx[0] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[0]~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rx [0]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[44]~20 .lut_mask = 16'hECA0; -defparam \inst|shifter|auto_generated|sbit_w[44]~20 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[0] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[44]~23 ( +// Location: LCCOMB_X56_Y34_N16 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[0]~feeder ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[44]~23_combout = (\inst|shifter|auto_generated|sbit_w[44]~20_combout ) # ((\inst|shifter|auto_generated|sbit_w[28]~22_combout & !\inst|IR [1])) +// \inst13|inst|data_rd[0]~feeder_combout = \inst13|inst|data_rx [0] - .dataa(\inst|shifter|auto_generated|sbit_w[44]~20_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), + .dataa(gnd), + .datab(gnd), .datac(gnd), - .datad(\inst|IR [1]), + .datad(\inst13|inst|data_rx [0]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), + .combout(\inst13|inst|data_rd[0]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[44]~23 .lut_mask = 16'hAAEE; -defparam \inst|shifter|auto_generated|sbit_w[44]~23 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[0]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst|data_rd[0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N18 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[60]~70 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[60]~70_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|AC [15])) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[40]~28_combout ))))) - - .dataa(\inst|AC [15]), - .datab(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), - .datac(\inst|IR [2]), - .datad(\inst|IR [4]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[60]~70_combout ), - .cout()); +// Location: FF_X56_Y34_N17 +dffeas \inst13|inst|data_rd[0] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[0]~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst|state~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rd [0]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[60]~70 .lut_mask = 16'hA0C0; -defparam \inst|shifter|auto_generated|sbit_w[60]~70 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[0] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N0 -fiftyfivenm_lcell_comb \inst|Selector23~0 ( +// Location: LCCOMB_X60_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[8]~10 ( // Equation(s): -// \inst|Selector23~0_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[60]~70_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[44]~23_combout )))) +// \inst13|inst14|data_out[8]~10_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [0]))) - .dataa(\inst|IR [2]), - .datab(\inst|Selector27~4_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[60]~70_combout ), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|state.Rx2~q ), + .datad(\inst13|inst|data_rd [0]), .cin(gnd), - .combout(\inst|Selector23~0_combout ), + .combout(\inst13|inst14|data_out[8]~10_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector23~0 .lut_mask = 16'hCC40; -defparam \inst|Selector23~0 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[8]~10 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[8]~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N30 -fiftyfivenm_lcell_comb \inst|Selector23~2 ( +// Location: FF_X60_Y36_N5 +dffeas \inst13|inst14|data_out[8] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[8]~10_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[15]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|data_out [8]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|data_out[8] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X59_Y39_N0 +fiftyfivenm_lcell_comb \inst13|inst1[8]~58 ( // Equation(s): -// \inst|Selector23~2_combout = (\inst|Selector27~1_combout & ((\inst|altsyncram_component|auto_generated|q_a [4]) # ((\inst|state.ex_loadi~q & \inst|IR [4])))) # (!\inst|Selector27~1_combout & (\inst|state.ex_loadi~q & (\inst|IR [4]))) +// \inst13|inst1[8]~58_combout = (\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [8]) # (!\inst3|I2C_DATA_EN~combout )) - .dataa(\inst|Selector27~1_combout ), - .datab(\inst|state.ex_loadi~q ), - .datac(\inst|IR [4]), - .datad(\inst|altsyncram_component|auto_generated|q_a [4]), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(gnd), + .datad(\inst13|inst14|data_out [8]), .cin(gnd), - .combout(\inst|Selector23~2_combout ), + .combout(\inst13|inst1[8]~58_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector23~2 .lut_mask = 16'hEAC0; -defparam \inst|Selector23~2 .sum_lutc_input = "datac"; +defparam \inst13|inst1[8]~58 .lut_mask = 16'hFFBB; +defparam \inst13|inst1[8]~58 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N12 -fiftyfivenm_lcell_comb \inst|Selector23~3 ( +// Location: LCCOMB_X59_Y39_N12 +fiftyfivenm_lcell_comb \inst13|inst1[8]~60 ( // Equation(s): -// \inst|Selector23~3_combout = (\inst|Selector23~2_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [4] $ (\inst|AC [4])))) +// \inst13|inst1[8]~60_combout = (\inst13|inst1[8]~59_combout & (\inst13|inst1[8]~58_combout & ((\inst11|count [8]) # (!\inst11|tri_enable~combout )))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [4]), - .datab(\inst|state.ex_xor~q ), - .datac(\inst|Selector23~2_combout ), - .datad(\inst|AC [4]), + .dataa(\inst11|tri_enable~combout ), + .datab(\inst13|inst1[8]~59_combout ), + .datac(\inst11|count [8]), + .datad(\inst13|inst1[8]~58_combout ), .cin(gnd), - .combout(\inst|Selector23~3_combout ), + .combout(\inst13|inst1[8]~60_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector23~3 .lut_mask = 16'hF4F8; -defparam \inst|Selector23~3 .sum_lutc_input = "datac"; +defparam \inst13|inst1[8]~60 .lut_mask = 16'hC400; +defparam \inst13|inst1[8]~60 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N12 -fiftyfivenm_lcell_comb \inst|Add1~25 ( +// Location: LCCOMB_X59_Y39_N6 +fiftyfivenm_lcell_comb \inst13|inst1[8]~61 ( // Equation(s): -// \inst|Add1~25_combout = (\inst|AC [4] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst13|inst1[8]~61_combout = (\inst13|inst1[8]~103_combout & (\inst13|inst1[8]~60_combout & ((\inst4|COUNT [8]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst|AC [4]), - .datab(\inst|state.ex_add~q ), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst13|inst1[8]~103_combout ), + .datab(\inst13|inst1[8]~60_combout ), + .datac(\inst4|COUNT [8]), + .datad(\inst4|IO_OUT~combout ), .cin(gnd), - .combout(\inst|Add1~25_combout ), + .combout(\inst13|inst1[8]~61_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~25 .lut_mask = 16'hAAA8; -defparam \inst|Add1~25 .sum_lutc_input = "datac"; +defparam \inst13|inst1[8]~61 .lut_mask = 16'h8088; +defparam \inst13|inst1[8]~61 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N4 -fiftyfivenm_lcell_comb \inst|Add1~23 ( +// Location: LCCOMB_X59_Y39_N24 +fiftyfivenm_lcell_comb \inst13|inst1[8]~62 ( // Equation(s): -// \inst|Add1~23_combout = (\inst|altsyncram_component|auto_generated|q_a [4] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [4] & ((\inst|state.ex_sub~q ))) +// \inst13|inst1[8]~62_combout = (\inst13|inst1[8]~61_combout ) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst|altsyncram_component|auto_generated|q_a [4]), + .dataa(gnd), .datab(gnd), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_sub~q ), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst13|inst1[8]~61_combout ), .cin(gnd), - .combout(\inst|Add1~23_combout ), + .combout(\inst13|inst1[8]~62_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~23 .lut_mask = 16'h55A0; -defparam \inst|Add1~23 .sum_lutc_input = "datac"; +defparam \inst13|inst1[8]~62 .lut_mask = 16'hFF0F; +defparam \inst13|inst1[8]~62 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X61_Y36_N23 +dffeas \inst13|inst14|cmd_in[0] ( + .clk(\inst13|inst12~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst1[8]~62_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|cmd_in [0]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|cmd_in[0] .is_wysiwyg = "true"; +defparam \inst13|inst14|cmd_in[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N2 -fiftyfivenm_lcell_comb \inst|Add1~24 ( +// Location: LCCOMB_X61_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst14|state~18 ( // Equation(s): -// \inst|Add1~24_combout = (\inst|Add1~1_combout & ((\inst|IR [4]) # ((\inst|Add1~23_combout & \inst|WideOr3~1_combout )))) # (!\inst|Add1~1_combout & (\inst|Add1~23_combout & (\inst|WideOr3~1_combout ))) +// \inst13|inst14|state~18_combout = \inst13|inst14|cmd_in [0] $ (\inst13|inst14|cmd_in [1]) - .dataa(\inst|Add1~1_combout ), - .datab(\inst|Add1~23_combout ), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|IR [4]), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst14|cmd_in [0]), + .datad(\inst13|inst14|cmd_in [1]), .cin(gnd), - .combout(\inst|Add1~24_combout ), + .combout(\inst13|inst14|state~18_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~24 .lut_mask = 16'hEAC0; -defparam \inst|Add1~24 .sum_lutc_input = "datac"; +defparam \inst13|inst14|state~18 .lut_mask = 16'h0FF0; +defparam \inst13|inst14|state~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N10 -fiftyfivenm_lcell_comb \inst|Add1~20 ( +// Location: LCCOMB_X62_Y36_N30 +fiftyfivenm_lcell_comb \inst13|inst14|Selector21~0 ( // Equation(s): -// \inst|Add1~20_combout = (\inst|AC [3] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst13|inst14|Selector21~0_combout = \inst13|inst14|cmd_in [5] $ (!\inst13|inst14|cmd_in [4]) - .dataa(\inst|AC [3]), - .datab(\inst|state.ex_add~q ), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst14|cmd_in [5]), + .datad(\inst13|inst14|cmd_in [4]), .cin(gnd), - .combout(\inst|Add1~20_combout ), + .combout(\inst13|inst14|Selector21~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~20 .lut_mask = 16'hAAA8; -defparam \inst|Add1~20 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector21~0 .lut_mask = 16'hF00F; +defparam \inst13|inst14|Selector21~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N28 -fiftyfivenm_lcell_comb \inst|Add1~18 ( +// Location: LCCOMB_X61_Y36_N10 +fiftyfivenm_lcell_comb \inst13|inst14|Selector16~0 ( // Equation(s): -// \inst|Add1~18_combout = (\inst|altsyncram_component|auto_generated|q_a [3] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [3] & ((\inst|state.ex_sub~q ))) +// \inst13|inst14|Selector16~0_combout = (!\inst13|inst14|state.idle~q & (((\inst13|inst14|Selector21~0_combout & !\inst13|inst14|state~18_combout )) # (!\inst13|inst14|go~q ))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [3]), - .datab(gnd), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst13|inst14|go~q ), + .datab(\inst13|inst14|state.idle~q ), + .datac(\inst13|inst14|Selector21~0_combout ), + .datad(\inst13|inst14|state~18_combout ), .cin(gnd), - .combout(\inst|Add1~18_combout ), + .combout(\inst13|inst14|Selector16~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~18 .lut_mask = 16'h55A0; -defparam \inst|Add1~18 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector16~0 .lut_mask = 16'h1131; +defparam \inst13|inst14|Selector16~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N14 -fiftyfivenm_lcell_comb \inst|Add1~19 ( +// Location: LCCOMB_X61_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst14|Selector16~1 ( // Equation(s): -// \inst|Add1~19_combout = (\inst|IR [3] & ((\inst|Add1~1_combout ) # ((\inst|Add1~18_combout & \inst|WideOr3~1_combout )))) # (!\inst|IR [3] & (\inst|Add1~18_combout & (\inst|WideOr3~1_combout ))) +// \inst13|inst14|Selector16~1_combout = (!\inst13|inst14|data_out[0]~19_combout & (!\inst13|inst14|Selector16~0_combout & ((\inst13|inst14|state~18_combout ) # (!\inst13|inst14|Selector22~0_combout )))) - .dataa(\inst|IR [3]), - .datab(\inst|Add1~18_combout ), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~1_combout ), + .dataa(\inst13|inst14|data_out[0]~19_combout ), + .datab(\inst13|inst14|Selector22~0_combout ), + .datac(\inst13|inst14|state~18_combout ), + .datad(\inst13|inst14|Selector16~0_combout ), .cin(gnd), - .combout(\inst|Add1~19_combout ), + .combout(\inst13|inst14|Selector16~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~19 .lut_mask = 16'hEAC0; -defparam \inst|Add1~19 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector16~1 .lut_mask = 16'h0051; +defparam \inst13|inst14|Selector16~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N6 -fiftyfivenm_lcell_comb \inst|Add1~15 ( -// Equation(s): -// \inst|Add1~15_combout = (\inst|AC [2] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) - - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|AC [2]), - .cin(gnd), - .combout(\inst|Add1~15_combout ), - .cout()); +// Location: FF_X61_Y36_N17 +dffeas \inst13|inst14|state.idle ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector16~1_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|state.idle~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~15 .lut_mask = 16'hFE00; -defparam \inst|Add1~15 .sum_lutc_input = "datac"; +defparam \inst13|inst14|state.idle .is_wysiwyg = "true"; +defparam \inst13|inst14|state.idle .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N18 -fiftyfivenm_lcell_comb \inst|Add1~13 ( +// Location: LCCOMB_X56_Y38_N24 +fiftyfivenm_lcell_comb \inst13|inst14|running~0 ( // Equation(s): -// \inst|Add1~13_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [2])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [2] & \inst|state.ex_add~q )) +// \inst13|inst14|running~0_combout = (\inst13|inst14|state.idle~q & ((\inst13|inst14|running~q ))) # (!\inst13|inst14|state.idle~q & (\inst13|inst14|go~q )) .dataa(gnd), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [2]), - .datad(\inst|state.ex_add~q ), + .datab(\inst13|inst14|go~q ), + .datac(\inst13|inst14|running~q ), + .datad(\inst13|inst14|state.idle~q ), .cin(gnd), - .combout(\inst|Add1~13_combout ), + .combout(\inst13|inst14|running~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~13 .lut_mask = 16'h3C0C; -defparam \inst|Add1~13 .sum_lutc_input = "datac"; +defparam \inst13|inst14|running~0 .lut_mask = 16'hF0CC; +defparam \inst13|inst14|running~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N16 -fiftyfivenm_lcell_comb \inst|Add1~14 ( +// Location: FF_X56_Y38_N25 +dffeas \inst13|inst14|running ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|running~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|running~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|running .is_wysiwyg = "true"; +defparam \inst13|inst14|running .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y38_N6 +fiftyfivenm_lcell_comb \inst13|inst14|latch_rdy~0 ( // Equation(s): -// \inst|Add1~14_combout = (\inst|WideOr3~1_combout & ((\inst|Add1~13_combout ) # ((\inst|Add1~1_combout & \inst|IR [2])))) # (!\inst|WideOr3~1_combout & (((\inst|Add1~1_combout & \inst|IR [2])))) +// \inst13|inst14|latch_rdy~0_combout = (\inst13|inst14|running~q ) # ((!\inst1|altpll_component|auto_generated|pll_lock_sync~q ) # (!\inst1|altpll_component|auto_generated|wire_pll1_locked )) - .dataa(\inst|WideOr3~1_combout ), - .datab(\inst|Add1~13_combout ), - .datac(\inst|Add1~1_combout ), - .datad(\inst|IR [2]), + .dataa(\inst13|inst14|running~q ), + .datab(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .datac(gnd), + .datad(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), .cin(gnd), - .combout(\inst|Add1~14_combout ), + .combout(\inst13|inst14|latch_rdy~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~14 .lut_mask = 16'hF888; -defparam \inst|Add1~14 .sum_lutc_input = "datac"; +defparam \inst13|inst14|latch_rdy~0 .lut_mask = 16'hBBFF; +defparam \inst13|inst14|latch_rdy~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N4 -fiftyfivenm_lcell_comb \inst|Add1~10 ( +// Location: FF_X57_Y38_N9 +dffeas \inst13|inst14|go ( + .clk(\inst13|inst6~combout ), + .d(\inst13|inst14|go~feeder_combout ), + .asdata(vcc), + .clrn(!\inst13|inst14|latch_rdy~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|go~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|go .is_wysiwyg = "true"; +defparam \inst13|inst14|go .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X61_Y36_N12 +fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[7]~0 ( // Equation(s): -// \inst|Add1~10_combout = (\inst|AC [1] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) +// \inst13|inst14|tx_addr[7]~0_combout = (\inst13|inst14|go~q & !\inst13|inst14|state.idle~q ) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|AC [1]), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst14|go~q ), + .datad(\inst13|inst14|state.idle~q ), .cin(gnd), - .combout(\inst|Add1~10_combout ), + .combout(\inst13|inst14|tx_addr[7]~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~10 .lut_mask = 16'hFE00; -defparam \inst|Add1~10 .sum_lutc_input = "datac"; +defparam \inst13|inst14|tx_addr[7]~0 .lut_mask = 16'h00F0; +defparam \inst13|inst14|tx_addr[7]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N16 -fiftyfivenm_lcell_comb \inst|Add1~8 ( +// Location: LCCOMB_X62_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst14|Equal0~0 ( // Equation(s): -// \inst|Add1~8_combout = (\inst|altsyncram_component|auto_generated|q_a [1] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [1] & ((\inst|state.ex_sub~q ))) +// \inst13|inst14|Equal0~0_combout = (\inst13|inst14|cmd_in [5] & !\inst13|inst14|cmd_in [4]) - .dataa(\inst|state.ex_add~q ), + .dataa(gnd), .datab(gnd), - .datac(\inst|altsyncram_component|auto_generated|q_a [1]), - .datad(\inst|state.ex_sub~q ), + .datac(\inst13|inst14|cmd_in [5]), + .datad(\inst13|inst14|cmd_in [4]), .cin(gnd), - .combout(\inst|Add1~8_combout ), + .combout(\inst13|inst14|Equal0~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~8 .lut_mask = 16'h0FA0; -defparam \inst|Add1~8 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Equal0~0 .lut_mask = 16'h00F0; +defparam \inst13|inst14|Equal0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N22 -fiftyfivenm_lcell_comb \inst|Add1~9 ( +// Location: LCCOMB_X62_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst14|Selector17~0 ( // Equation(s): -// \inst|Add1~9_combout = (\inst|IR [1] & ((\inst|Add1~1_combout ) # ((\inst|Add1~8_combout & \inst|WideOr3~1_combout )))) # (!\inst|IR [1] & (\inst|Add1~8_combout & (\inst|WideOr3~1_combout ))) +// \inst13|inst14|Selector17~0_combout = (\inst13|inst14|tx_addr[7]~0_combout & ((\inst13|inst14|Equal0~0_combout ) # ((!\inst13|inst14|state_machine~0_combout & \inst13|inst14|state.Tx2~q )))) # (!\inst13|inst14|tx_addr[7]~0_combout & +// (!\inst13|inst14|state_machine~0_combout & (\inst13|inst14|state.Tx2~q ))) - .dataa(\inst|IR [1]), - .datab(\inst|Add1~8_combout ), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~1_combout ), + .dataa(\inst13|inst14|tx_addr[7]~0_combout ), + .datab(\inst13|inst14|state_machine~0_combout ), + .datac(\inst13|inst14|state.Tx2~q ), + .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), - .combout(\inst|Add1~9_combout ), + .combout(\inst13|inst14|Selector17~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~9 .lut_mask = 16'hEAC0; -defparam \inst|Add1~9 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector17~0 .lut_mask = 16'hBA30; +defparam \inst13|inst14|Selector17~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N8 -fiftyfivenm_lcell_comb \inst|Add1~3 ( +// Location: FF_X62_Y36_N27 +dffeas \inst13|inst14|state.Tx2 ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector17~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|state.Tx2~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|state.Tx2 .is_wysiwyg = "true"; +defparam \inst13|inst14|state.Tx2 .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X62_Y36_N24 +fiftyfivenm_lcell_comb \inst13|inst14|Selector18~0 ( // Equation(s): -// \inst|Add1~3_combout = (\inst|AC [0] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_sub~q )))) +// \inst13|inst14|Selector18~0_combout = (\inst13|inst14|cmd_in [4] & (\inst13|inst14|go~q & (!\inst13|inst14|cmd_in [5] & !\inst13|inst14|state.idle~q ))) - .dataa(\inst|state.ex_addi~q ), - .datab(\inst|state.ex_add~q ), - .datac(\inst|AC [0]), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst13|inst14|cmd_in [4]), + .datab(\inst13|inst14|go~q ), + .datac(\inst13|inst14|cmd_in [5]), + .datad(\inst13|inst14|state.idle~q ), .cin(gnd), - .combout(\inst|Add1~3_combout ), + .combout(\inst13|inst14|Selector18~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~3 .lut_mask = 16'hF0E0; -defparam \inst|Add1~3 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector18~0 .lut_mask = 16'h0008; +defparam \inst13|inst14|Selector18~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N12 -fiftyfivenm_lcell_comb \inst|Add1~0 ( +// Location: FF_X62_Y36_N25 +dffeas \inst13|inst14|state.Tx1p ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector18~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|state.Tx1p~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|state.Tx1p .is_wysiwyg = "true"; +defparam \inst13|inst14|state.Tx1p .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X62_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst14|Selector19~0 ( // Equation(s): -// \inst|Add1~0_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [0]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [0])) +// \inst13|inst14|Selector19~0_combout = (\inst13|inst14|state.Tx1p~q ) # ((\inst13|inst14|state_machine~0_combout & (\inst13|inst14|state.Tx2~q )) # (!\inst13|inst14|state_machine~0_combout & ((\inst13|inst14|state.Tx1~q )))) - .dataa(\inst|state.ex_sub~q ), - .datab(gnd), - .datac(\inst|state.ex_add~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [0]), + .dataa(\inst13|inst14|state.Tx2~q ), + .datab(\inst13|inst14|state.Tx1p~q ), + .datac(\inst13|inst14|state.Tx1~q ), + .datad(\inst13|inst14|state_machine~0_combout ), .cin(gnd), - .combout(\inst|Add1~0_combout ), + .combout(\inst13|inst14|Selector19~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~0 .lut_mask = 16'h50AA; -defparam \inst|Add1~0 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector19~0 .lut_mask = 16'hEEFC; +defparam \inst13|inst14|Selector19~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X62_Y36_N9 +dffeas \inst13|inst14|state.Tx1 ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector19~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|state.Tx1~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|state.Tx1 .is_wysiwyg = "true"; +defparam \inst13|inst14|state.Tx1 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N30 -fiftyfivenm_lcell_comb \inst|Add1~2 ( +// Location: LCCOMB_X62_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst14|Selector32~0 ( // Equation(s): -// \inst|Add1~2_combout = (\inst|Add1~0_combout & ((\inst|WideOr3~1_combout ) # ((\inst|IR [0] & \inst|Add1~1_combout )))) # (!\inst|Add1~0_combout & (\inst|IR [0] & ((\inst|Add1~1_combout )))) +// \inst13|inst14|Selector32~0_combout = (!\inst13|inst14|state.Tx1~q & (!\inst13|inst14|state.Rx1~q & ((\inst13|inst14|comm_en~q ) # (\inst13|inst14|state.idle~q )))) - .dataa(\inst|Add1~0_combout ), - .datab(\inst|IR [0]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~1_combout ), + .dataa(\inst13|inst14|comm_en~q ), + .datab(\inst13|inst14|state.Tx1~q ), + .datac(\inst13|inst14|state.idle~q ), + .datad(\inst13|inst14|state.Rx1~q ), .cin(gnd), - .combout(\inst|Add1~2_combout ), + .combout(\inst13|inst14|Selector32~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~2 .lut_mask = 16'hECA0; -defparam \inst|Add1~2 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector32~0 .lut_mask = 16'h0032; +defparam \inst13|inst14|Selector32~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N16 -fiftyfivenm_lcell_comb \inst|Add1~5 ( +// Location: LCCOMB_X61_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst14|Selector32~1 ( // Equation(s): -// \inst|Add1~5_cout = CARRY(\inst|state.ex_sub~q ) +// \inst13|inst14|Selector32~1_combout = (!\inst13|inst14|state.Rx1~q & (\inst13|inst14|cmd_in [0] $ (\inst13|inst14|cmd_in [1]))) - .dataa(gnd), - .datab(\inst|state.ex_sub~q ), + .dataa(\inst13|inst14|cmd_in [0]), + .datab(\inst13|inst14|state.Rx1~q ), .datac(gnd), - .datad(vcc), + .datad(\inst13|inst14|cmd_in [1]), .cin(gnd), - .combout(), - .cout(\inst|Add1~5_cout )); + .combout(\inst13|inst14|Selector32~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~5 .lut_mask = 16'h00CC; -defparam \inst|Add1~5 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector32~1 .lut_mask = 16'h1122; +defparam \inst13|inst14|Selector32~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N18 -fiftyfivenm_lcell_comb \inst|Add1~6 ( +// Location: LCCOMB_X62_Y36_N0 +fiftyfivenm_lcell_comb \inst13|inst14|Selector32~2 ( // Equation(s): -// \inst|Add1~6_combout = (\inst|Add1~3_combout & ((\inst|Add1~2_combout & (\inst|Add1~5_cout & VCC)) # (!\inst|Add1~2_combout & (!\inst|Add1~5_cout )))) # (!\inst|Add1~3_combout & ((\inst|Add1~2_combout & (!\inst|Add1~5_cout )) # -// (!\inst|Add1~2_combout & ((\inst|Add1~5_cout ) # (GND))))) -// \inst|Add1~7 = CARRY((\inst|Add1~3_combout & (!\inst|Add1~2_combout & !\inst|Add1~5_cout )) # (!\inst|Add1~3_combout & ((!\inst|Add1~5_cout ) # (!\inst|Add1~2_combout )))) +// \inst13|inst14|Selector32~2_combout = (\inst13|inst14|Selector32~0_combout ) # ((\inst13|inst14|comm_en~q & ((\inst13|inst14|Selector32~1_combout ) # (!\inst13|inst14|state_machine~1_combout )))) - .dataa(\inst|Add1~3_combout ), - .datab(\inst|Add1~2_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~5_cout ), - .combout(\inst|Add1~6_combout ), - .cout(\inst|Add1~7 )); + .dataa(\inst13|inst14|state_machine~1_combout ), + .datab(\inst13|inst14|Selector32~0_combout ), + .datac(\inst13|inst14|comm_en~q ), + .datad(\inst13|inst14|Selector32~1_combout ), + .cin(gnd), + .combout(\inst13|inst14|Selector32~2_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~6 .lut_mask = 16'h9617; -defparam \inst|Add1~6 .sum_lutc_input = "cin"; +defparam \inst13|inst14|Selector32~2 .lut_mask = 16'hFCDC; +defparam \inst13|inst14|Selector32~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N20 -fiftyfivenm_lcell_comb \inst|Add1~11 ( -// Equation(s): -// \inst|Add1~11_combout = ((\inst|Add1~10_combout $ (\inst|Add1~9_combout $ (!\inst|Add1~7 )))) # (GND) -// \inst|Add1~12 = CARRY((\inst|Add1~10_combout & ((\inst|Add1~9_combout ) # (!\inst|Add1~7 ))) # (!\inst|Add1~10_combout & (\inst|Add1~9_combout & !\inst|Add1~7 ))) - - .dataa(\inst|Add1~10_combout ), - .datab(\inst|Add1~9_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~7 ), - .combout(\inst|Add1~11_combout ), - .cout(\inst|Add1~12 )); +// Location: FF_X62_Y36_N1 +dffeas \inst13|inst14|comm_en ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector32~2_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|comm_en~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~11 .lut_mask = 16'h698E; -defparam \inst|Add1~11 .sum_lutc_input = "cin"; +defparam \inst13|inst14|comm_en .is_wysiwyg = "true"; +defparam \inst13|inst14|comm_en .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N22 -fiftyfivenm_lcell_comb \inst|Add1~16 ( +// Location: LCCOMB_X61_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst14|rnw~1 ( // Equation(s): -// \inst|Add1~16_combout = (\inst|Add1~15_combout & ((\inst|Add1~14_combout & (\inst|Add1~12 & VCC)) # (!\inst|Add1~14_combout & (!\inst|Add1~12 )))) # (!\inst|Add1~15_combout & ((\inst|Add1~14_combout & (!\inst|Add1~12 )) # (!\inst|Add1~14_combout & -// ((\inst|Add1~12 ) # (GND))))) -// \inst|Add1~17 = CARRY((\inst|Add1~15_combout & (!\inst|Add1~14_combout & !\inst|Add1~12 )) # (!\inst|Add1~15_combout & ((!\inst|Add1~12 ) # (!\inst|Add1~14_combout )))) +// \inst13|inst14|rnw~1_combout = (\inst13|inst14|go~q & ((\inst13|inst14|rnw~q ) # (\inst13|inst14|cmd_in [0] $ (\inst13|inst14|cmd_in [1])))) - .dataa(\inst|Add1~15_combout ), - .datab(\inst|Add1~14_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~12 ), - .combout(\inst|Add1~16_combout ), - .cout(\inst|Add1~17 )); + .dataa(\inst13|inst14|rnw~q ), + .datab(\inst13|inst14|go~q ), + .datac(\inst13|inst14|cmd_in [0]), + .datad(\inst13|inst14|cmd_in [1]), + .cin(gnd), + .combout(\inst13|inst14|rnw~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~16 .lut_mask = 16'h9617; -defparam \inst|Add1~16 .sum_lutc_input = "cin"; +defparam \inst13|inst14|rnw~1 .lut_mask = 16'h8CC8; +defparam \inst13|inst14|rnw~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N24 -fiftyfivenm_lcell_comb \inst|Add1~21 ( +// Location: LCCOMB_X62_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst14|rnw~0 ( // Equation(s): -// \inst|Add1~21_combout = ((\inst|Add1~20_combout $ (\inst|Add1~19_combout $ (!\inst|Add1~17 )))) # (GND) -// \inst|Add1~22 = CARRY((\inst|Add1~20_combout & ((\inst|Add1~19_combout ) # (!\inst|Add1~17 ))) # (!\inst|Add1~20_combout & (\inst|Add1~19_combout & !\inst|Add1~17 ))) +// \inst13|inst14|rnw~0_combout = (!\inst13|inst14|prev_busy~q & (\inst13|inst14|state.Tx1~q & \inst13|inst|busy~q )) - .dataa(\inst|Add1~20_combout ), - .datab(\inst|Add1~19_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~17 ), - .combout(\inst|Add1~21_combout ), - .cout(\inst|Add1~22 )); + .dataa(gnd), + .datab(\inst13|inst14|prev_busy~q ), + .datac(\inst13|inst14|state.Tx1~q ), + .datad(\inst13|inst|busy~q ), + .cin(gnd), + .combout(\inst13|inst14|rnw~0_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~21 .lut_mask = 16'h698E; -defparam \inst|Add1~21 .sum_lutc_input = "cin"; +defparam \inst13|inst14|rnw~0 .lut_mask = 16'h3000; +defparam \inst13|inst14|rnw~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N26 -fiftyfivenm_lcell_comb \inst|Add1~26 ( +// Location: LCCOMB_X61_Y36_N24 +fiftyfivenm_lcell_comb \inst13|inst14|rnw~2 ( // Equation(s): -// \inst|Add1~26_combout = (\inst|Add1~25_combout & ((\inst|Add1~24_combout & (\inst|Add1~22 & VCC)) # (!\inst|Add1~24_combout & (!\inst|Add1~22 )))) # (!\inst|Add1~25_combout & ((\inst|Add1~24_combout & (!\inst|Add1~22 )) # (!\inst|Add1~24_combout & -// ((\inst|Add1~22 ) # (GND))))) -// \inst|Add1~27 = CARRY((\inst|Add1~25_combout & (!\inst|Add1~24_combout & !\inst|Add1~22 )) # (!\inst|Add1~25_combout & ((!\inst|Add1~22 ) # (!\inst|Add1~24_combout )))) +// \inst13|inst14|rnw~2_combout = (\inst13|inst14|data_out[7]~0_combout & ((\inst13|inst14|state.idle~q & ((\inst13|inst14|rnw~0_combout ))) # (!\inst13|inst14|state.idle~q & (\inst13|inst14|rnw~1_combout )))) - .dataa(\inst|Add1~25_combout ), - .datab(\inst|Add1~24_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~22 ), - .combout(\inst|Add1~26_combout ), - .cout(\inst|Add1~27 )); + .dataa(\inst13|inst14|data_out[7]~0_combout ), + .datab(\inst13|inst14|state.idle~q ), + .datac(\inst13|inst14|rnw~1_combout ), + .datad(\inst13|inst14|rnw~0_combout ), + .cin(gnd), + .combout(\inst13|inst14|rnw~2_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~26 .lut_mask = 16'h9617; -defparam \inst|Add1~26 .sum_lutc_input = "cin"; +defparam \inst13|inst14|rnw~2 .lut_mask = 16'hA820; +defparam \inst13|inst14|rnw~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N28 -fiftyfivenm_lcell_comb \inst|Selector23~1 ( +// Location: LCCOMB_X61_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst14|rnw~3 ( // Equation(s): -// \inst|Selector23~1_combout = (\inst|AC [4] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [4])) # (!\inst|Selector27~6_combout ))) +// \inst13|inst14|rnw~3_combout = (\inst13|inst14|rnw~2_combout & (((\inst13|inst14|state.idle~q ) # (\inst13|inst14|Selector21~0_combout )))) # (!\inst13|inst14|rnw~2_combout & (\inst13|inst14|rnw~q )) - .dataa(\inst|state.ex_and~q ), - .datab(\inst|Selector27~6_combout ), - .datac(\inst|AC [4]), - .datad(\inst|altsyncram_component|auto_generated|q_a [4]), + .dataa(\inst13|inst14|rnw~q ), + .datab(\inst13|inst14|state.idle~q ), + .datac(\inst13|inst14|Selector21~0_combout ), + .datad(\inst13|inst14|rnw~2_combout ), .cin(gnd), - .combout(\inst|Selector23~1_combout ), + .combout(\inst13|inst14|rnw~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector23~1 .lut_mask = 16'hB030; -defparam \inst|Selector23~1 .sum_lutc_input = "datac"; +defparam \inst13|inst14|rnw~3 .lut_mask = 16'hFCAA; +defparam \inst13|inst14|rnw~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N22 -fiftyfivenm_lcell_comb \inst|Selector23~4 ( -// Equation(s): -// \inst|Selector23~4_combout = (\inst|Selector23~3_combout ) # ((\inst|Selector23~1_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~26_combout ))) - - .dataa(\inst|Selector23~3_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Add1~26_combout ), - .datad(\inst|Selector23~1_combout ), - .cin(gnd), - .combout(\inst|Selector23~4_combout ), - .cout()); +// Location: FF_X61_Y36_N9 +dffeas \inst13|inst14|rnw ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|rnw~3_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|rnw~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector23~4 .lut_mask = 16'hFFEA; -defparam \inst|Selector23~4 .sum_lutc_input = "datac"; +defparam \inst13|inst14|rnw .is_wysiwyg = "true"; +defparam \inst13|inst14|rnw .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N2 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[52]~68 ( +// Location: LCCOMB_X57_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst|Selector19~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[52]~68_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[40]~28_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[32]~5_combout )))) +// \inst13|inst|Selector19~0_combout = (\inst13|inst|state.restart~q ) # ((\inst13|inst14|comm_en~q & !\inst13|inst|state.ready~q )) - .dataa(\inst|IR [4]), - .datab(\inst|IR [2]), - .datac(\inst|shifter|auto_generated|sbit_w[32]~5_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), + .dataa(\inst13|inst|state.restart~q ), + .datab(gnd), + .datac(\inst13|inst14|comm_en~q ), + .datad(\inst13|inst|state.ready~q ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[52]~68_combout ), + .combout(\inst13|inst|Selector19~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[52]~68 .lut_mask = 16'hC840; -defparam \inst|shifter|auto_generated|sbit_w[52]~68 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector19~0 .lut_mask = 16'hAAFA; +defparam \inst13|inst|Selector19~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X57_Y36_N29 +dffeas \inst13|inst|state.start ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector19~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|state.start~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|state.start .is_wysiwyg = "true"; +defparam \inst13|inst|state.start .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N28 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[52]~69 ( +// Location: LCCOMB_X55_Y35_N26 +fiftyfivenm_lcell_comb \inst13|inst|Equal1~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[52]~69_combout = (\inst|shifter|auto_generated|sbit_w[52]~68_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[36]~14_combout )) +// \inst13|inst|Equal1~0_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & \inst13|inst|bit_cnt [2])) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), - .datac(gnd), - .datad(\inst|shifter|auto_generated|sbit_w[52]~68_combout ), + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|bit_cnt [1]), + .datac(\inst13|inst|bit_cnt [2]), + .datad(gnd), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[52]~69_combout ), + .combout(\inst13|inst|Equal1~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[52]~69 .lut_mask = 16'hFF44; -defparam \inst|shifter|auto_generated|sbit_w[52]~69 .sum_lutc_input = "datac"; +defparam \inst13|inst|Equal1~0 .lut_mask = 16'h8080; +defparam \inst13|inst|Equal1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N22 -fiftyfivenm_lcell_comb \inst|Selector23~5 ( +// Location: LCCOMB_X56_Y35_N6 +fiftyfivenm_lcell_comb \inst13|inst|Selector21~0 ( // Equation(s): -// \inst|Selector23~5_combout = (\inst|Selector23~0_combout ) # ((\inst|Selector23~4_combout ) # ((\inst|Selector20~0_combout & \inst|shifter|auto_generated|sbit_w[52]~69_combout ))) +// \inst13|inst|Selector21~0_combout = (\inst13|inst|state.start~q ) # ((\inst13|inst|state.command~q & !\inst13|inst|Equal1~0_combout )) - .dataa(\inst|Selector20~0_combout ), - .datab(\inst|Selector23~0_combout ), - .datac(\inst|Selector23~4_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[52]~69_combout ), + .dataa(gnd), + .datab(\inst13|inst|state.start~q ), + .datac(\inst13|inst|state.command~q ), + .datad(\inst13|inst|Equal1~0_combout ), .cin(gnd), - .combout(\inst|Selector23~5_combout ), + .combout(\inst13|inst|Selector21~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector23~5 .lut_mask = 16'hFEFC; -defparam \inst|Selector23~5 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X54_Y54_N22 -fiftyfivenm_io_ibuf \SW[4]~input ( - .i(SW[4]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[4]~input_o )); -// synopsys translate_off -defparam \SW[4]~input .bus_hold = "false"; -defparam \SW[4]~input .listen_to_nsleep_signal = "false"; -defparam \SW[4]~input .simulate_z_as = "z"; +defparam \inst13|inst|Selector21~0 .lut_mask = 16'hCCFC; +defparam \inst13|inst|Selector21~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y42_N19 -dffeas \inst7|B_DI[4] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\SW[4]~input_o ), - .clrn(vcc), +// Location: FF_X56_Y35_N7 +dffeas \inst13|inst|state.command ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector21~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [4]), + .q(\inst13|inst|state.command~q ), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[4] .is_wysiwyg = "true"; -defparam \inst7|B_DI[4] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y42_N18 -fiftyfivenm_lcell_comb \inst13|inst1[4]~36 ( -// Equation(s): -// \inst13|inst1[4]~36_combout = (\inst|IO_WRITE_int~q & (\inst|AC [4] & ((\inst7|B_DI [4]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [4]) # (!\inst3|SWITCH_EN~combout )))) - - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst|AC [4]), - .datac(\inst7|B_DI [4]), - .datad(\inst3|SWITCH_EN~combout ), - .cin(gnd), - .combout(\inst13|inst1[4]~36_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[4]~36 .lut_mask = 16'hD0DD; -defparam \inst13|inst1[4]~36 .sum_lutc_input = "datac"; +defparam \inst13|inst|state.command .is_wysiwyg = "true"; +defparam \inst13|inst|state.command .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N28 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[4]~6 ( +// Location: LCCOMB_X56_Y35_N28 +fiftyfivenm_lcell_comb \inst13|inst|state~15 ( // Equation(s): -// \inst13|inst14|data_out[4]~6_combout = (\inst13|inst|data_rd [4] & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx1~q & \inst13|inst14|prev_busy~q ))) +// \inst13|inst|state~15_combout = (\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [2] & \inst13|inst|state.command~q ))) - .dataa(\inst13|inst|data_rd [4]), - .datab(\inst13|inst|busy~q ), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst14|prev_busy~q ), + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|bit_cnt [2]), + .datad(\inst13|inst|state.command~q ), .cin(gnd), - .combout(\inst13|inst14|data_out[4]~6_combout ), + .combout(\inst13|inst|state~15_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[4]~6 .lut_mask = 16'h2000; -defparam \inst13|inst14|data_out[4]~6 .sum_lutc_input = "datac"; +defparam \inst13|inst|state~15 .lut_mask = 16'h8000; +defparam \inst13|inst|state~15 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y38_N29 -dffeas \inst13|inst14|data_out[4] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[4]~6_combout ), +// Location: FF_X56_Y35_N29 +dffeas \inst13|inst|state.slv_ack1 ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|state~15_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [4]), + .q(\inst13|inst|state.slv_ack1~q ), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[4] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[4] .power_up = "low"; +defparam \inst13|inst|state.slv_ack1 .is_wysiwyg = "true"; +defparam \inst13|inst|state.slv_ack1 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N8 -fiftyfivenm_lcell_comb \inst13|inst1[4]~35 ( +// Location: LCCOMB_X56_Y35_N0 +fiftyfivenm_lcell_comb \inst13|inst|Selector29~0 ( // Equation(s): -// \inst13|inst1[4]~35_combout = ((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [4])) # (!\inst3|I2C_DATA_EN~combout ) +// \inst13|inst|Selector29~0_combout = (\inst13|inst|state.slv_ack1~q & ((\GSENSOR_SDI~input_o ) # ((\inst13|inst|ack_error~q )))) # (!\inst13|inst|state.slv_ack1~q & (\inst13|inst|state.slv_ack2~q & ((\GSENSOR_SDI~input_o ) # (\inst13|inst|ack_error~q +// )))) - .dataa(\inst3|I2C_DATA_EN~combout ), - .datab(\inst|IO_WRITE_int~q ), - .datac(gnd), - .datad(\inst13|inst14|data_out [4]), + .dataa(\inst13|inst|state.slv_ack1~q ), + .datab(\GSENSOR_SDI~input_o ), + .datac(\inst13|inst|state.slv_ack2~q ), + .datad(\inst13|inst|ack_error~q ), .cin(gnd), - .combout(\inst13|inst1[4]~35_combout ), + .combout(\inst13|inst|Selector29~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[4]~35 .lut_mask = 16'hFFDD; -defparam \inst13|inst1[4]~35 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector29~0 .lut_mask = 16'hFAC8; +defparam \inst13|inst|Selector29~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N12 -fiftyfivenm_lcell_comb \inst13|inst1[4]~37 ( +// Location: LCCOMB_X56_Y36_N24 +fiftyfivenm_lcell_comb \inst13|inst|Selector29~1 ( // Equation(s): -// \inst13|inst1[4]~37_combout = (\inst13|inst1[4]~36_combout & (\inst13|inst1[4]~35_combout & ((\inst11|count [4]) # (!\inst11|tri_enable~combout )))) +// \inst13|inst|Selector29~1_combout = (\inst13|inst|Selector29~0_combout ) # ((\inst13|inst|ack_error~q & ((\inst13|inst|state.rd~q ) # (!\inst13|inst|state.start~q )))) - .dataa(\inst13|inst1[4]~36_combout ), - .datab(\inst13|inst1[4]~35_combout ), - .datac(\inst11|count [4]), - .datad(\inst11|tri_enable~combout ), + .dataa(\inst13|inst|state.rd~q ), + .datab(\inst13|inst|state.start~q ), + .datac(\inst13|inst|ack_error~q ), + .datad(\inst13|inst|Selector29~0_combout ), .cin(gnd), - .combout(\inst13|inst1[4]~37_combout ), + .combout(\inst13|inst|Selector29~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[4]~37 .lut_mask = 16'h8088; -defparam \inst13|inst1[4]~37 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector29~1 .lut_mask = 16'hFFB0; +defparam \inst13|inst|Selector29~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N6 -fiftyfivenm_lcell_comb \inst13|inst1[4]~93 ( -// Equation(s): -// \inst13|inst1[4]~93_combout = (!\inst13|inst4~combout & ((\inst|IR [0]) # ((\inst10|count [4]) # (!\inst11|tri_enable~1_combout )))) - - .dataa(\inst|IR [0]), - .datab(\inst13|inst4~combout ), - .datac(\inst10|count [4]), - .datad(\inst11|tri_enable~1_combout ), - .cin(gnd), - .combout(\inst13|inst1[4]~93_combout ), - .cout()); +// Location: FF_X56_Y36_N25 +dffeas \inst13|inst|ack_error ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector29~1_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|ack_error~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst13|inst1[4]~93 .lut_mask = 16'h3233; -defparam \inst13|inst1[4]~93 .sum_lutc_input = "datac"; +defparam \inst13|inst|ack_error .is_wysiwyg = "true"; +defparam \inst13|inst|ack_error .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N6 -fiftyfivenm_lcell_comb \inst13|inst1[4]~38 ( +// Location: LCCOMB_X55_Y35_N30 +fiftyfivenm_lcell_comb \inst13|inst|Selector24~0 ( // Equation(s): -// \inst13|inst1[4]~38_combout = (\inst13|inst1[4]~37_combout & (\inst13|inst1[4]~93_combout & ((\inst4|COUNT [4]) # (!\inst4|IO_OUT~combout )))) +// \inst13|inst|Selector24~0_combout = (\inst13|inst|state.slv_ack2~q & (((\inst13|inst|ack_error~q ) # (!\inst13|inst|process_1~4_combout )))) # (!\inst13|inst|state.slv_ack2~q & (\inst13|inst|state.mstr_ack~q & (!\inst13|inst|process_1~4_combout ))) - .dataa(\inst13|inst1[4]~37_combout ), - .datab(\inst13|inst1[4]~93_combout ), - .datac(\inst4|IO_OUT~combout ), - .datad(\inst4|COUNT [4]), + .dataa(\inst13|inst|state.slv_ack2~q ), + .datab(\inst13|inst|state.mstr_ack~q ), + .datac(\inst13|inst|process_1~4_combout ), + .datad(\inst13|inst|ack_error~q ), .cin(gnd), - .combout(\inst13|inst1[4]~38_combout ), + .combout(\inst13|inst|Selector24~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[4]~38 .lut_mask = 16'h8808; -defparam \inst13|inst1[4]~38 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector24~0 .lut_mask = 16'hAE0E; +defparam \inst13|inst|Selector24~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N2 -fiftyfivenm_lcell_comb \inst|Selector23~6 ( +// Location: LCCOMB_X55_Y35_N16 +fiftyfivenm_lcell_comb \inst13|inst|Selector24~1 ( // Equation(s): -// \inst|Selector23~6_combout = (\inst|Selector23~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[4]~38_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst13|inst|Selector24~1_combout = (\inst13|inst|Selector24~0_combout ) # ((\inst13|inst|ack_error~q & \inst13|inst|state.slv_ack1~q )) - .dataa(\inst13|inst1[0]~18_combout ), - .datab(\inst|Selector23~5_combout ), - .datac(\inst|state.ex_in2~q ), - .datad(\inst13|inst1[4]~38_combout ), + .dataa(\inst13|inst|ack_error~q ), + .datab(\inst13|inst|state.slv_ack1~q ), + .datac(gnd), + .datad(\inst13|inst|Selector24~0_combout ), .cin(gnd), - .combout(\inst|Selector23~6_combout ), + .combout(\inst13|inst|Selector24~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector23~6 .lut_mask = 16'hFCDC; -defparam \inst|Selector23~6 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector24~1 .lut_mask = 16'hFF88; +defparam \inst13|inst|Selector24~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y42_N3 -dffeas \inst|AC[4] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector23~6_combout ), +// Location: FF_X55_Y35_N17 +dffeas \inst13|inst|state.stop ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector24~1_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [4]), + .q(\inst13|inst|state.stop~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[4] .is_wysiwyg = "true"; -defparam \inst|AC[4] .power_up = "low"; +defparam \inst13|inst|state.stop .is_wysiwyg = "true"; +defparam \inst13|inst|state.stop .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N30 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[20]~13 ( +// Location: LCCOMB_X57_Y36_N24 +fiftyfivenm_lcell_comb \inst13|inst|Selector18~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[20]~13_combout = (\inst|shifter|auto_generated|sbit_w[20]~12_combout ) # ((!\inst|IR [0] & \inst|AC [4])) +// \inst13|inst|Selector18~0_combout = (!\inst13|inst|state.stop~q & ((\inst13|inst|state.ready~q ) # (\inst13|inst14|comm_en~q ))) .dataa(gnd), - .datab(\inst|shifter|auto_generated|sbit_w[20]~12_combout ), - .datac(\inst|IR [0]), - .datad(\inst|AC [4]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[20]~13_combout ), - .cout()); -// synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[20]~13 .lut_mask = 16'hCFCC; -defparam \inst|shifter|auto_generated|sbit_w[20]~13 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X46_Y42_N10 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[36]~11 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[36]~11_combout = (\inst|shifter|auto_generated|sbit_w[18]~7_combout & ((\inst3|TIMER_EN~3_combout ) # ((\inst|shifter|auto_generated|sbit_w[22]~10_combout & \inst3|I2C_RDY_EN~0_combout )))) # -// (!\inst|shifter|auto_generated|sbit_w[18]~7_combout & (((\inst|shifter|auto_generated|sbit_w[22]~10_combout & \inst3|I2C_RDY_EN~0_combout )))) - - .dataa(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), - .datab(\inst3|TIMER_EN~3_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), - .datad(\inst3|I2C_RDY_EN~0_combout ), + .datab(\inst13|inst|state.stop~q ), + .datac(\inst13|inst|state.ready~q ), + .datad(\inst13|inst14|comm_en~q ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[36]~11_combout ), + .combout(\inst13|inst|Selector18~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[36]~11 .lut_mask = 16'hF888; -defparam \inst|shifter|auto_generated|sbit_w[36]~11 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector18~0 .lut_mask = 16'h3330; +defparam \inst13|inst|Selector18~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N12 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[36]~14 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[36]~14_combout = (\inst|shifter|auto_generated|sbit_w[36]~11_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[20]~13_combout )) - - .dataa(gnd), - .datab(\inst|IR [1]), - .datac(\inst|shifter|auto_generated|sbit_w[20]~13_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[36]~11_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), - .cout()); +// Location: FF_X57_Y36_N25 +dffeas \inst13|inst|state.ready ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector18~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|state.ready~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[36]~14 .lut_mask = 16'hFF30; -defparam \inst|shifter|auto_generated|sbit_w[36]~14 .sum_lutc_input = "datac"; +defparam \inst13|inst|state.ready .is_wysiwyg = "true"; +defparam \inst13|inst|state.ready .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N30 -fiftyfivenm_lcell_comb \inst|Selector15~0 ( +// Location: LCCOMB_X55_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst|addr_rw[7]~2 ( // Equation(s): -// \inst|Selector15~0_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[52]~68_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[36]~14_combout )))) +// \inst13|inst|addr_rw[7]~2_combout = ((!\inst13|inst|state.mstr_ack~q & \inst13|inst|state.ready~q )) # (!\inst13|inst14|comm_en~q ) - .dataa(\inst|IR [2]), - .datab(\inst|Selector19~4_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[52]~68_combout ), + .dataa(\inst13|inst14|comm_en~q ), + .datab(\inst13|inst|state.mstr_ack~q ), + .datac(gnd), + .datad(\inst13|inst|state.ready~q ), .cin(gnd), - .combout(\inst|Selector15~0_combout ), + .combout(\inst13|inst|addr_rw[7]~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector15~0 .lut_mask = 16'hCC40; -defparam \inst|Selector15~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|addr_rw[7]~2 .lut_mask = 16'h7755; +defparam \inst13|inst|addr_rw[7]~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N2 -fiftyfivenm_lcell_comb \inst|Selector15~2 ( +// Location: LCCOMB_X55_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~6 ( // Equation(s): -// \inst|Selector15~2_combout = (\inst|AC [12] & (((\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) +// \inst13|inst|Selector25~6_combout = (\inst13|inst|state.slv_ack2~q & (!\inst13|inst|ack_error~q & \inst13|inst|process_1~4_combout )) - .dataa(\inst|Selector27~6_combout ), - .datab(\inst|AC [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [12]), - .datad(\inst|state.ex_and~q ), + .dataa(\inst13|inst|state.slv_ack2~q ), + .datab(\inst13|inst|ack_error~q ), + .datac(gnd), + .datad(\inst13|inst|process_1~4_combout ), .cin(gnd), - .combout(\inst|Selector15~2_combout ), + .combout(\inst13|inst|Selector25~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector15~2 .lut_mask = 16'hC444; -defparam \inst|Selector15~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~6 .lut_mask = 16'h2200; +defparam \inst13|inst|Selector25~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N26 -fiftyfivenm_lcell_comb \inst|Add1~60 ( +// Location: LCCOMB_X55_Y36_N10 +fiftyfivenm_lcell_comb \inst13|inst|addr_rw[7]~3 ( // Equation(s): -// \inst|Add1~60_combout = (\inst|AC [11] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst13|inst|addr_rw[7]~3_combout = (\inst1|altpll_component|auto_generated|wire_pll1_locked & (\inst1|altpll_component|auto_generated|pll_lock_sync~q & ((\inst13|inst|Selector25~6_combout ) # (!\inst13|inst|addr_rw[7]~2_combout )))) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|AC [11]), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst1|altpll_component|auto_generated|wire_pll1_locked ), + .datab(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .datac(\inst13|inst|addr_rw[7]~2_combout ), + .datad(\inst13|inst|Selector25~6_combout ), .cin(gnd), - .combout(\inst|Add1~60_combout ), + .combout(\inst13|inst|addr_rw[7]~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~60 .lut_mask = 16'hCCC8; -defparam \inst|Add1~60 .sum_lutc_input = "datac"; +defparam \inst13|inst|addr_rw[7]~3 .lut_mask = 16'h8808; +defparam \inst13|inst|addr_rw[7]~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N4 -fiftyfivenm_lcell_comb \inst|Add1~58 ( -// Equation(s): -// \inst|Add1~58_combout = (\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [11] & ((\inst|state.ex_sub~q ))) - - .dataa(\inst|state.ex_add~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [11]), - .datac(gnd), - .datad(\inst|state.ex_sub~q ), - .cin(gnd), - .combout(\inst|Add1~58_combout ), - .cout()); +// Location: FF_X55_Y36_N19 +dffeas \inst13|inst|addr_rw[0] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|rnw~q ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|addr_rw [0]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~58 .lut_mask = 16'h3388; -defparam \inst|Add1~58 .sum_lutc_input = "datac"; +defparam \inst13|inst|addr_rw[0] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N6 -fiftyfivenm_lcell_comb \inst|Add1~59 ( +// Location: LCCOMB_X55_Y35_N28 +fiftyfivenm_lcell_comb \inst13|inst|Selector22~0 ( // Equation(s): -// \inst|Add1~59_combout = (\inst|Add1~58_combout & ((\inst|WideOr3~1_combout ) # ((\inst|IR [10] & \inst|Add1~1_combout )))) # (!\inst|Add1~58_combout & (\inst|IR [10] & ((\inst|Add1~1_combout )))) +// \inst13|inst|Selector22~0_combout = (!\inst13|inst|addr_rw [0] & \inst13|inst|state.slv_ack1~q ) - .dataa(\inst|Add1~58_combout ), - .datab(\inst|IR [10]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~1_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|addr_rw [0]), + .datad(\inst13|inst|state.slv_ack1~q ), .cin(gnd), - .combout(\inst|Add1~59_combout ), + .combout(\inst13|inst|Selector22~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~59 .lut_mask = 16'hECA0; -defparam \inst|Add1~59 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector22~0 .lut_mask = 16'h0F00; +defparam \inst13|inst|Selector22~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N0 -fiftyfivenm_lcell_comb \inst|Add1~53 ( +// Location: LCCOMB_X55_Y35_N10 +fiftyfivenm_lcell_comb \inst13|inst|Selector22~1 ( // Equation(s): -// \inst|Add1~53_combout = (\inst|altsyncram_component|auto_generated|q_a [10] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [10] & ((\inst|state.ex_sub~q ))) +// \inst13|inst|Selector22~1_combout = (\inst13|inst|Selector22~0_combout ) # ((!\inst13|inst14|rnw~q & (\inst13|inst|process_1~4_combout & \inst13|inst|state.slv_ack2~q ))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [10]), - .datab(gnd), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst13|inst14|rnw~q ), + .datab(\inst13|inst|Selector22~0_combout ), + .datac(\inst13|inst|process_1~4_combout ), + .datad(\inst13|inst|state.slv_ack2~q ), .cin(gnd), - .combout(\inst|Add1~53_combout ), + .combout(\inst13|inst|Selector22~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~53 .lut_mask = 16'h55A0; -defparam \inst|Add1~53 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector22~1 .lut_mask = 16'hDCCC; +defparam \inst13|inst|Selector22~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N26 -fiftyfivenm_lcell_comb \inst|Add1~54 ( +// Location: LCCOMB_X55_Y35_N24 +fiftyfivenm_lcell_comb \inst13|inst|Selector22~2 ( // Equation(s): -// \inst|Add1~54_combout = (\inst|Add1~53_combout & ((\inst|WideOr3~1_combout ) # ((\inst|IR [10] & \inst|Add1~1_combout )))) # (!\inst|Add1~53_combout & (\inst|IR [10] & ((\inst|Add1~1_combout )))) +// \inst13|inst|Selector22~2_combout = (\inst13|inst|Selector22~1_combout & (((!\inst13|inst|Equal1~0_combout & \inst13|inst|state.wr~q )) # (!\inst13|inst|ack_error~q ))) # (!\inst13|inst|Selector22~1_combout & (!\inst13|inst|Equal1~0_combout & +// (\inst13|inst|state.wr~q ))) - .dataa(\inst|Add1~53_combout ), - .datab(\inst|IR [10]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~1_combout ), + .dataa(\inst13|inst|Selector22~1_combout ), + .datab(\inst13|inst|Equal1~0_combout ), + .datac(\inst13|inst|state.wr~q ), + .datad(\inst13|inst|ack_error~q ), .cin(gnd), - .combout(\inst|Add1~54_combout ), + .combout(\inst13|inst|Selector22~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~54 .lut_mask = 16'hECA0; -defparam \inst|Add1~54 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector22~2 .lut_mask = 16'h30BA; +defparam \inst13|inst|Selector22~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N28 -fiftyfivenm_lcell_comb \inst|Add1~55 ( +// Location: FF_X55_Y35_N25 +dffeas \inst13|inst|state.wr ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector22~2_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|state.wr~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|state.wr .is_wysiwyg = "true"; +defparam \inst13|inst|state.wr .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst|WideOr3~0 ( // Equation(s): -// \inst|Add1~55_combout = (\inst|AC [10] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst13|inst|WideOr3~0_combout = (!\inst13|inst|state.rd~q & (!\inst13|inst|state.wr~q & !\inst13|inst|state.start~q )) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_addi~q ), - .datac(\inst|AC [10]), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst13|inst|state.rd~q ), + .datab(gnd), + .datac(\inst13|inst|state.wr~q ), + .datad(\inst13|inst|state.start~q ), .cin(gnd), - .combout(\inst|Add1~55_combout ), + .combout(\inst13|inst|WideOr3~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~55 .lut_mask = 16'hF0E0; -defparam \inst|Add1~55 .sum_lutc_input = "datac"; +defparam \inst13|inst|WideOr3~0 .lut_mask = 16'h0005; +defparam \inst13|inst|WideOr3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N30 -fiftyfivenm_lcell_comb \inst|Add1~48 ( +// Location: LCCOMB_X57_Y36_N12 +fiftyfivenm_lcell_comb \inst13|inst|Selector0~0 ( // Equation(s): -// \inst|Add1~48_combout = (\inst|altsyncram_component|auto_generated|q_a [9] & (\inst|state.ex_add~q & !\inst|state.ex_sub~q )) # (!\inst|altsyncram_component|auto_generated|q_a [9] & ((\inst|state.ex_sub~q ))) +// \inst13|inst|Selector0~0_combout = (\inst13|inst|state.slv_ack1~q ) # ((\inst13|inst|state.command~q ) # ((!\inst13|inst14|comm_en~q & \inst13|inst|state.mstr_ack~q ))) - .dataa(gnd), - .datab(\inst|state.ex_add~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [9]), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst13|inst|state.slv_ack1~q ), + .datab(\inst13|inst14|comm_en~q ), + .datac(\inst13|inst|state.command~q ), + .datad(\inst13|inst|state.mstr_ack~q ), .cin(gnd), - .combout(\inst|Add1~48_combout ), + .combout(\inst13|inst|Selector0~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~48 .lut_mask = 16'h0FC0; -defparam \inst|Add1~48 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector0~0 .lut_mask = 16'hFBFA; +defparam \inst13|inst|Selector0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N26 -fiftyfivenm_lcell_comb \inst|Add1~49 ( +// Location: LCCOMB_X56_Y36_N22 +fiftyfivenm_lcell_comb \inst13|inst|Selector0~1 ( // Equation(s): -// \inst|Add1~49_combout = (\inst|Add1~48_combout & ((\inst|WideOr3~1_combout ) # ((\inst|Add1~1_combout & \inst|IR [9])))) # (!\inst|Add1~48_combout & (\inst|Add1~1_combout & (\inst|IR [9]))) +// \inst13|inst|Selector0~1_combout = (!\inst13|inst|state.restart~q & (((\inst13|inst|process_1~4_combout & !\inst13|inst|ack_error~q )) # (!\inst13|inst|state.slv_ack2~q ))) - .dataa(\inst|Add1~48_combout ), - .datab(\inst|Add1~1_combout ), - .datac(\inst|IR [9]), - .datad(\inst|WideOr3~1_combout ), + .dataa(\inst13|inst|state.restart~q ), + .datab(\inst13|inst|state.slv_ack2~q ), + .datac(\inst13|inst|process_1~4_combout ), + .datad(\inst13|inst|ack_error~q ), .cin(gnd), - .combout(\inst|Add1~49_combout ), + .combout(\inst13|inst|Selector0~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~49 .lut_mask = 16'hEAC0; -defparam \inst|Add1~49 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector0~1 .lut_mask = 16'h1151; +defparam \inst13|inst|Selector0~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N22 -fiftyfivenm_lcell_comb \inst|Add1~50 ( +// Location: LCCOMB_X57_Y36_N30 +fiftyfivenm_lcell_comb \inst13|inst|Selector0~2 ( // Equation(s): -// \inst|Add1~50_combout = (\inst|AC [9] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst13|inst|Selector0~2_combout = (\inst13|inst|busy~q & ((\inst13|inst|Selector0~0_combout ) # (!\inst13|inst|Selector0~1_combout ))) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_addi~q ), - .datac(\inst|AC [9]), - .datad(\inst|state.ex_sub~q ), + .dataa(gnd), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst|Selector0~0_combout ), + .datad(\inst13|inst|Selector0~1_combout ), .cin(gnd), - .combout(\inst|Add1~50_combout ), + .combout(\inst13|inst|Selector0~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~50 .lut_mask = 16'hF0E0; -defparam \inst|Add1~50 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector0~2 .lut_mask = 16'hC0CC; +defparam \inst13|inst|Selector0~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N4 -fiftyfivenm_lcell_comb \inst|Add1~51 ( +// Location: LCCOMB_X57_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst|Selector0~3 ( // Equation(s): -// \inst|Add1~51_combout = ((\inst|Add1~49_combout $ (\inst|Add1~50_combout $ (!\inst|Add1~47 )))) # (GND) -// \inst|Add1~52 = CARRY((\inst|Add1~49_combout & ((\inst|Add1~50_combout ) # (!\inst|Add1~47 ))) # (!\inst|Add1~49_combout & (\inst|Add1~50_combout & !\inst|Add1~47 ))) +// \inst13|inst|Selector0~3_combout = ((\inst13|inst|Selector0~2_combout ) # ((\inst13|inst14|comm_en~q & !\inst13|inst|state.ready~q ))) # (!\inst13|inst|WideOr3~0_combout ) - .dataa(\inst|Add1~49_combout ), - .datab(\inst|Add1~50_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~47 ), - .combout(\inst|Add1~51_combout ), - .cout(\inst|Add1~52 )); + .dataa(\inst13|inst14|comm_en~q ), + .datab(\inst13|inst|WideOr3~0_combout ), + .datac(\inst13|inst|Selector0~2_combout ), + .datad(\inst13|inst|state.ready~q ), + .cin(gnd), + .combout(\inst13|inst|Selector0~3_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~51 .lut_mask = 16'h698E; -defparam \inst|Add1~51 .sum_lutc_input = "cin"; +defparam \inst13|inst|Selector0~3 .lut_mask = 16'hF3FB; +defparam \inst13|inst|Selector0~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N6 -fiftyfivenm_lcell_comb \inst|Add1~56 ( -// Equation(s): -// \inst|Add1~56_combout = (\inst|Add1~54_combout & ((\inst|Add1~55_combout & (\inst|Add1~52 & VCC)) # (!\inst|Add1~55_combout & (!\inst|Add1~52 )))) # (!\inst|Add1~54_combout & ((\inst|Add1~55_combout & (!\inst|Add1~52 )) # (!\inst|Add1~55_combout & -// ((\inst|Add1~52 ) # (GND))))) -// \inst|Add1~57 = CARRY((\inst|Add1~54_combout & (!\inst|Add1~55_combout & !\inst|Add1~52 )) # (!\inst|Add1~54_combout & ((!\inst|Add1~52 ) # (!\inst|Add1~55_combout )))) - - .dataa(\inst|Add1~54_combout ), - .datab(\inst|Add1~55_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~52 ), - .combout(\inst|Add1~56_combout ), - .cout(\inst|Add1~57 )); +// Location: FF_X57_Y36_N21 +dffeas \inst13|inst|busy ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector0~3_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|busy~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~56 .lut_mask = 16'h9617; -defparam \inst|Add1~56 .sum_lutc_input = "cin"; +defparam \inst13|inst|busy .is_wysiwyg = "true"; +defparam \inst13|inst|busy .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N8 -fiftyfivenm_lcell_comb \inst|Add1~61 ( +// Location: LCCOMB_X62_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst14|prev_busy~feeder ( // Equation(s): -// \inst|Add1~61_combout = ((\inst|Add1~60_combout $ (\inst|Add1~59_combout $ (!\inst|Add1~57 )))) # (GND) -// \inst|Add1~62 = CARRY((\inst|Add1~60_combout & ((\inst|Add1~59_combout ) # (!\inst|Add1~57 ))) # (!\inst|Add1~60_combout & (\inst|Add1~59_combout & !\inst|Add1~57 ))) +// \inst13|inst14|prev_busy~feeder_combout = \inst13|inst|busy~q - .dataa(\inst|Add1~60_combout ), - .datab(\inst|Add1~59_combout ), + .dataa(gnd), + .datab(gnd), .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~57 ), - .combout(\inst|Add1~61_combout ), - .cout(\inst|Add1~62 )); + .datad(\inst13|inst|busy~q ), + .cin(gnd), + .combout(\inst13|inst14|prev_busy~feeder_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~61 .lut_mask = 16'h698E; -defparam \inst|Add1~61 .sum_lutc_input = "cin"; +defparam \inst13|inst14|prev_busy~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|prev_busy~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N10 -fiftyfivenm_lcell_comb \inst|Add1~66 ( -// Equation(s): -// \inst|Add1~66_combout = (\inst|Add1~64_combout & ((\inst|Add1~65_combout & (\inst|Add1~62 & VCC)) # (!\inst|Add1~65_combout & (!\inst|Add1~62 )))) # (!\inst|Add1~64_combout & ((\inst|Add1~65_combout & (!\inst|Add1~62 )) # (!\inst|Add1~65_combout & -// ((\inst|Add1~62 ) # (GND))))) -// \inst|Add1~67 = CARRY((\inst|Add1~64_combout & (!\inst|Add1~65_combout & !\inst|Add1~62 )) # (!\inst|Add1~64_combout & ((!\inst|Add1~62 ) # (!\inst|Add1~65_combout )))) - - .dataa(\inst|Add1~64_combout ), - .datab(\inst|Add1~65_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~62 ), - .combout(\inst|Add1~66_combout ), - .cout(\inst|Add1~67 )); +// Location: FF_X62_Y36_N17 +dffeas \inst13|inst14|prev_busy ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|prev_busy~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|prev_busy~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~66 .lut_mask = 16'h9617; -defparam \inst|Add1~66 .sum_lutc_input = "cin"; +defparam \inst13|inst14|prev_busy .is_wysiwyg = "true"; +defparam \inst13|inst14|prev_busy .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N20 -fiftyfivenm_lcell_comb \inst|Selector15~3 ( +// Location: LCCOMB_X56_Y34_N6 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~2 ( // Equation(s): -// \inst|Selector15~3_combout = (\inst|altsyncram_component|auto_generated|q_a [12] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [12])))) # (!\inst|altsyncram_component|auto_generated|q_a [12] & (\inst|state.ex_xor~q & (\inst|AC -// [12]))) +// \inst13|inst|Decoder0~2_combout = (!\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [2] & (\inst13|inst|Decoder0~0_combout & \inst13|inst|bit_cnt [1]))) - .dataa(\inst|state.ex_xor~q ), - .datab(\inst|AC [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [12]), - .datad(\inst|Selector27~1_combout ), + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|bit_cnt [2]), + .datac(\inst13|inst|Decoder0~0_combout ), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst|Selector15~3_combout ), + .combout(\inst13|inst|Decoder0~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector15~3 .lut_mask = 16'hF828; -defparam \inst|Selector15~3 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~2 .lut_mask = 16'h4000; +defparam \inst13|inst|Decoder0~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N30 -fiftyfivenm_lcell_comb \inst|Selector15~4 ( +// Location: LCCOMB_X56_Y34_N18 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[1]~1 ( // Equation(s): -// \inst|Selector15~4_combout = (\inst|Selector15~2_combout ) # ((\inst|Selector15~3_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~66_combout ))) +// \inst13|inst|data_rx[1]~1_combout = (\inst13|inst|Decoder0~2_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~2_combout & ((\inst13|inst|data_rx [1]))) - .dataa(\inst|AC[2]~0_combout ), - .datab(\inst|Selector15~2_combout ), - .datac(\inst|Add1~66_combout ), - .datad(\inst|Selector15~3_combout ), + .dataa(\GSENSOR_SDI~input_o ), + .datab(gnd), + .datac(\inst13|inst|data_rx [1]), + .datad(\inst13|inst|Decoder0~2_combout ), .cin(gnd), - .combout(\inst|Selector15~4_combout ), + .combout(\inst13|inst|data_rx[1]~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector15~4 .lut_mask = 16'hFFEC; -defparam \inst|Selector15~4 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[1]~1 .lut_mask = 16'hAAF0; +defparam \inst13|inst|data_rx[1]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N20 -fiftyfivenm_lcell_comb \inst|Selector15~1 ( -// Equation(s): -// \inst|Selector15~1_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[60]~70_combout ) # ((\inst|shifter|auto_generated|sbit_w[44]~23_combout & !\inst|IR [2])))) - - .dataa(\inst|Selector20~0_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[60]~70_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), - .datad(\inst|IR [2]), - .cin(gnd), - .combout(\inst|Selector15~1_combout ), - .cout()); +// Location: FF_X56_Y34_N19 +dffeas \inst13|inst|data_rx[1] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[1]~1_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rx [1]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector15~1 .lut_mask = 16'h88A8; -defparam \inst|Selector15~1 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[1] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N16 -fiftyfivenm_lcell_comb \inst|Selector15~5 ( +// Location: LCCOMB_X56_Y34_N30 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[1]~feeder ( // Equation(s): -// \inst|Selector15~5_combout = (\inst|Selector15~0_combout ) # ((\inst|Selector15~4_combout ) # ((\inst|Selector15~1_combout ) # (!\inst|Selector16~0_combout ))) +// \inst13|inst|data_rd[1]~feeder_combout = \inst13|inst|data_rx [1] - .dataa(\inst|Selector15~0_combout ), - .datab(\inst|Selector15~4_combout ), - .datac(\inst|Selector15~1_combout ), - .datad(\inst|Selector16~0_combout ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst|data_rx [1]), .cin(gnd), - .combout(\inst|Selector15~5_combout ), + .combout(\inst13|inst|data_rd[1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector15~5 .lut_mask = 16'hFEFF; -defparam \inst|Selector15~5 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[1]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst|data_rd[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N6 -fiftyfivenm_lcell_comb \inst|Selector15~6 ( -// Equation(s): -// \inst|Selector15~6_combout = (\inst|Selector15~5_combout ) # ((\inst13|inst1[12]~76_combout & (\inst13|inst1[12]~75_combout & \inst13|inst1[12]~74_combout ))) - - .dataa(\inst|Selector15~5_combout ), - .datab(\inst13|inst1[12]~76_combout ), - .datac(\inst13|inst1[12]~75_combout ), - .datad(\inst13|inst1[12]~74_combout ), - .cin(gnd), - .combout(\inst|Selector15~6_combout ), - .cout()); +// Location: FF_X56_Y34_N31 +dffeas \inst13|inst|data_rd[1] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[1]~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst|state~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rd [1]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector15~6 .lut_mask = 16'hEAAA; -defparam \inst|Selector15~6 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[1] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N30 -fiftyfivenm_lcell_comb \inst|Selector15~7 ( +// Location: LCCOMB_X60_Y36_N18 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[9]~12 ( // Equation(s): -// \inst|Selector15~7_combout = (\inst|Selector15~5_combout & (\inst|Selector15~6_combout )) # (!\inst|Selector15~5_combout & (\inst|state.ex_in2~q & ((\inst|Selector15~6_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst13|inst14|data_out[9]~12_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [1]))) - .dataa(\inst|Selector15~6_combout ), - .datab(\inst|Selector15~5_combout ), - .datac(\inst|state.ex_in2~q ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|state.Rx2~q ), + .datad(\inst13|inst|data_rd [1]), .cin(gnd), - .combout(\inst|Selector15~7_combout ), + .combout(\inst13|inst14|data_out[9]~12_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector15~7 .lut_mask = 16'hA8B8; -defparam \inst|Selector15~7 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[9]~12 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[9]~12 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y41_N31 -dffeas \inst|AC[12] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector15~7_combout ), +// Location: FF_X60_Y36_N19 +dffeas \inst13|inst14|data_out[9] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[9]~12_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(\inst13|inst14|data_out[15]~11_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [12]), + .q(\inst13|inst14|data_out [9]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[12] .is_wysiwyg = "true"; -defparam \inst|AC[12] .power_up = "low"; +defparam \inst13|inst14|data_out[9] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N16 -fiftyfivenm_lcell_comb \inst|Add1~65 ( +// Location: LCCOMB_X60_Y39_N22 +fiftyfivenm_lcell_comb \inst13|inst1[9]~65 ( // Equation(s): -// \inst|Add1~65_combout = (\inst|AC [12] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_addi~q )))) +// \inst13|inst1[9]~65_combout = (\inst13|inst1[9]~64_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [9]) # (!\inst3|I2C_DATA_EN~combout )))) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|AC [12]), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst13|inst1[9]~64_combout ), + .datac(\inst3|I2C_DATA_EN~combout ), + .datad(\inst13|inst14|data_out [9]), .cin(gnd), - .combout(\inst|Add1~65_combout ), + .combout(\inst13|inst1[9]~65_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~65 .lut_mask = 16'hFE00; -defparam \inst|Add1~65 .sum_lutc_input = "datac"; +defparam \inst13|inst1[9]~65 .lut_mask = 16'hCC8C; +defparam \inst13|inst1[9]~65 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N8 -fiftyfivenm_lcell_comb \inst|Selector14~0 ( +// Location: LCCOMB_X60_Y39_N10 +fiftyfivenm_lcell_comb \inst4|IO_BUS|dout[9]~3 ( // Equation(s): -// \inst|Selector14~0_combout = (\inst|AC [13] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [13])) # (!\inst|Selector27~6_combout ))) +// \inst4|IO_BUS|dout[9]~3_combout = (\inst|IO_WRITE_int~q ) # (((\inst4|COUNT [9]) # (!\inst3|TIMER_EN~2_combout )) # (!\inst3|TIMER_EN~1_combout )) - .dataa(\inst|state.ex_and~q ), - .datab(\inst|AC [13]), - .datac(\inst|Selector27~6_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [13]), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|TIMER_EN~1_combout ), + .datac(\inst4|COUNT [9]), + .datad(\inst3|TIMER_EN~2_combout ), .cin(gnd), - .combout(\inst|Selector14~0_combout ), + .combout(\inst4|IO_BUS|dout[9]~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector14~0 .lut_mask = 16'h8C0C; -defparam \inst|Selector14~0 .sum_lutc_input = "datac"; +defparam \inst4|IO_BUS|dout[9]~3 .lut_mask = 16'hFBFF; +defparam \inst4|IO_BUS|dout[9]~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N0 -fiftyfivenm_lcell_comb \inst|Selector14~1 ( +// Location: LCCOMB_X60_Y38_N20 +fiftyfivenm_lcell_comb \inst10|tri_enable ( // Equation(s): -// \inst|Selector14~1_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & ((\inst|state.ex_load~q ) # (\inst|state.ex_or~q ))) +// \inst10|tri_enable~combout = (\inst11|tri_enable~1_combout & !\inst|IR [0]) - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), + .dataa(\inst11|tri_enable~1_combout ), .datab(gnd), - .datac(\inst|state.ex_load~q ), - .datad(\inst|state.ex_or~q ), - .cin(gnd), - .combout(\inst|Selector14~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector14~1 .lut_mask = 16'hAAA0; -defparam \inst|Selector14~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y42_N0 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[17]~29 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[17]~29_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [2])) # (!\inst|IR [4] & ((\inst|AC [0]))))) - - .dataa(\inst|AC [2]), - .datab(\inst|IR [4]), - .datac(\inst|IR [0]), - .datad(\inst|AC [0]), + .datac(gnd), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[17]~29_combout ), + .combout(\inst10|tri_enable~combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[17]~29 .lut_mask = 16'hB080; -defparam \inst|shifter|auto_generated|sbit_w[17]~29 .sum_lutc_input = "datac"; +defparam \inst10|tri_enable .lut_mask = 16'h00AA; +defparam \inst10|tri_enable .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N26 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[53]~30 ( +// Location: LCCOMB_X60_Y39_N24 +fiftyfivenm_lcell_comb \inst13|inst1[9]~63 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[53]~30_combout = (!\inst|IR [1] & ((\inst|shifter|auto_generated|sbit_w[17]~29_combout ) # ((!\inst|IR [0] & \inst|AC [1])))) +// \inst13|inst1[9]~63_combout = (\inst4|IO_BUS|dout[9]~3_combout & (!\inst13|inst4~combout & ((\inst10|count [9]) # (!\inst10|tri_enable~combout )))) - .dataa(\inst|IR [1]), - .datab(\inst|shifter|auto_generated|sbit_w[17]~29_combout ), - .datac(\inst|IR [0]), - .datad(\inst|AC [1]), + .dataa(\inst4|IO_BUS|dout[9]~3_combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst10|count [9]), + .datad(\inst10|tri_enable~combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[53]~30_combout ), + .combout(\inst13|inst1[9]~63_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[53]~30 .lut_mask = 16'h4544; -defparam \inst|shifter|auto_generated|sbit_w[53]~30 .sum_lutc_input = "datac"; +defparam \inst13|inst1[9]~63 .lut_mask = 16'h2022; +defparam \inst13|inst1[9]~63 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N26 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[53]~73 ( +// Location: LCCOMB_X60_Y39_N12 +fiftyfivenm_lcell_comb \inst13|inst1[9]~66 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[53]~73_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[41]~50_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[53]~30_combout )))) +// \inst13|inst1[9]~66_combout = ((\inst13|inst1[9]~104_combout & (\inst13|inst1[9]~65_combout & \inst13|inst1[9]~63_combout ))) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[53]~30_combout ), - .datac(\inst|IR [4]), - .datad(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst13|inst1[9]~104_combout ), + .datac(\inst13|inst1[9]~65_combout ), + .datad(\inst13|inst1[9]~63_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[53]~73_combout ), + .combout(\inst13|inst1[9]~66_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[53]~73 .lut_mask = 16'hA808; -defparam \inst|shifter|auto_generated|sbit_w[53]~73 .sum_lutc_input = "datac"; +defparam \inst13|inst1[9]~66 .lut_mask = 16'hD555; +defparam \inst13|inst1[9]~66 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N6 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[23]~34 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[23]~34_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [8])) # (!\inst|IR [4] & ((\inst|AC [6]))))) - - .dataa(\inst|AC [8]), - .datab(\inst|IR [0]), - .datac(\inst|AC [6]), - .datad(\inst|IR [4]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[23]~34_combout ), - .cout()); +// Location: FF_X61_Y36_N21 +dffeas \inst13|inst14|cmd_in[1] ( + .clk(\inst13|inst12~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst1[9]~66_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|cmd_in [1]), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[23]~34 .lut_mask = 16'h88C0; -defparam \inst|shifter|auto_generated|sbit_w[23]~34 .sum_lutc_input = "datac"; +defparam \inst13|inst14|cmd_in[1] .is_wysiwyg = "true"; +defparam \inst13|inst14|cmd_in[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N8 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[23]~35 ( +// Location: LCCOMB_X62_Y36_N6 +fiftyfivenm_lcell_comb \inst13|inst14|Selector21~2 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[23]~35_combout = (\inst|shifter|auto_generated|sbit_w[23]~34_combout ) # ((\inst|AC [7] & !\inst|IR [0])) +// \inst13|inst14|Selector21~2_combout = (\inst13|inst14|cmd_in [0] & (\inst13|inst14|Selector21~1_combout & !\inst13|inst14|cmd_in [1])) - .dataa(\inst|shifter|auto_generated|sbit_w[23]~34_combout ), - .datab(\inst|AC [7]), - .datac(\inst|IR [0]), - .datad(gnd), + .dataa(\inst13|inst14|cmd_in [0]), + .datab(\inst13|inst14|Selector21~1_combout ), + .datac(gnd), + .datad(\inst13|inst14|cmd_in [1]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), + .combout(\inst13|inst14|Selector21~2_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[23]~35 .lut_mask = 16'hAEAE; -defparam \inst|shifter|auto_generated|sbit_w[23]~35 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector21~2 .lut_mask = 16'h0088; +defparam \inst13|inst14|Selector21~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N28 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[19]~31 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[19]~31_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [4]))) # (!\inst|IR [4] & (\inst|AC [2])))) - - .dataa(\inst|AC [2]), - .datab(\inst|IR [4]), - .datac(\inst|IR [0]), - .datad(\inst|AC [4]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[19]~31_combout ), - .cout()); +// Location: FF_X62_Y36_N7 +dffeas \inst13|inst14|state.Rx1p ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector21~2_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|state.Rx1p~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[19]~31 .lut_mask = 16'hE020; -defparam \inst|shifter|auto_generated|sbit_w[19]~31 .sum_lutc_input = "datac"; +defparam \inst13|inst14|state.Rx1p .is_wysiwyg = "true"; +defparam \inst13|inst14|state.Rx1p .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[19]~32 ( +// Location: LCCOMB_X61_Y36_N0 +fiftyfivenm_lcell_comb \inst13|inst14|Selector22~1 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[19]~32_combout = (\inst|shifter|auto_generated|sbit_w[19]~31_combout ) # ((\inst|AC [3] & !\inst|IR [0])) +// \inst13|inst14|Selector22~1_combout = (\inst13|inst14|state.Rx1p~q ) # ((\inst13|inst14|state_machine~0_combout & (\inst13|inst14|state.Rx2~q )) # (!\inst13|inst14|state_machine~0_combout & ((\inst13|inst14|state.Rx1~q )))) - .dataa(gnd), - .datab(\inst|AC [3]), - .datac(\inst|IR [0]), - .datad(\inst|shifter|auto_generated|sbit_w[19]~31_combout ), + .dataa(\inst13|inst14|state.Rx2~q ), + .datab(\inst13|inst14|state.Rx1~q ), + .datac(\inst13|inst14|state.Rx1p~q ), + .datad(\inst13|inst14|state_machine~0_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[19]~32_combout ), + .combout(\inst13|inst14|Selector22~1_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[19]~32 .lut_mask = 16'hFF0C; -defparam \inst|shifter|auto_generated|sbit_w[19]~32 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector22~1 .lut_mask = 16'hFAFC; +defparam \inst13|inst14|Selector22~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N16 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[37]~36 ( +// Location: LCCOMB_X61_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst14|Selector22~2 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[37]~36_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[19]~32_combout ) # ((\inst|shifter|auto_generated|sbit_w[23]~35_combout & \inst3|I2C_RDY_EN~0_combout )))) # -// (!\inst3|TIMER_EN~3_combout & (\inst|shifter|auto_generated|sbit_w[23]~35_combout & ((\inst3|I2C_RDY_EN~0_combout )))) +// \inst13|inst14|Selector22~2_combout = (\inst13|inst14|Selector22~1_combout ) # ((!\inst13|inst14|cmd_in [1] & (\inst13|inst14|Selector22~0_combout & \inst13|inst14|cmd_in [0]))) - .dataa(\inst3|TIMER_EN~3_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[19]~32_combout ), - .datad(\inst3|I2C_RDY_EN~0_combout ), + .dataa(\inst13|inst14|cmd_in [1]), + .datab(\inst13|inst14|Selector22~0_combout ), + .datac(\inst13|inst14|cmd_in [0]), + .datad(\inst13|inst14|Selector22~1_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[37]~36_combout ), + .combout(\inst13|inst14|Selector22~2_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[37]~36 .lut_mask = 16'hECA0; -defparam \inst|shifter|auto_generated|sbit_w[37]~36 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector22~2 .lut_mask = 16'hFF40; +defparam \inst13|inst14|Selector22~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N18 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[37]~39 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[37]~39_combout = (\inst|shifter|auto_generated|sbit_w[37]~36_combout ) # ((\inst|shifter|auto_generated|sbit_w[21]~38_combout & !\inst|IR [1])) - - .dataa(gnd), - .datab(\inst|shifter|auto_generated|sbit_w[37]~36_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), - .datad(\inst|IR [1]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), - .cout()); +// Location: FF_X61_Y36_N3 +dffeas \inst13|inst14|state.Rx1 ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector22~2_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|state.Rx1~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[37]~39 .lut_mask = 16'hCCFC; -defparam \inst|shifter|auto_generated|sbit_w[37]~39 .sum_lutc_input = "datac"; +defparam \inst13|inst14|state.Rx1 .is_wysiwyg = "true"; +defparam \inst13|inst14|state.Rx1 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N4 -fiftyfivenm_lcell_comb \inst|Selector14~2 ( +// Location: LCCOMB_X56_Y34_N10 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~8 ( // Equation(s): -// \inst|Selector14~2_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[53]~73_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[37]~39_combout )))) +// \inst13|inst|Decoder0~8_combout = (!\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [2] & (\inst13|inst|Decoder0~0_combout & !\inst13|inst|bit_cnt [1]))) - .dataa(\inst|Selector19~4_combout ), - .datab(\inst|IR [2]), - .datac(\inst|shifter|auto_generated|sbit_w[53]~73_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|bit_cnt [2]), + .datac(\inst13|inst|Decoder0~0_combout ), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst|Selector14~2_combout ), + .combout(\inst13|inst|Decoder0~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector14~2 .lut_mask = 16'hA2A0; -defparam \inst|Selector14~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~8 .lut_mask = 16'h0010; +defparam \inst13|inst|Decoder0~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N22 -fiftyfivenm_lcell_comb \inst|Selector14~3 ( +// Location: LCCOMB_X56_Y34_N14 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[7]~7 ( // Equation(s): -// \inst|Selector14~3_combout = (\inst|Selector14~1_combout ) # ((\inst|Selector14~2_combout ) # ((\inst|shifter|auto_generated|sbit_w[61]~72_combout & \inst|Selector20~0_combout ))) +// \inst13|inst|data_rx[7]~7_combout = (\inst13|inst|Decoder0~8_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~8_combout & ((\inst13|inst|data_rx [7]))) - .dataa(\inst|shifter|auto_generated|sbit_w[61]~72_combout ), - .datab(\inst|Selector14~1_combout ), - .datac(\inst|Selector20~0_combout ), - .datad(\inst|Selector14~2_combout ), + .dataa(\GSENSOR_SDI~input_o ), + .datab(gnd), + .datac(\inst13|inst|data_rx [7]), + .datad(\inst13|inst|Decoder0~8_combout ), .cin(gnd), - .combout(\inst|Selector14~3_combout ), + .combout(\inst13|inst|data_rx[7]~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector14~3 .lut_mask = 16'hFFEC; -defparam \inst|Selector14~3 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[7]~7 .lut_mask = 16'hAAF0; +defparam \inst13|inst|data_rx[7]~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N16 -fiftyfivenm_lcell_comb \inst|Selector14~4 ( -// Equation(s): -// \inst|Selector14~4_combout = (\inst|Selector14~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [13] $ (\inst|AC [13])))) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), - .datab(\inst|AC [13]), - .datac(\inst|Selector14~3_combout ), - .datad(\inst|state.ex_xor~q ), - .cin(gnd), - .combout(\inst|Selector14~4_combout ), - .cout()); +// Location: FF_X56_Y34_N15 +dffeas \inst13|inst|data_rx[7] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[7]~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rx [7]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector14~4 .lut_mask = 16'hF6F0; -defparam \inst|Selector14~4 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[7] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N2 -fiftyfivenm_lcell_comb \inst|Selector14~5 ( +// Location: LCCOMB_X56_Y34_N26 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[7]~feeder ( // Equation(s): -// \inst|Selector14~5_combout = (\inst|Selector14~0_combout ) # ((\inst|Selector14~4_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~71_combout ))) +// \inst13|inst|data_rd[7]~feeder_combout = \inst13|inst|data_rx [7] - .dataa(\inst|AC[2]~0_combout ), - .datab(\inst|Add1~71_combout ), - .datac(\inst|Selector14~0_combout ), - .datad(\inst|Selector14~4_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|data_rx [7]), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector14~5_combout ), + .combout(\inst13|inst|data_rd[7]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector14~5 .lut_mask = 16'hFFF8; -defparam \inst|Selector14~5 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[7]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst|data_rd[7]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N22 -fiftyfivenm_lcell_comb \inst|Selector14~6 ( -// Equation(s): -// \inst|Selector14~6_combout = (\inst|Selector14~5_combout ) # (((\inst|state.ex_in2~q & !\inst13|inst1[0]~18_combout )) # (!\inst|Selector16~0_combout )) - - .dataa(\inst|state.ex_in2~q ), - .datab(\inst|Selector14~5_combout ), - .datac(\inst|Selector16~0_combout ), - .datad(\inst13|inst1[0]~18_combout ), - .cin(gnd), - .combout(\inst|Selector14~6_combout ), - .cout()); +// Location: FF_X56_Y34_N27 +dffeas \inst13|inst|data_rd[7] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[7]~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst|state~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rd [7]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector14~6 .lut_mask = 16'hCFEF; -defparam \inst|Selector14~6 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[7] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N16 -fiftyfivenm_lcell_comb \inst13|inst1[13]~80 ( +// Location: LCCOMB_X60_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[7]~9 ( // Equation(s): -// \inst13|inst1[13]~80_combout = (\inst13|inst1[13]~78_combout & \inst13|inst1[13]~79_combout ) +// \inst13|inst14|data_out[7]~9_combout = (\inst13|inst14|state.Rx1~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [7]))) - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst1[13]~78_combout ), - .datad(\inst13|inst1[13]~79_combout ), + .dataa(\inst13|inst14|state.Rx1~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [7]), .cin(gnd), - .combout(\inst13|inst1[13]~80_combout ), + .combout(\inst13|inst14|data_out[7]~9_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[13]~80 .lut_mask = 16'hF000; -defparam \inst13|inst1[13]~80 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[7]~9 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[7]~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N4 -fiftyfivenm_lcell_comb \inst|Selector14~7 ( +// Location: LCCOMB_X61_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[7]~2 ( // Equation(s): -// \inst|Selector14~7_combout = (\inst|Selector14~6_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[13]~77_combout & \inst13|inst1[13]~80_combout ))) +// \inst13|inst14|data_out[7]~2_combout = (\inst13|inst14|data_out[7]~0_combout & ((\inst13|inst14|tx_addr[7]~0_combout ) # ((\inst13|inst14|state.Rx1~q & \inst13|inst14|state_machine~0_combout )))) - .dataa(\inst|state.ex_in2~q ), - .datab(\inst13|inst1[13]~77_combout ), - .datac(\inst|Selector14~6_combout ), - .datad(\inst13|inst1[13]~80_combout ), + .dataa(\inst13|inst14|tx_addr[7]~0_combout ), + .datab(\inst13|inst14|state.Rx1~q ), + .datac(\inst13|inst14|data_out[7]~0_combout ), + .datad(\inst13|inst14|state_machine~0_combout ), .cin(gnd), - .combout(\inst|Selector14~7_combout ), + .combout(\inst13|inst14|data_out[7]~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector14~7 .lut_mask = 16'hF8F0; -defparam \inst|Selector14~7 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[7]~2 .lut_mask = 16'hE0A0; +defparam \inst13|inst14|data_out[7]~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y41_N5 -dffeas \inst|AC[13] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector14~7_combout ), +// Location: FF_X60_Y36_N21 +dffeas \inst13|inst14|data_out[7] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[7]~9_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [13]), + .q(\inst13|inst14|data_out [7]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[13] .is_wysiwyg = "true"; -defparam \inst|AC[13] .power_up = "low"; +defparam \inst13|inst14|data_out[7] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N0 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[29]~41 ( +// Location: LCCOMB_X60_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst1[7]~54 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[29]~41_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [14])) # (!\inst|IR [4] & ((\inst|AC [12]))))) +// \inst13|inst1[7]~54_combout = ((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [7])) # (!\inst3|I2C_DATA_EN~combout ) - .dataa(\inst|AC [14]), - .datab(\inst|AC [12]), - .datac(\inst|IR [4]), - .datad(\inst|IR [0]), + .dataa(gnd), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst13|inst14|data_out [7]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[29]~41_combout ), + .combout(\inst13|inst1[7]~54_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[29]~41 .lut_mask = 16'hAC00; -defparam \inst|shifter|auto_generated|sbit_w[29]~41 .sum_lutc_input = "datac"; +defparam \inst13|inst1[7]~54 .lut_mask = 16'hFFF3; +defparam \inst13|inst1[7]~54 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N12 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[29]~42 ( +// Location: LCCOMB_X59_Y37_N28 +fiftyfivenm_lcell_comb \inst13|inst1[7]~56 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[29]~42_combout = (\inst|shifter|auto_generated|sbit_w[29]~41_combout ) # ((\inst|AC [13] & !\inst|IR [0])) +// \inst13|inst1[7]~56_combout = (\inst13|inst1[7]~55_combout & (\inst13|inst1[7]~54_combout & ((\inst11|count [7]) # (!\inst11|tri_enable~combout )))) - .dataa(gnd), - .datab(\inst|AC [13]), - .datac(\inst|IR [0]), - .datad(\inst|shifter|auto_generated|sbit_w[29]~41_combout ), + .dataa(\inst11|tri_enable~combout ), + .datab(\inst11|count [7]), + .datac(\inst13|inst1[7]~55_combout ), + .datad(\inst13|inst1[7]~54_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), + .combout(\inst13|inst1[7]~56_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[29]~42 .lut_mask = 16'hFF0C; -defparam \inst|shifter|auto_generated|sbit_w[29]~42 .sum_lutc_input = "datac"; +defparam \inst13|inst1[7]~56 .lut_mask = 16'hD000; +defparam \inst13|inst1[7]~56 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N6 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[45]~43 ( +// Location: LCCOMB_X59_Y37_N18 +fiftyfivenm_lcell_comb \inst|Selector20~6 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[45]~43_combout = (\inst|IR [1] & (\inst|IR [4] & (\inst|AC [15]))) # (!\inst|IR [1] & (((\inst|shifter|auto_generated|sbit_w[29]~42_combout )))) +// \inst|Selector20~6_combout = (\inst13|inst1[0]~24_combout & (((!\inst13|inst1[7]~56_combout ) # (!\inst4|IO_BUS|dout[7]~2_combout )) # (!\inst13|inst1[7]~102_combout ))) - .dataa(\inst|IR [1]), - .datab(\inst|IR [4]), - .datac(\inst|AC [15]), - .datad(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), + .dataa(\inst13|inst1[7]~102_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst4|IO_BUS|dout[7]~2_combout ), + .datad(\inst13|inst1[7]~56_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[45]~43_combout ), + .combout(\inst|Selector20~6_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[45]~43 .lut_mask = 16'hD580; -defparam \inst|shifter|auto_generated|sbit_w[45]~43 .sum_lutc_input = "datac"; +defparam \inst|Selector20~6 .lut_mask = 16'h4CCC; +defparam \inst|Selector20~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[27]~44 ( +// Location: LCCOMB_X59_Y37_N6 +fiftyfivenm_lcell_comb \inst|Selector20~7 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[27]~44_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [12]))) # (!\inst|IR [4] & (\inst|AC [10])))) +// \inst|Selector20~7_combout = (\inst|Selector20~1_combout ) # ((\inst|Selector20~5_combout ) # ((\inst|state.ex_in2~q & !\inst|Selector20~6_combout ))) - .dataa(\inst|AC [10]), - .datab(\inst|IR [4]), - .datac(\inst|AC [12]), - .datad(\inst|IR [0]), + .dataa(\inst|Selector20~1_combout ), + .datab(\inst|Selector20~5_combout ), + .datac(\inst|state.ex_in2~q ), + .datad(\inst|Selector20~6_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[27]~44_combout ), + .combout(\inst|Selector20~7_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[27]~44 .lut_mask = 16'hE200; -defparam \inst|shifter|auto_generated|sbit_w[27]~44 .sum_lutc_input = "datac"; +defparam \inst|Selector20~7 .lut_mask = 16'hEEFE; +defparam \inst|Selector20~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N24 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[27]~45 ( +// Location: FF_X59_Y37_N7 +dffeas \inst|AC[7] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector20~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|AC [7]), + .prn(vcc)); +// synopsys translate_off +defparam \inst|AC[7] .is_wysiwyg = "true"; +defparam \inst|AC[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y37_N2 +fiftyfivenm_lcell_comb \inst|Add1~40 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[27]~45_combout = (\inst|shifter|auto_generated|sbit_w[27]~44_combout ) # ((\inst|AC [11] & !\inst|IR [0])) +// \inst|Add1~40_combout = (\inst|AC [7] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_add~q )))) - .dataa(\inst|AC [11]), - .datab(gnd), - .datac(\inst|shifter|auto_generated|sbit_w[27]~44_combout ), - .datad(\inst|IR [0]), + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|AC [7]), + .datac(\inst|state.ex_addi~q ), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), + .combout(\inst|Add1~40_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[27]~45 .lut_mask = 16'hF0FA; -defparam \inst|shifter|auto_generated|sbit_w[27]~45 .sum_lutc_input = "datac"; +defparam \inst|Add1~40 .lut_mask = 16'hCCC8; +defparam \inst|Add1~40 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N10 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[45]~78 ( +// Location: LCCOMB_X55_Y39_N2 +fiftyfivenm_lcell_comb \inst|Add1~46 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[45]~78_combout = (\inst|shifter|auto_generated|sbit_w[45]~43_combout ) # ((\inst|shifter|auto_generated|sbit_w[27]~45_combout & (\inst|IR [1] & !\inst|IR [4]))) +// \inst|Add1~46_combout = (\inst|Add1~44_combout & ((\inst|Add1~45_combout & (\inst|Add1~42 & VCC)) # (!\inst|Add1~45_combout & (!\inst|Add1~42 )))) # (!\inst|Add1~44_combout & ((\inst|Add1~45_combout & (!\inst|Add1~42 )) # (!\inst|Add1~45_combout & +// ((\inst|Add1~42 ) # (GND))))) +// \inst|Add1~47 = CARRY((\inst|Add1~44_combout & (!\inst|Add1~45_combout & !\inst|Add1~42 )) # (!\inst|Add1~44_combout & ((!\inst|Add1~42 ) # (!\inst|Add1~45_combout )))) - .dataa(\inst|shifter|auto_generated|sbit_w[45]~43_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), - .datac(\inst|IR [1]), - .datad(\inst|IR [4]), + .dataa(\inst|Add1~44_combout ), + .datab(\inst|Add1~45_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~42 ), + .combout(\inst|Add1~46_combout ), + .cout(\inst|Add1~47 )); +// synopsys translate_off +defparam \inst|Add1~46 .lut_mask = 16'h9617; +defparam \inst|Add1~46 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y39_N20 +fiftyfivenm_lcell_comb \inst|Selector19~2 ( +// Equation(s): +// \inst|Selector19~2_combout = (\inst|altsyncram_component|auto_generated|q_a [8] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [8])))) # (!\inst|altsyncram_component|auto_generated|q_a [8] & (\inst|state.ex_xor~q & ((\inst|AC +// [8])))) + + .dataa(\inst|state.ex_xor~q ), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|AC [8]), + .datad(\inst|altsyncram_component|auto_generated|q_a [8]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[45]~78_combout ), + .combout(\inst|Selector19~2_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[45]~78 .lut_mask = 16'hAAEA; -defparam \inst|shifter|auto_generated|sbit_w[45]~78 .sum_lutc_input = "datac"; +defparam \inst|Selector19~2 .lut_mask = 16'hCEA0; +defparam \inst|Selector19~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N30 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[61]~71 ( +// Location: LCCOMB_X56_Y39_N22 +fiftyfivenm_lcell_comb \inst|Selector19~3 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[61]~71_combout = (\inst|IR [2] & (((\inst|AC [15] & \inst|IR [4])))) # (!\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[45]~78_combout )) +// \inst|Selector19~3_combout = (\inst|Selector19~0_combout ) # ((\inst|Selector19~2_combout ) # ((\inst|Add1~46_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst|shifter|auto_generated|sbit_w[45]~78_combout ), - .datab(\inst|IR [2]), - .datac(\inst|AC [15]), - .datad(\inst|IR [4]), + .dataa(\inst|Add1~46_combout ), + .datab(\inst|Selector19~0_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector19~2_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[61]~71_combout ), + .combout(\inst|Selector19~3_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[61]~71 .lut_mask = 16'hE222; -defparam \inst|shifter|auto_generated|sbit_w[61]~71 .sum_lutc_input = "datac"; +defparam \inst|Selector19~3 .lut_mask = 16'hFFEC; +defparam \inst|Selector19~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N0 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[61]~72 ( +// Location: LCCOMB_X57_Y34_N8 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[32]~4 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[61]~72_combout = (\inst|shifter|auto_generated|sbit_w[61]~71_combout ) # ((\inst|IR [2] & (!\inst|IR [4] & \inst|shifter|auto_generated|sbit_w[41]~50_combout ))) +// \inst|shifter|auto_generated|sbit_w[32]~4_combout = (\inst|IR [4] & (\inst|IR [0] & (!\inst|IR [1] & \inst|AC [1]))) - .dataa(\inst|IR [2]), - .datab(\inst|IR [4]), - .datac(\inst|shifter|auto_generated|sbit_w[61]~71_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .dataa(\inst|IR [4]), + .datab(\inst|IR [0]), + .datac(\inst|IR [1]), + .datad(\inst|AC [1]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[61]~72_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[32]~4_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[61]~72 .lut_mask = 16'hF2F0; -defparam \inst|shifter|auto_generated|sbit_w[61]~72 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[32]~4 .lut_mask = 16'h0800; +defparam \inst|shifter|auto_generated|sbit_w[32]~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N8 -fiftyfivenm_lcell_comb \inst|Selector22~0 ( +// Location: LCCOMB_X57_Y34_N22 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[32]~5 ( // Equation(s): -// \inst|Selector22~0_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[53]~73_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[37]~39_combout )))) +// \inst|shifter|auto_generated|sbit_w[32]~5_combout = (\inst|shifter|auto_generated|sbit_w[32]~4_combout ) # ((!\inst|IR [1] & (\inst|AC [0] & !\inst|IR [0]))) - .dataa(\inst|IR [2]), - .datab(\inst|Selector20~0_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[53]~73_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), + .dataa(\inst|IR [1]), + .datab(\inst|shifter|auto_generated|sbit_w[32]~4_combout ), + .datac(\inst|AC [0]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector22~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[32]~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~0 .lut_mask = 16'hC4C0; -defparam \inst|Selector22~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[32]~5 .lut_mask = 16'hCCDC; +defparam \inst|shifter|auto_generated|sbit_w[32]~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N10 -fiftyfivenm_lcell_comb \inst|Selector22~1 ( +// Location: LCCOMB_X57_Y34_N4 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[18]~6 ( // Equation(s): -// \inst|Selector22~1_combout = (\inst|AC [5] & (((\inst|altsyncram_component|auto_generated|q_a [5] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) +// \inst|shifter|auto_generated|sbit_w[18]~6_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [3])) # (!\inst|IR [4] & ((\inst|AC [1]))))) - .dataa(\inst|Selector27~6_combout ), - .datab(\inst|altsyncram_component|auto_generated|q_a [5]), - .datac(\inst|state.ex_and~q ), - .datad(\inst|AC [5]), + .dataa(\inst|IR [4]), + .datab(\inst|IR [0]), + .datac(\inst|AC [3]), + .datad(\inst|AC [1]), .cin(gnd), - .combout(\inst|Selector22~1_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[18]~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~1 .lut_mask = 16'hD500; -defparam \inst|Selector22~1 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[18]~6 .lut_mask = 16'hC480; +defparam \inst|shifter|auto_generated|sbit_w[18]~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N0 -fiftyfivenm_lcell_comb \inst|Selector22~2 ( +// Location: LCCOMB_X57_Y34_N26 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[18]~7 ( // Equation(s): -// \inst|Selector22~2_combout = (\inst|Selector22~0_combout ) # ((\inst|Selector22~1_combout ) # ((\inst|shifter|auto_generated|sbit_w[61]~72_combout & \inst|Selector27~4_combout ))) +// \inst|shifter|auto_generated|sbit_w[18]~7_combout = (\inst|shifter|auto_generated|sbit_w[18]~6_combout ) # ((\inst|AC [2] & !\inst|IR [0])) - .dataa(\inst|shifter|auto_generated|sbit_w[61]~72_combout ), - .datab(\inst|Selector27~4_combout ), - .datac(\inst|Selector22~0_combout ), - .datad(\inst|Selector22~1_combout ), + .dataa(\inst|AC [2]), + .datab(\inst|shifter|auto_generated|sbit_w[18]~6_combout ), + .datac(\inst|IR [0]), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector22~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~2 .lut_mask = 16'hFFF8; -defparam \inst|Selector22~2 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[18]~7 .lut_mask = 16'hCECE; +defparam \inst|shifter|auto_generated|sbit_w[18]~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N14 -fiftyfivenm_lcell_comb \inst|Selector22~3 ( +// Location: LCCOMB_X57_Y35_N12 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[48]~8 ( // Equation(s): -// \inst|Selector22~3_combout = (\inst|IR [5] & ((\inst|state.ex_loadi~q ) # ((\inst|Selector27~1_combout & \inst|altsyncram_component|auto_generated|q_a [5])))) # (!\inst|IR [5] & (\inst|Selector27~1_combout & -// ((\inst|altsyncram_component|auto_generated|q_a [5])))) +// \inst|shifter|auto_generated|sbit_w[48]~8_combout = (!\inst|IR [2] & ((\inst|shifter|auto_generated|sbit_w[32]~5_combout ) # ((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[18]~7_combout )))) - .dataa(\inst|IR [5]), - .datab(\inst|Selector27~1_combout ), - .datac(\inst|state.ex_loadi~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [5]), + .dataa(\inst3|I2C_RDY_EN~0_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[32]~5_combout ), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), .cin(gnd), - .combout(\inst|Selector22~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[48]~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~3 .lut_mask = 16'hECA0; -defparam \inst|Selector22~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[48]~8 .lut_mask = 16'h0E0C; +defparam \inst|shifter|auto_generated|sbit_w[48]~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N4 -fiftyfivenm_lcell_comb \inst|Selector22~4 ( +// Location: LCCOMB_X57_Y35_N6 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[48]~15 ( // Equation(s): -// \inst|Selector22~4_combout = (\inst|Selector22~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [5] $ (\inst|AC [5])))) +// \inst|shifter|auto_generated|sbit_w[48]~15_combout = (\inst|shifter|auto_generated|sbit_w[48]~8_combout ) # ((\inst|IR [4] & (\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[36]~14_combout ))) - .dataa(\inst|state.ex_xor~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [5]), - .datac(\inst|Selector22~3_combout ), - .datad(\inst|AC [5]), + .dataa(\inst|IR [4]), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[48]~8_combout ), .cin(gnd), - .combout(\inst|Selector22~4_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[48]~15_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~4 .lut_mask = 16'hF2F8; -defparam \inst|Selector22~4 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[48]~15 .lut_mask = 16'hFF80; +defparam \inst|shifter|auto_generated|sbit_w[48]~15 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N6 -fiftyfivenm_lcell_comb \inst|Add1~30 ( +// Location: LCCOMB_X59_Y36_N30 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[30]~18 ( // Equation(s): -// \inst|Add1~30_combout = (\inst|AC [5] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) +// \inst|shifter|auto_generated|sbit_w[30]~18_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [15])) # (!\inst|IR [4] & ((\inst|AC [13]))))) - .dataa(\inst|state.ex_add~q ), - .datab(\inst|AC [5]), - .datac(\inst|state.ex_addi~q ), - .datad(\inst|state.ex_sub~q ), + .dataa(\inst|IR [0]), + .datab(\inst|AC [15]), + .datac(\inst|IR [4]), + .datad(\inst|AC [13]), .cin(gnd), - .combout(\inst|Add1~30_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[30]~18_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~30 .lut_mask = 16'hCCC8; -defparam \inst|Add1~30 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[30]~18 .lut_mask = 16'h8A80; +defparam \inst|shifter|auto_generated|sbit_w[30]~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N6 -fiftyfivenm_lcell_comb \inst|Add1~28 ( +// Location: LCCOMB_X59_Y36_N28 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[30]~19 ( // Equation(s): -// \inst|Add1~28_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [5]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [5])) +// \inst|shifter|auto_generated|sbit_w[30]~19_combout = (\inst|shifter|auto_generated|sbit_w[30]~18_combout ) # ((\inst|AC [14] & !\inst|IR [0])) - .dataa(\inst|state.ex_add~q ), + .dataa(\inst|AC [14]), .datab(gnd), - .datac(\inst|state.ex_sub~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [5]), + .datac(\inst|shifter|auto_generated|sbit_w[30]~18_combout ), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Add1~28_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[30]~19_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~28 .lut_mask = 16'h0AF0; -defparam \inst|Add1~28 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[30]~19 .lut_mask = 16'hF0FA; +defparam \inst|shifter|auto_generated|sbit_w[30]~19 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N12 -fiftyfivenm_lcell_comb \inst|Add1~29 ( +// Location: LCCOMB_X58_Y35_N20 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[44]~20 ( // Equation(s): -// \inst|Add1~29_combout = (\inst|Add1~1_combout & ((\inst|IR [5]) # ((\inst|WideOr3~1_combout & \inst|Add1~28_combout )))) # (!\inst|Add1~1_combout & (((\inst|WideOr3~1_combout & \inst|Add1~28_combout )))) +// \inst|shifter|auto_generated|sbit_w[44]~20_combout = (\inst|shifter|auto_generated|sbit_w[26]~17_combout & ((\inst3|TIMER_EN~3_combout ) # ((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[30]~19_combout )))) # +// (!\inst|shifter|auto_generated|sbit_w[26]~17_combout & (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[30]~19_combout )))) - .dataa(\inst|Add1~1_combout ), - .datab(\inst|IR [5]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~28_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), + .datab(\inst3|I2C_RDY_EN~0_combout ), + .datac(\inst3|TIMER_EN~3_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[30]~19_combout ), .cin(gnd), - .combout(\inst|Add1~29_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[44]~20_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~29 .lut_mask = 16'hF888; -defparam \inst|Add1~29 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[44]~20 .lut_mask = 16'hECA0; +defparam \inst|shifter|auto_generated|sbit_w[44]~20 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N28 -fiftyfivenm_lcell_comb \inst|Add1~31 ( +// Location: LCCOMB_X58_Y35_N30 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[44]~23 ( // Equation(s): -// \inst|Add1~31_combout = ((\inst|Add1~30_combout $ (\inst|Add1~29_combout $ (!\inst|Add1~27 )))) # (GND) -// \inst|Add1~32 = CARRY((\inst|Add1~30_combout & ((\inst|Add1~29_combout ) # (!\inst|Add1~27 ))) # (!\inst|Add1~30_combout & (\inst|Add1~29_combout & !\inst|Add1~27 ))) +// \inst|shifter|auto_generated|sbit_w[44]~23_combout = (\inst|shifter|auto_generated|sbit_w[44]~20_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[28]~22_combout )) - .dataa(\inst|Add1~30_combout ), - .datab(\inst|Add1~29_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~27 ), - .combout(\inst|Add1~31_combout ), - .cout(\inst|Add1~32 )); + .dataa(gnd), + .datab(\inst|shifter|auto_generated|sbit_w[44]~20_combout ), + .datac(\inst|IR [1]), + .datad(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~31 .lut_mask = 16'h698E; -defparam \inst|Add1~31 .sum_lutc_input = "cin"; +defparam \inst|shifter|auto_generated|sbit_w[44]~23 .lut_mask = 16'hCFCC; +defparam \inst|shifter|auto_generated|sbit_w[44]~23 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y41_N6 -fiftyfivenm_lcell_comb \inst|Selector22~5 ( +// Location: LCCOMB_X57_Y35_N20 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[56]~24 ( // Equation(s): -// \inst|Selector22~5_combout = (\inst|Selector22~2_combout ) # ((\inst|Selector22~4_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~31_combout ))) +// \inst|shifter|auto_generated|sbit_w[56]~24_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[44]~23_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[36]~14_combout ))))) - .dataa(\inst|AC[2]~0_combout ), - .datab(\inst|Selector22~2_combout ), - .datac(\inst|Selector22~4_combout ), - .datad(\inst|Add1~31_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), + .datab(\inst|IR [4]), + .datac(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst|Selector22~5_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[56]~24_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~5 .lut_mask = 16'hFEFC; -defparam \inst|Selector22~5 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[56]~24 .lut_mask = 16'hB800; +defparam \inst|shifter|auto_generated|sbit_w[56]~24 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N22 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[5]~7 ( +// Location: LCCOMB_X58_Y37_N30 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[40]~25 ( // Equation(s): -// \inst13|inst14|data_out[5]~7_combout = (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx1~q & (\inst13|inst|data_rd [5] & \inst13|inst14|prev_busy~q ))) +// \inst|shifter|auto_generated|sbit_w[40]~25_combout = (\inst|IR [1] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[26]~17_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[22]~10_combout ))))) - .dataa(\inst13|inst|busy~q ), - .datab(\inst13|inst14|state.Rx1~q ), - .datac(\inst13|inst|data_rd [5]), - .datad(\inst13|inst14|prev_busy~q ), + .dataa(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), + .datac(\inst|IR [4]), + .datad(\inst|IR [1]), .cin(gnd), - .combout(\inst13|inst14|data_out[5]~7_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[40]~25_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[5]~7 .lut_mask = 16'h4000; -defparam \inst13|inst14|data_out[5]~7 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y38_N23 -dffeas \inst13|inst14|data_out[5] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[5]~7_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|data_out [5]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst14|data_out[5] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[5] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[40]~25 .lut_mask = 16'hAC00; +defparam \inst|shifter|auto_generated|sbit_w[40]~25 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N16 -fiftyfivenm_lcell_comb \inst13|inst1[5]~41 ( +// Location: LCCOMB_X58_Y35_N28 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[40]~28 ( // Equation(s): -// \inst13|inst1[5]~41_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [5])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [5])) # (!\inst3|I2C_DATA_EN~combout ))) +// \inst|shifter|auto_generated|sbit_w[40]~28_combout = (\inst|shifter|auto_generated|sbit_w[40]~25_combout ) # ((\inst|shifter|auto_generated|sbit_w[24]~27_combout & !\inst|IR [1])) - .dataa(\inst3|I2C_DATA_EN~combout ), - .datab(\inst|AC [5]), - .datac(\inst|IO_WRITE_int~q ), - .datad(\inst13|inst14|data_out [5]), + .dataa(gnd), + .datab(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), + .datac(\inst|IR [1]), + .datad(\inst|shifter|auto_generated|sbit_w[40]~25_combout ), .cin(gnd), - .combout(\inst13|inst1[5]~41_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[5]~41 .lut_mask = 16'hCFC5; -defparam \inst13|inst1[5]~41 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[40]~28 .lut_mask = 16'hFF0C; +defparam \inst|shifter|auto_generated|sbit_w[40]~28 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N22 -fiftyfivenm_lcell_comb \inst13|inst1[5]~42 ( +// Location: LCCOMB_X57_Y35_N18 +fiftyfivenm_lcell_comb \inst|Selector19~5 ( // Equation(s): -// \inst13|inst1[5]~42_combout = (!\inst13|inst4~combout & (\inst13|inst1[5]~41_combout & ((\inst11|count [5]) # (!\inst11|tri_enable~combout )))) +// \inst|Selector19~5_combout = (\inst|shifter|auto_generated|sbit_w[56]~24_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[40]~28_combout )) - .dataa(\inst11|count [5]), - .datab(\inst13|inst4~combout ), - .datac(\inst13|inst1[5]~41_combout ), - .datad(\inst11|tri_enable~combout ), + .dataa(gnd), + .datab(\inst|shifter|auto_generated|sbit_w[56]~24_combout ), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), .cin(gnd), - .combout(\inst13|inst1[5]~42_combout ), + .combout(\inst|Selector19~5_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[5]~42 .lut_mask = 16'h2030; -defparam \inst13|inst1[5]~42 .sum_lutc_input = "datac"; +defparam \inst|Selector19~5 .lut_mask = 16'hCFCC; +defparam \inst|Selector19~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOIBUF_X49_Y54_N1 -fiftyfivenm_io_ibuf \SW[5]~input ( - .i(SW[5]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[5]~input_o )); -// synopsys translate_off -defparam \SW[5]~input .bus_hold = "false"; -defparam \SW[5]~input .listen_to_nsleep_signal = "false"; -defparam \SW[5]~input .simulate_z_as = "z"; -// synopsys translate_on +// Location: LCCOMB_X57_Y38_N28 +fiftyfivenm_lcell_comb \inst|Selector19~6 ( +// Equation(s): +// \inst|Selector19~6_combout = (\inst|Selector20~0_combout & ((\inst|Selector19~5_combout ) # ((\inst|IR [8] & \inst|state.ex_loadi~q )))) # (!\inst|Selector20~0_combout & (\inst|IR [8] & (\inst|state.ex_loadi~q ))) -// Location: FF_X54_Y42_N3 -dffeas \inst7|B_DI[5] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\SW[5]~input_o ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst7|B_DI [5]), - .prn(vcc)); + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|IR [8]), + .datac(\inst|state.ex_loadi~q ), + .datad(\inst|Selector19~5_combout ), + .cin(gnd), + .combout(\inst|Selector19~6_combout ), + .cout()); // synopsys translate_off -defparam \inst7|B_DI[5] .is_wysiwyg = "true"; -defparam \inst7|B_DI[5] .power_up = "low"; +defparam \inst|Selector19~6 .lut_mask = 16'hEAC0; +defparam \inst|Selector19~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y42_N2 -fiftyfivenm_lcell_comb \inst13|inst1[5]~40 ( +// Location: LCCOMB_X56_Y39_N28 +fiftyfivenm_lcell_comb \inst|Selector19~7 ( // Equation(s): -// \inst13|inst1[5]~40_combout = (\inst10|count [5] & (((\inst7|B_DI [5])) # (!\inst3|SWITCH_EN~combout ))) # (!\inst10|count [5] & (!\inst10|tri_enable~combout & ((\inst7|B_DI [5]) # (!\inst3|SWITCH_EN~combout )))) +// \inst|Selector19~7_combout = (\inst|Selector19~3_combout ) # ((\inst|Selector19~6_combout ) # ((\inst|shifter|auto_generated|sbit_w[48]~15_combout & \inst|Selector19~4_combout ))) - .dataa(\inst10|count [5]), - .datab(\inst3|SWITCH_EN~combout ), - .datac(\inst7|B_DI [5]), - .datad(\inst10|tri_enable~combout ), + .dataa(\inst|Selector19~3_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[48]~15_combout ), + .datac(\inst|Selector19~4_combout ), + .datad(\inst|Selector19~6_combout ), .cin(gnd), - .combout(\inst13|inst1[5]~40_combout ), + .combout(\inst|Selector19~7_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[5]~40 .lut_mask = 16'hA2F3; -defparam \inst13|inst1[5]~40 .sum_lutc_input = "datac"; +defparam \inst|Selector19~7 .lut_mask = 16'hFFEA; +defparam \inst|Selector19~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N0 -fiftyfivenm_lcell_comb \inst13|inst1[5]~43 ( +// Location: LCCOMB_X56_Y39_N10 +fiftyfivenm_lcell_comb \inst|Selector19~8 ( // Equation(s): -// \inst13|inst1[5]~43_combout = (\inst13|inst1[5]~42_combout & (\inst13|inst1[5]~40_combout & ((\inst4|COUNT [5]) # (!\inst4|IO_OUT~combout )))) +// \inst|Selector19~8_combout = (\inst|Selector19~1_combout ) # (\inst|Selector19~7_combout ) - .dataa(\inst13|inst1[5]~42_combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst13|inst1[5]~40_combout ), - .datad(\inst4|COUNT [5]), + .dataa(gnd), + .datab(gnd), + .datac(\inst|Selector19~1_combout ), + .datad(\inst|Selector19~7_combout ), .cin(gnd), - .combout(\inst13|inst1[5]~43_combout ), + .combout(\inst|Selector19~8_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[5]~43 .lut_mask = 16'hA020; -defparam \inst13|inst1[5]~43 .sum_lutc_input = "datac"; +defparam \inst|Selector19~8 .lut_mask = 16'hFFF0; +defparam \inst|Selector19~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N18 -fiftyfivenm_lcell_comb \inst|Selector22~6 ( +// Location: LCCOMB_X58_Y39_N2 +fiftyfivenm_lcell_comb \inst|Selector19~9 ( // Equation(s): -// \inst|Selector22~6_combout = (\inst|Selector22~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[5]~43_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst|Selector19~9_combout = (\inst|Selector19~8_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[8]~61_combout ) # (!\inst13|inst1[0]~24_combout )))) - .dataa(\inst13|inst1[0]~18_combout ), - .datab(\inst|Selector22~5_combout ), + .dataa(\inst|Selector19~8_combout ), + .datab(\inst13|inst1[0]~24_combout ), .datac(\inst|state.ex_in2~q ), - .datad(\inst13|inst1[5]~43_combout ), + .datad(\inst13|inst1[8]~61_combout ), .cin(gnd), - .combout(\inst|Selector22~6_combout ), + .combout(\inst|Selector19~9_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector22~6 .lut_mask = 16'hFCDC; -defparam \inst|Selector22~6 .sum_lutc_input = "datac"; +defparam \inst|Selector19~9 .lut_mask = 16'hFABA; +defparam \inst|Selector19~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y42_N19 -dffeas \inst|AC[5] ( +// Location: FF_X58_Y39_N3 +dffeas \inst|AC[8] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector22~6_combout ), + .d(\inst|Selector19~9_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -14488,3817 +14837,3628 @@ dffeas \inst|AC[5] ( .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [5]), + .q(\inst|AC [8]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[5] .is_wysiwyg = "true"; -defparam \inst|AC[5] .power_up = "low"; +defparam \inst|AC[8] .is_wysiwyg = "true"; +defparam \inst|AC[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[21]~37 ( +// Location: LCCOMB_X58_Y37_N0 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[24]~26 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[21]~37_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [6])) # (!\inst|IR [4] & ((\inst|AC [4]))))) +// \inst|shifter|auto_generated|sbit_w[24]~26_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [9])) # (!\inst|IR [4] & ((\inst|AC [7]))))) - .dataa(\inst|AC [6]), + .dataa(\inst|AC [9]), .datab(\inst|IR [0]), - .datac(\inst|AC [4]), - .datad(\inst|IR [4]), + .datac(\inst|IR [4]), + .datad(\inst|AC [7]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[21]~37_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[24]~26_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[21]~37 .lut_mask = 16'h88C0; -defparam \inst|shifter|auto_generated|sbit_w[21]~37 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[24]~26 .lut_mask = 16'h8C80; +defparam \inst|shifter|auto_generated|sbit_w[24]~26 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N14 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[21]~38 ( +// Location: LCCOMB_X58_Y37_N16 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[24]~27 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[21]~38_combout = (\inst|shifter|auto_generated|sbit_w[21]~37_combout ) # ((!\inst|IR [0] & \inst|AC [5])) +// \inst|shifter|auto_generated|sbit_w[24]~27_combout = (\inst|shifter|auto_generated|sbit_w[24]~26_combout ) # ((\inst|AC [8] & !\inst|IR [0])) - .dataa(gnd), - .datab(\inst|IR [0]), - .datac(\inst|AC [5]), - .datad(\inst|shifter|auto_generated|sbit_w[21]~37_combout ), + .dataa(\inst|AC [8]), + .datab(\inst|shifter|auto_generated|sbit_w[24]~26_combout ), + .datac(gnd), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[21]~38 .lut_mask = 16'hFF30; -defparam \inst|shifter|auto_generated|sbit_w[21]~38 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[24]~27 .lut_mask = 16'hCCEE; +defparam \inst|shifter|auto_generated|sbit_w[24]~27 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N18 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[35]~63 ( +// Location: LCCOMB_X58_Y35_N16 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[42]~58 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[35]~63_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[17]~29_combout ) # ((!\inst|IR [0] & \inst|AC [1])))) +// \inst|shifter|auto_generated|sbit_w[42]~58_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[24]~27_combout ) # ((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[28]~22_combout )))) # +// (!\inst3|TIMER_EN~3_combout & (((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[28]~22_combout )))) .dataa(\inst3|TIMER_EN~3_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[17]~29_combout ), - .datac(\inst|IR [0]), - .datad(\inst|AC [1]), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[35]~63_combout ), - .cout()); -// synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[35]~63 .lut_mask = 16'h8A88; -defparam \inst|shifter|auto_generated|sbit_w[35]~63 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y42_N20 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[35]~62 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[35]~62_combout = (!\inst|IR [1] & ((\inst|shifter|auto_generated|sbit_w[19]~31_combout ) # ((\inst|AC [3] & !\inst|IR [0])))) - - .dataa(\inst|IR [1]), - .datab(\inst|AC [3]), - .datac(\inst|IR [0]), - .datad(\inst|shifter|auto_generated|sbit_w[19]~31_combout ), - .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[35]~62_combout ), - .cout()); -// synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[35]~62 .lut_mask = 16'h5504; -defparam \inst|shifter|auto_generated|sbit_w[35]~62 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y42_N16 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[35]~64 ( -// Equation(s): -// \inst|shifter|auto_generated|sbit_w[35]~64_combout = (\inst|shifter|auto_generated|sbit_w[35]~63_combout ) # ((\inst|shifter|auto_generated|sbit_w[35]~62_combout ) # ((\inst|shifter|auto_generated|sbit_w[21]~38_combout & \inst3|I2C_RDY_EN~0_combout ))) - - .dataa(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[35]~63_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), .datac(\inst3|I2C_RDY_EN~0_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[35]~62_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[35]~64_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[42]~58_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[35]~64 .lut_mask = 16'hFFEC; -defparam \inst|shifter|auto_generated|sbit_w[35]~64 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[42]~58 .lut_mask = 16'hF888; +defparam \inst|shifter|auto_generated|sbit_w[42]~58 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N24 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[39]~60 ( +// Location: LCCOMB_X58_Y35_N14 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[42]~59 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[39]~60_combout = (\inst|shifter|auto_generated|sbit_w[21]~38_combout & ((\inst3|TIMER_EN~3_combout ) # ((\inst|shifter|auto_generated|sbit_w[25]~49_combout & \inst3|I2C_RDY_EN~0_combout )))) # -// (!\inst|shifter|auto_generated|sbit_w[21]~38_combout & (\inst|shifter|auto_generated|sbit_w[25]~49_combout & (\inst3|I2C_RDY_EN~0_combout ))) +// \inst|shifter|auto_generated|sbit_w[42]~59_combout = (\inst|shifter|auto_generated|sbit_w[42]~58_combout ) # ((\inst|shifter|auto_generated|sbit_w[26]~17_combout & !\inst|IR [1])) - .dataa(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), - .datac(\inst3|I2C_RDY_EN~0_combout ), - .datad(\inst3|TIMER_EN~3_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[26]~17_combout ), + .datab(gnd), + .datac(\inst|IR [1]), + .datad(\inst|shifter|auto_generated|sbit_w[42]~58_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[39]~60_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[39]~60 .lut_mask = 16'hEAC0; -defparam \inst|shifter|auto_generated|sbit_w[39]~60 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[42]~59 .lut_mask = 16'hFF0A; +defparam \inst|shifter|auto_generated|sbit_w[42]~59 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N2 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[39]~61 ( +// Location: LCCOMB_X58_Y35_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[54]~78 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[39]~61_combout = (\inst|shifter|auto_generated|sbit_w[39]~60_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[23]~35_combout )) +// \inst|shifter|auto_generated|sbit_w[54]~78_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[42]~59_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[34]~55_combout )))) - .dataa(\inst|IR [1]), - .datab(gnd), - .datac(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[39]~60_combout ), + .dataa(\inst|IR [4]), + .datab(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[54]~78_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[39]~61 .lut_mask = 16'hFF50; -defparam \inst|shifter|auto_generated|sbit_w[39]~61 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[54]~78 .lut_mask = 16'hE400; +defparam \inst|shifter|auto_generated|sbit_w[54]~78 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N10 -fiftyfivenm_lcell_comb \inst|Selector24~0 ( +// Location: LCCOMB_X58_Y37_N18 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[20]~13 ( // Equation(s): -// \inst|Selector24~0_combout = (\inst|IR [2] & (((\inst|shifter|auto_generated|sbit_w[39]~61_combout & \inst|IR [4])))) # (!\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[35]~64_combout )) +// \inst|shifter|auto_generated|sbit_w[20]~13_combout = (\inst|shifter|auto_generated|sbit_w[20]~12_combout ) # ((!\inst|IR [0] & \inst|AC [4])) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[35]~64_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), - .datad(\inst|IR [4]), + .dataa(gnd), + .datab(\inst|IR [0]), + .datac(\inst|AC [4]), + .datad(\inst|shifter|auto_generated|sbit_w[20]~12_combout ), .cin(gnd), - .combout(\inst|Selector24~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[20]~13_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~0 .lut_mask = 16'hE444; -defparam \inst|Selector24~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[20]~13 .lut_mask = 16'hFF30; +defparam \inst|shifter|auto_generated|sbit_w[20]~13 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N0 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[59]~65 ( +// Location: LCCOMB_X58_Y37_N26 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[38]~51 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[59]~65_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|AC [15]))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[39]~61_combout )))) +// \inst|shifter|auto_generated|sbit_w[38]~51_combout = (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[24]~27_combout ) # ((\inst|shifter|auto_generated|sbit_w[20]~13_combout & \inst3|TIMER_EN~3_combout )))) # +// (!\inst3|I2C_RDY_EN~0_combout & (\inst|shifter|auto_generated|sbit_w[20]~13_combout & (\inst3|TIMER_EN~3_combout ))) - .dataa(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), - .datab(\inst|AC [15]), - .datac(\inst|IR [2]), - .datad(\inst|IR [4]), + .dataa(\inst3|I2C_RDY_EN~0_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[20]~13_combout ), + .datac(\inst3|TIMER_EN~3_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[24]~27_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[59]~65_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[38]~51_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[59]~65 .lut_mask = 16'hC0A0; -defparam \inst|shifter|auto_generated|sbit_w[59]~65 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[38]~51 .lut_mask = 16'hEAC0; +defparam \inst|shifter|auto_generated|sbit_w[38]~51 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N22 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[43]~66 ( +// Location: LCCOMB_X58_Y37_N20 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[38]~52 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[43]~66_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[25]~49_combout ) # ((\inst|shifter|auto_generated|sbit_w[29]~42_combout & \inst3|I2C_RDY_EN~0_combout )))) # -// (!\inst3|TIMER_EN~3_combout & (\inst|shifter|auto_generated|sbit_w[29]~42_combout & (\inst3|I2C_RDY_EN~0_combout ))) +// \inst|shifter|auto_generated|sbit_w[38]~52_combout = (\inst|shifter|auto_generated|sbit_w[38]~51_combout ) # ((\inst|shifter|auto_generated|sbit_w[22]~10_combout & !\inst|IR [1])) - .dataa(\inst3|TIMER_EN~3_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), - .datac(\inst3|I2C_RDY_EN~0_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[38]~51_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), + .datac(gnd), + .datad(\inst|IR [1]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[43]~66_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[43]~66 .lut_mask = 16'hEAC0; -defparam \inst|shifter|auto_generated|sbit_w[43]~66 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[38]~52 .lut_mask = 16'hAAEE; +defparam \inst|shifter|auto_generated|sbit_w[38]~52 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N30 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[43]~67 ( +// Location: LCCOMB_X58_Y35_N12 +fiftyfivenm_lcell_comb \inst|Selector21~0 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[43]~67_combout = (\inst|shifter|auto_generated|sbit_w[43]~66_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[27]~45_combout )) +// \inst|Selector21~0_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[54]~78_combout ) # ((\inst|shifter|auto_generated|sbit_w[38]~52_combout & !\inst|IR [2])))) - .dataa(gnd), - .datab(\inst|IR [1]), - .datac(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[43]~66_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[54]~78_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), + .datac(\inst|Selector20~0_combout ), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), + .combout(\inst|Selector21~0_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[43]~67 .lut_mask = 16'hFF30; -defparam \inst|shifter|auto_generated|sbit_w[43]~67 .sum_lutc_input = "datac"; +defparam \inst|Selector21~0 .lut_mask = 16'hA0E0; +defparam \inst|Selector21~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N4 -fiftyfivenm_lcell_comb \inst|Selector24~1 ( +// Location: LCCOMB_X57_Y39_N26 +fiftyfivenm_lcell_comb \inst|Selector21~2 ( // Equation(s): -// \inst|Selector24~1_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[59]~65_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[43]~67_combout )))) +// \inst|Selector21~2_combout = (\inst|Selector21~1_combout ) # ((\inst|Selector21~0_combout ) # ((\inst|shifter|auto_generated|sbit_w[62]~77_combout & \inst|Selector27~4_combout ))) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[59]~65_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[62]~77_combout ), + .datab(\inst|Selector21~1_combout ), + .datac(\inst|Selector21~0_combout ), .datad(\inst|Selector27~4_combout ), .cin(gnd), - .combout(\inst|Selector24~1_combout ), + .combout(\inst|Selector21~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~1 .lut_mask = 16'hDC00; -defparam \inst|Selector24~1 .sum_lutc_input = "datac"; +defparam \inst|Selector21~2 .lut_mask = 16'hFEFC; +defparam \inst|Selector21~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N26 -fiftyfivenm_lcell_comb \inst|Selector24~3 ( +// Location: LCCOMB_X57_Y39_N20 +fiftyfivenm_lcell_comb \inst|Selector21~5 ( // Equation(s): -// \inst|Selector24~3_combout = (\inst|Selector27~1_combout & ((\inst|altsyncram_component|auto_generated|q_a [3]) # ((\inst|state.ex_loadi~q & \inst|IR [3])))) # (!\inst|Selector27~1_combout & (\inst|state.ex_loadi~q & ((\inst|IR [3])))) +// \inst|Selector21~5_combout = (\inst|Selector21~4_combout ) # ((\inst|Selector21~2_combout ) # ((\inst|Add1~36_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst|Selector27~1_combout ), - .datab(\inst|state.ex_loadi~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [3]), - .datad(\inst|IR [3]), + .dataa(\inst|Selector21~4_combout ), + .datab(\inst|Add1~36_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector21~2_combout ), .cin(gnd), - .combout(\inst|Selector24~3_combout ), + .combout(\inst|Selector21~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~3 .lut_mask = 16'hECA0; -defparam \inst|Selector24~3 .sum_lutc_input = "datac"; +defparam \inst|Selector21~5 .lut_mask = 16'hFFEA; +defparam \inst|Selector21~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N8 -fiftyfivenm_lcell_comb \inst|Selector24~4 ( +// Location: LCCOMB_X55_Y34_N10 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~7 ( // Equation(s): -// \inst|Selector24~4_combout = (\inst|Selector24~3_combout ) # ((\inst|state.ex_xor~q & (\inst|AC [3] $ (\inst|altsyncram_component|auto_generated|q_a [3])))) +// \inst13|inst|Decoder0~7_combout = (!\inst13|inst|bit_cnt [2] & (\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [1] & \inst13|inst|Decoder0~0_combout ))) - .dataa(\inst|AC [3]), - .datab(\inst|state.ex_xor~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [3]), - .datad(\inst|Selector24~3_combout ), + .dataa(\inst13|inst|bit_cnt [2]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|bit_cnt [1]), + .datad(\inst13|inst|Decoder0~0_combout ), .cin(gnd), - .combout(\inst|Selector24~4_combout ), + .combout(\inst13|inst|Decoder0~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~4 .lut_mask = 16'hFF48; -defparam \inst|Selector24~4 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~7 .lut_mask = 16'h0400; +defparam \inst13|inst|Decoder0~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N20 -fiftyfivenm_lcell_comb \inst|Selector24~2 ( +// Location: LCCOMB_X55_Y34_N22 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[6]~6 ( // Equation(s): -// \inst|Selector24~2_combout = (\inst|AC [3] & (((\inst|altsyncram_component|auto_generated|q_a [3] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) +// \inst13|inst|data_rx[6]~6_combout = (\inst13|inst|Decoder0~7_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~7_combout & ((\inst13|inst|data_rx [6]))) - .dataa(\inst|AC [3]), - .datab(\inst|Selector27~6_combout ), - .datac(\inst|altsyncram_component|auto_generated|q_a [3]), - .datad(\inst|state.ex_and~q ), + .dataa(gnd), + .datab(\GSENSOR_SDI~input_o ), + .datac(\inst13|inst|data_rx [6]), + .datad(\inst13|inst|Decoder0~7_combout ), .cin(gnd), - .combout(\inst|Selector24~2_combout ), + .combout(\inst13|inst|data_rx[6]~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~2 .lut_mask = 16'hA222; -defparam \inst|Selector24~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[6]~6 .lut_mask = 16'hCCF0; +defparam \inst13|inst|data_rx[6]~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N2 -fiftyfivenm_lcell_comb \inst|Selector24~5 ( +// Location: FF_X55_Y34_N23 +dffeas \inst13|inst|data_rx[6] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[6]~6_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rx [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_rx[6] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y34_N12 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[6]~feeder ( // Equation(s): -// \inst|Selector24~5_combout = (\inst|Selector24~4_combout ) # ((\inst|Selector24~2_combout ) # ((\inst|Add1~21_combout & \inst|AC[2]~0_combout ))) +// \inst13|inst|data_rd[6]~feeder_combout = \inst13|inst|data_rx [6] - .dataa(\inst|Add1~21_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Selector24~4_combout ), - .datad(\inst|Selector24~2_combout ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst|data_rx [6]), .cin(gnd), - .combout(\inst|Selector24~5_combout ), + .combout(\inst13|inst|data_rd[6]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~5 .lut_mask = 16'hFFF8; -defparam \inst|Selector24~5 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[6]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst|data_rd[6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N6 -fiftyfivenm_lcell_comb \inst|Selector24~6 ( +// Location: FF_X56_Y34_N13 +dffeas \inst13|inst|data_rd[6] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[6]~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst|state~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_rd [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_rd[6] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y36_N6 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[6]~8 ( // Equation(s): -// \inst|Selector24~6_combout = (\inst|Selector24~1_combout ) # ((\inst|Selector24~5_combout ) # ((\inst|Selector24~0_combout & \inst|Selector20~0_combout ))) +// \inst13|inst14|data_out[6]~8_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst|data_rd [6] & \inst13|inst14|state.Rx1~q ))) - .dataa(\inst|Selector24~0_combout ), - .datab(\inst|Selector24~1_combout ), - .datac(\inst|Selector24~5_combout ), - .datad(\inst|Selector20~0_combout ), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst|data_rd [6]), + .datad(\inst13|inst14|state.Rx1~q ), .cin(gnd), - .combout(\inst|Selector24~6_combout ), + .combout(\inst13|inst14|data_out[6]~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~6 .lut_mask = 16'hFEFC; -defparam \inst|Selector24~6 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[6]~8 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[6]~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N24 -fiftyfivenm_lcell_comb \inst|Selector24~7 ( +// Location: FF_X60_Y36_N7 +dffeas \inst13|inst14|data_out[6] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[6]~8_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|data_out [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|data_out[6] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X59_Y37_N0 +fiftyfivenm_lcell_comb \inst13|inst1[6]~49 ( // Equation(s): -// \inst|Selector24~7_combout = (\inst|Selector24~6_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[3]~33_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst13|inst1[6]~49_combout = (\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [6]) # (!\inst3|I2C_DATA_EN~combout )) - .dataa(\inst13|inst1[0]~18_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[3]~33_combout ), - .datad(\inst|Selector24~6_combout ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(gnd), + .datad(\inst13|inst14|data_out [6]), .cin(gnd), - .combout(\inst|Selector24~7_combout ), + .combout(\inst13|inst1[6]~49_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector24~7 .lut_mask = 16'hFFC4; -defparam \inst|Selector24~7 .sum_lutc_input = "datac"; +defparam \inst13|inst1[6]~49 .lut_mask = 16'hFFBB; +defparam \inst13|inst1[6]~49 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y42_N25 -dffeas \inst|AC[3] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector24~7_combout ), - .asdata(vcc), +// Location: IOIBUF_X54_Y54_N15 +fiftyfivenm_io_ibuf \SW[6]~input ( + .i(SW[6]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[6]~input_o )); +// synopsys translate_off +defparam \SW[6]~input .bus_hold = "false"; +defparam \SW[6]~input .listen_to_nsleep_signal = "false"; +defparam \SW[6]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X58_Y37_N3 +dffeas \inst7|B_DI[6] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[6]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [3]), + .q(\inst7|B_DI [6]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[3] .is_wysiwyg = "true"; -defparam \inst|AC[3] .power_up = "low"; +defparam \inst7|B_DI[6] .is_wysiwyg = "true"; +defparam \inst7|B_DI[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N16 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[18]~6 ( +// Location: LCCOMB_X58_Y37_N2 +fiftyfivenm_lcell_comb \inst13|inst1[6]~50 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[18]~6_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [3]))) # (!\inst|IR [4] & (\inst|AC [1])))) +// \inst13|inst1[6]~50_combout = (\inst|AC [6] & (((\inst7|B_DI [6]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|AC [6] & (!\inst|IO_WRITE_int~q & ((\inst7|B_DI [6]) # (!\inst3|SWITCH_EN~combout )))) - .dataa(\inst|IR [4]), - .datab(\inst|IR [0]), - .datac(\inst|AC [1]), - .datad(\inst|AC [3]), + .dataa(\inst|AC [6]), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst7|B_DI [6]), + .datad(\inst3|SWITCH_EN~combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[18]~6_combout ), + .combout(\inst13|inst1[6]~50_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[18]~6 .lut_mask = 16'hC840; -defparam \inst|shifter|auto_generated|sbit_w[18]~6 .sum_lutc_input = "datac"; +defparam \inst13|inst1[6]~50 .lut_mask = 16'hB0BB; +defparam \inst13|inst1[6]~50 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N6 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[18]~7 ( +// Location: LCCOMB_X59_Y37_N10 +fiftyfivenm_lcell_comb \inst13|inst1[6]~51 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[18]~7_combout = (\inst|shifter|auto_generated|sbit_w[18]~6_combout ) # ((!\inst|IR [0] & \inst|AC [2])) +// \inst13|inst1[6]~51_combout = (\inst13|inst1[6]~49_combout & (\inst13|inst1[6]~50_combout & ((\inst11|count [6]) # (!\inst11|tri_enable~combout )))) - .dataa(gnd), - .datab(\inst|IR [0]), - .datac(\inst|AC [2]), - .datad(\inst|shifter|auto_generated|sbit_w[18]~6_combout ), + .dataa(\inst11|tri_enable~combout ), + .datab(\inst13|inst1[6]~49_combout ), + .datac(\inst13|inst1[6]~50_combout ), + .datad(\inst11|count [6]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), + .combout(\inst13|inst1[6]~51_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[18]~7 .lut_mask = 16'hFF30; -defparam \inst|shifter|auto_generated|sbit_w[18]~7 .sum_lutc_input = "datac"; +defparam \inst13|inst1[6]~51 .lut_mask = 16'hC040; +defparam \inst13|inst1[6]~51 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y42_N6 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[34]~53 ( +// Location: LCCOMB_X59_Y37_N4 +fiftyfivenm_lcell_comb \inst13|inst1[6]~101 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[34]~53_combout = (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[20]~12_combout ) # ((!\inst|IR [0] & \inst|AC [4])))) +// \inst13|inst1[6]~101_combout = (!\inst13|inst4~combout & (((\inst10|count [6]) # (\inst|IR [0])) # (!\inst11|tri_enable~1_combout ))) - .dataa(\inst3|I2C_RDY_EN~0_combout ), - .datab(\inst|IR [0]), - .datac(\inst|shifter|auto_generated|sbit_w[20]~12_combout ), - .datad(\inst|AC [4]), + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst10|count [6]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[34]~53_combout ), + .combout(\inst13|inst1[6]~101_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[34]~53 .lut_mask = 16'hA2A0; -defparam \inst|shifter|auto_generated|sbit_w[34]~53 .sum_lutc_input = "datac"; +defparam \inst13|inst1[6]~101 .lut_mask = 16'h3331; +defparam \inst13|inst1[6]~101 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N2 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[34]~55 ( +// Location: LCCOMB_X59_Y37_N12 +fiftyfivenm_lcell_comb \inst13|inst1[6]~52 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[34]~55_combout = (\inst|shifter|auto_generated|sbit_w[34]~54_combout ) # ((\inst|shifter|auto_generated|sbit_w[34]~53_combout ) # ((\inst|shifter|auto_generated|sbit_w[18]~7_combout & !\inst|IR [1]))) +// \inst13|inst1[6]~52_combout = (\inst13|inst1[6]~51_combout & (\inst13|inst1[6]~101_combout & ((\inst4|COUNT [6]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst|shifter|auto_generated|sbit_w[34]~54_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[34]~53_combout ), - .datad(\inst|IR [1]), + .dataa(\inst13|inst1[6]~51_combout ), + .datab(\inst4|IO_OUT~combout ), + .datac(\inst13|inst1[6]~101_combout ), + .datad(\inst4|COUNT [6]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), + .combout(\inst13|inst1[6]~52_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[34]~55 .lut_mask = 16'hFAFE; -defparam \inst|shifter|auto_generated|sbit_w[34]~55 .sum_lutc_input = "datac"; +defparam \inst13|inst1[6]~52 .lut_mask = 16'hA020; +defparam \inst13|inst1[6]~52 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N18 -fiftyfivenm_lcell_comb \inst|Selector17~3 ( +// Location: LCCOMB_X59_Y37_N16 +fiftyfivenm_lcell_comb \inst|Selector21~6 ( // Equation(s): -// \inst|Selector17~3_combout = (\inst|Selector19~4_combout & (\inst|shifter|auto_generated|sbit_w[34]~55_combout & !\inst|IR [2])) +// \inst|Selector21~6_combout = (\inst|Selector21~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[6]~52_combout ) # (!\inst13|inst1[0]~24_combout )))) - .dataa(\inst|Selector19~4_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), - .datac(gnd), - .datad(\inst|IR [2]), + .dataa(\inst|Selector21~5_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst|state.ex_in2~q ), + .datad(\inst13|inst1[6]~52_combout ), .cin(gnd), - .combout(\inst|Selector17~3_combout ), + .combout(\inst|Selector21~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~3 .lut_mask = 16'h0088; -defparam \inst|Selector17~3 .sum_lutc_input = "datac"; +defparam \inst|Selector21~6 .lut_mask = 16'hFABA; +defparam \inst|Selector21~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N26 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[58]~57 ( +// Location: FF_X59_Y37_N17 +dffeas \inst|AC[6] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector21~6_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|AC [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst|AC[6] .is_wysiwyg = "true"; +defparam \inst|AC[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y37_N14 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[22]~9 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[58]~57_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[46]~79_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[38]~52_combout )))) +// \inst|shifter|auto_generated|sbit_w[22]~9_combout = (\inst|IR [0] & ((\inst|IR [4] & ((\inst|AC [7]))) # (!\inst|IR [4] & (\inst|AC [5])))) - .dataa(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[46]~79_combout ), - .datac(\inst|IR [4]), - .datad(\inst|IR [2]), + .dataa(\inst|AC [5]), + .datab(\inst|IR [0]), + .datac(\inst|AC [7]), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[58]~57_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[22]~9_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[58]~57 .lut_mask = 16'hCA00; -defparam \inst|shifter|auto_generated|sbit_w[58]~57 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[22]~9 .lut_mask = 16'hC088; +defparam \inst|shifter|auto_generated|sbit_w[22]~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N4 -fiftyfivenm_lcell_comb \inst|Selector17~2 ( +// Location: LCCOMB_X58_Y37_N4 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[22]~10 ( // Equation(s): -// \inst|Selector17~2_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[58]~57_combout ) # ((\inst|shifter|auto_generated|sbit_w[42]~59_combout & !\inst|IR [2])))) +// \inst|shifter|auto_generated|sbit_w[22]~10_combout = (\inst|shifter|auto_generated|sbit_w[22]~9_combout ) # ((\inst|AC [6] & !\inst|IR [0])) - .dataa(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), - .datab(\inst|Selector20~0_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[58]~57_combout ), - .datad(\inst|IR [2]), + .dataa(\inst|AC [6]), + .datab(\inst|shifter|auto_generated|sbit_w[22]~9_combout ), + .datac(gnd), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector17~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~2 .lut_mask = 16'hC0C8; -defparam \inst|Selector17~2 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[22]~10 .lut_mask = 16'hCCEE; +defparam \inst|shifter|auto_generated|sbit_w[22]~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N0 -fiftyfivenm_lcell_comb \inst|Selector17~4 ( +// Location: LCCOMB_X58_Y37_N22 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[36]~11 ( // Equation(s): -// \inst|Selector17~4_combout = (\inst|AC [10] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [10])) # (!\inst|Selector27~6_combout ))) +// \inst|shifter|auto_generated|sbit_w[36]~11_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[18]~7_combout ) # ((\inst|shifter|auto_generated|sbit_w[22]~10_combout & \inst3|I2C_RDY_EN~0_combout )))) # +// (!\inst3|TIMER_EN~3_combout & (\inst|shifter|auto_generated|sbit_w[22]~10_combout & ((\inst3|I2C_RDY_EN~0_combout )))) - .dataa(\inst|state.ex_and~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [10]), - .datac(\inst|AC [10]), - .datad(\inst|Selector27~6_combout ), + .dataa(\inst3|TIMER_EN~3_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[22]~10_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), + .datad(\inst3|I2C_RDY_EN~0_combout ), .cin(gnd), - .combout(\inst|Selector17~4_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[36]~11_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~4 .lut_mask = 16'h80F0; -defparam \inst|Selector17~4 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[36]~11 .lut_mask = 16'hECA0; +defparam \inst|shifter|auto_generated|sbit_w[36]~11 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N18 -fiftyfivenm_lcell_comb \inst|Selector17~5 ( +// Location: LCCOMB_X58_Y37_N12 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[36]~14 ( // Equation(s): -// \inst|Selector17~5_combout = (\inst|state.ex_xor~q & (\inst|AC [10] $ (\inst|altsyncram_component|auto_generated|q_a [10]))) +// \inst|shifter|auto_generated|sbit_w[36]~14_combout = (\inst|shifter|auto_generated|sbit_w[36]~11_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[20]~13_combout )) - .dataa(gnd), - .datab(\inst|state.ex_xor~q ), - .datac(\inst|AC [10]), - .datad(\inst|altsyncram_component|auto_generated|q_a [10]), + .dataa(\inst|shifter|auto_generated|sbit_w[36]~11_combout ), + .datab(\inst|IR [1]), + .datac(gnd), + .datad(\inst|shifter|auto_generated|sbit_w[20]~13_combout ), .cin(gnd), - .combout(\inst|Selector17~5_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~5 .lut_mask = 16'h0CC0; -defparam \inst|Selector17~5 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[36]~14 .lut_mask = 16'hBBAA; +defparam \inst|shifter|auto_generated|sbit_w[36]~14 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N4 -fiftyfivenm_lcell_comb \inst|Selector17~6 ( +// Location: LCCOMB_X57_Y35_N24 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[52]~70 ( // Equation(s): -// \inst|Selector17~6_combout = ((\inst|Selector17~5_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~56_combout ))) # (!\inst|Selector16~0_combout ) +// \inst|shifter|auto_generated|sbit_w[52]~70_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[40]~28_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[32]~5_combout )))) - .dataa(\inst|Selector16~0_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Add1~56_combout ), - .datad(\inst|Selector17~5_combout ), + .dataa(\inst|IR [4]), + .datab(\inst|shifter|auto_generated|sbit_w[32]~5_combout ), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), .cin(gnd), - .combout(\inst|Selector17~6_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[52]~70_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~6 .lut_mask = 16'hFFD5; -defparam \inst|Selector17~6 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[52]~70 .lut_mask = 16'hE040; +defparam \inst|shifter|auto_generated|sbit_w[52]~70 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N6 -fiftyfivenm_lcell_comb \inst|Selector17~7 ( +// Location: LCCOMB_X57_Y35_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[52]~71 ( // Equation(s): -// \inst|Selector17~7_combout = (\inst|Selector17~4_combout ) # ((\inst|Selector17~6_combout ) # ((\inst|Selector27~1_combout & \inst|altsyncram_component|auto_generated|q_a [10]))) +// \inst|shifter|auto_generated|sbit_w[52]~71_combout = (\inst|shifter|auto_generated|sbit_w[52]~70_combout ) # ((\inst|shifter|auto_generated|sbit_w[36]~14_combout & !\inst|IR [2])) - .dataa(\inst|Selector27~1_combout ), - .datab(\inst|Selector17~4_combout ), - .datac(\inst|Selector17~6_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [10]), + .dataa(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[52]~70_combout ), + .datac(\inst|IR [2]), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector17~7_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[52]~71_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~7 .lut_mask = 16'hFEFC; -defparam \inst|Selector17~7 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[52]~71 .lut_mask = 16'hCECE; +defparam \inst|shifter|auto_generated|sbit_w[52]~71 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N6 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~3 ( +// Location: LCCOMB_X57_Y35_N4 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[60]~72 ( // Equation(s): -// \inst13|inst|Decoder0~3_combout = (\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst|shifter|auto_generated|sbit_w[60]~72_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|AC [15])) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[40]~28_combout ))))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(\inst|IR [4]), + .datab(\inst|AC [15]), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), .cin(gnd), - .combout(\inst13|inst|Decoder0~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[60]~72_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~3 .lut_mask = 16'h2000; -defparam \inst13|inst|Decoder0~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[60]~72 .lut_mask = 16'hD080; +defparam \inst|shifter|auto_generated|sbit_w[60]~72 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N16 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[2]~2 ( +// Location: LCCOMB_X57_Y35_N14 +fiftyfivenm_lcell_comb \inst|Selector23~0 ( // Equation(s): -// \inst13|inst|data_rx[2]~2_combout = (\inst13|inst|Decoder0~3_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~3_combout & ((\inst13|inst|data_rx [2]))) +// \inst|Selector23~0_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[60]~72_combout ) # ((\inst|shifter|auto_generated|sbit_w[44]~23_combout & !\inst|IR [2])))) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [2]), - .datad(\inst13|inst|Decoder0~3_combout ), + .dataa(\inst|Selector27~4_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[60]~72_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst13|inst|data_rx[2]~2_combout ), + .combout(\inst|Selector23~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[2]~2 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[2]~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X47_Y38_N17 -dffeas \inst13|inst|data_rx[2] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[2]~2_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rx [2]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_rx[2] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[2] .power_up = "low"; +defparam \inst|Selector23~0 .lut_mask = 16'h88A8; +defparam \inst|Selector23~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N8 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[2]~feeder ( +// Location: LCCOMB_X57_Y39_N24 +fiftyfivenm_lcell_comb \inst|Selector23~2 ( // Equation(s): -// \inst13|inst|data_rd[2]~feeder_combout = \inst13|inst|data_rx [2] +// \inst|Selector23~2_combout = (\inst|altsyncram_component|auto_generated|q_a [4] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_loadi~q & \inst|IR [4])))) # (!\inst|altsyncram_component|auto_generated|q_a [4] & (\inst|state.ex_loadi~q & ((\inst|IR +// [4])))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst|data_rx [2]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [4]), + .datab(\inst|state.ex_loadi~q ), + .datac(\inst|Selector27~1_combout ), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst13|inst|data_rd[2]~feeder_combout ), + .combout(\inst|Selector23~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[2]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|data_rd[2]~feeder .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X51_Y38_N9 -dffeas \inst13|inst|data_rd[2] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[2]~feeder_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|state~14_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rd [2]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_rd[2] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[2] .power_up = "low"; +defparam \inst|Selector23~2 .lut_mask = 16'hECA0; +defparam \inst|Selector23~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N24 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[10]~13 ( +// Location: LCCOMB_X57_Y39_N18 +fiftyfivenm_lcell_comb \inst|Selector23~3 ( // Equation(s): -// \inst13|inst14|data_out[10]~13_combout = (\inst13|inst14|prev_busy~q & (\inst13|inst|data_rd [2] & (\inst13|inst14|state.Rx2~q & !\inst13|inst|busy~q ))) +// \inst|Selector23~3_combout = (\inst|Selector23~2_combout ) # ((\inst|state.ex_xor~q & (\inst|AC [4] $ (\inst|altsyncram_component|auto_generated|q_a [4])))) - .dataa(\inst13|inst14|prev_busy~q ), - .datab(\inst13|inst|data_rd [2]), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst|AC [4]), + .datab(\inst|state.ex_xor~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [4]), + .datad(\inst|Selector23~2_combout ), .cin(gnd), - .combout(\inst13|inst14|data_out[10]~13_combout ), + .combout(\inst|Selector23~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[10]~13 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[10]~13 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X51_Y38_N25 -dffeas \inst13|inst14|data_out[10] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[10]~13_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[15]~11_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|data_out [10]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst14|data_out[10] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[10] .power_up = "low"; +defparam \inst|Selector23~3 .lut_mask = 16'hFF48; +defparam \inst|Selector23~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N16 -fiftyfivenm_lcell_comb \inst13|inst1[10]~67 ( +// Location: LCCOMB_X56_Y38_N12 +fiftyfivenm_lcell_comb \inst|Selector23~1 ( // Equation(s): -// \inst13|inst1[10]~67_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [10])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [10])) # (!\inst3|I2C_DATA_EN~combout ))) +// \inst|Selector23~1_combout = (\inst|AC [4] & (((\inst|altsyncram_component|auto_generated|q_a [4] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst|AC [10]), - .datad(\inst13|inst14|data_out [10]), + .dataa(\inst|Selector27~6_combout ), + .datab(\inst|altsyncram_component|auto_generated|q_a [4]), + .datac(\inst|state.ex_and~q ), + .datad(\inst|AC [4]), .cin(gnd), - .combout(\inst13|inst1[10]~67_combout ), + .combout(\inst|Selector23~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[10]~67 .lut_mask = 16'hF5B1; -defparam \inst13|inst1[10]~67 .sum_lutc_input = "datac"; +defparam \inst|Selector23~1 .lut_mask = 16'hD500; +defparam \inst|Selector23~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N28 -fiftyfivenm_lcell_comb \inst13|inst1[10]~66 ( +// Location: LCCOMB_X56_Y35_N16 +fiftyfivenm_lcell_comb \inst|Selector23~4 ( // Equation(s): -// \inst13|inst1[10]~66_combout = ((\inst|IR [0] & ((\inst11|count [10]))) # (!\inst|IR [0] & (\inst10|count [10]))) # (!\inst11|tri_enable~1_combout ) +// \inst|Selector23~4_combout = (\inst|Selector23~3_combout ) # ((\inst|Selector23~1_combout ) # ((\inst|Add1~26_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst10|count [10]), - .datab(\inst|IR [0]), - .datac(\inst11|count [10]), - .datad(\inst11|tri_enable~1_combout ), + .dataa(\inst|Selector23~3_combout ), + .datab(\inst|Add1~26_combout ), + .datac(\inst|Selector23~1_combout ), + .datad(\inst|AC[3]~0_combout ), .cin(gnd), - .combout(\inst13|inst1[10]~66_combout ), + .combout(\inst|Selector23~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[10]~66 .lut_mask = 16'hE2FF; -defparam \inst13|inst1[10]~66 .sum_lutc_input = "datac"; +defparam \inst|Selector23~4 .lut_mask = 16'hFEFA; +defparam \inst|Selector23~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N8 -fiftyfivenm_lcell_comb \inst|Selector17~0 ( +// Location: LCCOMB_X57_Y35_N16 +fiftyfivenm_lcell_comb \inst|Selector23~5 ( // Equation(s): -// \inst|Selector17~0_combout = (\inst|state.ex_in2~q & ((\inst13|inst1[10]~66_combout ) # (!\inst13|inst1[0]~18_combout ))) +// \inst|Selector23~5_combout = (\inst|Selector23~0_combout ) # ((\inst|Selector23~4_combout ) # ((\inst|shifter|auto_generated|sbit_w[52]~71_combout & \inst|Selector20~0_combout ))) - .dataa(\inst|state.ex_in2~q ), - .datab(\inst13|inst1[0]~18_combout ), - .datac(gnd), - .datad(\inst13|inst1[10]~66_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[52]~71_combout ), + .datab(\inst|Selector23~0_combout ), + .datac(\inst|Selector23~4_combout ), + .datad(\inst|Selector20~0_combout ), .cin(gnd), - .combout(\inst|Selector17~0_combout ), + .combout(\inst|Selector23~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~0 .lut_mask = 16'hAA22; -defparam \inst|Selector17~0 .sum_lutc_input = "datac"; +defparam \inst|Selector23~5 .lut_mask = 16'hFEFC; +defparam \inst|Selector23~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N0 -fiftyfivenm_lcell_comb \inst13|inst1[10]~65 ( +// Location: LCCOMB_X59_Y40_N14 +fiftyfivenm_lcell_comb \inst13|inst1[4]~99 ( // Equation(s): -// \inst13|inst1[10]~65_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [10]) # (!\inst4|IO_OUT~combout )))) +// \inst13|inst1[4]~99_combout = (!\inst13|inst4~combout & ((\inst10|count [4]) # ((\inst|IR [0]) # (!\inst11|tri_enable~1_combout )))) - .dataa(\inst13|inst4~combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst3|SWITCH_EN~combout ), - .datad(\inst4|COUNT [10]), + .dataa(\inst10|count [4]), + .datab(\inst13|inst4~combout ), + .datac(\inst11|tri_enable~1_combout ), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst1[10]~65_combout ), + .combout(\inst13|inst1[4]~99_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[10]~65 .lut_mask = 16'h0501; -defparam \inst13|inst1[10]~65 .sum_lutc_input = "datac"; +defparam \inst13|inst1[4]~99 .lut_mask = 16'h3323; +defparam \inst13|inst1[4]~99 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X54_Y54_N22 +fiftyfivenm_io_ibuf \SW[4]~input ( + .i(SW[4]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[4]~input_o )); +// synopsys translate_off +defparam \SW[4]~input .bus_hold = "false"; +defparam \SW[4]~input .listen_to_nsleep_signal = "false"; +defparam \SW[4]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X57_Y40_N1 +dffeas \inst7|B_DI[4] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[4]~input_o ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst7|B_DI [4]), + .prn(vcc)); +// synopsys translate_off +defparam \inst7|B_DI[4] .is_wysiwyg = "true"; +defparam \inst7|B_DI[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N6 -fiftyfivenm_lcell_comb \inst|Selector17~1 ( +// Location: LCCOMB_X57_Y40_N0 +fiftyfivenm_lcell_comb \inst13|inst1[4]~40 ( // Equation(s): -// \inst|Selector17~1_combout = (\inst|Selector17~0_combout & (((\inst13|inst1[10]~67_combout & \inst13|inst1[10]~65_combout )) # (!\inst13|inst1[0]~18_combout ))) +// \inst13|inst1[4]~40_combout = (\inst|AC [4] & (((\inst7|B_DI [4]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|AC [4] & (!\inst|IO_WRITE_int~q & ((\inst7|B_DI [4]) # (!\inst3|SWITCH_EN~combout )))) - .dataa(\inst13|inst1[0]~18_combout ), - .datab(\inst13|inst1[10]~67_combout ), - .datac(\inst|Selector17~0_combout ), - .datad(\inst13|inst1[10]~65_combout ), + .dataa(\inst|AC [4]), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst7|B_DI [4]), + .datad(\inst3|SWITCH_EN~combout ), .cin(gnd), - .combout(\inst|Selector17~1_combout ), + .combout(\inst13|inst1[4]~40_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~1 .lut_mask = 16'hD050; -defparam \inst|Selector17~1 .sum_lutc_input = "datac"; +defparam \inst13|inst1[4]~40 .lut_mask = 16'hB0BB; +defparam \inst13|inst1[4]~40 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N30 -fiftyfivenm_lcell_comb \inst|Selector17~8 ( +// Location: LCCOMB_X60_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[4]~6 ( // Equation(s): -// \inst|Selector17~8_combout = (\inst|Selector17~3_combout ) # ((\inst|Selector17~2_combout ) # ((\inst|Selector17~7_combout ) # (\inst|Selector17~1_combout ))) +// \inst13|inst14|data_out[4]~6_combout = (\inst13|inst14|state.Rx1~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [4]))) - .dataa(\inst|Selector17~3_combout ), - .datab(\inst|Selector17~2_combout ), - .datac(\inst|Selector17~7_combout ), - .datad(\inst|Selector17~1_combout ), + .dataa(\inst13|inst14|state.Rx1~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [4]), .cin(gnd), - .combout(\inst|Selector17~8_combout ), + .combout(\inst13|inst14|data_out[4]~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector17~8 .lut_mask = 16'hFFFE; -defparam \inst|Selector17~8 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[4]~6 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[4]~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y41_N31 -dffeas \inst|AC[10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector17~8_combout ), +// Location: FF_X60_Y36_N9 +dffeas \inst13|inst14|data_out[4] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[4]~6_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [10]), + .q(\inst13|inst14|data_out [4]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[10] .is_wysiwyg = "true"; -defparam \inst|AC[10] .power_up = "low"; +defparam \inst13|inst14|data_out[4] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N26 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[25]~48 ( +// Location: LCCOMB_X59_Y40_N28 +fiftyfivenm_lcell_comb \inst13|inst1[4]~39 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[25]~48_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [10])) # (!\inst|IR [4] & ((\inst|AC [8]))))) +// \inst13|inst1[4]~39_combout = ((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [4])) # (!\inst3|I2C_DATA_EN~combout ) - .dataa(\inst|AC [10]), - .datab(\inst|IR [4]), - .datac(\inst|AC [8]), - .datad(\inst|IR [0]), + .dataa(\inst3|I2C_DATA_EN~combout ), + .datab(\inst|IO_WRITE_int~q ), + .datac(gnd), + .datad(\inst13|inst14|data_out [4]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[25]~48_combout ), + .combout(\inst13|inst1[4]~39_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[25]~48 .lut_mask = 16'hB800; -defparam \inst|shifter|auto_generated|sbit_w[25]~48 .sum_lutc_input = "datac"; +defparam \inst13|inst1[4]~39 .lut_mask = 16'hFFDD; +defparam \inst13|inst1[4]~39 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N16 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[25]~49 ( +// Location: LCCOMB_X59_Y40_N20 +fiftyfivenm_lcell_comb \inst13|inst1[4]~41 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[25]~49_combout = (\inst|shifter|auto_generated|sbit_w[25]~48_combout ) # ((\inst|AC [9] & !\inst|IR [0])) +// \inst13|inst1[4]~41_combout = (\inst13|inst1[4]~40_combout & (\inst13|inst1[4]~39_combout & ((\inst11|count [4]) # (!\inst11|tri_enable~combout )))) - .dataa(gnd), - .datab(\inst|AC [9]), - .datac(\inst|shifter|auto_generated|sbit_w[25]~48_combout ), - .datad(\inst|IR [0]), + .dataa(\inst11|tri_enable~combout ), + .datab(\inst11|count [4]), + .datac(\inst13|inst1[4]~40_combout ), + .datad(\inst13|inst1[4]~39_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), + .combout(\inst13|inst1[4]~41_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[25]~49 .lut_mask = 16'hF0FC; -defparam \inst|shifter|auto_generated|sbit_w[25]~49 .sum_lutc_input = "datac"; +defparam \inst13|inst1[4]~41 .lut_mask = 16'hD000; +defparam \inst13|inst1[4]~41 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N22 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[41]~47 ( +// Location: LCCOMB_X59_Y40_N2 +fiftyfivenm_lcell_comb \inst13|inst1[4]~42 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[41]~47_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[23]~35_combout ) # ((\inst3|I2C_RDY_EN~0_combout & \inst|shifter|auto_generated|sbit_w[27]~45_combout )))) # -// (!\inst3|TIMER_EN~3_combout & (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[27]~45_combout )))) +// \inst13|inst1[4]~42_combout = (\inst13|inst1[4]~99_combout & (\inst13|inst1[4]~41_combout & ((\inst4|COUNT [4]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst3|TIMER_EN~3_combout ), - .datab(\inst3|I2C_RDY_EN~0_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), + .dataa(\inst4|COUNT [4]), + .datab(\inst4|IO_OUT~combout ), + .datac(\inst13|inst1[4]~99_combout ), + .datad(\inst13|inst1[4]~41_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[41]~47_combout ), + .combout(\inst13|inst1[4]~42_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[41]~47 .lut_mask = 16'hECA0; -defparam \inst|shifter|auto_generated|sbit_w[41]~47 .sum_lutc_input = "datac"; +defparam \inst13|inst1[4]~42 .lut_mask = 16'hB000; +defparam \inst13|inst1[4]~42 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N20 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[41]~50 ( +// Location: LCCOMB_X59_Y40_N6 +fiftyfivenm_lcell_comb \inst|Selector23~6 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[41]~50_combout = (\inst|shifter|auto_generated|sbit_w[41]~47_combout ) # ((\inst|shifter|auto_generated|sbit_w[25]~49_combout & !\inst|IR [1])) +// \inst|Selector23~6_combout = (\inst|Selector23~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[4]~42_combout ) # (!\inst13|inst1[0]~24_combout )))) - .dataa(gnd), - .datab(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[41]~47_combout ), - .datad(\inst|IR [1]), + .dataa(\inst|Selector23~5_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst|state.ex_in2~q ), + .datad(\inst13|inst1[4]~42_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .combout(\inst|Selector23~6_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[41]~50 .lut_mask = 16'hF0FC; -defparam \inst|shifter|auto_generated|sbit_w[41]~50 .sum_lutc_input = "datac"; +defparam \inst|Selector23~6 .lut_mask = 16'hFABA; +defparam \inst|Selector23~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N12 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[57]~46 ( +// Location: FF_X59_Y40_N7 +dffeas \inst|AC[4] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector23~6_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|AC [4]), + .prn(vcc)); +// synopsys translate_off +defparam \inst|AC[4] .is_wysiwyg = "true"; +defparam \inst|AC[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y34_N20 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[19]~31 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[57]~46_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[45]~78_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[37]~39_combout )))) +// \inst|shifter|auto_generated|sbit_w[19]~31_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [4])) # (!\inst|IR [4] & ((\inst|AC [2]))))) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), - .datac(\inst|IR [4]), - .datad(\inst|shifter|auto_generated|sbit_w[45]~78_combout ), + .dataa(\inst|IR [4]), + .datab(\inst|AC [4]), + .datac(\inst|AC [2]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[57]~46_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[19]~31_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[57]~46 .lut_mask = 16'hA808; -defparam \inst|shifter|auto_generated|sbit_w[57]~46 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[19]~31 .lut_mask = 16'hD800; +defparam \inst|shifter|auto_generated|sbit_w[19]~31 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N0 -fiftyfivenm_lcell_comb \inst|Selector18~3 ( +// Location: LCCOMB_X57_Y34_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[19]~32 ( // Equation(s): -// \inst|Selector18~3_combout = (\inst|shifter|auto_generated|sbit_w[57]~46_combout ) # ((\inst|shifter|auto_generated|sbit_w[41]~50_combout & !\inst|IR [2])) +// \inst|shifter|auto_generated|sbit_w[19]~32_combout = (\inst|shifter|auto_generated|sbit_w[19]~31_combout ) # ((!\inst|IR [0] & \inst|AC [3])) - .dataa(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), - .datab(\inst|IR [2]), - .datac(gnd), - .datad(\inst|shifter|auto_generated|sbit_w[57]~46_combout ), + .dataa(\inst|IR [0]), + .datab(\inst|shifter|auto_generated|sbit_w[19]~31_combout ), + .datac(\inst|AC [3]), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector18~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[19]~32_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector18~3 .lut_mask = 16'hFF22; -defparam \inst|Selector18~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[19]~32 .lut_mask = 16'hDCDC; +defparam \inst|shifter|auto_generated|sbit_w[19]~32 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N6 -fiftyfivenm_lcell_comb \inst|Selector18~4 ( +// Location: LCCOMB_X57_Y37_N30 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[37]~36 ( // Equation(s): -// \inst|Selector18~4_combout = (\inst|Selector20~0_combout & ((\inst|Selector18~3_combout ) # ((\inst|IR [9] & \inst|state.ex_loadi~q )))) # (!\inst|Selector20~0_combout & (\inst|IR [9] & (\inst|state.ex_loadi~q ))) +// \inst|shifter|auto_generated|sbit_w[37]~36_combout = (\inst|shifter|auto_generated|sbit_w[19]~32_combout & ((\inst3|TIMER_EN~3_combout ) # ((\inst|shifter|auto_generated|sbit_w[23]~35_combout & \inst3|I2C_RDY_EN~0_combout )))) # +// (!\inst|shifter|auto_generated|sbit_w[19]~32_combout & (\inst|shifter|auto_generated|sbit_w[23]~35_combout & ((\inst3|I2C_RDY_EN~0_combout )))) - .dataa(\inst|Selector20~0_combout ), - .datab(\inst|IR [9]), - .datac(\inst|state.ex_loadi~q ), - .datad(\inst|Selector18~3_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[19]~32_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), + .datac(\inst3|TIMER_EN~3_combout ), + .datad(\inst3|I2C_RDY_EN~0_combout ), .cin(gnd), - .combout(\inst|Selector18~4_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[37]~36_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector18~4 .lut_mask = 16'hEAC0; -defparam \inst|Selector18~4 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[37]~36 .lut_mask = 16'hECA0; +defparam \inst|shifter|auto_generated|sbit_w[37]~36 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N30 -fiftyfivenm_lcell_comb \inst|Selector18~1 ( +// Location: LCCOMB_X57_Y37_N28 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[37]~39 ( // Equation(s): -// \inst|Selector18~1_combout = (\inst|altsyncram_component|auto_generated|q_a [9] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [9])))) # (!\inst|altsyncram_component|auto_generated|q_a [9] & (((\inst|state.ex_xor~q & \inst|AC -// [9])))) +// \inst|shifter|auto_generated|sbit_w[37]~39_combout = (\inst|shifter|auto_generated|sbit_w[37]~36_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[21]~38_combout )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [9]), - .datab(\inst|Selector27~1_combout ), - .datac(\inst|state.ex_xor~q ), - .datad(\inst|AC [9]), + .dataa(gnd), + .datab(\inst|IR [1]), + .datac(\inst|shifter|auto_generated|sbit_w[37]~36_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[21]~38_combout ), .cin(gnd), - .combout(\inst|Selector18~1_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector18~1 .lut_mask = 16'hD8A8; -defparam \inst|Selector18~1 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[37]~39 .lut_mask = 16'hF3F0; +defparam \inst|shifter|auto_generated|sbit_w[37]~39 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N16 -fiftyfivenm_lcell_comb \inst|Selector18~2 ( +// Location: LCCOMB_X57_Y34_N6 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[53]~30 ( // Equation(s): -// \inst|Selector18~2_combout = (\inst|Selector18~1_combout ) # ((\inst|Selector19~0_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~51_combout ))) +// \inst|shifter|auto_generated|sbit_w[53]~30_combout = (!\inst|IR [1] & ((\inst|shifter|auto_generated|sbit_w[17]~29_combout ) # ((\inst|AC [1] & !\inst|IR [0])))) - .dataa(\inst|Selector18~1_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Selector19~0_combout ), - .datad(\inst|Add1~51_combout ), + .dataa(\inst|AC [1]), + .datab(\inst|IR [0]), + .datac(\inst|IR [1]), + .datad(\inst|shifter|auto_generated|sbit_w[17]~29_combout ), .cin(gnd), - .combout(\inst|Selector18~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[53]~30_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector18~2 .lut_mask = 16'hFEFA; -defparam \inst|Selector18~2 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[53]~30 .lut_mask = 16'h0F02; +defparam \inst|shifter|auto_generated|sbit_w[53]~30 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N14 +// Location: LCCOMB_X57_Y35_N0 fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[49]~33 ( // Equation(s): // \inst|shifter|auto_generated|sbit_w[49]~33_combout = (!\inst|IR [2] & ((\inst|shifter|auto_generated|sbit_w[53]~30_combout ) # ((\inst|shifter|auto_generated|sbit_w[19]~32_combout & \inst3|I2C_RDY_EN~0_combout )))) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[53]~30_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[19]~32_combout ), - .datad(\inst3|I2C_RDY_EN~0_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[19]~32_combout ), + .datab(\inst|IR [2]), + .datac(\inst3|I2C_RDY_EN~0_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[53]~30_combout ), .cin(gnd), .combout(\inst|shifter|auto_generated|sbit_w[49]~33_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[49]~33 .lut_mask = 16'h5444; +defparam \inst|shifter|auto_generated|sbit_w[49]~33 .lut_mask = 16'h3320; defparam \inst|shifter|auto_generated|sbit_w[49]~33 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N24 +// Location: LCCOMB_X57_Y35_N26 fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[49]~40 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[49]~40_combout = (\inst|shifter|auto_generated|sbit_w[49]~33_combout ) # ((\inst|IR [2] & (\inst|IR [4] & \inst|shifter|auto_generated|sbit_w[37]~39_combout ))) +// \inst|shifter|auto_generated|sbit_w[49]~40_combout = (\inst|shifter|auto_generated|sbit_w[49]~33_combout ) # ((\inst|IR [4] & (\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[37]~39_combout ))) - .dataa(\inst|IR [2]), - .datab(\inst|IR [4]), - .datac(\inst|shifter|auto_generated|sbit_w[49]~33_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), + .dataa(\inst|IR [4]), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[49]~33_combout ), .cin(gnd), .combout(\inst|shifter|auto_generated|sbit_w[49]~40_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[49]~40 .lut_mask = 16'hF8F0; +defparam \inst|shifter|auto_generated|sbit_w[49]~40 .lut_mask = 16'hFF80; defparam \inst|shifter|auto_generated|sbit_w[49]~40 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y40_N2 -fiftyfivenm_lcell_comb \inst|Selector18~5 ( -// Equation(s): -// \inst|Selector18~5_combout = (\inst|Selector18~4_combout ) # ((\inst|Selector18~2_combout ) # ((\inst|Selector19~4_combout & \inst|shifter|auto_generated|sbit_w[49]~40_combout ))) - - .dataa(\inst|Selector19~4_combout ), - .datab(\inst|Selector18~4_combout ), - .datac(\inst|Selector18~2_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[49]~40_combout ), - .cin(gnd), - .combout(\inst|Selector18~5_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector18~5 .lut_mask = 16'hFEFC; -defparam \inst|Selector18~5 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y39_N8 -fiftyfivenm_lcell_comb \inst|Selector18~6 ( -// Equation(s): -// \inst|Selector18~6_combout = (\inst|Selector18~0_combout ) # (\inst|Selector18~5_combout ) - - .dataa(gnd), - .datab(gnd), - .datac(\inst|Selector18~0_combout ), - .datad(\inst|Selector18~5_combout ), - .cin(gnd), - .combout(\inst|Selector18~6_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector18~6 .lut_mask = 16'hFFF0; -defparam \inst|Selector18~6 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y39_N10 -fiftyfivenm_lcell_comb \inst|Selector18~7 ( +// Location: LCCOMB_X57_Y39_N28 +fiftyfivenm_lcell_comb \inst|Selector18~4 ( // Equation(s): -// \inst|Selector18~7_combout = (\inst|Selector18~6_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[9]~63_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst|Selector18~4_combout = (\inst|AC [9] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [9])) # (!\inst|Selector27~6_combout ))) - .dataa(\inst|Selector18~6_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[0]~18_combout ), - .datad(\inst13|inst1[9]~63_combout ), + .dataa(\inst|AC [9]), + .datab(\inst|Selector27~6_combout ), + .datac(\inst|state.ex_and~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [9]), .cin(gnd), - .combout(\inst|Selector18~7_combout ), + .combout(\inst|Selector18~4_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector18~7 .lut_mask = 16'hEEAE; -defparam \inst|Selector18~7 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y39_N11 -dffeas \inst|AC[9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector18~7_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|AC [9]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|AC[9] .is_wysiwyg = "true"; -defparam \inst|AC[9] .power_up = "low"; +defparam \inst|Selector18~4 .lut_mask = 16'hA222; +defparam \inst|Selector18~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N24 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~2 ( +// Location: LCCOMB_X56_Y40_N24 +fiftyfivenm_lcell_comb \inst|Selector18~5 ( // Equation(s): -// \inst13|inst|Decoder0~2_combout = (!\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst|Selector18~5_combout = (\inst|altsyncram_component|auto_generated|q_a [9] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [9])))) # (!\inst|altsyncram_component|auto_generated|q_a [9] & (\inst|state.ex_xor~q & ((\inst|AC +// [9])))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(\inst|state.ex_xor~q ), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [9]), + .datad(\inst|AC [9]), .cin(gnd), - .combout(\inst13|inst|Decoder0~2_combout ), + .combout(\inst|Selector18~5_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~2 .lut_mask = 16'h4000; -defparam \inst13|inst|Decoder0~2 .sum_lutc_input = "datac"; +defparam \inst|Selector18~5 .lut_mask = 16'hCAE0; +defparam \inst|Selector18~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N14 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[1]~1 ( +// Location: LCCOMB_X59_Y38_N16 +fiftyfivenm_lcell_comb \inst|Add1~48 ( // Equation(s): -// \inst13|inst|data_rx[1]~1_combout = (\inst13|inst|Decoder0~2_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~2_combout & ((\inst13|inst|data_rx [1]))) +// \inst|Add1~48_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [9]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [9])) - .dataa(\GSENSOR_SDI~input_o ), - .datab(gnd), - .datac(\inst13|inst|data_rx [1]), - .datad(\inst13|inst|Decoder0~2_combout ), + .dataa(\inst|state.ex_add~q ), + .datab(\inst|state.ex_sub~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [9]), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst|data_rx[1]~1_combout ), + .combout(\inst|Add1~48_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[1]~1 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[1]~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X47_Y38_N15 -dffeas \inst13|inst|data_rx[1] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[1]~1_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rx [1]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_rx[1] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[1] .power_up = "low"; +defparam \inst|Add1~48 .lut_mask = 16'h2C2C; +defparam \inst|Add1~48 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N14 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[1]~feeder ( +// Location: LCCOMB_X58_Y38_N8 +fiftyfivenm_lcell_comb \inst|Add1~49 ( // Equation(s): -// \inst13|inst|data_rd[1]~feeder_combout = \inst13|inst|data_rx [1] +// \inst|Add1~49_combout = (\inst|IR [9] & ((\inst|Add1~1_combout ) # ((\inst|WideOr3~1_combout & \inst|Add1~48_combout )))) # (!\inst|IR [9] & (((\inst|WideOr3~1_combout & \inst|Add1~48_combout )))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst|data_rx [1]), + .dataa(\inst|IR [9]), + .datab(\inst|Add1~1_combout ), + .datac(\inst|WideOr3~1_combout ), + .datad(\inst|Add1~48_combout ), .cin(gnd), - .combout(\inst13|inst|data_rd[1]~feeder_combout ), + .combout(\inst|Add1~49_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[1]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|data_rd[1]~feeder .sum_lutc_input = "datac"; +defparam \inst|Add1~49 .lut_mask = 16'hF888; +defparam \inst|Add1~49 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N15 -dffeas \inst13|inst|data_rd[1] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[1]~feeder_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|state~14_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rd [1]), - .prn(vcc)); +// Location: LCCOMB_X55_Y39_N4 +fiftyfivenm_lcell_comb \inst|Add1~51 ( +// Equation(s): +// \inst|Add1~51_combout = ((\inst|Add1~50_combout $ (\inst|Add1~49_combout $ (!\inst|Add1~47 )))) # (GND) +// \inst|Add1~52 = CARRY((\inst|Add1~50_combout & ((\inst|Add1~49_combout ) # (!\inst|Add1~47 ))) # (!\inst|Add1~50_combout & (\inst|Add1~49_combout & !\inst|Add1~47 ))) + + .dataa(\inst|Add1~50_combout ), + .datab(\inst|Add1~49_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~47 ), + .combout(\inst|Add1~51_combout ), + .cout(\inst|Add1~52 )); // synopsys translate_off -defparam \inst13|inst|data_rd[1] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[1] .power_up = "low"; +defparam \inst|Add1~51 .lut_mask = 16'h698E; +defparam \inst|Add1~51 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N6 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[9]~12 ( +// Location: LCCOMB_X56_Y39_N4 +fiftyfivenm_lcell_comb \inst|Selector18~6 ( // Equation(s): -// \inst13|inst14|data_out[9]~12_combout = (\inst13|inst14|prev_busy~q & (\inst13|inst|data_rd [1] & (\inst13|inst14|state.Rx2~q & !\inst13|inst|busy~q ))) +// \inst|Selector18~6_combout = (\inst|Selector18~5_combout ) # ((\inst|Selector19~0_combout ) # ((\inst|Add1~51_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst13|inst14|prev_busy~q ), - .datab(\inst13|inst|data_rd [1]), - .datac(\inst13|inst14|state.Rx2~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst|Selector18~5_combout ), + .datab(\inst|Add1~51_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector19~0_combout ), .cin(gnd), - .combout(\inst13|inst14|data_out[9]~12_combout ), + .combout(\inst|Selector18~6_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[9]~12 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[9]~12 .sum_lutc_input = "datac"; +defparam \inst|Selector18~6 .lut_mask = 16'hFFEA; +defparam \inst|Selector18~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N7 -dffeas \inst13|inst14|data_out[9] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[9]~12_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[15]~11_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|data_out [9]), - .prn(vcc)); +// Location: LCCOMB_X57_Y39_N10 +fiftyfivenm_lcell_comb \inst|Selector18~7 ( +// Equation(s): +// \inst|Selector18~7_combout = (\inst|Selector18~4_combout ) # ((\inst|Selector18~6_combout ) # ((\inst|shifter|auto_generated|sbit_w[49]~40_combout & \inst|Selector19~4_combout ))) + + .dataa(\inst|shifter|auto_generated|sbit_w[49]~40_combout ), + .datab(\inst|Selector18~4_combout ), + .datac(\inst|Selector18~6_combout ), + .datad(\inst|Selector19~4_combout ), + .cin(gnd), + .combout(\inst|Selector18~7_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[9] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[9] .power_up = "low"; +defparam \inst|Selector18~7 .lut_mask = 16'hFEFC; +defparam \inst|Selector18~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N10 -fiftyfivenm_lcell_comb \inst13|inst1[9]~61 ( +// Location: LCCOMB_X57_Y37_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[45]~43 ( // Equation(s): -// \inst13|inst1[9]~61_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [9])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [9])) # (!\inst3|I2C_DATA_EN~combout ))) +// \inst|shifter|auto_generated|sbit_w[45]~43_combout = (\inst|IR [1] & (\inst|AC [15] & ((\inst|IR [4])))) # (!\inst|IR [1] & (((\inst|shifter|auto_generated|sbit_w[29]~42_combout )))) - .dataa(\inst3|I2C_DATA_EN~combout ), - .datab(\inst|AC [9]), - .datac(\inst|IO_WRITE_int~q ), - .datad(\inst13|inst14|data_out [9]), + .dataa(\inst|AC [15]), + .datab(\inst|IR [1]), + .datac(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst13|inst1[9]~61_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[45]~43_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[9]~61 .lut_mask = 16'hCFC5; -defparam \inst13|inst1[9]~61 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[45]~43 .lut_mask = 16'hB830; +defparam \inst|shifter|auto_generated|sbit_w[45]~43 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N0 -fiftyfivenm_lcell_comb \inst13|inst1[9]~62 ( +// Location: LCCOMB_X57_Y37_N18 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[45]~80 ( // Equation(s): -// \inst13|inst1[9]~62_combout = (\inst13|inst1[9]~61_combout & (!\inst13|inst4~combout & ((\inst10|count [9]) # (!\inst10|tri_enable~combout )))) +// \inst|shifter|auto_generated|sbit_w[45]~80_combout = (\inst|shifter|auto_generated|sbit_w[45]~43_combout ) # ((!\inst|IR [4] & (\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[27]~45_combout ))) - .dataa(\inst13|inst1[9]~61_combout ), - .datab(\inst10|tri_enable~combout ), - .datac(\inst13|inst4~combout ), - .datad(\inst10|count [9]), + .dataa(\inst|IR [4]), + .datab(\inst|IR [1]), + .datac(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[45]~43_combout ), .cin(gnd), - .combout(\inst13|inst1[9]~62_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[45]~80_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[9]~62 .lut_mask = 16'h0A02; -defparam \inst13|inst1[9]~62 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[45]~80 .lut_mask = 16'hFF40; +defparam \inst|shifter|auto_generated|sbit_w[45]~80 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOIBUF_X69_Y54_N1 -fiftyfivenm_io_ibuf \SW[9]~input ( - .i(SW[9]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[9]~input_o )); -// synopsys translate_off -defparam \SW[9]~input .bus_hold = "false"; -defparam \SW[9]~input .listen_to_nsleep_signal = "false"; -defparam \SW[9]~input .simulate_z_as = "z"; -// synopsys translate_on +// Location: LCCOMB_X57_Y37_N24 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[57]~46 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[57]~46_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[45]~80_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[37]~39_combout )))) -// Location: FF_X50_Y42_N31 -dffeas \inst7|B_DI[9] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\SW[9]~input_o ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst7|B_DI [9]), - .prn(vcc)); + .dataa(\inst|IR [4]), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[45]~80_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[57]~46_combout ), + .cout()); // synopsys translate_off -defparam \inst7|B_DI[9] .is_wysiwyg = "true"; -defparam \inst7|B_DI[9] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[57]~46 .lut_mask = 16'hC840; +defparam \inst|shifter|auto_generated|sbit_w[57]~46 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N30 -fiftyfivenm_lcell_comb \inst13|inst1[9]~60 ( +// Location: LCCOMB_X57_Y39_N22 +fiftyfivenm_lcell_comb \inst|Selector18~2 ( // Equation(s): -// \inst13|inst1[9]~60_combout = (\inst3|SWITCH_EN~combout & (\inst7|B_DI [9] & ((\inst11|count [9]) # (!\inst11|tri_enable~combout )))) # (!\inst3|SWITCH_EN~combout & (((\inst11|count [9])) # (!\inst11|tri_enable~combout ))) +// \inst|Selector18~2_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[57]~46_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[41]~50_combout )))) - .dataa(\inst3|SWITCH_EN~combout ), - .datab(\inst11|tri_enable~combout ), - .datac(\inst7|B_DI [9]), - .datad(\inst11|count [9]), + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[57]~46_combout ), .cin(gnd), - .combout(\inst13|inst1[9]~60_combout ), + .combout(\inst|Selector18~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[9]~60 .lut_mask = 16'hF531; -defparam \inst13|inst1[9]~60 .sum_lutc_input = "datac"; +defparam \inst|Selector18~2 .lut_mask = 16'hAA20; +defparam \inst|Selector18~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N18 -fiftyfivenm_lcell_comb \inst13|inst1[9]~63 ( +// Location: LCCOMB_X60_Y39_N4 +fiftyfivenm_lcell_comb \inst|Selector18~3 ( // Equation(s): -// \inst13|inst1[9]~63_combout = (\inst13|inst1[9]~62_combout & (\inst13|inst1[9]~60_combout & ((\inst4|COUNT [9]) # (!\inst4|IO_OUT~combout )))) +// \inst|Selector18~3_combout = (\inst|state.ex_loadi~q & \inst|IR [9]) - .dataa(\inst4|IO_OUT~combout ), - .datab(\inst13|inst1[9]~62_combout ), - .datac(\inst13|inst1[9]~60_combout ), - .datad(\inst4|COUNT [9]), + .dataa(gnd), + .datab(\inst|state.ex_loadi~q ), + .datac(\inst|IR [9]), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst1[9]~63_combout ), + .combout(\inst|Selector18~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[9]~63 .lut_mask = 16'hC040; -defparam \inst13|inst1[9]~63 .sum_lutc_input = "datac"; +defparam \inst|Selector18~3 .lut_mask = 16'hC0C0; +defparam \inst|Selector18~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N30 -fiftyfivenm_lcell_comb \inst13|inst1[9]~64 ( +// Location: LCCOMB_X60_Y39_N20 +fiftyfivenm_lcell_comb \inst|Selector18~0 ( // Equation(s): -// \inst13|inst1[9]~64_combout = (\inst13|inst1[9]~63_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst|Selector18~0_combout = (\inst|state.ex_in2~q & (((\inst11|count [9]) # (!\inst13|inst1[0]~24_combout )) # (!\inst11|tri_enable~combout ))) - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst1[9]~63_combout ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst11|tri_enable~combout ), + .datab(\inst11|count [9]), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst|state.ex_in2~q ), .cin(gnd), - .combout(\inst13|inst1[9]~64_combout ), + .combout(\inst|Selector18~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[9]~64 .lut_mask = 16'hF0FF; -defparam \inst13|inst1[9]~64 .sum_lutc_input = "datac"; +defparam \inst|Selector18~0 .lut_mask = 16'hDF00; +defparam \inst|Selector18~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y37_N13 -dffeas \inst13|inst14|cmd_in[1] ( - .clk(\inst13|inst12~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[9]~64_combout ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|cmd_in [1]), - .prn(vcc)); +// Location: LCCOMB_X60_Y39_N2 +fiftyfivenm_lcell_comb \inst|Selector18~1 ( +// Equation(s): +// \inst|Selector18~1_combout = (\inst|Selector18~0_combout & (((\inst13|inst1[9]~63_combout & \inst13|inst1[9]~65_combout )) # (!\inst13|inst1[0]~24_combout ))) + + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst13|inst1[9]~63_combout ), + .datac(\inst13|inst1[9]~65_combout ), + .datad(\inst|Selector18~0_combout ), + .cin(gnd), + .combout(\inst|Selector18~1_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|cmd_in[1] .is_wysiwyg = "true"; -defparam \inst13|inst14|cmd_in[1] .power_up = "low"; +defparam \inst|Selector18~1 .lut_mask = 16'hD500; +defparam \inst|Selector18~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N30 -fiftyfivenm_lcell_comb \inst13|inst14|Selector21~2 ( +// Location: LCCOMB_X60_Y39_N28 +fiftyfivenm_lcell_comb \inst|Selector18~8 ( // Equation(s): -// \inst13|inst14|Selector21~2_combout = (!\inst13|inst14|cmd_in [1] & (\inst13|inst14|cmd_in [0] & \inst13|inst14|Selector21~1_combout )) +// \inst|Selector18~8_combout = (\inst|Selector18~7_combout ) # ((\inst|Selector18~2_combout ) # ((\inst|Selector18~3_combout ) # (\inst|Selector18~1_combout ))) - .dataa(\inst13|inst14|cmd_in [1]), - .datab(gnd), - .datac(\inst13|inst14|cmd_in [0]), - .datad(\inst13|inst14|Selector21~1_combout ), + .dataa(\inst|Selector18~7_combout ), + .datab(\inst|Selector18~2_combout ), + .datac(\inst|Selector18~3_combout ), + .datad(\inst|Selector18~1_combout ), .cin(gnd), - .combout(\inst13|inst14|Selector21~2_combout ), + .combout(\inst|Selector18~8_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector21~2 .lut_mask = 16'h5000; -defparam \inst13|inst14|Selector21~2 .sum_lutc_input = "datac"; +defparam \inst|Selector18~8 .lut_mask = 16'hFFFE; +defparam \inst|Selector18~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y37_N31 -dffeas \inst13|inst14|state.Rx1p ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector21~2_combout ), +// Location: FF_X60_Y39_N29 +dffeas \inst|AC[9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector18~8_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|state.Rx1p~q ), + .q(\inst|AC [9]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|state.Rx1p .is_wysiwyg = "true"; -defparam \inst13|inst14|state.Rx1p .power_up = "low"; +defparam \inst|AC[9] .is_wysiwyg = "true"; +defparam \inst|AC[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N24 -fiftyfivenm_lcell_comb \inst13|inst14|Selector22~1 ( +// Location: LCCOMB_X55_Y37_N16 +fiftyfivenm_lcell_comb \inst|Add1~50 ( // Equation(s): -// \inst13|inst14|Selector22~1_combout = (\inst13|inst14|state.Rx1p~q ) # ((\inst13|inst14|state_machine~0_combout & (\inst13|inst14|state.Rx2~q )) # (!\inst13|inst14|state_machine~0_combout & ((\inst13|inst14|state.Rx1~q )))) +// \inst|Add1~50_combout = (\inst|AC [9] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_add~q )))) - .dataa(\inst13|inst14|state.Rx1p~q ), - .datab(\inst13|inst14|state.Rx2~q ), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst14|state_machine~0_combout ), + .dataa(\inst|AC [9]), + .datab(\inst|state.ex_addi~q ), + .datac(\inst|state.ex_sub~q ), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst14|Selector22~1_combout ), + .combout(\inst|Add1~50_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector22~1 .lut_mask = 16'hEEFA; -defparam \inst13|inst14|Selector22~1 .sum_lutc_input = "datac"; +defparam \inst|Add1~50 .lut_mask = 16'hAAA8; +defparam \inst|Add1~50 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N4 -fiftyfivenm_lcell_comb \inst13|inst14|Selector22~2 ( +// Location: LCCOMB_X55_Y39_N6 +fiftyfivenm_lcell_comb \inst|Add1~56 ( // Equation(s): -// \inst13|inst14|Selector22~2_combout = (\inst13|inst14|Selector22~1_combout ) # ((!\inst13|inst14|cmd_in [1] & (\inst13|inst14|cmd_in [0] & \inst13|inst14|Selector22~0_combout ))) - - .dataa(\inst13|inst14|cmd_in [1]), - .datab(\inst13|inst14|cmd_in [0]), - .datac(\inst13|inst14|Selector22~0_combout ), - .datad(\inst13|inst14|Selector22~1_combout ), - .cin(gnd), - .combout(\inst13|inst14|Selector22~2_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst14|Selector22~2 .lut_mask = 16'hFF40; -defparam \inst13|inst14|Selector22~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y37_N5 -dffeas \inst13|inst14|state.Rx1 ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector22~2_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|state.Rx1~q ), - .prn(vcc)); +// \inst|Add1~56_combout = (\inst|Add1~55_combout & ((\inst|Add1~54_combout & (\inst|Add1~52 & VCC)) # (!\inst|Add1~54_combout & (!\inst|Add1~52 )))) # (!\inst|Add1~55_combout & ((\inst|Add1~54_combout & (!\inst|Add1~52 )) # (!\inst|Add1~54_combout & +// ((\inst|Add1~52 ) # (GND))))) +// \inst|Add1~57 = CARRY((\inst|Add1~55_combout & (!\inst|Add1~54_combout & !\inst|Add1~52 )) # (!\inst|Add1~55_combout & ((!\inst|Add1~52 ) # (!\inst|Add1~54_combout )))) + + .dataa(\inst|Add1~55_combout ), + .datab(\inst|Add1~54_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~52 ), + .combout(\inst|Add1~56_combout ), + .cout(\inst|Add1~57 )); // synopsys translate_off -defparam \inst13|inst14|state.Rx1 .is_wysiwyg = "true"; -defparam \inst13|inst14|state.Rx1 .power_up = "low"; +defparam \inst|Add1~56 .lut_mask = 16'h9617; +defparam \inst|Add1~56 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N26 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[5]~19 ( +// Location: LCCOMB_X55_Y39_N8 +fiftyfivenm_lcell_comb \inst|Add1~61 ( // Equation(s): -// \inst13|inst14|data_out[5]~19_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & \inst13|inst14|state.Rx1~q )) +// \inst|Add1~61_combout = ((\inst|Add1~59_combout $ (\inst|Add1~60_combout $ (!\inst|Add1~57 )))) # (GND) +// \inst|Add1~62 = CARRY((\inst|Add1~59_combout & ((\inst|Add1~60_combout ) # (!\inst|Add1~57 ))) # (!\inst|Add1~59_combout & (\inst|Add1~60_combout & !\inst|Add1~57 ))) - .dataa(gnd), - .datab(\inst13|inst14|prev_busy~q ), - .datac(\inst13|inst|busy~q ), - .datad(\inst13|inst14|state.Rx1~q ), - .cin(gnd), - .combout(\inst13|inst14|data_out[5]~19_combout ), - .cout()); + .dataa(\inst|Add1~59_combout ), + .datab(\inst|Add1~60_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~57 ), + .combout(\inst|Add1~61_combout ), + .cout(\inst|Add1~62 )); // synopsys translate_off -defparam \inst13|inst14|data_out[5]~19 .lut_mask = 16'h0C00; -defparam \inst13|inst14|data_out[5]~19 .sum_lutc_input = "datac"; +defparam \inst|Add1~61 .lut_mask = 16'h698E; +defparam \inst|Add1~61 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N0 -fiftyfivenm_lcell_comb \inst13|inst14|state~18 ( +// Location: LCCOMB_X55_Y39_N10 +fiftyfivenm_lcell_comb \inst|Add1~66 ( // Equation(s): -// \inst13|inst14|state~18_combout = \inst13|inst14|cmd_in [0] $ (\inst13|inst14|cmd_in [1]) +// \inst|Add1~66_combout = (\inst|Add1~65_combout & ((\inst|Add1~64_combout & (\inst|Add1~62 & VCC)) # (!\inst|Add1~64_combout & (!\inst|Add1~62 )))) # (!\inst|Add1~65_combout & ((\inst|Add1~64_combout & (!\inst|Add1~62 )) # (!\inst|Add1~64_combout & +// ((\inst|Add1~62 ) # (GND))))) +// \inst|Add1~67 = CARRY((\inst|Add1~65_combout & (!\inst|Add1~64_combout & !\inst|Add1~62 )) # (!\inst|Add1~65_combout & ((!\inst|Add1~62 ) # (!\inst|Add1~64_combout )))) - .dataa(gnd), - .datab(\inst13|inst14|cmd_in [0]), + .dataa(\inst|Add1~65_combout ), + .datab(\inst|Add1~64_combout ), .datac(gnd), - .datad(\inst13|inst14|cmd_in [1]), - .cin(gnd), - .combout(\inst13|inst14|state~18_combout ), - .cout()); + .datad(vcc), + .cin(\inst|Add1~62 ), + .combout(\inst|Add1~66_combout ), + .cout(\inst|Add1~67 )); // synopsys translate_off -defparam \inst13|inst14|state~18 .lut_mask = 16'h33CC; -defparam \inst13|inst14|state~18 .sum_lutc_input = "datac"; +defparam \inst|Add1~66 .lut_mask = 16'h9617; +defparam \inst|Add1~66 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N12 -fiftyfivenm_lcell_comb \inst13|inst14|Selector21~0 ( +// Location: LCCOMB_X57_Y38_N22 +fiftyfivenm_lcell_comb \inst|Selector15~3 ( // Equation(s): -// \inst13|inst14|Selector21~0_combout = \inst13|inst14|cmd_in [4] $ (!\inst13|inst14|cmd_in [5]) +// \inst|Selector15~3_combout = (\inst|altsyncram_component|auto_generated|q_a [12] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_xor~q & !\inst|AC [12])))) # (!\inst|altsyncram_component|auto_generated|q_a [12] & (((\inst|state.ex_xor~q & \inst|AC +// [12])))) - .dataa(\inst13|inst14|cmd_in [4]), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst14|cmd_in [5]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [12]), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|state.ex_xor~q ), + .datad(\inst|AC [12]), .cin(gnd), - .combout(\inst13|inst14|Selector21~0_combout ), + .combout(\inst|Selector15~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector21~0 .lut_mask = 16'hAA55; -defparam \inst13|inst14|Selector21~0 .sum_lutc_input = "datac"; +defparam \inst|Selector15~3 .lut_mask = 16'hD8A8; +defparam \inst|Selector15~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N24 -fiftyfivenm_lcell_comb \inst13|inst14|Selector16~0 ( +// Location: LCCOMB_X57_Y38_N10 +fiftyfivenm_lcell_comb \inst|Selector15~2 ( // Equation(s): -// \inst13|inst14|Selector16~0_combout = (!\inst13|inst14|state.idle~q & (((!\inst13|inst14|state~18_combout & \inst13|inst14|Selector21~0_combout )) # (!\inst13|inst14|go~q ))) +// \inst|Selector15~2_combout = (\inst|AC [12] & (((\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst13|inst14|state.idle~q ), - .datab(\inst13|inst14|go~q ), - .datac(\inst13|inst14|state~18_combout ), - .datad(\inst13|inst14|Selector21~0_combout ), + .dataa(\inst|AC [12]), + .datab(\inst|Selector27~6_combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|state.ex_and~q ), .cin(gnd), - .combout(\inst13|inst14|Selector16~0_combout ), + .combout(\inst|Selector15~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector16~0 .lut_mask = 16'h1511; -defparam \inst13|inst14|Selector16~0 .sum_lutc_input = "datac"; +defparam \inst|Selector15~2 .lut_mask = 16'hA222; +defparam \inst|Selector15~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N30 -fiftyfivenm_lcell_comb \inst13|inst14|Selector16~1 ( +// Location: LCCOMB_X57_Y38_N20 +fiftyfivenm_lcell_comb \inst|Selector15~4 ( // Equation(s): -// \inst13|inst14|Selector16~1_combout = (!\inst13|inst14|data_out[5]~19_combout & (!\inst13|inst14|Selector16~0_combout & ((\inst13|inst14|state~18_combout ) # (!\inst13|inst14|Selector22~0_combout )))) +// \inst|Selector15~4_combout = (\inst|Selector15~3_combout ) # ((\inst|Selector15~2_combout ) # ((\inst|AC[3]~0_combout & \inst|Add1~66_combout ))) - .dataa(\inst13|inst14|data_out[5]~19_combout ), - .datab(\inst13|inst14|Selector22~0_combout ), - .datac(\inst13|inst14|state~18_combout ), - .datad(\inst13|inst14|Selector16~0_combout ), + .dataa(\inst|AC[3]~0_combout ), + .datab(\inst|Add1~66_combout ), + .datac(\inst|Selector15~3_combout ), + .datad(\inst|Selector15~2_combout ), .cin(gnd), - .combout(\inst13|inst14|Selector16~1_combout ), + .combout(\inst|Selector15~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector16~1 .lut_mask = 16'h0051; -defparam \inst13|inst14|Selector16~1 .sum_lutc_input = "datac"; +defparam \inst|Selector15~4 .lut_mask = 16'hFFF8; +defparam \inst|Selector15~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y38_N31 -dffeas \inst13|inst14|state.idle ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector16~1_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|state.idle~q ), - .prn(vcc)); +// Location: LCCOMB_X57_Y35_N8 +fiftyfivenm_lcell_comb \inst|Selector15~0 ( +// Equation(s): +// \inst|Selector15~0_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[60]~72_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[44]~23_combout )))) + + .dataa(\inst|IR [2]), + .datab(\inst|shifter|auto_generated|sbit_w[60]~72_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[44]~23_combout ), + .datad(\inst|Selector20~0_combout ), + .cin(gnd), + .combout(\inst|Selector15~0_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|state.idle .is_wysiwyg = "true"; -defparam \inst13|inst14|state.idle .power_up = "low"; +defparam \inst|Selector15~0 .lut_mask = 16'hDC00; +defparam \inst|Selector15~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N30 -fiftyfivenm_lcell_comb \inst13|inst14|rnw~0 ( +// Location: LCCOMB_X57_Y35_N2 +fiftyfivenm_lcell_comb \inst|Selector15~1 ( // Equation(s): -// \inst13|inst14|rnw~0_combout = (!\inst13|inst14|prev_busy~q & (\inst13|inst14|state.Tx1~q & \inst13|inst|busy~q )) +// \inst|Selector15~1_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[52]~70_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[36]~14_combout )))) - .dataa(gnd), - .datab(\inst13|inst14|prev_busy~q ), - .datac(\inst13|inst14|state.Tx1~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst|IR [2]), + .datab(\inst|Selector19~4_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[36]~14_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[52]~70_combout ), .cin(gnd), - .combout(\inst13|inst14|rnw~0_combout ), + .combout(\inst|Selector15~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|rnw~0 .lut_mask = 16'h3000; -defparam \inst13|inst14|rnw~0 .sum_lutc_input = "datac"; +defparam \inst|Selector15~1 .lut_mask = 16'hCC40; +defparam \inst|Selector15~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N10 -fiftyfivenm_lcell_comb \inst13|inst14|rnw~1 ( +// Location: LCCOMB_X57_Y35_N28 +fiftyfivenm_lcell_comb \inst|Selector15~5 ( // Equation(s): -// \inst13|inst14|rnw~1_combout = (\inst13|inst14|go~q & ((\inst13|inst14|rnw~q ) # (\inst13|inst14|cmd_in [0] $ (\inst13|inst14|cmd_in [1])))) +// \inst|Selector15~5_combout = (\inst|Selector15~4_combout ) # ((\inst|Selector15~0_combout ) # ((\inst|Selector15~1_combout ) # (!\inst|Selector16~0_combout ))) - .dataa(\inst13|inst14|go~q ), - .datab(\inst13|inst14|rnw~q ), - .datac(\inst13|inst14|cmd_in [0]), - .datad(\inst13|inst14|cmd_in [1]), + .dataa(\inst|Selector15~4_combout ), + .datab(\inst|Selector15~0_combout ), + .datac(\inst|Selector16~0_combout ), + .datad(\inst|Selector15~1_combout ), .cin(gnd), - .combout(\inst13|inst14|rnw~1_combout ), + .combout(\inst|Selector15~5_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|rnw~1 .lut_mask = 16'h8AA8; -defparam \inst13|inst14|rnw~1 .sum_lutc_input = "datac"; +defparam \inst|Selector15~5 .lut_mask = 16'hFFEF; +defparam \inst|Selector15~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N6 -fiftyfivenm_lcell_comb \inst13|inst14|rnw~2 ( +// Location: LCCOMB_X62_Y37_N8 +fiftyfivenm_lcell_comb \inst|Selector15~6 ( // Equation(s): -// \inst13|inst14|rnw~2_combout = (\inst13|inst14|data_out[7]~0_combout & ((\inst13|inst14|state.idle~q & (\inst13|inst14|rnw~0_combout )) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|rnw~1_combout ))))) +// \inst|Selector15~6_combout = (\inst|Selector15~5_combout ) # ((\inst|state.ex_in2~q & !\inst13|inst1[0]~24_combout )) - .dataa(\inst13|inst14|state.idle~q ), - .datab(\inst13|inst14|data_out[7]~0_combout ), - .datac(\inst13|inst14|rnw~0_combout ), - .datad(\inst13|inst14|rnw~1_combout ), + .dataa(\inst|Selector15~5_combout ), + .datab(\inst|state.ex_in2~q ), + .datac(gnd), + .datad(\inst13|inst1[0]~24_combout ), .cin(gnd), - .combout(\inst13|inst14|rnw~2_combout ), + .combout(\inst|Selector15~6_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|rnw~2 .lut_mask = 16'hC480; -defparam \inst13|inst14|rnw~2 .sum_lutc_input = "datac"; +defparam \inst|Selector15~6 .lut_mask = 16'hAAEE; +defparam \inst|Selector15~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N8 -fiftyfivenm_lcell_comb \inst13|inst14|rnw~3 ( +// Location: LCCOMB_X62_Y37_N6 +fiftyfivenm_lcell_comb \inst|Selector15~7 ( // Equation(s): -// \inst13|inst14|rnw~3_combout = (\inst13|inst14|rnw~2_combout & ((\inst13|inst14|state.idle~q ) # ((\inst13|inst14|Selector21~0_combout )))) # (!\inst13|inst14|rnw~2_combout & (((\inst13|inst14|rnw~q )))) +// \inst|Selector15~7_combout = (\inst|Selector15~6_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[12]~79_combout & \inst13|inst1[12]~76_combout ))) - .dataa(\inst13|inst14|state.idle~q ), - .datab(\inst13|inst14|rnw~q ), - .datac(\inst13|inst14|Selector21~0_combout ), - .datad(\inst13|inst14|rnw~2_combout ), + .dataa(\inst|state.ex_in2~q ), + .datab(\inst|Selector15~6_combout ), + .datac(\inst13|inst1[12]~79_combout ), + .datad(\inst13|inst1[12]~76_combout ), .cin(gnd), - .combout(\inst13|inst14|rnw~3_combout ), + .combout(\inst|Selector15~7_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|rnw~3 .lut_mask = 16'hFACC; -defparam \inst13|inst14|rnw~3 .sum_lutc_input = "datac"; +defparam \inst|Selector15~7 .lut_mask = 16'hECCC; +defparam \inst|Selector15~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y37_N1 -dffeas \inst13|inst14|rnw ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|rnw~3_combout ), +// Location: FF_X62_Y37_N7 +dffeas \inst|AC[12] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector15~7_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|rnw~q ), + .q(\inst|AC [12]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|rnw .is_wysiwyg = "true"; -defparam \inst13|inst14|rnw .power_up = "low"; +defparam \inst|AC[12] .is_wysiwyg = "true"; +defparam \inst|AC[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N6 -fiftyfivenm_lcell_comb \inst13|inst|addr_rw[0]~feeder ( +// Location: LCCOMB_X60_Y37_N24 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[28]~22 ( // Equation(s): -// \inst13|inst|addr_rw[0]~feeder_combout = \inst13|inst14|rnw~q +// \inst|shifter|auto_generated|sbit_w[28]~22_combout = (\inst|shifter|auto_generated|sbit_w[28]~21_combout ) # ((\inst|AC [12] & !\inst|IR [0])) - .dataa(gnd), - .datab(gnd), + .dataa(\inst|shifter|auto_generated|sbit_w[28]~21_combout ), + .datab(\inst|AC [12]), .datac(gnd), - .datad(\inst13|inst14|rnw~q ), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst|addr_rw[0]~feeder_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|addr_rw[0]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|addr_rw[0]~feeder .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[28]~22 .lut_mask = 16'hAAEE; +defparam \inst|shifter|auto_generated|sbit_w[28]~22 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N8 -fiftyfivenm_lcell_comb \inst13|inst14|state_machine~1 ( +// Location: LCCOMB_X58_Y35_N4 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[46]~56 ( // Equation(s): -// \inst13|inst14|state_machine~1_combout = (\inst13|inst|busy~q & !\inst13|inst14|prev_busy~q ) +// \inst|shifter|auto_generated|sbit_w[46]~56_combout = (\inst|IR [1] & (\inst|IR [4] & (\inst|AC [15]))) # (!\inst|IR [1] & (((\inst|shifter|auto_generated|sbit_w[30]~19_combout )))) - .dataa(gnd), - .datab(\inst13|inst|busy~q ), - .datac(gnd), - .datad(\inst13|inst14|prev_busy~q ), + .dataa(\inst|IR [4]), + .datab(\inst|IR [1]), + .datac(\inst|AC [15]), + .datad(\inst|shifter|auto_generated|sbit_w[30]~19_combout ), .cin(gnd), - .combout(\inst13|inst14|state_machine~1_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[46]~56_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|state_machine~1 .lut_mask = 16'h00CC; -defparam \inst13|inst14|state_machine~1 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[46]~56 .lut_mask = 16'hB380; +defparam \inst|shifter|auto_generated|sbit_w[46]~56 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N22 -fiftyfivenm_lcell_comb \inst13|inst14|Selector32~1 ( +// Location: LCCOMB_X58_Y35_N26 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[46]~81 ( // Equation(s): -// \inst13|inst14|Selector32~1_combout = (!\inst13|inst14|state.Rx1~q & (\inst13|inst14|cmd_in [0] $ (\inst13|inst14|cmd_in [1]))) +// \inst|shifter|auto_generated|sbit_w[46]~81_combout = (\inst|shifter|auto_generated|sbit_w[46]~56_combout ) # ((\inst|shifter|auto_generated|sbit_w[28]~22_combout & (\inst|IR [1] & !\inst|IR [4]))) - .dataa(\inst13|inst14|state.Rx1~q ), - .datab(\inst13|inst14|cmd_in [0]), - .datac(gnd), - .datad(\inst13|inst14|cmd_in [1]), + .dataa(\inst|shifter|auto_generated|sbit_w[28]~22_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[46]~56_combout ), + .datac(\inst|IR [1]), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst13|inst14|Selector32~1_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[46]~81_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector32~1 .lut_mask = 16'h1144; -defparam \inst13|inst14|Selector32~1 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[46]~81 .lut_mask = 16'hCCEC; +defparam \inst|shifter|auto_generated|sbit_w[46]~81 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N20 -fiftyfivenm_lcell_comb \inst13|inst14|Selector32~0 ( +// Location: LCCOMB_X58_Y35_N6 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[62]~76 ( // Equation(s): -// \inst13|inst14|Selector32~0_combout = (!\inst13|inst14|state.Tx1~q & (!\inst13|inst14|state.Rx1~q & ((\inst13|inst14|state.idle~q ) # (\inst13|inst14|comm_en~q )))) +// \inst|shifter|auto_generated|sbit_w[62]~76_combout = (\inst|IR [2] & (((\inst|AC [15] & \inst|IR [4])))) # (!\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[46]~81_combout )) - .dataa(\inst13|inst14|state.Tx1~q ), - .datab(\inst13|inst14|state.idle~q ), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst14|comm_en~q ), + .dataa(\inst|shifter|auto_generated|sbit_w[46]~81_combout ), + .datab(\inst|IR [2]), + .datac(\inst|AC [15]), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst13|inst14|Selector32~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[62]~76_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector32~0 .lut_mask = 16'h0504; -defparam \inst13|inst14|Selector32~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[62]~76 .lut_mask = 16'hE222; +defparam \inst|shifter|auto_generated|sbit_w[62]~76 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N18 -fiftyfivenm_lcell_comb \inst13|inst14|Selector32~2 ( +// Location: LCCOMB_X58_Y35_N0 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[62]~77 ( // Equation(s): -// \inst13|inst14|Selector32~2_combout = (\inst13|inst14|Selector32~0_combout ) # ((\inst13|inst14|comm_en~q & ((\inst13|inst14|Selector32~1_combout ) # (!\inst13|inst14|state_machine~1_combout )))) +// \inst|shifter|auto_generated|sbit_w[62]~77_combout = (\inst|shifter|auto_generated|sbit_w[62]~76_combout ) # ((\inst|shifter|auto_generated|sbit_w[42]~59_combout & (!\inst|IR [4] & \inst|IR [2]))) - .dataa(\inst13|inst14|state_machine~1_combout ), - .datab(\inst13|inst14|Selector32~1_combout ), - .datac(\inst13|inst14|comm_en~q ), - .datad(\inst13|inst14|Selector32~0_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[62]~76_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), + .datac(\inst|IR [4]), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst13|inst14|Selector32~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[62]~77_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector32~2 .lut_mask = 16'hFFD0; -defparam \inst13|inst14|Selector32~2 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[62]~77 .lut_mask = 16'hAEAA; +defparam \inst|shifter|auto_generated|sbit_w[62]~77 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y37_N19 -dffeas \inst13|inst14|comm_en ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector32~2_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|comm_en~q ), - .prn(vcc)); +// Location: LCCOMB_X58_Y35_N24 +fiftyfivenm_lcell_comb \inst|Selector13~2 ( +// Equation(s): +// \inst|Selector13~2_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[54]~78_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[38]~52_combout )))) + + .dataa(\inst|shifter|auto_generated|sbit_w[54]~78_combout ), + .datab(\inst|IR [2]), + .datac(\inst|Selector19~4_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), + .cin(gnd), + .combout(\inst|Selector13~2_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|comm_en .is_wysiwyg = "true"; -defparam \inst13|inst14|comm_en .power_up = "low"; +defparam \inst|Selector13~2 .lut_mask = 16'hB0A0; +defparam \inst|Selector13~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N14 -fiftyfivenm_lcell_comb \inst13|inst|addr_rw[7]~2 ( +// Location: LCCOMB_X57_Y40_N6 +fiftyfivenm_lcell_comb \inst|Selector13~3 ( +// Equation(s): +// \inst|Selector13~3_combout = (\inst|Selector13~1_combout ) # ((\inst|Selector13~2_combout ) # ((\inst|Selector20~0_combout & \inst|shifter|auto_generated|sbit_w[62]~77_combout ))) + + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|Selector13~1_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[62]~77_combout ), + .datad(\inst|Selector13~2_combout ), + .cin(gnd), + .combout(\inst|Selector13~3_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector13~3 .lut_mask = 16'hFFEC; +defparam \inst|Selector13~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y40_N12 +fiftyfivenm_lcell_comb \inst|Selector13~4 ( // Equation(s): -// \inst13|inst|addr_rw[7]~2_combout = ((\inst13|inst|state.ready~q & !\inst13|inst|state.mstr_ack~q )) # (!\inst13|inst14|comm_en~q ) +// \inst|Selector13~4_combout = (\inst|Selector13~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [14] $ (\inst|AC [14])))) - .dataa(\inst13|inst|state.ready~q ), - .datab(\inst13|inst14|comm_en~q ), - .datac(gnd), - .datad(\inst13|inst|state.mstr_ack~q ), + .dataa(\inst|Selector13~3_combout ), + .datab(\inst|altsyncram_component|auto_generated|q_a [14]), + .datac(\inst|AC [14]), + .datad(\inst|state.ex_xor~q ), .cin(gnd), - .combout(\inst13|inst|addr_rw[7]~2_combout ), + .combout(\inst|Selector13~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|addr_rw[7]~2 .lut_mask = 16'h33BB; -defparam \inst13|inst|addr_rw[7]~2 .sum_lutc_input = "datac"; +defparam \inst|Selector13~4 .lut_mask = 16'hBEAA; +defparam \inst|Selector13~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N2 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~6 ( +// Location: LCCOMB_X56_Y41_N2 +fiftyfivenm_lcell_comb \inst|Add1~73 ( // Equation(s): -// \inst13|inst|Selector25~6_combout = (!\inst13|inst|ack_error~q & (\inst13|inst|state.slv_ack2~q & \inst13|inst|process_1~4_combout )) +// \inst|Add1~73_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [14]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [14])) - .dataa(\inst13|inst|ack_error~q ), - .datab(\inst13|inst|state.slv_ack2~q ), + .dataa(\inst|state.ex_sub~q ), + .datab(\inst|state.ex_add~q ), .datac(gnd), - .datad(\inst13|inst|process_1~4_combout ), + .datad(\inst|altsyncram_component|auto_generated|q_a [14]), .cin(gnd), - .combout(\inst13|inst|Selector25~6_combout ), + .combout(\inst|Add1~73_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~6 .lut_mask = 16'h4400; -defparam \inst13|inst|Selector25~6 .sum_lutc_input = "datac"; +defparam \inst|Add1~73 .lut_mask = 16'h44AA; +defparam \inst|Add1~73 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N10 -fiftyfivenm_lcell_comb \inst13|inst|addr_rw[7]~3 ( +// Location: LCCOMB_X56_Y41_N24 +fiftyfivenm_lcell_comb \inst|Add1~74 ( // Equation(s): -// \inst13|inst|addr_rw[7]~3_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & (\inst1|altpll_component|auto_generated|wire_pll1_locked & ((\inst13|inst|Selector25~6_combout ) # (!\inst13|inst|addr_rw[7]~2_combout )))) +// \inst|Add1~74_combout = (\inst|WideOr3~1_combout & ((\inst|Add1~73_combout ) # ((\inst|Add1~1_combout & \inst|IR [10])))) # (!\inst|WideOr3~1_combout & (((\inst|Add1~1_combout & \inst|IR [10])))) - .dataa(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), - .datab(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .datac(\inst13|inst|addr_rw[7]~2_combout ), - .datad(\inst13|inst|Selector25~6_combout ), + .dataa(\inst|WideOr3~1_combout ), + .datab(\inst|Add1~73_combout ), + .datac(\inst|Add1~1_combout ), + .datad(\inst|IR [10]), .cin(gnd), - .combout(\inst13|inst|addr_rw[7]~3_combout ), + .combout(\inst|Add1~74_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|addr_rw[7]~3 .lut_mask = 16'h8808; -defparam \inst13|inst|addr_rw[7]~3 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X49_Y35_N7 -dffeas \inst13|inst|addr_rw[0] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|addr_rw[0]~feeder_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|addr_rw [0]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|addr_rw[0] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[0] .power_up = "low"; +defparam \inst|Add1~74 .lut_mask = 16'hF888; +defparam \inst|Add1~74 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N12 -fiftyfivenm_lcell_comb \inst13|inst|Selector22~0 ( +// Location: LCCOMB_X55_Y40_N14 +fiftyfivenm_lcell_comb \inst|Add1~68 ( // Equation(s): -// \inst13|inst|Selector22~0_combout = (\inst13|inst|state.slv_ack1~q & !\inst13|inst|addr_rw [0]) +// \inst|Add1~68_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [13])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state.ex_add~q )) - .dataa(gnd), - .datab(\inst13|inst|state.slv_ack1~q ), - .datac(\inst13|inst|addr_rw [0]), - .datad(gnd), + .dataa(\inst|state.ex_sub~q ), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [13]), + .datad(\inst|state.ex_add~q ), .cin(gnd), - .combout(\inst13|inst|Selector22~0_combout ), + .combout(\inst|Add1~68_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector22~0 .lut_mask = 16'h0C0C; -defparam \inst13|inst|Selector22~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~68 .lut_mask = 16'h5A0A; +defparam \inst|Add1~68 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N30 -fiftyfivenm_lcell_comb \inst13|inst|Selector22~1 ( +// Location: LCCOMB_X55_Y39_N26 +fiftyfivenm_lcell_comb \inst|Add1~69 ( // Equation(s): -// \inst13|inst|Selector22~1_combout = (\inst13|inst|Selector22~0_combout ) # ((\inst13|inst|state.slv_ack2~q & (!\inst13|inst14|rnw~q & \inst13|inst|process_1~4_combout ))) +// \inst|Add1~69_combout = (\inst|IR [10] & ((\inst|Add1~1_combout ) # ((\inst|WideOr3~1_combout & \inst|Add1~68_combout )))) # (!\inst|IR [10] & (\inst|WideOr3~1_combout & (\inst|Add1~68_combout ))) - .dataa(\inst13|inst|Selector22~0_combout ), - .datab(\inst13|inst|state.slv_ack2~q ), - .datac(\inst13|inst14|rnw~q ), - .datad(\inst13|inst|process_1~4_combout ), + .dataa(\inst|IR [10]), + .datab(\inst|WideOr3~1_combout ), + .datac(\inst|Add1~68_combout ), + .datad(\inst|Add1~1_combout ), .cin(gnd), - .combout(\inst13|inst|Selector22~1_combout ), + .combout(\inst|Add1~69_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector22~1 .lut_mask = 16'hAEAA; -defparam \inst13|inst|Selector22~1 .sum_lutc_input = "datac"; +defparam \inst|Add1~69 .lut_mask = 16'hEAC0; +defparam \inst|Add1~69 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N24 -fiftyfivenm_lcell_comb \inst13|inst|Selector22~2 ( +// Location: LCCOMB_X58_Y39_N10 +fiftyfivenm_lcell_comb \inst|Add1~70 ( // Equation(s): -// \inst13|inst|Selector22~2_combout = (\inst13|inst|Selector22~1_combout & (((\inst13|inst|state.wr~q & !\inst13|inst|Equal1~0_combout )) # (!\inst13|inst|ack_error~q ))) # (!\inst13|inst|Selector22~1_combout & (((\inst13|inst|state.wr~q & -// !\inst13|inst|Equal1~0_combout )))) +// \inst|Add1~70_combout = (\inst|AC [13] & ((\inst|state.ex_add~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_sub~q )))) - .dataa(\inst13|inst|Selector22~1_combout ), - .datab(\inst13|inst|ack_error~q ), - .datac(\inst13|inst|state.wr~q ), - .datad(\inst13|inst|Equal1~0_combout ), + .dataa(\inst|AC [13]), + .datab(\inst|state.ex_add~q ), + .datac(\inst|state.ex_addi~q ), + .datad(\inst|state.ex_sub~q ), .cin(gnd), - .combout(\inst13|inst|Selector22~2_combout ), + .combout(\inst|Add1~70_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector22~2 .lut_mask = 16'h22F2; -defparam \inst13|inst|Selector22~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X45_Y35_N25 -dffeas \inst13|inst|state.wr ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector22~2_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|state.wr~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|state.wr .is_wysiwyg = "true"; -defparam \inst13|inst|state.wr .power_up = "low"; +defparam \inst|Add1~70 .lut_mask = 16'hAAA8; +defparam \inst|Add1~70 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N24 -fiftyfivenm_lcell_comb \inst13|inst|Selector21~0 ( +// Location: LCCOMB_X55_Y39_N12 +fiftyfivenm_lcell_comb \inst|Add1~71 ( // Equation(s): -// \inst13|inst|Selector21~0_combout = (\inst13|inst|state.start~q ) # ((!\inst13|inst|Equal1~0_combout & \inst13|inst|state.command~q )) +// \inst|Add1~71_combout = ((\inst|Add1~69_combout $ (\inst|Add1~70_combout $ (!\inst|Add1~67 )))) # (GND) +// \inst|Add1~72 = CARRY((\inst|Add1~69_combout & ((\inst|Add1~70_combout ) # (!\inst|Add1~67 ))) # (!\inst|Add1~69_combout & (\inst|Add1~70_combout & !\inst|Add1~67 ))) - .dataa(gnd), - .datab(\inst13|inst|Equal1~0_combout ), - .datac(\inst13|inst|state.command~q ), - .datad(\inst13|inst|state.start~q ), - .cin(gnd), - .combout(\inst13|inst|Selector21~0_combout ), - .cout()); + .dataa(\inst|Add1~69_combout ), + .datab(\inst|Add1~70_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~67 ), + .combout(\inst|Add1~71_combout ), + .cout(\inst|Add1~72 )); // synopsys translate_off -defparam \inst13|inst|Selector21~0 .lut_mask = 16'hFF30; -defparam \inst13|inst|Selector21~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~71 .lut_mask = 16'h698E; +defparam \inst|Add1~71 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X47_Y35_N25 -dffeas \inst13|inst|state.command ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector21~0_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|state.command~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y39_N14 +fiftyfivenm_lcell_comb \inst|Add1~76 ( +// Equation(s): +// \inst|Add1~76_combout = (\inst|Add1~75_combout & ((\inst|Add1~74_combout & (\inst|Add1~72 & VCC)) # (!\inst|Add1~74_combout & (!\inst|Add1~72 )))) # (!\inst|Add1~75_combout & ((\inst|Add1~74_combout & (!\inst|Add1~72 )) # (!\inst|Add1~74_combout & +// ((\inst|Add1~72 ) # (GND))))) +// \inst|Add1~77 = CARRY((\inst|Add1~75_combout & (!\inst|Add1~74_combout & !\inst|Add1~72 )) # (!\inst|Add1~75_combout & ((!\inst|Add1~72 ) # (!\inst|Add1~74_combout )))) + + .dataa(\inst|Add1~75_combout ), + .datab(\inst|Add1~74_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst|Add1~72 ), + .combout(\inst|Add1~76_combout ), + .cout(\inst|Add1~77 )); // synopsys translate_off -defparam \inst13|inst|state.command .is_wysiwyg = "true"; -defparam \inst13|inst|state.command .power_up = "low"; +defparam \inst|Add1~76 .lut_mask = 16'h9617; +defparam \inst|Add1~76 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N0 -fiftyfivenm_lcell_comb \inst13|inst|WideOr12~0 ( +// Location: LCCOMB_X57_Y40_N18 +fiftyfivenm_lcell_comb \inst|Selector13~0 ( // Equation(s): -// \inst13|inst|WideOr12~0_combout = (\inst13|inst|state.wr~q ) # ((\inst13|inst|state.rd~q ) # (\inst13|inst|state.command~q )) +// \inst|Selector13~0_combout = (\inst|AC [14] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [14])) # (!\inst|Selector27~6_combout ))) - .dataa(\inst13|inst|state.wr~q ), - .datab(gnd), - .datac(\inst13|inst|state.rd~q ), - .datad(\inst13|inst|state.command~q ), + .dataa(\inst|state.ex_and~q ), + .datab(\inst|Selector27~6_combout ), + .datac(\inst|AC [14]), + .datad(\inst|altsyncram_component|auto_generated|q_a [14]), .cin(gnd), - .combout(\inst13|inst|WideOr12~0_combout ), + .combout(\inst|Selector13~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|WideOr12~0 .lut_mask = 16'hFFFA; -defparam \inst13|inst|WideOr12~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X46_Y35_N25 -dffeas \inst13|inst|bit_cnt[0] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|bit_cnt[0]~0_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|WideOr12~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|bit_cnt [0]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|bit_cnt[0] .is_wysiwyg = "true"; -defparam \inst13|inst|bit_cnt[0] .power_up = "low"; +defparam \inst|Selector13~0 .lut_mask = 16'hB030; +defparam \inst|Selector13~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N10 -fiftyfivenm_lcell_comb \inst13|inst|Selector27~0 ( +// Location: LCCOMB_X57_Y40_N22 +fiftyfivenm_lcell_comb \inst|Selector13~5 ( // Equation(s): -// \inst13|inst|Selector27~0_combout = \inst13|inst|bit_cnt [1] $ (\inst13|inst|bit_cnt [0]) +// \inst|Selector13~5_combout = (\inst|Selector13~4_combout ) # ((\inst|Selector13~0_combout ) # ((\inst|Add1~76_combout & \inst|AC[3]~0_combout ))) - .dataa(gnd), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [0]), - .datad(gnd), + .dataa(\inst|Selector13~4_combout ), + .datab(\inst|Add1~76_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector13~0_combout ), .cin(gnd), - .combout(\inst13|inst|Selector27~0_combout ), + .combout(\inst|Selector13~5_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector27~0 .lut_mask = 16'h3C3C; -defparam \inst13|inst|Selector27~0 .sum_lutc_input = "datac"; +defparam \inst|Selector13~5 .lut_mask = 16'hFFEA; +defparam \inst|Selector13~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y35_N9 -dffeas \inst13|inst|bit_cnt[1] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst|Selector27~0_combout ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|WideOr12~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|bit_cnt [1]), - .prn(vcc)); +// Location: LCCOMB_X59_Y38_N30 +fiftyfivenm_lcell_comb \inst|Selector13~6 ( +// Equation(s): +// \inst|Selector13~6_combout = ((\inst|Selector13~5_combout ) # ((\inst|state.ex_in2~q & !\inst13|inst1[0]~24_combout ))) # (!\inst|Selector16~0_combout ) + + .dataa(\inst|Selector16~0_combout ), + .datab(\inst|state.ex_in2~q ), + .datac(\inst|Selector13~5_combout ), + .datad(\inst13|inst1[0]~24_combout ), + .cin(gnd), + .combout(\inst|Selector13~6_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst|bit_cnt[1] .is_wysiwyg = "true"; -defparam \inst13|inst|bit_cnt[1] .power_up = "low"; +defparam \inst|Selector13~6 .lut_mask = 16'hF5FD; +defparam \inst|Selector13~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N8 -fiftyfivenm_lcell_comb \inst13|inst|state~15 ( +// Location: LCCOMB_X60_Y40_N26 +fiftyfivenm_lcell_comb \inst4|COUNT[14]~41 ( // Equation(s): -// \inst13|inst|state~15_combout = (\inst13|inst|bit_cnt [1] & (\inst13|inst|bit_cnt [2] & (\inst13|inst|bit_cnt [0] & \inst13|inst|state.command~q ))) +// \inst4|COUNT[14]~41_combout = (\inst4|COUNT [14] & (!\inst4|COUNT[13]~40 )) # (!\inst4|COUNT [14] & ((\inst4|COUNT[13]~40 ) # (GND))) +// \inst4|COUNT[14]~42 = CARRY((!\inst4|COUNT[13]~40 ) # (!\inst4|COUNT [14])) - .dataa(\inst13|inst|bit_cnt [1]), - .datab(\inst13|inst|bit_cnt [2]), - .datac(\inst13|inst|bit_cnt [0]), - .datad(\inst13|inst|state.command~q ), - .cin(gnd), - .combout(\inst13|inst|state~15_combout ), - .cout()); + .dataa(\inst4|COUNT [14]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst4|COUNT[13]~40 ), + .combout(\inst4|COUNT[14]~41_combout ), + .cout(\inst4|COUNT[14]~42 )); // synopsys translate_off -defparam \inst13|inst|state~15 .lut_mask = 16'h8000; -defparam \inst13|inst|state~15 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[14]~41 .lut_mask = 16'h5A5F; +defparam \inst4|COUNT[14]~41 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X46_Y35_N9 -dffeas \inst13|inst|state.slv_ack1 ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|state~15_combout ), +// Location: FF_X60_Y40_N27 +dffeas \inst4|COUNT[14] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[14]~41_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(!\inst4|process_0~0_combout ), .aload(gnd), .sclr(gnd), .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|state.slv_ack1~q ), + .q(\inst4|COUNT [14]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|state.slv_ack1 .is_wysiwyg = "true"; -defparam \inst13|inst|state.slv_ack1 .power_up = "low"; +defparam \inst4|COUNT[14] .is_wysiwyg = "true"; +defparam \inst4|COUNT[14] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N22 -fiftyfivenm_lcell_comb \inst13|inst|Selector24~0 ( +// Location: LCCOMB_X59_Y38_N4 +fiftyfivenm_lcell_comb \inst13|inst1[14]~86 ( // Equation(s): -// \inst13|inst|Selector24~0_combout = (\inst13|inst|state.slv_ack2~q & (((\inst13|inst|ack_error~q ) # (!\inst13|inst|process_1~4_combout )))) # (!\inst13|inst|state.slv_ack2~q & (\inst13|inst|state.mstr_ack~q & ((!\inst13|inst|process_1~4_combout )))) +// \inst13|inst1[14]~86_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [14]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst13|inst|state.mstr_ack~q ), - .datab(\inst13|inst|ack_error~q ), - .datac(\inst13|inst|state.slv_ack2~q ), - .datad(\inst13|inst|process_1~4_combout ), + .dataa(\inst4|IO_OUT~combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst4|COUNT [14]), .cin(gnd), - .combout(\inst13|inst|Selector24~0_combout ), + .combout(\inst13|inst1[14]~86_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector24~0 .lut_mask = 16'hC0FA; -defparam \inst13|inst|Selector24~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[14]~86 .lut_mask = 16'h0301; +defparam \inst13|inst1[14]~86 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N6 -fiftyfivenm_lcell_comb \inst13|inst|Selector24~1 ( +// Location: LCCOMB_X59_Y36_N20 +fiftyfivenm_lcell_comb \inst11|Add1~17 ( // Equation(s): -// \inst13|inst|Selector24~1_combout = (\inst13|inst|Selector24~0_combout ) # ((\inst13|inst|state.slv_ack1~q & \inst13|inst|ack_error~q )) +// \inst11|Add1~17_combout = (\inst11|count [14] & \inst10|state.Init~q ) - .dataa(\inst13|inst|state.slv_ack1~q ), + .dataa(gnd), .datab(gnd), - .datac(\inst13|inst|ack_error~q ), - .datad(\inst13|inst|Selector24~0_combout ), + .datac(\inst11|count [14]), + .datad(\inst10|state.Init~q ), .cin(gnd), - .combout(\inst13|inst|Selector24~1_combout ), + .combout(\inst11|Add1~17_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector24~1 .lut_mask = 16'hFFA0; -defparam \inst13|inst|Selector24~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X47_Y35_N7 -dffeas \inst13|inst|state.stop ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector24~1_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|state.stop~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|state.stop .is_wysiwyg = "true"; -defparam \inst13|inst|state.stop .power_up = "low"; +defparam \inst11|Add1~17 .lut_mask = 16'hF000; +defparam \inst11|Add1~17 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N14 -fiftyfivenm_lcell_comb \inst13|inst|Selector18~0 ( +// Location: LCCOMB_X60_Y35_N28 +fiftyfivenm_lcell_comb \inst11|count[14]~45 ( // Equation(s): -// \inst13|inst|Selector18~0_combout = (!\inst13|inst|state.stop~q & ((\inst13|inst|state.ready~q ) # (\inst13|inst14|comm_en~q ))) +// \inst11|count[14]~45_combout = ((\inst11|Add1~3_combout $ (\inst11|Add1~17_combout $ (!\inst11|count[13]~44 )))) # (GND) +// \inst11|count[14]~46 = CARRY((\inst11|Add1~3_combout & ((\inst11|Add1~17_combout ) # (!\inst11|count[13]~44 ))) # (!\inst11|Add1~3_combout & (\inst11|Add1~17_combout & !\inst11|count[13]~44 ))) - .dataa(gnd), - .datab(\inst13|inst|state.stop~q ), - .datac(\inst13|inst|state.ready~q ), - .datad(\inst13|inst14|comm_en~q ), - .cin(gnd), - .combout(\inst13|inst|Selector18~0_combout ), - .cout()); + .dataa(\inst11|Add1~3_combout ), + .datab(\inst11|Add1~17_combout ), + .datac(gnd), + .datad(vcc), + .cin(\inst11|count[13]~44 ), + .combout(\inst11|count[14]~45_combout ), + .cout(\inst11|count[14]~46 )); // synopsys translate_off -defparam \inst13|inst|Selector18~0 .lut_mask = 16'h3330; -defparam \inst13|inst|Selector18~0 .sum_lutc_input = "datac"; +defparam \inst11|count[14]~45 .lut_mask = 16'h698E; +defparam \inst11|count[14]~45 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X45_Y35_N15 -dffeas \inst13|inst|state.ready ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector18~0_combout ), +// Location: FF_X60_Y35_N29 +dffeas \inst11|count[14] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[14]~45_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|state.ready~q ), + .q(\inst11|count [14]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|state.ready .is_wysiwyg = "true"; -defparam \inst13|inst|state.ready .power_up = "low"; +defparam \inst11|count[14] .is_wysiwyg = "true"; +defparam \inst11|count[14] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N8 -fiftyfivenm_lcell_comb \inst13|inst|Selector19~0 ( +// Location: LCCOMB_X61_Y39_N28 +fiftyfivenm_lcell_comb \inst10|count[14]~45 ( // Equation(s): -// \inst13|inst|Selector19~0_combout = (\inst13|inst|state.restart~q ) # ((!\inst13|inst|state.ready~q & \inst13|inst14|comm_en~q )) +// \inst10|count[14]~45_combout = (\inst10|count [14] & (\inst10|count[13]~44 $ (GND))) # (!\inst10|count [14] & (!\inst10|count[13]~44 & VCC)) +// \inst10|count[14]~46 = CARRY((\inst10|count [14] & !\inst10|count[13]~44 )) - .dataa(\inst13|inst|state.restart~q ), - .datab(gnd), - .datac(\inst13|inst|state.ready~q ), - .datad(\inst13|inst14|comm_en~q ), - .cin(gnd), - .combout(\inst13|inst|Selector19~0_combout ), - .cout()); + .dataa(gnd), + .datab(\inst10|count [14]), + .datac(gnd), + .datad(vcc), + .cin(\inst10|count[13]~44 ), + .combout(\inst10|count[14]~45_combout ), + .cout(\inst10|count[14]~46 )); // synopsys translate_off -defparam \inst13|inst|Selector19~0 .lut_mask = 16'hAFAA; -defparam \inst13|inst|Selector19~0 .sum_lutc_input = "datac"; +defparam \inst10|count[14]~45 .lut_mask = 16'hC30C; +defparam \inst10|count[14]~45 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X47_Y35_N9 -dffeas \inst13|inst|state.start ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector19~0_combout ), +// Location: FF_X61_Y39_N29 +dffeas \inst10|count[14] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[14]~45_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst10|count[9]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|state.start~q ), + .q(\inst10|count [14]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|state.start .is_wysiwyg = "true"; -defparam \inst13|inst|state.start .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N0 -fiftyfivenm_lcell_comb \inst13|inst|WideOr3~0 ( -// Equation(s): -// \inst13|inst|WideOr3~0_combout = (!\inst13|inst|state.start~q & (!\inst13|inst|state.rd~q & !\inst13|inst|state.wr~q )) - - .dataa(gnd), - .datab(\inst13|inst|state.start~q ), - .datac(\inst13|inst|state.rd~q ), - .datad(\inst13|inst|state.wr~q ), - .cin(gnd), - .combout(\inst13|inst|WideOr3~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|WideOr3~0 .lut_mask = 16'h0003; -defparam \inst13|inst|WideOr3~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N26 -fiftyfivenm_lcell_comb \inst13|inst|Selector0~0 ( -// Equation(s): -// \inst13|inst|Selector0~0_combout = (\inst13|inst|state.command~q ) # ((\inst13|inst|state.slv_ack1~q ) # ((\inst13|inst|state.mstr_ack~q & !\inst13|inst14|comm_en~q ))) - - .dataa(\inst13|inst|state.mstr_ack~q ), - .datab(\inst13|inst|state.command~q ), - .datac(\inst13|inst|state.slv_ack1~q ), - .datad(\inst13|inst14|comm_en~q ), - .cin(gnd), - .combout(\inst13|inst|Selector0~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector0~0 .lut_mask = 16'hFCFE; -defparam \inst13|inst|Selector0~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N28 -fiftyfivenm_lcell_comb \inst13|inst|Selector0~1 ( -// Equation(s): -// \inst13|inst|Selector0~1_combout = (!\inst13|inst|state.restart~q & (((!\inst13|inst|ack_error~q & \inst13|inst|process_1~4_combout )) # (!\inst13|inst|state.slv_ack2~q ))) - - .dataa(\inst13|inst|state.restart~q ), - .datab(\inst13|inst|ack_error~q ), - .datac(\inst13|inst|state.slv_ack2~q ), - .datad(\inst13|inst|process_1~4_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector0~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector0~1 .lut_mask = 16'h1505; -defparam \inst13|inst|Selector0~1 .sum_lutc_input = "datac"; +defparam \inst10|count[14] .is_wysiwyg = "true"; +defparam \inst10|count[14] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N30 -fiftyfivenm_lcell_comb \inst13|inst|Selector0~2 ( +// Location: LCCOMB_X59_Y36_N22 +fiftyfivenm_lcell_comb \inst13|inst1[14]~87 ( // Equation(s): -// \inst13|inst|Selector0~2_combout = (\inst13|inst|busy~q & ((\inst13|inst|Selector0~0_combout ) # (!\inst13|inst|Selector0~1_combout ))) +// \inst13|inst1[14]~87_combout = (\inst|IR [0] & (\inst11|count [14])) # (!\inst|IR [0] & ((\inst10|count [14]))) - .dataa(gnd), - .datab(\inst13|inst|Selector0~0_combout ), - .datac(\inst13|inst|busy~q ), - .datad(\inst13|inst|Selector0~1_combout ), + .dataa(\inst11|count [14]), + .datab(gnd), + .datac(\inst10|count [14]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst|Selector0~2_combout ), + .combout(\inst13|inst1[14]~87_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector0~2 .lut_mask = 16'hC0F0; -defparam \inst13|inst|Selector0~2 .sum_lutc_input = "datac"; +defparam \inst13|inst1[14]~87 .lut_mask = 16'hAAF0; +defparam \inst13|inst1[14]~87 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N20 -fiftyfivenm_lcell_comb \inst13|inst|Selector0~3 ( +// Location: LCCOMB_X59_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst1[14]~88 ( // Equation(s): -// \inst13|inst|Selector0~3_combout = ((\inst13|inst|Selector0~2_combout ) # ((!\inst13|inst|state.ready~q & \inst13|inst14|comm_en~q ))) # (!\inst13|inst|WideOr3~0_combout ) +// \inst13|inst1[14]~88_combout = (\inst|AC [14] & (((\inst13|inst1[14]~87_combout ) # (!\inst11|tri_enable~1_combout )))) # (!\inst|AC [14] & (!\inst|IO_WRITE_int~q & ((\inst13|inst1[14]~87_combout ) # (!\inst11|tri_enable~1_combout )))) - .dataa(\inst13|inst|WideOr3~0_combout ), - .datab(\inst13|inst|state.ready~q ), - .datac(\inst13|inst|Selector0~2_combout ), - .datad(\inst13|inst14|comm_en~q ), + .dataa(\inst|AC [14]), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst11|tri_enable~1_combout ), + .datad(\inst13|inst1[14]~87_combout ), .cin(gnd), - .combout(\inst13|inst|Selector0~3_combout ), + .combout(\inst13|inst1[14]~88_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector0~3 .lut_mask = 16'hF7F5; -defparam \inst13|inst|Selector0~3 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X47_Y35_N21 -dffeas \inst13|inst|busy ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|Selector0~3_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|busy~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|busy .is_wysiwyg = "true"; -defparam \inst13|inst|busy .power_up = "low"; +defparam \inst13|inst1[14]~88 .lut_mask = 16'hBB0B; +defparam \inst13|inst1[14]~88 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N0 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[6]~8 ( +// Location: LCCOMB_X60_Y36_N30 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[14]~17 ( // Equation(s): -// \inst13|inst14|data_out[6]~8_combout = (!\inst13|inst|busy~q & (\inst13|inst|data_rd [6] & (\inst13|inst14|state.Rx1~q & \inst13|inst14|prev_busy~q ))) +// \inst13|inst14|data_out[14]~17_combout = (\inst13|inst14|state.Rx2~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [6]))) - .dataa(\inst13|inst|busy~q ), - .datab(\inst13|inst|data_rd [6]), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst14|prev_busy~q ), + .dataa(\inst13|inst14|state.Rx2~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [6]), .cin(gnd), - .combout(\inst13|inst14|data_out[6]~8_combout ), + .combout(\inst13|inst14|data_out[14]~17_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[6]~8 .lut_mask = 16'h4000; -defparam \inst13|inst14|data_out[6]~8 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[14]~17 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[14]~17 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y38_N1 -dffeas \inst13|inst14|data_out[6] ( +// Location: FF_X60_Y36_N31 +dffeas \inst13|inst14|data_out[14] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[6]~8_combout ), + .d(\inst13|inst14|data_out[14]~17_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), + .ena(\inst13|inst14|data_out[15]~11_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [6]), + .q(\inst13|inst14|data_out [14]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[6] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[6] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y44_N8 -fiftyfivenm_lcell_comb \inst13|inst1[6]~45 ( -// Equation(s): -// \inst13|inst1[6]~45_combout = ((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [6])) # (!\inst3|I2C_DATA_EN~combout ) - - .dataa(\inst3|I2C_DATA_EN~combout ), - .datab(\inst|IO_WRITE_int~q ), - .datac(gnd), - .datad(\inst13|inst14|data_out [6]), - .cin(gnd), - .combout(\inst13|inst1[6]~45_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[6]~45 .lut_mask = 16'hFFDD; -defparam \inst13|inst1[6]~45 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[14] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[14] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N20 -fiftyfivenm_lcell_comb \inst13|inst1[6]~47 ( +// Location: LCCOMB_X59_Y38_N24 +fiftyfivenm_lcell_comb \inst13|inst1[14]~89 ( // Equation(s): -// \inst13|inst1[6]~47_combout = (\inst13|inst1[6]~46_combout & (\inst13|inst1[6]~45_combout & ((\inst11|count [6]) # (!\inst11|tri_enable~combout )))) +// \inst13|inst1[14]~89_combout = (\inst13|inst1[14]~88_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [14]) # (!\inst3|I2C_DATA_EN~combout )))) - .dataa(\inst13|inst1[6]~46_combout ), - .datab(\inst13|inst1[6]~45_combout ), - .datac(\inst11|tri_enable~combout ), - .datad(\inst11|count [6]), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst13|inst1[14]~88_combout ), + .datac(\inst3|I2C_DATA_EN~combout ), + .datad(\inst13|inst14|data_out [14]), .cin(gnd), - .combout(\inst13|inst1[6]~47_combout ), + .combout(\inst13|inst1[14]~89_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[6]~47 .lut_mask = 16'h8808; -defparam \inst13|inst1[6]~47 .sum_lutc_input = "datac"; +defparam \inst13|inst1[14]~89 .lut_mask = 16'hCC8C; +defparam \inst13|inst1[14]~89 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N10 -fiftyfivenm_lcell_comb \inst13|inst1[6]~48 ( +// Location: LCCOMB_X59_Y38_N22 +fiftyfivenm_lcell_comb \inst|Selector13~7 ( // Equation(s): -// \inst13|inst1[6]~48_combout = (\inst13|inst1[6]~94_combout & (\inst13|inst1[6]~47_combout & ((\inst4|COUNT [6]) # (!\inst4|IO_OUT~combout )))) +// \inst|Selector13~7_combout = (\inst|Selector13~6_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[14]~86_combout & \inst13|inst1[14]~89_combout ))) - .dataa(\inst13|inst1[6]~94_combout ), - .datab(\inst13|inst1[6]~47_combout ), - .datac(\inst4|COUNT [6]), - .datad(\inst4|IO_OUT~combout ), + .dataa(\inst|Selector13~6_combout ), + .datab(\inst|state.ex_in2~q ), + .datac(\inst13|inst1[14]~86_combout ), + .datad(\inst13|inst1[14]~89_combout ), .cin(gnd), - .combout(\inst13|inst1[6]~48_combout ), + .combout(\inst|Selector13~7_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[6]~48 .lut_mask = 16'h8088; -defparam \inst13|inst1[6]~48 .sum_lutc_input = "datac"; +defparam \inst|Selector13~7 .lut_mask = 16'hEAAA; +defparam \inst|Selector13~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N24 -fiftyfivenm_lcell_comb \inst|Selector21~3 ( -// Equation(s): -// \inst|Selector21~3_combout = (\inst|IR [6] & ((\inst|state.ex_loadi~q ) # ((\inst|altsyncram_component|auto_generated|q_a [6] & \inst|Selector27~1_combout )))) # (!\inst|IR [6] & (\inst|altsyncram_component|auto_generated|q_a [6] & -// ((\inst|Selector27~1_combout )))) - - .dataa(\inst|IR [6]), - .datab(\inst|altsyncram_component|auto_generated|q_a [6]), - .datac(\inst|state.ex_loadi~q ), - .datad(\inst|Selector27~1_combout ), - .cin(gnd), - .combout(\inst|Selector21~3_combout ), - .cout()); +// Location: FF_X59_Y38_N23 +dffeas \inst|AC[14] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector13~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|AC [14]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector21~3 .lut_mask = 16'hECA0; -defparam \inst|Selector21~3 .sum_lutc_input = "datac"; +defparam \inst|AC[14] .is_wysiwyg = "true"; +defparam \inst|AC[14] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N14 -fiftyfivenm_lcell_comb \inst|Selector21~4 ( +// Location: LCCOMB_X58_Y39_N12 +fiftyfivenm_lcell_comb \inst|Add1~75 ( // Equation(s): -// \inst|Selector21~4_combout = (\inst|Selector21~3_combout ) # ((\inst|state.ex_xor~q & (\inst|AC [6] $ (\inst|altsyncram_component|auto_generated|q_a [6])))) +// \inst|Add1~75_combout = (\inst|AC [14] & ((\inst|state.ex_addi~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_sub~q )))) - .dataa(\inst|AC [6]), - .datab(\inst|altsyncram_component|auto_generated|q_a [6]), - .datac(\inst|state.ex_xor~q ), - .datad(\inst|Selector21~3_combout ), + .dataa(\inst|state.ex_addi~q ), + .datab(\inst|state.ex_add~q ), + .datac(\inst|AC [14]), + .datad(\inst|state.ex_sub~q ), .cin(gnd), - .combout(\inst|Selector21~4_combout ), + .combout(\inst|Add1~75_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector21~4 .lut_mask = 16'hFF60; -defparam \inst|Selector21~4 .sum_lutc_input = "datac"; +defparam \inst|Add1~75 .lut_mask = 16'hF0E0; +defparam \inst|Add1~75 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N20 -fiftyfivenm_lcell_comb \inst|Add1~33 ( +// Location: LCCOMB_X55_Y39_N16 +fiftyfivenm_lcell_comb \inst|Add1~81 ( // Equation(s): -// \inst|Add1~33_combout = (\inst|state.ex_sub~q & (!\inst|altsyncram_component|auto_generated|q_a [6])) # (!\inst|state.ex_sub~q & (\inst|altsyncram_component|auto_generated|q_a [6] & \inst|state.ex_add~q )) +// \inst|Add1~81_combout = \inst|Add1~80_combout $ (\inst|Add1~79_combout $ (!\inst|Add1~77 )) - .dataa(gnd), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [6]), - .datad(\inst|state.ex_add~q ), - .cin(gnd), - .combout(\inst|Add1~33_combout ), + .dataa(\inst|Add1~80_combout ), + .datab(\inst|Add1~79_combout ), + .datac(gnd), + .datad(gnd), + .cin(\inst|Add1~77 ), + .combout(\inst|Add1~81_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~33 .lut_mask = 16'h3C0C; -defparam \inst|Add1~33 .sum_lutc_input = "datac"; +defparam \inst|Add1~81 .lut_mask = 16'h6969; +defparam \inst|Add1~81 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N0 -fiftyfivenm_lcell_comb \inst|Add1~34 ( +// Location: LCCOMB_X56_Y40_N28 +fiftyfivenm_lcell_comb \inst|Selector12~5 ( // Equation(s): -// \inst|Add1~34_combout = (\inst|Add1~1_combout & ((\inst|IR [6]) # ((\inst|WideOr3~1_combout & \inst|Add1~33_combout )))) # (!\inst|Add1~1_combout & (((\inst|WideOr3~1_combout & \inst|Add1~33_combout )))) +// \inst|Selector12~5_combout = (\inst|state.ex_xor~q & (\inst|AC [15] $ (\inst|altsyncram_component|auto_generated|q_a [15]))) - .dataa(\inst|Add1~1_combout ), - .datab(\inst|IR [6]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~33_combout ), + .dataa(\inst|state.ex_xor~q ), + .datab(gnd), + .datac(\inst|AC [15]), + .datad(\inst|altsyncram_component|auto_generated|q_a [15]), .cin(gnd), - .combout(\inst|Add1~34_combout ), + .combout(\inst|Selector12~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~34 .lut_mask = 16'hF888; -defparam \inst|Add1~34 .sum_lutc_input = "datac"; +defparam \inst|Selector12~5 .lut_mask = 16'h0AA0; +defparam \inst|Selector12~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N30 -fiftyfivenm_lcell_comb \inst|Add1~36 ( +// Location: LCCOMB_X56_Y40_N6 +fiftyfivenm_lcell_comb \inst|Selector12~6 ( // Equation(s): -// \inst|Add1~36_combout = (\inst|Add1~35_combout & ((\inst|Add1~34_combout & (\inst|Add1~32 & VCC)) # (!\inst|Add1~34_combout & (!\inst|Add1~32 )))) # (!\inst|Add1~35_combout & ((\inst|Add1~34_combout & (!\inst|Add1~32 )) # (!\inst|Add1~34_combout & -// ((\inst|Add1~32 ) # (GND))))) -// \inst|Add1~37 = CARRY((\inst|Add1~35_combout & (!\inst|Add1~34_combout & !\inst|Add1~32 )) # (!\inst|Add1~35_combout & ((!\inst|Add1~32 ) # (!\inst|Add1~34_combout )))) +// \inst|Selector12~6_combout = (\inst|altsyncram_component|auto_generated|q_a [15] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_loadi~q & \inst|IR [10])))) # (!\inst|altsyncram_component|auto_generated|q_a [15] & (\inst|state.ex_loadi~q & +// (\inst|IR [10]))) - .dataa(\inst|Add1~35_combout ), - .datab(\inst|Add1~34_combout ), - .datac(gnd), - .datad(vcc), - .cin(\inst|Add1~32 ), - .combout(\inst|Add1~36_combout ), - .cout(\inst|Add1~37 )); + .dataa(\inst|altsyncram_component|auto_generated|q_a [15]), + .datab(\inst|state.ex_loadi~q ), + .datac(\inst|IR [10]), + .datad(\inst|Selector27~1_combout ), + .cin(gnd), + .combout(\inst|Selector12~6_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add1~36 .lut_mask = 16'h9617; -defparam \inst|Add1~36 .sum_lutc_input = "cin"; +defparam \inst|Selector12~6 .lut_mask = 16'hEAC0; +defparam \inst|Selector12~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N18 -fiftyfivenm_lcell_comb \inst|Selector21~1 ( +// Location: LCCOMB_X56_Y40_N20 +fiftyfivenm_lcell_comb \inst|Selector12~7 ( // Equation(s): -// \inst|Selector21~1_combout = (\inst|AC [6] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [6])) # (!\inst|Selector27~6_combout ))) +// \inst|Selector12~7_combout = (\inst|Selector12~5_combout ) # ((\inst|Selector12~6_combout ) # ((\inst|Add1~81_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst|Selector27~6_combout ), - .datab(\inst|state.ex_and~q ), - .datac(\inst|AC [6]), - .datad(\inst|altsyncram_component|auto_generated|q_a [6]), + .dataa(\inst|Add1~81_combout ), + .datab(\inst|Selector12~5_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector12~6_combout ), .cin(gnd), - .combout(\inst|Selector21~1_combout ), + .combout(\inst|Selector12~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector21~1 .lut_mask = 16'hD050; -defparam \inst|Selector21~1 .sum_lutc_input = "datac"; +defparam \inst|Selector12~7 .lut_mask = 16'hFFEC; +defparam \inst|Selector12~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N24 -fiftyfivenm_lcell_comb \inst|Selector21~0 ( +// Location: LCCOMB_X56_Y40_N10 +fiftyfivenm_lcell_comb \inst|Selector12~8 ( // Equation(s): -// \inst|Selector21~0_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[54]~76_combout ) # ((\inst|shifter|auto_generated|sbit_w[38]~52_combout & !\inst|IR [2])))) +// \inst|Selector12~8_combout = (\inst|Selector12~7_combout ) # ((\inst|AC [15] & ((\inst|Selector12~4_combout ) # (!\inst|Selector27~6_combout )))) - .dataa(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), - .datab(\inst|IR [2]), - .datac(\inst|shifter|auto_generated|sbit_w[54]~76_combout ), - .datad(\inst|Selector20~0_combout ), + .dataa(\inst|Selector12~4_combout ), + .datab(\inst|AC [15]), + .datac(\inst|Selector27~6_combout ), + .datad(\inst|Selector12~7_combout ), .cin(gnd), - .combout(\inst|Selector21~0_combout ), + .combout(\inst|Selector12~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector21~0 .lut_mask = 16'hF200; -defparam \inst|Selector21~0 .sum_lutc_input = "datac"; +defparam \inst|Selector12~8 .lut_mask = 16'hFF8C; +defparam \inst|Selector12~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N30 -fiftyfivenm_lcell_comb \inst|Selector21~2 ( +// Location: LCCOMB_X59_Y36_N18 +fiftyfivenm_lcell_comb \inst|Selector12~1 ( // Equation(s): -// \inst|Selector21~2_combout = (\inst|Selector21~1_combout ) # ((\inst|Selector21~0_combout ) # ((\inst|shifter|auto_generated|sbit_w[62]~75_combout & \inst|Selector27~4_combout ))) +// \inst|Selector12~1_combout = (\inst|IR [0] & (\inst|AC [14])) # (!\inst|IR [0] & ((\inst|AC [15]))) - .dataa(\inst|Selector21~1_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[62]~75_combout ), - .datac(\inst|Selector27~4_combout ), - .datad(\inst|Selector21~0_combout ), + .dataa(\inst|AC [14]), + .datab(gnd), + .datac(\inst|AC [15]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector21~2_combout ), + .combout(\inst|Selector12~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector21~2 .lut_mask = 16'hFFEA; -defparam \inst|Selector21~2 .sum_lutc_input = "datac"; +defparam \inst|Selector12~1 .lut_mask = 16'hAAF0; +defparam \inst|Selector12~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y40_N14 -fiftyfivenm_lcell_comb \inst|Selector21~5 ( +// Location: LCCOMB_X58_Y34_N18 +fiftyfivenm_lcell_comb \inst|Selector12~2 ( // Equation(s): -// \inst|Selector21~5_combout = (\inst|Selector21~4_combout ) # ((\inst|Selector21~2_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~36_combout ))) +// \inst|Selector12~2_combout = (\inst|IR [1] & ((\inst|shifter|auto_generated|sbit_w[29]~42_combout ))) # (!\inst|IR [1] & (\inst|Selector12~1_combout )) - .dataa(\inst|Selector21~4_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Add1~36_combout ), - .datad(\inst|Selector21~2_combout ), + .dataa(\inst|Selector12~1_combout ), + .datab(gnd), + .datac(\inst|IR [1]), + .datad(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), .cin(gnd), - .combout(\inst|Selector21~5_combout ), + .combout(\inst|Selector12~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector21~5 .lut_mask = 16'hFFEA; -defparam \inst|Selector21~5 .sum_lutc_input = "datac"; +defparam \inst|Selector12~2 .lut_mask = 16'hFA0A; +defparam \inst|Selector12~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N30 -fiftyfivenm_lcell_comb \inst|Selector21~6 ( +// Location: LCCOMB_X58_Y34_N28 +fiftyfivenm_lcell_comb \inst|Selector12~3 ( // Equation(s): -// \inst|Selector21~6_combout = (\inst|Selector21~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[6]~48_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst|Selector12~3_combout = (\inst|IR [2] & ((\inst|shifter|auto_generated|sbit_w[43]~68_combout ))) # (!\inst|IR [2] & (\inst|Selector12~2_combout )) - .dataa(\inst13|inst1[6]~48_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst|Selector21~5_combout ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(gnd), + .datab(\inst|Selector12~2_combout ), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[43]~68_combout ), .cin(gnd), - .combout(\inst|Selector21~6_combout ), + .combout(\inst|Selector12~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector21~6 .lut_mask = 16'hF8FC; -defparam \inst|Selector21~6 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X51_Y44_N31 -dffeas \inst|AC[6] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector21~6_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|AC [6]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|AC[6] .is_wysiwyg = "true"; -defparam \inst|AC[6] .power_up = "low"; +defparam \inst|Selector12~3 .lut_mask = 16'hFC0C; +defparam \inst|Selector12~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N12 -fiftyfivenm_lcell_comb \inst|Add1~35 ( +// Location: LCCOMB_X58_Y34_N2 +fiftyfivenm_lcell_comb \inst|Selector12~9 ( // Equation(s): -// \inst|Add1~35_combout = (\inst|AC [6] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_add~q ) # (\inst|state.ex_addi~q )))) +// \inst|Selector12~9_combout = (\inst|Selector12~8_combout ) # ((\inst|Selector20~0_combout & (!\inst|IR [4] & \inst|Selector12~3_combout ))) - .dataa(\inst|AC [6]), - .datab(\inst|state.ex_sub~q ), - .datac(\inst|state.ex_add~q ), - .datad(\inst|state.ex_addi~q ), + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|Selector12~8_combout ), + .datac(\inst|IR [4]), + .datad(\inst|Selector12~3_combout ), .cin(gnd), - .combout(\inst|Add1~35_combout ), + .combout(\inst|Selector12~9_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~35 .lut_mask = 16'hAAA8; -defparam \inst|Add1~35 .sum_lutc_input = "datac"; +defparam \inst|Selector12~9 .lut_mask = 16'hCECC; +defparam \inst|Selector12~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N20 -fiftyfivenm_lcell_comb \inst|Selector20~2 ( +// Location: LCCOMB_X58_Y34_N16 +fiftyfivenm_lcell_comb \inst|Selector12~0 ( // Equation(s): -// \inst|Selector20~2_combout = (\inst|Selector20~1_combout ) # ((\inst|Selector19~0_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~41_combout ))) +// \inst|Selector12~0_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[55]~79_combout ) # ((\inst|shifter|auto_generated|sbit_w[39]~62_combout & !\inst|IR [2])))) - .dataa(\inst|Selector20~1_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Selector19~0_combout ), - .datad(\inst|Add1~41_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[55]~79_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[39]~62_combout ), + .datac(\inst|IR [2]), + .datad(\inst|Selector19~4_combout ), .cin(gnd), - .combout(\inst|Selector20~2_combout ), + .combout(\inst|Selector12~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector20~2 .lut_mask = 16'hFEFA; -defparam \inst|Selector20~2 .sum_lutc_input = "datac"; +defparam \inst|Selector12~0 .lut_mask = 16'hAE00; +defparam \inst|Selector12~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N12 -fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[55]~77 ( +// Location: LCCOMB_X62_Y37_N4 +fiftyfivenm_lcell_comb \inst|Selector12~10 ( // Equation(s): -// \inst|shifter|auto_generated|sbit_w[55]~77_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[43]~67_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[35]~64_combout ))))) +// \inst|Selector12~10_combout = (\inst|Selector12~9_combout ) # ((\inst|Selector12~0_combout ) # ((\inst|state.ex_in2~q & !\inst13|inst1[0]~24_combout ))) - .dataa(\inst|IR [2]), - .datab(\inst|IR [4]), - .datac(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[35]~64_combout ), + .dataa(\inst|Selector12~9_combout ), + .datab(\inst|state.ex_in2~q ), + .datac(\inst|Selector12~0_combout ), + .datad(\inst13|inst1[0]~24_combout ), .cin(gnd), - .combout(\inst|shifter|auto_generated|sbit_w[55]~77_combout ), + .combout(\inst|Selector12~10_combout ), .cout()); // synopsys translate_off -defparam \inst|shifter|auto_generated|sbit_w[55]~77 .lut_mask = 16'hA280; -defparam \inst|shifter|auto_generated|sbit_w[55]~77 .sum_lutc_input = "datac"; +defparam \inst|Selector12~10 .lut_mask = 16'hFAFE; +defparam \inst|Selector12~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N26 -fiftyfivenm_lcell_comb \inst|Selector20~3 ( +// Location: LCCOMB_X60_Y40_N28 +fiftyfivenm_lcell_comb \inst4|COUNT[15]~43 ( // Equation(s): -// \inst|Selector20~3_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[55]~77_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[39]~61_combout )))) +// \inst4|COUNT[15]~43_combout = \inst4|COUNT[14]~42 $ (!\inst4|COUNT [15]) - .dataa(\inst|Selector20~0_combout ), - .datab(\inst|IR [2]), - .datac(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[55]~77_combout ), - .cin(gnd), - .combout(\inst|Selector20~3_combout ), + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst4|COUNT [15]), + .cin(\inst4|COUNT[14]~42 ), + .combout(\inst4|COUNT[15]~43_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector20~3 .lut_mask = 16'hAA20; -defparam \inst|Selector20~3 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[15]~43 .lut_mask = 16'hF00F; +defparam \inst4|COUNT[15]~43 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N16 -fiftyfivenm_lcell_comb \inst|Selector20~4 ( -// Equation(s): -// \inst|Selector20~4_combout = (\inst|AC [7] & (((\inst|altsyncram_component|auto_generated|q_a [7] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [7]), - .datab(\inst|state.ex_and~q ), - .datac(\inst|AC [7]), - .datad(\inst|Selector27~6_combout ), - .cin(gnd), - .combout(\inst|Selector20~4_combout ), - .cout()); +// Location: FF_X60_Y40_N29 +dffeas \inst4|COUNT[15] ( + .clk(\inst5|clock_10Hz~clkctrl_outclk ), + .d(\inst4|COUNT[15]~43_combout ), + .asdata(vcc), + .clrn(!\inst4|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst4|COUNT [15]), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector20~4 .lut_mask = 16'h80F0; -defparam \inst|Selector20~4 .sum_lutc_input = "datac"; +defparam \inst4|COUNT[15] .is_wysiwyg = "true"; +defparam \inst4|COUNT[15] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y44_N0 -fiftyfivenm_lcell_comb \inst|Selector20~5 ( +// Location: LCCOMB_X62_Y37_N30 +fiftyfivenm_lcell_comb \inst13|inst1[15]~91 ( // Equation(s): -// \inst|Selector20~5_combout = (\inst|Selector20~3_combout ) # ((\inst|Selector20~4_combout ) # ((\inst|state.ex_loadi~q & \inst|IR [7]))) +// \inst13|inst1[15]~91_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [15]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst|state.ex_loadi~q ), - .datab(\inst|Selector20~3_combout ), - .datac(\inst|Selector20~4_combout ), - .datad(\inst|IR [7]), + .dataa(\inst4|IO_OUT~combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst4|COUNT [15]), .cin(gnd), - .combout(\inst|Selector20~5_combout ), + .combout(\inst13|inst1[15]~91_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector20~5 .lut_mask = 16'hFEFC; -defparam \inst|Selector20~5 .sum_lutc_input = "datac"; +defparam \inst13|inst1[15]~91 .lut_mask = 16'h0301; +defparam \inst13|inst1[15]~91 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N6 -fiftyfivenm_lcell_comb \inst|Selector20~6 ( +// Location: LCCOMB_X61_Y39_N30 +fiftyfivenm_lcell_comb \inst10|count[15]~47 ( // Equation(s): -// \inst|Selector20~6_combout = (\inst|Selector20~2_combout ) # (\inst|Selector20~5_combout ) +// \inst10|count[15]~47_combout = \inst10|count [15] $ (\inst10|count[14]~46 ) - .dataa(\inst|Selector20~2_combout ), + .dataa(\inst10|count [15]), .datab(gnd), - .datac(\inst|Selector20~5_combout ), + .datac(gnd), .datad(gnd), - .cin(gnd), - .combout(\inst|Selector20~6_combout ), + .cin(\inst10|count[14]~46 ), + .combout(\inst10|count[15]~47_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector20~6 .lut_mask = 16'hFAFA; -defparam \inst|Selector20~6 .sum_lutc_input = "datac"; +defparam \inst10|count[15]~47 .lut_mask = 16'h5A5A; +defparam \inst10|count[15]~47 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N10 -fiftyfivenm_lcell_comb \inst13|inst|Decoder0~8 ( +// Location: FF_X61_Y39_N31 +dffeas \inst10|count[15] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst10|count[15]~47_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst10|count[9]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst10|count [15]), + .prn(vcc)); +// synopsys translate_off +defparam \inst10|count[15] .is_wysiwyg = "true"; +defparam \inst10|count[15] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y37_N26 +fiftyfivenm_lcell_comb \inst11|Add1~18 ( // Equation(s): -// \inst13|inst|Decoder0~8_combout = (!\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [1] & (!\inst13|inst|bit_cnt [2] & \inst13|inst|Decoder0~0_combout ))) +// \inst11|Add1~18_combout = (\inst11|count [15] & \inst10|state.Init~q ) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Decoder0~0_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst11|count [15]), + .datad(\inst10|state.Init~q ), .cin(gnd), - .combout(\inst13|inst|Decoder0~8_combout ), + .combout(\inst11|Add1~18_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Decoder0~8 .lut_mask = 16'h0100; -defparam \inst13|inst|Decoder0~8 .sum_lutc_input = "datac"; +defparam \inst11|Add1~18 .lut_mask = 16'hF000; +defparam \inst11|Add1~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y38_N8 -fiftyfivenm_lcell_comb \inst13|inst|data_rx[7]~7 ( +// Location: LCCOMB_X60_Y35_N30 +fiftyfivenm_lcell_comb \inst11|count[15]~47 ( // Equation(s): -// \inst13|inst|data_rx[7]~7_combout = (\inst13|inst|Decoder0~8_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~8_combout & ((\inst13|inst|data_rx [7]))) +// \inst11|count[15]~47_combout = \inst11|Add1~18_combout $ (\inst11|count[14]~46 $ (\inst11|Add1~3_combout )) - .dataa(\GSENSOR_SDI~input_o ), + .dataa(\inst11|Add1~18_combout ), .datab(gnd), - .datac(\inst13|inst|data_rx [7]), - .datad(\inst13|inst|Decoder0~8_combout ), - .cin(gnd), - .combout(\inst13|inst|data_rx[7]~7_combout ), + .datac(gnd), + .datad(\inst11|Add1~3_combout ), + .cin(\inst11|count[14]~46 ), + .combout(\inst11|count[15]~47_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rx[7]~7 .lut_mask = 16'hAAF0; -defparam \inst13|inst|data_rx[7]~7 .sum_lutc_input = "datac"; +defparam \inst11|count[15]~47 .lut_mask = 16'hA55A; +defparam \inst11|count[15]~47 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X47_Y38_N9 -dffeas \inst13|inst|data_rx[7] ( - .clk(!\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rx[7]~7_combout ), +// Location: FF_X60_Y35_N31 +dffeas \inst11|count[15] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst11|count[15]~47_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst11|count[7]~18_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|data_rx [7]), + .q(\inst11|count [15]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|data_rx[7] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rx[7] .power_up = "low"; +defparam \inst11|count[15] .is_wysiwyg = "true"; +defparam \inst11|count[15] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N30 -fiftyfivenm_lcell_comb \inst13|inst|data_rd[7]~feeder ( +// Location: LCCOMB_X60_Y37_N2 +fiftyfivenm_lcell_comb \inst13|inst1[15]~92 ( // Equation(s): -// \inst13|inst|data_rd[7]~feeder_combout = \inst13|inst|data_rx [7] +// \inst13|inst1[15]~92_combout = (\inst|IR [0] & ((\inst11|count [15]))) # (!\inst|IR [0] & (\inst10|count [15])) - .dataa(gnd), - .datab(gnd), + .dataa(\inst10|count [15]), + .datab(\inst11|count [15]), .datac(gnd), - .datad(\inst13|inst|data_rx [7]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst|data_rd[7]~feeder_combout ), + .combout(\inst13|inst1[15]~92_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[7]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst|data_rd[7]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst1[15]~92 .lut_mask = 16'hCCAA; +defparam \inst13|inst1[15]~92 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N31 -dffeas \inst13|inst|data_rd[7] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(\inst13|inst|data_rd[7]~feeder_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst|state~14_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_rd [7]), - .prn(vcc)); +// Location: LCCOMB_X60_Y37_N16 +fiftyfivenm_lcell_comb \inst13|inst1[15]~93 ( +// Equation(s): +// \inst13|inst1[15]~93_combout = (\inst13|inst1[15]~92_combout & (((\inst|AC [15])) # (!\inst|IO_WRITE_int~q ))) # (!\inst13|inst1[15]~92_combout & (!\inst11|tri_enable~1_combout & ((\inst|AC [15]) # (!\inst|IO_WRITE_int~q )))) + + .dataa(\inst13|inst1[15]~92_combout ), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst11|tri_enable~1_combout ), + .datad(\inst|AC [15]), + .cin(gnd), + .combout(\inst13|inst1[15]~93_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst|data_rd[7] .is_wysiwyg = "true"; -defparam \inst13|inst|data_rd[7] .power_up = "low"; +defparam \inst13|inst1[15]~93 .lut_mask = 16'hAF23; +defparam \inst13|inst1[15]~93 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N26 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[7]~9 ( +// Location: LCCOMB_X60_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[15]~18 ( // Equation(s): -// \inst13|inst14|data_out[7]~9_combout = (\inst13|inst|data_rd [7] & (\inst13|inst14|prev_busy~q & (\inst13|inst14|state.Rx1~q & !\inst13|inst|busy~q ))) +// \inst13|inst14|data_out[15]~18_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [7]))) - .dataa(\inst13|inst|data_rd [7]), - .datab(\inst13|inst14|prev_busy~q ), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|state.Rx2~q ), + .datad(\inst13|inst|data_rd [7]), .cin(gnd), - .combout(\inst13|inst14|data_out[7]~9_combout ), + .combout(\inst13|inst14|data_out[15]~18_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[7]~9 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[7]~9 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[15]~18 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[15]~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y38_N27 -dffeas \inst13|inst14|data_out[7] ( +// Location: FF_X60_Y36_N29 +dffeas \inst13|inst14|data_out[15] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[7]~9_combout ), + .d(\inst13|inst14|data_out[15]~18_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), + .ena(\inst13|inst14|data_out[15]~11_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [7]), + .q(\inst13|inst14|data_out [15]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[7] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[7] .power_up = "low"; +defparam \inst13|inst14|data_out[15] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[15] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N28 -fiftyfivenm_lcell_comb \inst13|inst1[7]~51 ( +// Location: LCCOMB_X61_Y37_N14 +fiftyfivenm_lcell_comb \inst13|inst1[15]~94 ( // Equation(s): -// \inst13|inst1[7]~51_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [7])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [7])) # (!\inst3|I2C_DATA_EN~combout ))) +// \inst13|inst1[15]~94_combout = (\inst13|inst1[15]~93_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [15]) # (!\inst3|I2C_DATA_EN~combout )))) - .dataa(\inst3|I2C_DATA_EN~combout ), - .datab(\inst13|inst14|data_out [7]), - .datac(\inst|AC [7]), - .datad(\inst|IO_WRITE_int~q ), + .dataa(\inst13|inst1[15]~93_combout ), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst3|I2C_DATA_EN~combout ), + .datad(\inst13|inst14|data_out [15]), .cin(gnd), - .combout(\inst13|inst1[7]~51_combout ), + .combout(\inst13|inst1[15]~94_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[7]~51 .lut_mask = 16'hF0DD; -defparam \inst13|inst1[7]~51 .sum_lutc_input = "datac"; +defparam \inst13|inst1[15]~94 .lut_mask = 16'hAA8A; +defparam \inst13|inst1[15]~94 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N26 -fiftyfivenm_lcell_comb \inst13|inst1[7]~52 ( +// Location: LCCOMB_X62_Y37_N28 +fiftyfivenm_lcell_comb \inst|Selector12~11 ( // Equation(s): -// \inst13|inst1[7]~52_combout = (\inst13|inst1[7]~51_combout & (!\inst13|inst4~combout & ((\inst11|count [7]) # (!\inst11|tri_enable~combout )))) +// \inst|Selector12~11_combout = (\inst|Selector12~10_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[15]~91_combout & \inst13|inst1[15]~94_combout ))) - .dataa(\inst13|inst1[7]~51_combout ), - .datab(\inst11|count [7]), - .datac(\inst11|tri_enable~combout ), - .datad(\inst13|inst4~combout ), + .dataa(\inst|state.ex_in2~q ), + .datab(\inst|Selector12~10_combout ), + .datac(\inst13|inst1[15]~91_combout ), + .datad(\inst13|inst1[15]~94_combout ), .cin(gnd), - .combout(\inst13|inst1[7]~52_combout ), + .combout(\inst|Selector12~11_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[7]~52 .lut_mask = 16'h008A; -defparam \inst13|inst1[7]~52 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X58_Y54_N29 -fiftyfivenm_io_ibuf \SW[7]~input ( - .i(SW[7]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[7]~input_o )); -// synopsys translate_off -defparam \SW[7]~input .bus_hold = "false"; -defparam \SW[7]~input .listen_to_nsleep_signal = "false"; -defparam \SW[7]~input .simulate_z_as = "z"; +defparam \inst|Selector12~11 .lut_mask = 16'hECCC; +defparam \inst|Selector12~11 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y44_N19 -dffeas \inst7|B_DI[7] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\SW[7]~input_o ), +// Location: FF_X62_Y37_N29 +dffeas \inst|AC[15] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector12~11_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [7]), + .q(\inst|AC [15]), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[7] .is_wysiwyg = "true"; -defparam \inst7|B_DI[7] .power_up = "low"; +defparam \inst|AC[15] .is_wysiwyg = "true"; +defparam \inst|AC[15] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y44_N18 -fiftyfivenm_lcell_comb \inst13|inst1[7]~50 ( +// Location: LCCOMB_X56_Y40_N12 +fiftyfivenm_lcell_comb \inst|Selector19~0 ( // Equation(s): -// \inst13|inst1[7]~50_combout = (\inst3|SWITCH_EN~combout & (\inst7|B_DI [7] & ((\inst10|count [7]) # (!\inst10|tri_enable~combout )))) # (!\inst3|SWITCH_EN~combout & ((\inst10|count [7]) # ((!\inst10|tri_enable~combout )))) +// \inst|Selector19~0_combout = (\inst|IR [3] & (\inst|IR [4] & (\inst|AC [15] & \inst|state.ex_shift~q ))) - .dataa(\inst3|SWITCH_EN~combout ), - .datab(\inst10|count [7]), - .datac(\inst7|B_DI [7]), - .datad(\inst10|tri_enable~combout ), + .dataa(\inst|IR [3]), + .datab(\inst|IR [4]), + .datac(\inst|AC [15]), + .datad(\inst|state.ex_shift~q ), .cin(gnd), - .combout(\inst13|inst1[7]~50_combout ), + .combout(\inst|Selector19~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[7]~50 .lut_mask = 16'hC4F5; -defparam \inst13|inst1[7]~50 .sum_lutc_input = "datac"; +defparam \inst|Selector19~0 .lut_mask = 16'h8000; +defparam \inst|Selector19~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N0 -fiftyfivenm_lcell_comb \inst13|inst1[7]~53 ( +// Location: LCCOMB_X56_Y39_N6 +fiftyfivenm_lcell_comb \inst|Selector16~0 ( // Equation(s): -// \inst13|inst1[7]~53_combout = (\inst13|inst1[7]~52_combout & (\inst13|inst1[7]~50_combout & ((\inst4|COUNT [7]) # (!\inst4|IO_OUT~combout )))) +// \inst|Selector16~0_combout = (!\inst|Selector19~0_combout & ((!\inst|IR [10]) # (!\inst|state.ex_loadi~q ))) - .dataa(\inst13|inst1[7]~52_combout ), - .datab(\inst13|inst1[7]~50_combout ), - .datac(\inst4|COUNT [7]), - .datad(\inst4|IO_OUT~combout ), + .dataa(\inst|state.ex_loadi~q ), + .datab(gnd), + .datac(\inst|IR [10]), + .datad(\inst|Selector19~0_combout ), .cin(gnd), - .combout(\inst13|inst1[7]~53_combout ), + .combout(\inst|Selector16~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[7]~53 .lut_mask = 16'h8088; -defparam \inst13|inst1[7]~53 .sum_lutc_input = "datac"; +defparam \inst|Selector16~0 .lut_mask = 16'h005F; +defparam \inst|Selector16~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N18 -fiftyfivenm_lcell_comb \inst|Selector20~7 ( +// Location: LCCOMB_X56_Y39_N0 +fiftyfivenm_lcell_comb \inst|Selector17~5 ( // Equation(s): -// \inst|Selector20~7_combout = (\inst|Selector20~6_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[7]~53_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst|Selector17~5_combout = (\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [10] $ (\inst|AC [10]))) - .dataa(\inst|Selector20~6_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[0]~18_combout ), - .datad(\inst13|inst1[7]~53_combout ), + .dataa(\inst|state.ex_xor~q ), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [10]), + .datad(\inst|AC [10]), .cin(gnd), - .combout(\inst|Selector20~7_combout ), + .combout(\inst|Selector17~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector20~7 .lut_mask = 16'hEEAE; -defparam \inst|Selector20~7 .sum_lutc_input = "datac"; +defparam \inst|Selector17~5 .lut_mask = 16'h0AA0; +defparam \inst|Selector17~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y44_N19 -dffeas \inst|AC[7] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector20~7_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|AC [7]), - .prn(vcc)); +// Location: LCCOMB_X56_Y39_N12 +fiftyfivenm_lcell_comb \inst|Selector17~6 ( +// Equation(s): +// \inst|Selector17~6_combout = ((\inst|Selector17~5_combout ) # ((\inst|Add1~56_combout & \inst|AC[3]~0_combout ))) # (!\inst|Selector16~0_combout ) + + .dataa(\inst|Selector16~0_combout ), + .datab(\inst|Add1~56_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector17~5_combout ), + .cin(gnd), + .combout(\inst|Selector17~6_combout ), + .cout()); // synopsys translate_off -defparam \inst|AC[7] .is_wysiwyg = "true"; -defparam \inst|AC[7] .power_up = "low"; +defparam \inst|Selector17~6 .lut_mask = 16'hFFD5; +defparam \inst|Selector17~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X53_Y39_N0 -fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a2 ( - .portawe(\inst|MW~q ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .clk1(gnd), - .ena0(vcc), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\inst|AC [10],\inst|AC [9],\inst|AC [7],\inst|AC [2]}), - .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , -\inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), - .portabyteenamasks(1'b1), - .portbdatain(4'b0000), - .portbaddr(11'b00000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\inst|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .data_interleave_offset_in_bits = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .data_interleave_width_in_bits = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .init_file = "VelocityControl.mif"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .init_file_layout = "port_a"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .logical_ram_name = "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .operation_mode = "single_port"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_address_clear = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_address_width = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_byte_enable_clock = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_data_out_clear = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_data_out_clock = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_data_width = 4; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_first_address = 0; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_first_bit_number = 2; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_last_address = 2047; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_logical_ram_depth = 2048; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_logical_ram_width = 16; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_b_address_width = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .port_b_data_width = 4; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .ram_block_type = "M9K"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a2 .mem_init0 = 2048'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000050100F000111011111020000F00012101201012001010; -// synopsys translate_on - -// Location: LCCOMB_X49_Y39_N20 -fiftyfivenm_lcell_comb \inst|Selector1~0 ( +// Location: LCCOMB_X56_Y39_N30 +fiftyfivenm_lcell_comb \inst|Selector17~7 ( // Equation(s): -// \inst|Selector1~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [10])) # (!\inst|WideNor0~combout & ((\inst|IR [10]))))) +// \inst|Selector17~7_combout = (\inst|Selector17~4_combout ) # ((\inst|Selector17~6_combout ) # ((\inst|altsyncram_component|auto_generated|q_a [10] & \inst|Selector27~1_combout ))) .dataa(\inst|altsyncram_component|auto_generated|q_a [10]), - .datab(\inst|state.fetch~q ), - .datac(\inst|WideNor0~combout ), - .datad(\inst|IR [10]), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|Selector17~4_combout ), + .datad(\inst|Selector17~6_combout ), + .cin(gnd), + .combout(\inst|Selector17~7_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector17~7 .lut_mask = 16'hFFF8; +defparam \inst|Selector17~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y35_N18 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[58]~57 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[58]~57_combout = (\inst|IR [2] & ((\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[46]~81_combout ))) # (!\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[38]~52_combout )))) + + .dataa(\inst|IR [4]), + .datab(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[46]~81_combout ), + .datad(\inst|IR [2]), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[58]~57_combout ), + .cout()); +// synopsys translate_off +defparam \inst|shifter|auto_generated|sbit_w[58]~57 .lut_mask = 16'hE400; +defparam \inst|shifter|auto_generated|sbit_w[58]~57 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y35_N2 +fiftyfivenm_lcell_comb \inst|Selector17~2 ( +// Equation(s): +// \inst|Selector17~2_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[58]~57_combout ) # ((\inst|shifter|auto_generated|sbit_w[42]~59_combout & !\inst|IR [2])))) + + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[58]~57_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), + .datad(\inst|IR [2]), + .cin(gnd), + .combout(\inst|Selector17~2_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector17~2 .lut_mask = 16'h88A8; +defparam \inst|Selector17~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y39_N30 +fiftyfivenm_lcell_comb \inst13|inst1[10]~68 ( +// Equation(s): +// \inst13|inst1[10]~68_combout = ((\inst|IR [0] & ((\inst11|count [10]))) # (!\inst|IR [0] & (\inst10|count [10]))) # (!\inst11|tri_enable~1_combout ) + + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst|IR [0]), + .datac(\inst10|count [10]), + .datad(\inst11|count [10]), .cin(gnd), - .combout(\inst|Selector1~0_combout ), + .combout(\inst13|inst1[10]~68_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector1~0 .lut_mask = 16'h2320; -defparam \inst|Selector1~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[10]~68 .lut_mask = 16'hFD75; +defparam \inst13|inst1[10]~68 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N20 -fiftyfivenm_lcell_comb \inst|Add0~20 ( +// Location: LCCOMB_X59_Y38_N28 +fiftyfivenm_lcell_comb \inst|Selector17~0 ( // Equation(s): -// \inst|Add0~20_combout = \inst|Add0~19 $ (!\inst|PC [10]) +// \inst|Selector17~0_combout = (\inst|state.ex_in2~q & ((\inst13|inst1[10]~68_combout ) # (!\inst13|inst1[0]~24_combout ))) - .dataa(gnd), - .datab(gnd), + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst|state.ex_in2~q ), .datac(gnd), - .datad(\inst|PC [10]), - .cin(\inst|Add0~19 ), - .combout(\inst|Add0~20_combout ), + .datad(\inst13|inst1[10]~68_combout ), + .cin(gnd), + .combout(\inst|Selector17~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add0~20 .lut_mask = 16'hF00F; -defparam \inst|Add0~20 .sum_lutc_input = "cin"; +defparam \inst|Selector17~0 .lut_mask = 16'hCC44; +defparam \inst|Selector17~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N8 -fiftyfivenm_lcell_comb \inst|Selector1~1 ( +// Location: LCCOMB_X56_Y34_N24 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~3 ( // Equation(s): -// \inst|Selector1~1_combout = (\inst|Selector1~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~20_combout )) +// \inst13|inst|Decoder0~3_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [2] & (\inst13|inst|Decoder0~0_combout & !\inst13|inst|bit_cnt [1]))) - .dataa(\inst|Selector1~0_combout ), - .datab(\inst|state.fetch~q ), - .datac(gnd), - .datad(\inst|Add0~20_combout ), + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|bit_cnt [2]), + .datac(\inst13|inst|Decoder0~0_combout ), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst|Selector1~1_combout ), + .combout(\inst13|inst|Decoder0~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector1~1 .lut_mask = 16'hEEAA; -defparam \inst|Selector1~1 .sum_lutc_input = "datac"; +defparam \inst13|inst|Decoder0~3 .lut_mask = 16'h0080; +defparam \inst13|inst|Decoder0~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N12 -fiftyfivenm_lcell_comb \inst|PC_stack[9][10]~feeder ( +// Location: LCCOMB_X56_Y34_N8 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[2]~2 ( // Equation(s): -// \inst|PC_stack[9][10]~feeder_combout = \inst|PC_stack[8][10]~q +// \inst13|inst|data_rx[2]~2_combout = (\inst13|inst|Decoder0~3_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~3_combout & ((\inst13|inst|data_rx [2]))) - .dataa(gnd), + .dataa(\GSENSOR_SDI~input_o ), .datab(gnd), - .datac(gnd), - .datad(\inst|PC_stack[8][10]~q ), + .datac(\inst13|inst|data_rx [2]), + .datad(\inst13|inst|Decoder0~3_combout ), .cin(gnd), - .combout(\inst|PC_stack[9][10]~feeder_combout ), + .combout(\inst13|inst|data_rx[2]~2_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][10]~feeder .lut_mask = 16'hFF00; -defparam \inst|PC_stack[9][10]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[2]~2 .lut_mask = 16'hAAF0; +defparam \inst13|inst|data_rx[2]~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N13 -dffeas \inst|PC_stack[9][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|PC_stack[9][10]~feeder_combout ), +// Location: FF_X56_Y34_N9 +dffeas \inst13|inst|data_rx[2] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[2]~2_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[9][0]~1_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][10]~q ), + .q(\inst13|inst|data_rx [2]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][10] .power_up = "low"; +defparam \inst13|inst|data_rx[2] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N28 -fiftyfivenm_lcell_comb \inst|Selector119~0 ( +// Location: LCCOMB_X56_Y34_N0 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[2]~feeder ( // Equation(s): -// \inst|Selector119~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][10]~q ))) +// \inst13|inst|data_rd[2]~feeder_combout = \inst13|inst|data_rx [2] - .dataa(\inst|PC_stack[9][10]~q ), - .datab(\inst|PC_stack[7][10]~q ), - .datac(\inst|state.ex_return~q ), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|data_rx [2]), .datad(gnd), .cin(gnd), - .combout(\inst|Selector119~0_combout ), + .combout(\inst13|inst|data_rd[2]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector119~0 .lut_mask = 16'hACAC; -defparam \inst|Selector119~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[2]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst|data_rd[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N29 -dffeas \inst|PC_stack[8][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector119~0_combout ), +// Location: FF_X56_Y34_N1 +dffeas \inst13|inst|data_rd[2] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[2]~feeder_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst|state~14_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][10]~q ), + .q(\inst13|inst|data_rd [2]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][10] .power_up = "low"; +defparam \inst13|inst|data_rd[2] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N16 -fiftyfivenm_lcell_comb \inst|Selector108~0 ( +// Location: LCCOMB_X60_Y36_N24 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[10]~13 ( // Equation(s): -// \inst|Selector108~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][10]~q )) +// \inst13|inst14|data_out[10]~13_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [2]))) - .dataa(gnd), - .datab(\inst|state.ex_return~q ), - .datac(\inst|PC_stack[6][10]~q ), - .datad(\inst|PC_stack[8][10]~q ), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|state.Rx2~q ), + .datad(\inst13|inst|data_rd [2]), .cin(gnd), - .combout(\inst|Selector108~0_combout ), + .combout(\inst13|inst14|data_out[10]~13_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector108~0 .lut_mask = 16'hFC30; -defparam \inst|Selector108~0 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[10]~13 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[10]~13 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N17 -dffeas \inst|PC_stack[7][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector108~0_combout ), +// Location: FF_X60_Y36_N25 +dffeas \inst13|inst14|data_out[10] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[10]~13_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[15]~11_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][10]~q ), + .q(\inst13|inst14|data_out [10]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][10] .power_up = "low"; +defparam \inst13|inst14|data_out[10] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N4 -fiftyfivenm_lcell_comb \inst|Selector97~0 ( +// Location: LCCOMB_X59_Y38_N8 +fiftyfivenm_lcell_comb \inst13|inst1[10]~69 ( // Equation(s): -// \inst|Selector97~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][10]~q ))) +// \inst13|inst1[10]~69_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [10])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [10])) # (!\inst3|I2C_DATA_EN~combout ))) - .dataa(gnd), - .datab(\inst|PC_stack[7][10]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][10]~q ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(\inst|AC [10]), + .datad(\inst13|inst14|data_out [10]), .cin(gnd), - .combout(\inst|Selector97~0_combout ), + .combout(\inst13|inst1[10]~69_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector97~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector97~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[10]~69 .lut_mask = 16'hF5B1; +defparam \inst13|inst1[10]~69 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N5 -dffeas \inst|PC_stack[6][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector97~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[6][10]~q ), - .prn(vcc)); +// Location: LCCOMB_X59_Y38_N0 +fiftyfivenm_lcell_comb \inst13|inst1[10]~67 ( +// Equation(s): +// \inst13|inst1[10]~67_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [10]) # (!\inst4|IO_OUT~combout )))) + + .dataa(\inst4|IO_OUT~combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst4|COUNT [10]), + .cin(gnd), + .combout(\inst13|inst1[10]~67_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[6][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][10] .power_up = "low"; +defparam \inst13|inst1[10]~67 .lut_mask = 16'h0301; +defparam \inst13|inst1[10]~67 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N24 -fiftyfivenm_lcell_comb \inst|Selector86~0 ( +// Location: LCCOMB_X59_Y38_N2 +fiftyfivenm_lcell_comb \inst|Selector17~1 ( // Equation(s): -// \inst|Selector86~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][10]~q ))) +// \inst|Selector17~1_combout = (\inst|Selector17~0_combout & (((\inst13|inst1[10]~69_combout & \inst13|inst1[10]~67_combout )) # (!\inst13|inst1[0]~24_combout ))) - .dataa(gnd), - .datab(\inst|PC_stack[6][10]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][10]~q ), + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst|Selector17~0_combout ), + .datac(\inst13|inst1[10]~69_combout ), + .datad(\inst13|inst1[10]~67_combout ), .cin(gnd), - .combout(\inst|Selector86~0_combout ), + .combout(\inst|Selector17~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector86~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector86~0 .sum_lutc_input = "datac"; +defparam \inst|Selector17~1 .lut_mask = 16'hC444; +defparam \inst|Selector17~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N25 -dffeas \inst|PC_stack[5][10] ( +// Location: LCCOMB_X59_Y38_N10 +fiftyfivenm_lcell_comb \inst|Selector17~8 ( +// Equation(s): +// \inst|Selector17~8_combout = (\inst|Selector17~3_combout ) # ((\inst|Selector17~7_combout ) # ((\inst|Selector17~2_combout ) # (\inst|Selector17~1_combout ))) + + .dataa(\inst|Selector17~3_combout ), + .datab(\inst|Selector17~7_combout ), + .datac(\inst|Selector17~2_combout ), + .datad(\inst|Selector17~1_combout ), + .cin(gnd), + .combout(\inst|Selector17~8_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector17~8 .lut_mask = 16'hFFFE; +defparam \inst|Selector17~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X59_Y38_N11 +dffeas \inst|AC[10] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector86~0_combout ), + .d(\inst|Selector17~8_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][10]~q ), + .q(\inst|AC [10]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][10] .power_up = "low"; +defparam \inst|AC[10] .is_wysiwyg = "true"; +defparam \inst|AC[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y39_N8 -fiftyfivenm_lcell_comb \inst|Selector75~0 ( +// Location: LCCOMB_X55_Y37_N26 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[25]~48 ( // Equation(s): -// \inst|Selector75~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][10]~q )) +// \inst|shifter|auto_generated|sbit_w[25]~48_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [10])) # (!\inst|IR [4] & ((\inst|AC [8]))))) - .dataa(\inst|PC_stack[3][10]~q ), - .datab(\inst|PC_stack[5][10]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|AC [10]), + .datab(\inst|AC [8]), + .datac(\inst|IR [4]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector75~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[25]~48_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector75~0 .lut_mask = 16'hCACA; -defparam \inst|Selector75~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[25]~48 .lut_mask = 16'hAC00; +defparam \inst|shifter|auto_generated|sbit_w[25]~48 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y39_N9 -dffeas \inst|PC_stack[4][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector75~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[4][10]~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y37_N12 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[25]~49 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[25]~49_combout = (\inst|shifter|auto_generated|sbit_w[25]~48_combout ) # ((!\inst|IR [0] & \inst|AC [9])) + + .dataa(\inst|shifter|auto_generated|sbit_w[25]~48_combout ), + .datab(\inst|IR [0]), + .datac(gnd), + .datad(\inst|AC [9]), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), + .cout()); +// synopsys translate_off +defparam \inst|shifter|auto_generated|sbit_w[25]~49 .lut_mask = 16'hBBAA; +defparam \inst|shifter|auto_generated|sbit_w[25]~49 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y37_N26 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[41]~47 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[41]~47_combout = (\inst3|TIMER_EN~3_combout & ((\inst|shifter|auto_generated|sbit_w[23]~35_combout ) # ((\inst|shifter|auto_generated|sbit_w[27]~45_combout & \inst3|I2C_RDY_EN~0_combout )))) # +// (!\inst3|TIMER_EN~3_combout & (((\inst|shifter|auto_generated|sbit_w[27]~45_combout & \inst3|I2C_RDY_EN~0_combout )))) + + .dataa(\inst3|TIMER_EN~3_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[23]~35_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[27]~45_combout ), + .datad(\inst3|I2C_RDY_EN~0_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[41]~47_combout ), + .cout()); +// synopsys translate_off +defparam \inst|shifter|auto_generated|sbit_w[41]~47 .lut_mask = 16'hF888; +defparam \inst|shifter|auto_generated|sbit_w[41]~47 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y37_N10 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[41]~50 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[41]~50_combout = (\inst|shifter|auto_generated|sbit_w[41]~47_combout ) # ((\inst|shifter|auto_generated|sbit_w[25]~49_combout & !\inst|IR [1])) + + .dataa(\inst|shifter|auto_generated|sbit_w[25]~49_combout ), + .datab(\inst|IR [1]), + .datac(gnd), + .datad(\inst|shifter|auto_generated|sbit_w[41]~47_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[4][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][10] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[41]~50 .lut_mask = 16'hFF22; +defparam \inst|shifter|auto_generated|sbit_w[41]~50 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N22 -fiftyfivenm_lcell_comb \inst|Selector64~0 ( +// Location: LCCOMB_X57_Y37_N8 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[61]~73 ( // Equation(s): -// \inst|Selector64~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][10]~q )) +// \inst|shifter|auto_generated|sbit_w[61]~73_combout = (\inst|IR [2] & (\inst|AC [15] & ((\inst|IR [4])))) # (!\inst|IR [2] & (((\inst|shifter|auto_generated|sbit_w[45]~80_combout )))) - .dataa(\inst|PC_stack[2][10]~q ), - .datab(\inst|state.ex_return~q ), - .datac(gnd), - .datad(\inst|PC_stack[4][10]~q ), + .dataa(\inst|AC [15]), + .datab(\inst|shifter|auto_generated|sbit_w[45]~80_combout ), + .datac(\inst|IR [4]), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst|Selector64~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[61]~73_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector64~0 .lut_mask = 16'hEE22; -defparam \inst|Selector64~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[61]~73 .lut_mask = 16'hA0CC; +defparam \inst|shifter|auto_generated|sbit_w[61]~73 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N23 -dffeas \inst|PC_stack[3][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector64~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[3][10]~q ), - .prn(vcc)); +// Location: LCCOMB_X56_Y37_N12 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[61]~74 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[61]~74_combout = (\inst|shifter|auto_generated|sbit_w[61]~73_combout ) # ((\inst|shifter|auto_generated|sbit_w[41]~50_combout & (!\inst|IR [4] & \inst|IR [2]))) + + .dataa(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[61]~73_combout ), + .datac(\inst|IR [4]), + .datad(\inst|IR [2]), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[61]~74_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[3][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][10] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[61]~74 .lut_mask = 16'hCECC; +defparam \inst|shifter|auto_generated|sbit_w[61]~74 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N10 -fiftyfivenm_lcell_comb \inst|Selector53~0 ( +// Location: LCCOMB_X56_Y37_N30 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[53]~75 ( // Equation(s): -// \inst|Selector53~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][10]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][10]~q )) +// \inst|shifter|auto_generated|sbit_w[53]~75_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|shifter|auto_generated|sbit_w[41]~50_combout )) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[53]~30_combout ))))) - .dataa(\inst|PC_stack[1][10]~q ), - .datab(\inst|state.ex_return~q ), - .datac(gnd), - .datad(\inst|PC_stack[3][10]~q ), + .dataa(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .datab(\inst|IR [2]), + .datac(\inst|IR [4]), + .datad(\inst|shifter|auto_generated|sbit_w[53]~30_combout ), .cin(gnd), - .combout(\inst|Selector53~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[53]~75_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector53~0 .lut_mask = 16'hEE22; -defparam \inst|Selector53~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[53]~75 .lut_mask = 16'h8C80; +defparam \inst|shifter|auto_generated|sbit_w[53]~75 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N11 -dffeas \inst|PC_stack[2][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector53~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[2][10]~q ), - .prn(vcc)); +// Location: LCCOMB_X56_Y37_N20 +fiftyfivenm_lcell_comb \inst|Selector22~0 ( +// Equation(s): +// \inst|Selector22~0_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[53]~75_combout ) # ((\inst|shifter|auto_generated|sbit_w[37]~39_combout & !\inst|IR [2])))) + + .dataa(\inst|shifter|auto_generated|sbit_w[53]~75_combout ), + .datab(\inst|Selector20~0_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), + .datad(\inst|IR [2]), + .cin(gnd), + .combout(\inst|Selector22~0_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[2][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][10] .power_up = "low"; +defparam \inst|Selector22~0 .lut_mask = 16'h88C8; +defparam \inst|Selector22~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N26 -fiftyfivenm_lcell_comb \inst|Selector42~0 ( +// Location: LCCOMB_X56_Y37_N22 +fiftyfivenm_lcell_comb \inst|Selector22~1 ( // Equation(s): -// \inst|Selector42~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][10]~q ))) +// \inst|Selector22~1_combout = (\inst|AC [5] & (((\inst|altsyncram_component|auto_generated|q_a [5] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst|PC_stack[2][10]~q ), - .datab(\inst|PC_stack[0][10]~q ), - .datac(gnd), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|AC [5]), + .datab(\inst|altsyncram_component|auto_generated|q_a [5]), + .datac(\inst|Selector27~6_combout ), + .datad(\inst|state.ex_and~q ), .cin(gnd), - .combout(\inst|Selector42~0_combout ), + .combout(\inst|Selector22~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector42~0 .lut_mask = 16'hAACC; -defparam \inst|Selector42~0 .sum_lutc_input = "datac"; +defparam \inst|Selector22~1 .lut_mask = 16'h8A0A; +defparam \inst|Selector22~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N27 -dffeas \inst|PC_stack[1][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector42~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[1][10]~q ), - .prn(vcc)); +// Location: LCCOMB_X56_Y37_N28 +fiftyfivenm_lcell_comb \inst|Selector22~2 ( +// Equation(s): +// \inst|Selector22~2_combout = (\inst|Selector22~0_combout ) # ((\inst|Selector22~1_combout ) # ((\inst|shifter|auto_generated|sbit_w[61]~74_combout & \inst|Selector27~4_combout ))) + + .dataa(\inst|shifter|auto_generated|sbit_w[61]~74_combout ), + .datab(\inst|Selector22~0_combout ), + .datac(\inst|Selector22~1_combout ), + .datad(\inst|Selector27~4_combout ), + .cin(gnd), + .combout(\inst|Selector22~2_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[1][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][10] .power_up = "low"; +defparam \inst|Selector22~2 .lut_mask = 16'hFEFC; +defparam \inst|Selector22~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N14 -fiftyfivenm_lcell_comb \inst|Selector31~0 ( +// Location: LCCOMB_X56_Y37_N14 +fiftyfivenm_lcell_comb \inst|Selector22~5 ( // Equation(s): -// \inst|Selector31~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][10]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [10]))) +// \inst|Selector22~5_combout = (\inst|Selector22~4_combout ) # ((\inst|Selector22~2_combout ) # ((\inst|AC[3]~0_combout & \inst|Add1~31_combout ))) - .dataa(\inst|PC_stack[1][10]~q ), - .datab(\inst|PC [10]), - .datac(gnd), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|Selector22~4_combout ), + .datab(\inst|Selector22~2_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Add1~31_combout ), .cin(gnd), - .combout(\inst|Selector31~0_combout ), + .combout(\inst|Selector22~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector31~0 .lut_mask = 16'hAACC; -defparam \inst|Selector31~0 .sum_lutc_input = "datac"; +defparam \inst|Selector22~5 .lut_mask = 16'hFEEE; +defparam \inst|Selector22~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N15 -dffeas \inst|PC_stack[0][10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector31~0_combout ), - .asdata(vcc), +// Location: IOIBUF_X49_Y54_N1 +fiftyfivenm_io_ibuf \SW[5]~input ( + .i(SW[5]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[5]~input_o )); +// synopsys translate_off +defparam \SW[5]~input .bus_hold = "false"; +defparam \SW[5]~input .listen_to_nsleep_signal = "false"; +defparam \SW[5]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X57_Y40_N3 +dffeas \inst7|B_DI[5] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[5]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][10]~q ), + .q(\inst7|B_DI [5]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][10] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][10] .power_up = "low"; +defparam \inst7|B_DI[5] .is_wysiwyg = "true"; +defparam \inst7|B_DI[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N2 -fiftyfivenm_lcell_comb \inst|Selector1~2 ( +// Location: LCCOMB_X57_Y40_N2 +fiftyfivenm_lcell_comb \inst13|inst1[5]~45 ( // Equation(s): -// \inst|Selector1~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][10]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector1~1_combout & ((\inst10|state.Init~q )))) +// \inst13|inst1[5]~45_combout = (\inst|AC [5] & (((\inst7|B_DI [5]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|AC [5] & (!\inst|IO_WRITE_int~q & ((\inst7|B_DI [5]) # (!\inst3|SWITCH_EN~combout )))) - .dataa(\inst|Selector1~1_combout ), - .datab(\inst|PC_stack[0][10]~q ), - .datac(\inst10|state.Init~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|AC [5]), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst7|B_DI [5]), + .datad(\inst3|SWITCH_EN~combout ), .cin(gnd), - .combout(\inst|Selector1~2_combout ), + .combout(\inst13|inst1[5]~45_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector1~2 .lut_mask = 16'hCCA0; -defparam \inst|Selector1~2 .sum_lutc_input = "datac"; +defparam \inst13|inst1[5]~45 .lut_mask = 16'hB0BB; +defparam \inst13|inst1[5]~45 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N3 -dffeas \inst|PC[10] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector1~2_combout ), +// Location: LCCOMB_X59_Y36_N24 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[5]~7 ( +// Equation(s): +// \inst13|inst14|data_out[5]~7_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst|data_rd [5] & \inst13|inst14|state.Rx1~q ))) + + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst|data_rd [5]), + .datad(\inst13|inst14|state.Rx1~q ), + .cin(gnd), + .combout(\inst13|inst14|data_out[5]~7_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst14|data_out[5]~7 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[5]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X59_Y36_N25 +dffeas \inst13|inst14|data_out[5] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[5]~7_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [10]), + .q(\inst13|inst14|data_out [5]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[10] .is_wysiwyg = "true"; -defparam \inst|PC[10] .power_up = "low"; +defparam \inst13|inst14|data_out[5] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N22 -fiftyfivenm_lcell_comb \inst|next_mem_addr[10]~10 ( +// Location: LCCOMB_X59_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst1[5]~44 ( // Equation(s): -// \inst|next_mem_addr[10]~10_combout = (\inst|Selector1~0_combout ) # ((\inst|state.fetch~q & \inst|PC [10])) +// \inst13|inst1[5]~44_combout = ((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [5])) # (!\inst3|I2C_DATA_EN~combout ) - .dataa(\inst|Selector1~0_combout ), - .datab(\inst|state.fetch~q ), - .datac(gnd), - .datad(\inst|PC [10]), + .dataa(gnd), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst13|inst14|data_out [5]), .cin(gnd), - .combout(\inst|next_mem_addr[10]~10_combout ), + .combout(\inst13|inst1[5]~44_combout ), .cout()); // synopsys translate_off -defparam \inst|next_mem_addr[10]~10 .lut_mask = 16'hEEAA; -defparam \inst|next_mem_addr[10]~10 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y43_N3 -dffeas \inst|IR[9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [9]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|IR [9]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|IR[9] .is_wysiwyg = "true"; -defparam \inst|IR[9] .power_up = "low"; +defparam \inst13|inst1[5]~44 .lut_mask = 16'hFFF3; +defparam \inst13|inst1[5]~44 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N18 -fiftyfivenm_lcell_comb \inst|Selector2~0 ( +// Location: LCCOMB_X59_Y40_N22 +fiftyfivenm_lcell_comb \inst13|inst1[5]~46 ( // Equation(s): -// \inst|Selector2~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [9]))) # (!\inst|WideNor0~combout & (\inst|IR [9])))) +// \inst13|inst1[5]~46_combout = (\inst13|inst1[5]~45_combout & (\inst13|inst1[5]~44_combout & ((\inst11|count [5]) # (!\inst11|tri_enable~combout )))) - .dataa(\inst|IR [9]), - .datab(\inst|state.fetch~q ), - .datac(\inst|WideNor0~combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [9]), + .dataa(\inst11|tri_enable~combout ), + .datab(\inst13|inst1[5]~45_combout ), + .datac(\inst13|inst1[5]~44_combout ), + .datad(\inst11|count [5]), .cin(gnd), - .combout(\inst|Selector2~0_combout ), + .combout(\inst13|inst1[5]~46_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector2~0 .lut_mask = 16'h3202; -defparam \inst|Selector2~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[5]~46 .lut_mask = 16'hC040; +defparam \inst13|inst1[5]~46 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N4 -fiftyfivenm_lcell_comb \inst|Selector2~1 ( +// Location: LCCOMB_X59_Y40_N10 +fiftyfivenm_lcell_comb \inst13|inst1[5]~100 ( // Equation(s): -// \inst|Selector2~1_combout = (\inst|Selector2~0_combout ) # ((\inst|Add0~18_combout & \inst|state.fetch~q )) +// \inst13|inst1[5]~100_combout = (!\inst13|inst4~combout & ((\inst10|count [5]) # ((\inst|IR [0]) # (!\inst11|tri_enable~1_combout )))) - .dataa(\inst|Add0~18_combout ), - .datab(gnd), - .datac(\inst|state.fetch~q ), - .datad(\inst|Selector2~0_combout ), + .dataa(\inst10|count [5]), + .datab(\inst13|inst4~combout ), + .datac(\inst11|tri_enable~1_combout ), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector2~1_combout ), + .combout(\inst13|inst1[5]~100_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector2~1 .lut_mask = 16'hFFA0; -defparam \inst|Selector2~1 .sum_lutc_input = "datac"; +defparam \inst13|inst1[5]~100 .lut_mask = 16'h3323; +defparam \inst13|inst1[5]~100 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y40_N13 -dffeas \inst|PC_stack[9][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|PC_stack[8][9]~q ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|PC_stack[9][0]~1_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[9][9]~q ), - .prn(vcc)); +// Location: LCCOMB_X59_Y40_N18 +fiftyfivenm_lcell_comb \inst13|inst1[5]~47 ( +// Equation(s): +// \inst13|inst1[5]~47_combout = (\inst13|inst1[5]~46_combout & (\inst13|inst1[5]~100_combout & ((\inst4|COUNT [5]) # (!\inst4|IO_OUT~combout )))) + + .dataa(\inst13|inst1[5]~46_combout ), + .datab(\inst4|IO_OUT~combout ), + .datac(\inst13|inst1[5]~100_combout ), + .datad(\inst4|COUNT [5]), + .cin(gnd), + .combout(\inst13|inst1[5]~47_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][9] .power_up = "low"; +defparam \inst13|inst1[5]~47 .lut_mask = 16'hA020; +defparam \inst13|inst1[5]~47 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N24 -fiftyfivenm_lcell_comb \inst|Selector120~0 ( +// Location: LCCOMB_X59_Y40_N30 +fiftyfivenm_lcell_comb \inst|Selector22~6 ( // Equation(s): -// \inst|Selector120~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][9]~q )) +// \inst|Selector22~6_combout = (\inst|Selector22~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[5]~47_combout ) # (!\inst13|inst1[0]~24_combout )))) - .dataa(\inst|PC_stack[7][9]~q ), - .datab(\inst|state.ex_return~q ), - .datac(gnd), - .datad(\inst|PC_stack[9][9]~q ), + .dataa(\inst|Selector22~5_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst|state.ex_in2~q ), + .datad(\inst13|inst1[5]~47_combout ), .cin(gnd), - .combout(\inst|Selector120~0_combout ), + .combout(\inst|Selector22~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector120~0 .lut_mask = 16'hEE22; -defparam \inst|Selector120~0 .sum_lutc_input = "datac"; +defparam \inst|Selector22~6 .lut_mask = 16'hFABA; +defparam \inst|Selector22~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N25 -dffeas \inst|PC_stack[8][9] ( +// Location: FF_X59_Y40_N31 +dffeas \inst|AC[5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector120~0_combout ), + .d(\inst|Selector22~6_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][9]~q ), + .q(\inst|AC [5]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][9] .power_up = "low"; +defparam \inst|AC[5] .is_wysiwyg = "true"; +defparam \inst|AC[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N30 -fiftyfivenm_lcell_comb \inst|Selector109~0 ( +// Location: LCCOMB_X58_Y37_N28 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[20]~12 ( // Equation(s): -// \inst|Selector109~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][9]~q )) +// \inst|shifter|auto_generated|sbit_w[20]~12_combout = (\inst|IR [0] & ((\inst|IR [4] & (\inst|AC [5])) # (!\inst|IR [4] & ((\inst|AC [3]))))) - .dataa(gnd), - .datab(\inst|PC_stack[6][9]~q ), - .datac(\inst|PC_stack[8][9]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|IR [4]), + .datab(\inst|IR [0]), + .datac(\inst|AC [5]), + .datad(\inst|AC [3]), .cin(gnd), - .combout(\inst|Selector109~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[20]~12_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector109~0 .lut_mask = 16'hF0CC; -defparam \inst|Selector109~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[20]~12 .lut_mask = 16'hC480; +defparam \inst|shifter|auto_generated|sbit_w[20]~12 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N31 -dffeas \inst|PC_stack[7][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector109~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[7][9]~q ), - .prn(vcc)); +// Location: LCCOMB_X57_Y34_N28 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[34]~53 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[34]~53_combout = (\inst3|I2C_RDY_EN~0_combout & ((\inst|shifter|auto_generated|sbit_w[20]~12_combout ) # ((!\inst|IR [0] & \inst|AC [4])))) + + .dataa(\inst|IR [0]), + .datab(\inst|shifter|auto_generated|sbit_w[20]~12_combout ), + .datac(\inst|AC [4]), + .datad(\inst3|I2C_RDY_EN~0_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[34]~53_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[7][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][9] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[34]~53 .lut_mask = 16'hDC00; +defparam \inst|shifter|auto_generated|sbit_w[34]~53 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N0 -fiftyfivenm_lcell_comb \inst|Selector98~0 ( +// Location: LCCOMB_X57_Y34_N30 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[34]~54 ( // Equation(s): -// \inst|Selector98~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][9]~q ))) +// \inst|shifter|auto_generated|sbit_w[34]~54_combout = (!\inst|IR [4] & (\inst|AC [0] & (\inst|IR [1] & !\inst|IR [0]))) - .dataa(\inst|PC_stack[7][9]~q ), - .datab(\inst|state.ex_return~q ), - .datac(gnd), - .datad(\inst|PC_stack[5][9]~q ), + .dataa(\inst|IR [4]), + .datab(\inst|AC [0]), + .datac(\inst|IR [1]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector98~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[34]~54_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector98~0 .lut_mask = 16'hBB88; -defparam \inst|Selector98~0 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[34]~54 .lut_mask = 16'h0040; +defparam \inst|shifter|auto_generated|sbit_w[34]~54 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N1 -dffeas \inst|PC_stack[6][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector98~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[6][9]~q ), - .prn(vcc)); +// Location: LCCOMB_X57_Y34_N16 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[34]~55 ( +// Equation(s): +// \inst|shifter|auto_generated|sbit_w[34]~55_combout = (\inst|shifter|auto_generated|sbit_w[34]~53_combout ) # ((\inst|shifter|auto_generated|sbit_w[34]~54_combout ) # ((!\inst|IR [1] & \inst|shifter|auto_generated|sbit_w[18]~7_combout ))) + + .dataa(\inst|IR [1]), + .datab(\inst|shifter|auto_generated|sbit_w[34]~53_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[18]~7_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[34]~54_combout ), + .cin(gnd), + .combout(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[6][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][9] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[34]~55 .lut_mask = 16'hFFDC; +defparam \inst|shifter|auto_generated|sbit_w[34]~55 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N18 -fiftyfivenm_lcell_comb \inst|Selector87~0 ( +// Location: LCCOMB_X58_Y35_N22 +fiftyfivenm_lcell_comb \inst|Selector25~6 ( // Equation(s): -// \inst|Selector87~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][9]~q )) +// \inst|Selector25~6_combout = (\inst|IR [2] & (\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[38]~52_combout )))) # (!\inst|IR [2] & (((\inst|shifter|auto_generated|sbit_w[34]~55_combout )))) - .dataa(gnd), - .datab(\inst|PC_stack[4][9]~q ), - .datac(\inst|PC_stack[6][9]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|IR [4]), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), .cin(gnd), - .combout(\inst|Selector87~0_combout ), + .combout(\inst|Selector25~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector87~0 .lut_mask = 16'hF0CC; -defparam \inst|Selector87~0 .sum_lutc_input = "datac"; +defparam \inst|Selector25~6 .lut_mask = 16'hB830; +defparam \inst|Selector25~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N19 -dffeas \inst|PC_stack[5][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector87~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[5][9]~q ), - .prn(vcc)); +// Location: LCCOMB_X57_Y40_N24 +fiftyfivenm_lcell_comb \inst|Selector25~7 ( +// Equation(s): +// \inst|Selector25~7_combout = (\inst|Selector25~5_combout ) # ((\inst|Selector25~2_combout ) # ((\inst|Selector20~0_combout & \inst|Selector25~6_combout ))) + + .dataa(\inst|Selector25~5_combout ), + .datab(\inst|Selector25~2_combout ), + .datac(\inst|Selector20~0_combout ), + .datad(\inst|Selector25~6_combout ), + .cin(gnd), + .combout(\inst|Selector25~7_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[5][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][9] .power_up = "low"; +defparam \inst|Selector25~7 .lut_mask = 16'hFEEE; +defparam \inst|Selector25~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N28 -fiftyfivenm_lcell_comb \inst|Selector76~0 ( +// Location: LCCOMB_X58_Y35_N8 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[58]~60 ( // Equation(s): -// \inst|Selector76~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][9]~q )) +// \inst|shifter|auto_generated|sbit_w[58]~60_combout = (\inst|shifter|auto_generated|sbit_w[58]~57_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[42]~59_combout )) .dataa(gnd), - .datab(\inst|state.ex_return~q ), - .datac(\inst|PC_stack[3][9]~q ), - .datad(\inst|PC_stack[5][9]~q ), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[58]~57_combout ), .cin(gnd), - .combout(\inst|Selector76~0_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[58]~60_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector76~0 .lut_mask = 16'hFC30; -defparam \inst|Selector76~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X54_Y38_N29 -dffeas \inst|PC_stack[4][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector76~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[4][9]~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|PC_stack[4][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][9] .power_up = "low"; +defparam \inst|shifter|auto_generated|sbit_w[58]~60 .lut_mask = 16'hFF30; +defparam \inst|shifter|auto_generated|sbit_w[58]~60 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N4 -fiftyfivenm_lcell_comb \inst|Selector65~0 ( +// Location: LCCOMB_X60_Y38_N16 +fiftyfivenm_lcell_comb \inst|Selector25~0 ( // Equation(s): -// \inst|Selector65~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][9]~q ))) +// \inst|Selector25~0_combout = (\inst|state.ex_in2~q & ((\inst11|count [2]) # ((!\inst11|tri_enable~combout ) # (!\inst13|inst1[0]~24_combout )))) - .dataa(gnd), - .datab(\inst|PC_stack[4][9]~q ), - .datac(\inst|PC_stack[2][9]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|state.ex_in2~q ), + .datab(\inst11|count [2]), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst11|tri_enable~combout ), .cin(gnd), - .combout(\inst|Selector65~0_combout ), + .combout(\inst|Selector25~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector65~0 .lut_mask = 16'hCCF0; -defparam \inst|Selector65~0 .sum_lutc_input = "datac"; +defparam \inst|Selector25~0 .lut_mask = 16'h8AAA; +defparam \inst|Selector25~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N5 -dffeas \inst|PC_stack[3][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector65~0_combout ), - .asdata(vcc), +// Location: IOIBUF_X51_Y54_N1 +fiftyfivenm_io_ibuf \SW[2]~input ( + .i(SW[2]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[2]~input_o )); +// synopsys translate_off +defparam \SW[2]~input .bus_hold = "false"; +defparam \SW[2]~input .listen_to_nsleep_signal = "false"; +defparam \SW[2]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X61_Y38_N31 +dffeas \inst7|B_DI[2] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[2]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][9]~q ), + .q(\inst7|B_DI [2]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][9] .power_up = "low"; +defparam \inst7|B_DI[2] .is_wysiwyg = "true"; +defparam \inst7|B_DI[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N20 -fiftyfivenm_lcell_comb \inst|Selector54~0 ( +// Location: LCCOMB_X61_Y38_N30 +fiftyfivenm_lcell_comb \inst13|inst1[2]~32 ( // Equation(s): -// \inst|Selector54~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][9]~q )) +// \inst13|inst1[2]~32_combout = (\inst|IO_WRITE_int~q & (\inst|AC [2] & ((\inst7|B_DI [2]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [2])) # (!\inst3|SWITCH_EN~combout ))) - .dataa(gnd), - .datab(\inst|PC_stack[1][9]~q ), - .datac(\inst|PC_stack[3][9]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|SWITCH_EN~combout ), + .datac(\inst7|B_DI [2]), + .datad(\inst|AC [2]), .cin(gnd), - .combout(\inst|Selector54~0_combout ), + .combout(\inst13|inst1[2]~32_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector54~0 .lut_mask = 16'hF0CC; -defparam \inst|Selector54~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[2]~32 .lut_mask = 16'hF351; +defparam \inst13|inst1[2]~32 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N21 -dffeas \inst|PC_stack[2][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector54~0_combout ), +// Location: LCCOMB_X60_Y36_N12 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[2]~4 ( +// Equation(s): +// \inst13|inst14|data_out[2]~4_combout = (\inst13|inst14|state.Rx1~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [2]))) + + .dataa(\inst13|inst14|state.Rx1~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [2]), + .cin(gnd), + .combout(\inst13|inst14|data_out[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst14|data_out[2]~4 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X60_Y36_N13 +dffeas \inst13|inst14|data_out[2] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[2]~4_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][9]~q ), + .q(\inst13|inst14|data_out [2]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][9] .power_up = "low"; +defparam \inst13|inst14|data_out[2] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N8 -fiftyfivenm_lcell_comb \inst|Selector43~0 ( +// Location: LCCOMB_X61_Y38_N26 +fiftyfivenm_lcell_comb \inst13|inst1[2]~33 ( // Equation(s): -// \inst|Selector43~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][9]~q )) +// \inst13|inst1[2]~33_combout = (\inst13|inst1[2]~32_combout & (((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [2])) # (!\inst3|I2C_DATA_EN~combout ))) - .dataa(\inst|PC_stack[0][9]~q ), - .datab(\inst|PC_stack[2][9]~q ), - .datac(gnd), - .datad(\inst|state.ex_return~q ), + .dataa(\inst3|I2C_DATA_EN~combout ), + .datab(\inst13|inst1[2]~32_combout ), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst13|inst14|data_out [2]), .cin(gnd), - .combout(\inst|Selector43~0_combout ), + .combout(\inst13|inst1[2]~33_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector43~0 .lut_mask = 16'hCCAA; -defparam \inst|Selector43~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[2]~33 .lut_mask = 16'hCCC4; +defparam \inst13|inst1[2]~33 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N9 -dffeas \inst|PC_stack[1][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector43~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[1][9]~q ), - .prn(vcc)); +// Location: LCCOMB_X61_Y38_N22 +fiftyfivenm_lcell_comb \inst4|IO_BUS|dout[2]~0 ( +// Equation(s): +// \inst4|IO_BUS|dout[2]~0_combout = (\inst|IO_WRITE_int~q ) # (((\inst4|COUNT [2]) # (!\inst3|TIMER_EN~2_combout )) # (!\inst3|TIMER_EN~1_combout )) + + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst3|TIMER_EN~1_combout ), + .datac(\inst4|COUNT [2]), + .datad(\inst3|TIMER_EN~2_combout ), + .cin(gnd), + .combout(\inst4|IO_BUS|dout[2]~0_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[1][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][9] .power_up = "low"; +defparam \inst4|IO_BUS|dout[2]~0 .lut_mask = 16'hFBFF; +defparam \inst4|IO_BUS|dout[2]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N12 -fiftyfivenm_lcell_comb \inst|Selector32~0 ( +// Location: LCCOMB_X61_Y38_N28 +fiftyfivenm_lcell_comb \inst13|inst1[2]~31 ( // Equation(s): -// \inst|Selector32~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [9])) +// \inst13|inst1[2]~31_combout = (\inst4|IO_BUS|dout[2]~0_combout & (!\inst13|inst4~combout & ((\inst10|count [2]) # (!\inst10|tri_enable~combout )))) - .dataa(gnd), - .datab(\inst|PC [9]), - .datac(\inst|PC_stack[1][9]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst4|IO_BUS|dout[2]~0_combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst10|tri_enable~combout ), + .datad(\inst10|count [2]), .cin(gnd), - .combout(\inst|Selector32~0_combout ), + .combout(\inst13|inst1[2]~31_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector32~0 .lut_mask = 16'hF0CC; -defparam \inst|Selector32~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[2]~31 .lut_mask = 16'h2202; +defparam \inst13|inst1[2]~31 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N13 -dffeas \inst|PC_stack[0][9] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector32~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[0][9]~q ), - .prn(vcc)); +// Location: LCCOMB_X61_Y38_N6 +fiftyfivenm_lcell_comb \inst|Selector25~1 ( +// Equation(s): +// \inst|Selector25~1_combout = (\inst|Selector25~0_combout & (((\inst13|inst1[2]~33_combout & \inst13|inst1[2]~31_combout )) # (!\inst13|inst1[0]~24_combout ))) + + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst|Selector25~0_combout ), + .datac(\inst13|inst1[2]~33_combout ), + .datad(\inst13|inst1[2]~31_combout ), + .cin(gnd), + .combout(\inst|Selector25~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[0][9] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][9] .power_up = "low"; +defparam \inst|Selector25~1 .lut_mask = 16'hC444; +defparam \inst|Selector25~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y38_N16 -fiftyfivenm_lcell_comb \inst|Selector2~2 ( +// Location: LCCOMB_X61_Y38_N24 +fiftyfivenm_lcell_comb \inst|Selector25~8 ( // Equation(s): -// \inst|Selector2~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][9]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector2~1_combout ))) +// \inst|Selector25~8_combout = (\inst|Selector25~7_combout ) # ((\inst|Selector25~1_combout ) # ((\inst|Selector27~4_combout & \inst|shifter|auto_generated|sbit_w[58]~60_combout ))) - .dataa(\inst10|state.Init~q ), - .datab(\inst|state.ex_return~q ), - .datac(\inst|Selector2~1_combout ), - .datad(\inst|PC_stack[0][9]~q ), + .dataa(\inst|Selector25~7_combout ), + .datab(\inst|Selector27~4_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[58]~60_combout ), + .datad(\inst|Selector25~1_combout ), .cin(gnd), - .combout(\inst|Selector2~2_combout ), + .combout(\inst|Selector25~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector2~2 .lut_mask = 16'hEC20; -defparam \inst|Selector2~2 .sum_lutc_input = "datac"; +defparam \inst|Selector25~8 .lut_mask = 16'hFFEA; +defparam \inst|Selector25~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y38_N17 -dffeas \inst|PC[9] ( +// Location: FF_X61_Y38_N25 +dffeas \inst|AC[2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector2~2_combout ), + .d(\inst|Selector25~8_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [9]), + .q(\inst|AC [2]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[9] .is_wysiwyg = "true"; -defparam \inst|PC[9] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y40_N28 -fiftyfivenm_lcell_comb \inst|next_mem_addr[9]~9 ( -// Equation(s): -// \inst|next_mem_addr[9]~9_combout = (\inst|Selector2~0_combout ) # ((\inst|PC [9] & \inst|state.fetch~q )) - - .dataa(\inst|PC [9]), - .datab(gnd), - .datac(\inst|state.fetch~q ), - .datad(\inst|Selector2~0_combout ), - .cin(gnd), - .combout(\inst|next_mem_addr[9]~9_combout ), - .cout()); -// synopsys translate_off -defparam \inst|next_mem_addr[9]~9 .lut_mask = 16'hFFA0; -defparam \inst|next_mem_addr[9]~9 .sum_lutc_input = "datac"; +defparam \inst|AC[2] .is_wysiwyg = "true"; +defparam \inst|AC[2] .power_up = "low"; // synopsys translate_on -// Location: M9K_X53_Y42_N0 +// Location: M9K_X53_Y41_N0 fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a0 ( .portawe(\inst|MW~q ), .portare(vcc), @@ -18314,7 +18474,7 @@ fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a0 ( .ena3(vcc), .clr0(gnd), .clr1(gnd), - .portadatain({\inst|AC [8],\inst|AC [6],\inst|AC [3],\inst|AC [0]}), + .portadatain({\inst|AC [10],\inst|AC [7],\inst|AC [2],\inst|AC [0]}), .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , \inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), .portabyteenamasks(1'b1), @@ -18350,1295 +18510,1315 @@ defparam \inst|altsyncram_component|auto_generated|ram_block1a0 .ram_block_type defparam \inst|altsyncram_component|auto_generated|ram_block1a0 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; defparam \inst|altsyncram_component|auto_generated|ram_block1a0 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; defparam \inst|altsyncram_component|auto_generated|ram_block1a0 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a0 .mem_init0 = 2048'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000023301F001113101320051001E00035113500205101302; -// synopsys translate_on - -// Location: FF_X50_Y43_N9 -dffeas \inst|IR[8] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [8]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|IR [8]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|IR[8] .is_wysiwyg = "true"; -defparam \inst|IR[8] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y40_N22 -fiftyfivenm_lcell_comb \inst|Selector3~0 ( -// Equation(s): -// \inst|Selector3~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [8]))) # (!\inst|WideNor0~combout & (\inst|IR [8])))) - - .dataa(\inst|IR [8]), - .datab(\inst|state.fetch~q ), - .datac(\inst|WideNor0~combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [8]), - .cin(gnd), - .combout(\inst|Selector3~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector3~0 .lut_mask = 16'h3202; -defparam \inst|Selector3~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y40_N12 -fiftyfivenm_lcell_comb \inst|next_mem_addr[8]~8 ( -// Equation(s): -// \inst|next_mem_addr[8]~8_combout = (\inst|Selector3~0_combout ) # ((\inst|state.fetch~q & \inst|PC [8])) - - .dataa(\inst|Selector3~0_combout ), - .datab(gnd), - .datac(\inst|state.fetch~q ), - .datad(\inst|PC [8]), - .cin(gnd), - .combout(\inst|next_mem_addr[8]~8_combout ), - .cout()); -// synopsys translate_off -defparam \inst|next_mem_addr[8]~8 .lut_mask = 16'hFAAA; -defparam \inst|next_mem_addr[8]~8 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y43_N17 -dffeas \inst|IR[6] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [6]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|IR [6]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|IR[6] .is_wysiwyg = "true"; -defparam \inst|IR[6] .power_up = "low"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a0 .mem_init0 = 2048'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000021301F001313123302051001F000253225020103322; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N2 -fiftyfivenm_lcell_comb \inst|Selector5~0 ( +// Location: LCCOMB_X54_Y41_N28 +fiftyfivenm_lcell_comb \inst|Selector1~0 ( // Equation(s): -// \inst|Selector5~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [6]))) # (!\inst|WideNor0~combout & (\inst|IR [6])))) +// \inst|Selector1~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [10])) # (!\inst|WideNor0~combout & ((\inst|IR [10]))))) - .dataa(\inst|IR [6]), - .datab(\inst|WideNor0~combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [10]), + .datab(\inst|IR [10]), .datac(\inst|state.fetch~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [6]), - .cin(gnd), - .combout(\inst|Selector5~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector5~0 .lut_mask = 16'h0E02; -defparam \inst|Selector5~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y40_N28 -fiftyfivenm_lcell_comb \inst|next_mem_addr[6]~6 ( -// Equation(s): -// \inst|next_mem_addr[6]~6_combout = (\inst|Selector5~0_combout ) # ((\inst|PC [6] & \inst|state.fetch~q )) - - .dataa(\inst|Selector5~0_combout ), - .datab(\inst|PC [6]), - .datac(gnd), - .datad(\inst|state.fetch~q ), + .datad(\inst|WideNor0~combout ), .cin(gnd), - .combout(\inst|next_mem_addr[6]~6_combout ), + .combout(\inst|Selector1~0_combout ), .cout()); // synopsys translate_off -defparam \inst|next_mem_addr[6]~6 .lut_mask = 16'hEEAA; -defparam \inst|next_mem_addr[6]~6 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y43_N31 -dffeas \inst|IR[0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [0]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|IR [0]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|IR[0] .is_wysiwyg = "true"; -defparam \inst|IR[0] .power_up = "low"; +defparam \inst|Selector1~0 .lut_mask = 16'h0A0C; +defparam \inst|Selector1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N10 -fiftyfivenm_lcell_comb \inst3|PWM_EN~0 ( +// Location: LCCOMB_X54_Y41_N10 +fiftyfivenm_lcell_comb \inst|Selector1~1 ( // Equation(s): -// \inst3|PWM_EN~0_combout = (!\inst|IR [4] & (!\inst|IR [7] & !\inst|IR [1])) +// \inst|Selector1~1_combout = (\inst|Selector1~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~20_combout )) .dataa(gnd), - .datab(\inst|IR [4]), - .datac(\inst|IR [7]), - .datad(\inst|IR [1]), - .cin(gnd), - .combout(\inst3|PWM_EN~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst3|PWM_EN~0 .lut_mask = 16'h0003; -defparam \inst3|PWM_EN~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y43_N22 -fiftyfivenm_lcell_comb \inst3|SWITCH_EN~1 ( -// Equation(s): -// \inst3|SWITCH_EN~1_combout = (!\inst|IR [5] & (!\inst|IR [6] & (!\inst|IR [3] & \inst3|SWITCH_EN~0_combout ))) - - .dataa(\inst|IR [5]), - .datab(\inst|IR [6]), - .datac(\inst|IR [3]), - .datad(\inst3|SWITCH_EN~0_combout ), - .cin(gnd), - .combout(\inst3|SWITCH_EN~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst3|SWITCH_EN~1 .lut_mask = 16'h0100; -defparam \inst3|SWITCH_EN~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y43_N0 -fiftyfivenm_lcell_comb \inst3|SWITCH_EN ( -// Equation(s): -// \inst3|SWITCH_EN~combout = LCELL((!\inst|IR [0] & (\inst3|PWM_EN~0_combout & (\inst3|SWITCH_EN~1_combout & !\inst|IR [2])))) - - .dataa(\inst|IR [0]), - .datab(\inst3|PWM_EN~0_combout ), - .datac(\inst3|SWITCH_EN~1_combout ), - .datad(\inst|IR [2]), + .datab(\inst|state.fetch~q ), + .datac(\inst|Add0~20_combout ), + .datad(\inst|Selector1~0_combout ), .cin(gnd), - .combout(\inst3|SWITCH_EN~combout ), + .combout(\inst|Selector1~1_combout ), .cout()); // synopsys translate_off -defparam \inst3|SWITCH_EN .lut_mask = 16'h0040; -defparam \inst3|SWITCH_EN .sum_lutc_input = "datac"; +defparam \inst|Selector1~1 .lut_mask = 16'hFFC0; +defparam \inst|Selector1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y43_N28 -fiftyfivenm_lcell_comb \inst4|COUNT[15]~43 ( +// Location: LCCOMB_X54_Y41_N14 +fiftyfivenm_lcell_comb \inst|Selector1~2 ( // Equation(s): -// \inst4|COUNT[15]~43_combout = \inst4|COUNT[14]~42 $ (!\inst4|COUNT [15]) +// \inst|Selector1~2_combout = (\inst|state.ex_return~q & (\inst|PC_stack[0][10]~q )) # (!\inst|state.ex_return~q & (((\inst10|state.Init~q & \inst|Selector1~1_combout )))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst4|COUNT [15]), - .cin(\inst4|COUNT[14]~42 ), - .combout(\inst4|COUNT[15]~43_combout ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|PC_stack[0][10]~q ), + .datac(\inst10|state.Init~q ), + .datad(\inst|Selector1~1_combout ), + .cin(gnd), + .combout(\inst|Selector1~2_combout ), .cout()); // synopsys translate_off -defparam \inst4|COUNT[15]~43 .lut_mask = 16'hF00F; -defparam \inst4|COUNT[15]~43 .sum_lutc_input = "cin"; +defparam \inst|Selector1~2 .lut_mask = 16'hD888; +defparam \inst|Selector1~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y43_N29 -dffeas \inst4|COUNT[15] ( - .clk(\inst5|clock_10Hz~clkctrl_outclk ), - .d(\inst4|COUNT[15]~43_combout ), +// Location: FF_X54_Y41_N15 +dffeas \inst|PC[10] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector1~2_combout ), .asdata(vcc), - .clrn(!\inst4|process_0~0_combout ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst4|COUNT [15]), + .q(\inst|PC [10]), .prn(vcc)); // synopsys translate_off -defparam \inst4|COUNT[15] .is_wysiwyg = "true"; -defparam \inst4|COUNT[15] .power_up = "low"; +defparam \inst|PC[10] .is_wysiwyg = "true"; +defparam \inst|PC[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N22 -fiftyfivenm_lcell_comb \inst13|inst1[15]~86 ( +// Location: LCCOMB_X54_Y41_N16 +fiftyfivenm_lcell_comb \inst|next_mem_addr[10]~10 ( // Equation(s): -// \inst13|inst1[15]~86_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [15]) # (!\inst4|IO_OUT~combout )))) +// \inst|next_mem_addr[10]~10_combout = (\inst|Selector1~0_combout ) # ((\inst|state.fetch~q & \inst|PC [10])) - .dataa(\inst13|inst4~combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst3|SWITCH_EN~combout ), - .datad(\inst4|COUNT [15]), + .dataa(gnd), + .datab(\inst|state.fetch~q ), + .datac(\inst|PC [10]), + .datad(\inst|Selector1~0_combout ), .cin(gnd), - .combout(\inst13|inst1[15]~86_combout ), + .combout(\inst|next_mem_addr[10]~10_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[15]~86 .lut_mask = 16'h0501; -defparam \inst13|inst1[15]~86 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[10]~10 .lut_mask = 16'hFFC0; +defparam \inst|next_mem_addr[10]~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N8 -fiftyfivenm_lcell_comb \inst|Selector12~0 ( +// Location: M9K_X53_Y40_N0 +fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a3 ( + .portawe(\inst|MW~q ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(gnd), + .ena0(vcc), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\inst|AC [9],\inst|AC [8],\inst|AC [6],\inst|AC [3]}), + .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , +\inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), + .portabyteenamasks(1'b1), + .portbdatain(4'b0000), + .portbaddr(11'b00000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\inst|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .data_interleave_offset_in_bits = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .data_interleave_width_in_bits = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .init_file = "VelocityControl.mif"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .init_file_layout = "port_a"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .logical_ram_name = "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .operation_mode = "single_port"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_address_clear = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_address_width = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_byte_enable_clock = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_data_out_clear = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_data_out_clock = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_data_width = 4; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_first_address = 0; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_first_bit_number = 3; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_last_address = 2047; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_logical_ram_depth = 2048; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_logical_ram_width = 16; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_b_address_width = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .port_b_data_width = 4; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .ram_block_type = "M9K"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a3 .mem_init0 = 2048'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000091100F000001000110020000F000120102001000000; +// synopsys translate_on + +// Location: LCCOMB_X58_Y38_N10 +fiftyfivenm_lcell_comb \inst|Selector2~0 ( // Equation(s): -// \inst|Selector12~0_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[55]~77_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[39]~61_combout )))) +// \inst|Selector2~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [9])) # (!\inst|WideNor0~combout & ((\inst|IR [9]))))) - .dataa(\inst|shifter|auto_generated|sbit_w[55]~77_combout ), - .datab(\inst|Selector19~4_combout ), - .datac(\inst|IR [2]), - .datad(\inst|shifter|auto_generated|sbit_w[39]~61_combout ), + .dataa(\inst|state.fetch~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [9]), + .datac(\inst|IR [9]), + .datad(\inst|WideNor0~combout ), .cin(gnd), - .combout(\inst|Selector12~0_combout ), + .combout(\inst|Selector2~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~0 .lut_mask = 16'h8C88; -defparam \inst|Selector12~0 .sum_lutc_input = "datac"; +defparam \inst|Selector2~0 .lut_mask = 16'h4450; +defparam \inst|Selector2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N0 -fiftyfivenm_lcell_comb \inst|Selector12~4 ( +// Location: LCCOMB_X54_Y40_N2 +fiftyfivenm_lcell_comb \inst|Selector2~1 ( // Equation(s): -// \inst|Selector12~4_combout = (\inst|altsyncram_component|auto_generated|q_a [15] & ((\inst|state.ex_and~q ) # ((\inst|IR [4] & \inst|state.ex_shift~q )))) # (!\inst|altsyncram_component|auto_generated|q_a [15] & (((\inst|IR [4] & \inst|state.ex_shift~q -// )))) +// \inst|Selector2~1_combout = (\inst|Selector2~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~18_combout )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [15]), - .datab(\inst|state.ex_and~q ), - .datac(\inst|IR [4]), - .datad(\inst|state.ex_shift~q ), + .dataa(\inst|state.fetch~q ), + .datab(gnd), + .datac(\inst|Selector2~0_combout ), + .datad(\inst|Add0~18_combout ), .cin(gnd), - .combout(\inst|Selector12~4_combout ), + .combout(\inst|Selector2~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~4 .lut_mask = 16'hF888; -defparam \inst|Selector12~4 .sum_lutc_input = "datac"; +defparam \inst|Selector2~1 .lut_mask = 16'hFAF0; +defparam \inst|Selector2~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N26 -fiftyfivenm_lcell_comb \inst|Selector12~5 ( +// Location: LCCOMB_X58_Y41_N10 +fiftyfivenm_lcell_comb \inst|PC_stack[9][9]~feeder ( // Equation(s): -// \inst|Selector12~5_combout = (\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [15] $ (\inst|AC [15]))) +// \inst|PC_stack[9][9]~feeder_combout = \inst|PC_stack[8][9]~q - .dataa(\inst|altsyncram_component|auto_generated|q_a [15]), + .dataa(gnd), .datab(gnd), - .datac(\inst|state.ex_xor~q ), - .datad(\inst|AC [15]), + .datac(gnd), + .datad(\inst|PC_stack[8][9]~q ), .cin(gnd), - .combout(\inst|Selector12~5_combout ), + .combout(\inst|PC_stack[9][9]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~5 .lut_mask = 16'h50A0; -defparam \inst|Selector12~5 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][9]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][9]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N16 -fiftyfivenm_lcell_comb \inst|Add1~78 ( -// Equation(s): -// \inst|Add1~78_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [15]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [15])) - - .dataa(\inst|state.ex_add~q ), - .datab(\inst|state.ex_sub~q ), - .datac(gnd), - .datad(\inst|altsyncram_component|auto_generated|q_a [15]), - .cin(gnd), - .combout(\inst|Add1~78_combout ), - .cout()); +// Location: FF_X58_Y41_N11 +dffeas \inst|PC_stack[9][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|PC_stack[9][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[9][0]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[9][9]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~78 .lut_mask = 16'h22CC; -defparam \inst|Add1~78 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y43_N26 -fiftyfivenm_lcell_comb \inst|Add1~79 ( +// Location: LCCOMB_X58_Y41_N20 +fiftyfivenm_lcell_comb \inst|Selector120~0 ( // Equation(s): -// \inst|Add1~79_combout = (\inst|Add1~1_combout & ((\inst|IR [10]) # ((\inst|WideOr3~1_combout & \inst|Add1~78_combout )))) # (!\inst|Add1~1_combout & (((\inst|WideOr3~1_combout & \inst|Add1~78_combout )))) +// \inst|Selector120~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][9]~q ))) - .dataa(\inst|Add1~1_combout ), - .datab(\inst|IR [10]), - .datac(\inst|WideOr3~1_combout ), - .datad(\inst|Add1~78_combout ), + .dataa(\inst|PC_stack[9][9]~q ), + .datab(\inst|PC_stack[7][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(gnd), .cin(gnd), - .combout(\inst|Add1~79_combout ), + .combout(\inst|Selector120~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~79 .lut_mask = 16'hF888; -defparam \inst|Add1~79 .sum_lutc_input = "datac"; +defparam \inst|Selector120~0 .lut_mask = 16'hACAC; +defparam \inst|Selector120~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y39_N24 -fiftyfivenm_lcell_comb \inst|Add1~80 ( +// Location: FF_X58_Y41_N21 +dffeas \inst|PC_stack[8][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector120~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[8][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[8][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y41_N2 +fiftyfivenm_lcell_comb \inst|Selector109~0 ( // Equation(s): -// \inst|Add1~80_combout = (\inst|AC [15] & ((\inst|state.ex_sub~q ) # ((\inst|state.ex_addi~q ) # (\inst|state.ex_add~q )))) +// \inst|Selector109~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][9]~q ))) - .dataa(\inst|state.ex_sub~q ), - .datab(\inst|state.ex_addi~q ), - .datac(\inst|state.ex_add~q ), - .datad(\inst|AC [15]), + .dataa(gnd), + .datab(\inst|PC_stack[8][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[6][9]~q ), .cin(gnd), - .combout(\inst|Add1~80_combout ), + .combout(\inst|Selector109~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Add1~80 .lut_mask = 16'hFE00; -defparam \inst|Add1~80 .sum_lutc_input = "datac"; +defparam \inst|Selector109~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector109~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y39_N16 -fiftyfivenm_lcell_comb \inst|Add1~81 ( -// Equation(s): -// \inst|Add1~81_combout = \inst|Add1~79_combout $ (\inst|Add1~77 $ (!\inst|Add1~80_combout )) - - .dataa(\inst|Add1~79_combout ), - .datab(gnd), - .datac(gnd), - .datad(\inst|Add1~80_combout ), - .cin(\inst|Add1~77 ), - .combout(\inst|Add1~81_combout ), - .cout()); +// Location: FF_X58_Y41_N3 +dffeas \inst|PC_stack[7][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector109~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[7][9]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Add1~81 .lut_mask = 16'h5AA5; -defparam \inst|Add1~81 .sum_lutc_input = "cin"; +defparam \inst|PC_stack[7][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N28 -fiftyfivenm_lcell_comb \inst|Selector12~6 ( +// Location: LCCOMB_X58_Y41_N24 +fiftyfivenm_lcell_comb \inst|Selector98~0 ( // Equation(s): -// \inst|Selector12~6_combout = (\inst|Selector27~1_combout & ((\inst|altsyncram_component|auto_generated|q_a [15]) # ((\inst|state.ex_loadi~q & \inst|IR [10])))) # (!\inst|Selector27~1_combout & (\inst|state.ex_loadi~q & ((\inst|IR [10])))) +// \inst|Selector98~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][9]~q )) - .dataa(\inst|Selector27~1_combout ), - .datab(\inst|state.ex_loadi~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [15]), - .datad(\inst|IR [10]), + .dataa(\inst|PC_stack[5][9]~q ), + .datab(\inst|PC_stack[7][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector12~6_combout ), + .combout(\inst|Selector98~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~6 .lut_mask = 16'hECA0; -defparam \inst|Selector12~6 .sum_lutc_input = "datac"; +defparam \inst|Selector98~0 .lut_mask = 16'hCACA; +defparam \inst|Selector98~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y40_N2 -fiftyfivenm_lcell_comb \inst|Selector12~7 ( -// Equation(s): -// \inst|Selector12~7_combout = (\inst|Selector12~5_combout ) # ((\inst|Selector12~6_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~81_combout ))) - - .dataa(\inst|Selector12~5_combout ), - .datab(\inst|AC[2]~0_combout ), - .datac(\inst|Add1~81_combout ), - .datad(\inst|Selector12~6_combout ), - .cin(gnd), - .combout(\inst|Selector12~7_combout ), - .cout()); +// Location: FF_X58_Y41_N25 +dffeas \inst|PC_stack[6][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector98~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[6][9]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector12~7 .lut_mask = 16'hFFEA; -defparam \inst|Selector12~7 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[6][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N2 -fiftyfivenm_lcell_comb \inst|Selector12~8 ( +// Location: LCCOMB_X58_Y41_N26 +fiftyfivenm_lcell_comb \inst|Selector87~0 ( // Equation(s): -// \inst|Selector12~8_combout = (\inst|Selector12~7_combout ) # ((\inst|AC [15] & ((\inst|Selector12~4_combout ) # (!\inst|Selector27~6_combout )))) +// \inst|Selector87~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][9]~q ))) - .dataa(\inst|Selector12~4_combout ), - .datab(\inst|AC [15]), - .datac(\inst|Selector12~7_combout ), - .datad(\inst|Selector27~6_combout ), + .dataa(gnd), + .datab(\inst|PC_stack[6][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[4][9]~q ), .cin(gnd), - .combout(\inst|Selector12~8_combout ), + .combout(\inst|Selector87~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~8 .lut_mask = 16'hF8FC; -defparam \inst|Selector12~8 .sum_lutc_input = "datac"; +defparam \inst|Selector87~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector87~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N18 -fiftyfivenm_lcell_comb \inst|Selector12~1 ( -// Equation(s): -// \inst|Selector12~1_combout = (\inst|IR [0] & ((\inst|AC [14]))) # (!\inst|IR [0] & (\inst|AC [15])) - - .dataa(\inst|AC [15]), - .datab(gnd), - .datac(\inst|AC [14]), - .datad(\inst|IR [0]), - .cin(gnd), - .combout(\inst|Selector12~1_combout ), - .cout()); +// Location: FF_X58_Y41_N27 +dffeas \inst|PC_stack[5][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector87~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[5][9]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector12~1 .lut_mask = 16'hF0AA; -defparam \inst|Selector12~1 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[5][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N14 -fiftyfivenm_lcell_comb \inst|Selector12~2 ( +// Location: LCCOMB_X58_Y41_N18 +fiftyfivenm_lcell_comb \inst|Selector76~0 ( // Equation(s): -// \inst|Selector12~2_combout = (\inst|IR [1] & ((\inst|shifter|auto_generated|sbit_w[29]~42_combout ))) # (!\inst|IR [1] & (\inst|Selector12~1_combout )) +// \inst|Selector76~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][9]~q ))) - .dataa(\inst|Selector12~1_combout ), - .datab(\inst|IR [1]), - .datac(gnd), - .datad(\inst|shifter|auto_generated|sbit_w[29]~42_combout ), + .dataa(\inst|PC_stack[5][9]~q ), + .datab(\inst|PC_stack[3][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector12~2_combout ), + .combout(\inst|Selector76~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~2 .lut_mask = 16'hEE22; -defparam \inst|Selector12~2 .sum_lutc_input = "datac"; +defparam \inst|Selector76~0 .lut_mask = 16'hACAC; +defparam \inst|Selector76~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N24 -fiftyfivenm_lcell_comb \inst|Selector12~3 ( -// Equation(s): -// \inst|Selector12~3_combout = (\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[43]~67_combout )) # (!\inst|IR [2] & ((\inst|Selector12~2_combout ))) - - .dataa(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), - .datab(\inst|Selector12~2_combout ), - .datac(gnd), - .datad(\inst|IR [2]), - .cin(gnd), - .combout(\inst|Selector12~3_combout ), - .cout()); +// Location: FF_X58_Y41_N19 +dffeas \inst|PC_stack[4][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector76~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[4][9]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector12~3 .lut_mask = 16'hAACC; -defparam \inst|Selector12~3 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[4][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N28 -fiftyfivenm_lcell_comb \inst|Selector12~9 ( +// Location: LCCOMB_X58_Y41_N14 +fiftyfivenm_lcell_comb \inst|Selector65~0 ( // Equation(s): -// \inst|Selector12~9_combout = (\inst|Selector12~8_combout ) # ((\inst|Selector20~0_combout & (!\inst|IR [4] & \inst|Selector12~3_combout ))) +// \inst|Selector65~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][9]~q )) - .dataa(\inst|Selector20~0_combout ), - .datab(\inst|Selector12~8_combout ), - .datac(\inst|IR [4]), - .datad(\inst|Selector12~3_combout ), + .dataa(\inst|PC_stack[2][9]~q ), + .datab(\inst|PC_stack[4][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector12~9_combout ), + .combout(\inst|Selector65~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~9 .lut_mask = 16'hCECC; -defparam \inst|Selector12~9 .sum_lutc_input = "datac"; +defparam \inst|Selector65~0 .lut_mask = 16'hCACA; +defparam \inst|Selector65~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N14 -fiftyfivenm_lcell_comb \inst|Selector12~10 ( +// Location: FF_X58_Y41_N15 +dffeas \inst|PC_stack[3][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector65~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[3][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[3][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y41_N6 +fiftyfivenm_lcell_comb \inst|Selector54~0 ( // Equation(s): -// \inst|Selector12~10_combout = (\inst|Selector12~0_combout ) # ((\inst|Selector12~9_combout ) # ((\inst|state.ex_in2~q & !\inst13|inst1[0]~18_combout ))) +// \inst|Selector54~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][9]~q )) - .dataa(\inst|Selector12~0_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst|Selector12~9_combout ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst|PC_stack[1][9]~q ), + .datab(\inst|PC_stack[3][9]~q ), + .datac(\inst|state.ex_return~q ), + .datad(gnd), .cin(gnd), - .combout(\inst|Selector12~10_combout ), + .combout(\inst|Selector54~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~10 .lut_mask = 16'hFAFE; -defparam \inst|Selector12~10 .sum_lutc_input = "datac"; +defparam \inst|Selector54~0 .lut_mask = 16'hCACA; +defparam \inst|Selector54~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y44_N30 -fiftyfivenm_lcell_comb \inst10|count[15]~47 ( +// Location: FF_X58_Y41_N7 +dffeas \inst|PC_stack[2][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector54~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[2][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[2][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y41_N22 +fiftyfivenm_lcell_comb \inst|Selector43~0 ( // Equation(s): -// \inst10|count[15]~47_combout = \inst10|count [15] $ (\inst10|count[14]~46 ) +// \inst|Selector43~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][9]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][9]~q )) - .dataa(\inst10|count [15]), + .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(gnd), - .datad(gnd), - .cin(\inst10|count[14]~46 ), - .combout(\inst10|count[15]~47_combout ), + .datac(\inst|PC_stack[0][9]~q ), + .datad(\inst|PC_stack[2][9]~q ), + .cin(gnd), + .combout(\inst|Selector43~0_combout ), .cout()); // synopsys translate_off -defparam \inst10|count[15]~47 .lut_mask = 16'h5A5A; -defparam \inst10|count[15]~47 .sum_lutc_input = "cin"; +defparam \inst|Selector43~0 .lut_mask = 16'hFA50; +defparam \inst|Selector43~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y44_N31 -dffeas \inst10|count[15] ( +// Location: FF_X58_Y41_N23 +dffeas \inst|PC_stack[1][9] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst10|count[15]~47_combout ), + .d(\inst|Selector43~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst10|count[15]~18_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst10|count [15]), + .q(\inst|PC_stack[1][9]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst10|count[15] .is_wysiwyg = "true"; -defparam \inst10|count[15] .power_up = "low"; +defparam \inst|PC_stack[1][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y45_N14 -fiftyfivenm_lcell_comb \inst11|Add1~18 ( +// Location: LCCOMB_X58_Y41_N30 +fiftyfivenm_lcell_comb \inst|Selector32~0 ( // Equation(s): -// \inst11|Add1~18_combout = (\inst10|state.Init~q & \inst11|count [15]) +// \inst|Selector32~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][9]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [9]))) - .dataa(\inst10|state.Init~q ), - .datab(gnd), - .datac(\inst11|count [15]), + .dataa(\inst|PC_stack[1][9]~q ), + .datab(\inst|PC [9]), + .datac(\inst|state.ex_return~q ), .datad(gnd), .cin(gnd), - .combout(\inst11|Add1~18_combout ), + .combout(\inst|Selector32~0_combout ), .cout()); // synopsys translate_off -defparam \inst11|Add1~18 .lut_mask = 16'hA0A0; -defparam \inst11|Add1~18 .sum_lutc_input = "datac"; +defparam \inst|Selector32~0 .lut_mask = 16'hACAC; +defparam \inst|Selector32~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y45_N30 -fiftyfivenm_lcell_comb \inst11|count[15]~47 ( +// Location: FF_X58_Y41_N31 +dffeas \inst|PC_stack[0][9] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector32~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[0][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[0][9] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y40_N0 +fiftyfivenm_lcell_comb \inst|Selector2~2 ( // Equation(s): -// \inst11|count[15]~47_combout = \inst11|Add1~18_combout $ (\inst11|Add1~3_combout $ (\inst11|count[14]~46 )) +// \inst|Selector2~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][9]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector2~1_combout & (\inst10|state.Init~q ))) - .dataa(\inst11|Add1~18_combout ), - .datab(\inst11|Add1~3_combout ), - .datac(gnd), - .datad(gnd), - .cin(\inst11|count[14]~46 ), - .combout(\inst11|count[15]~47_combout ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|Selector2~1_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst|PC_stack[0][9]~q ), + .cin(gnd), + .combout(\inst|Selector2~2_combout ), .cout()); // synopsys translate_off -defparam \inst11|count[15]~47 .lut_mask = 16'h9696; -defparam \inst11|count[15]~47 .sum_lutc_input = "cin"; +defparam \inst|Selector2~2 .lut_mask = 16'hEA40; +defparam \inst|Selector2~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y45_N31 -dffeas \inst11|count[15] ( +// Location: FF_X54_Y40_N1 +dffeas \inst|PC[9] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst11|count[15]~47_combout ), + .d(\inst|Selector2~2_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst11|count[9]~18_combout ), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst11|count [15]), + .q(\inst|PC [9]), .prn(vcc)); // synopsys translate_off -defparam \inst11|count[15] .is_wysiwyg = "true"; -defparam \inst11|count[15] .power_up = "low"; +defparam \inst|PC[9] .is_wysiwyg = "true"; +defparam \inst|PC[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y40_N18 +fiftyfivenm_lcell_comb \inst|next_mem_addr[9]~9 ( +// Equation(s): +// \inst|next_mem_addr[9]~9_combout = (\inst|Selector2~0_combout ) # ((\inst|state.fetch~q & \inst|PC [9])) + + .dataa(\inst|state.fetch~q ), + .datab(\inst|PC [9]), + .datac(\inst|Selector2~0_combout ), + .datad(gnd), + .cin(gnd), + .combout(\inst|next_mem_addr[9]~9_combout ), + .cout()); +// synopsys translate_off +defparam \inst|next_mem_addr[9]~9 .lut_mask = 16'hF8F8; +defparam \inst|next_mem_addr[9]~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N20 -fiftyfivenm_lcell_comb \inst13|inst1[15]~87 ( +// Location: LCCOMB_X57_Y38_N18 +fiftyfivenm_lcell_comb \inst|Selector3~0 ( // Equation(s): -// \inst13|inst1[15]~87_combout = (\inst|IR [0] & ((\inst11|count [15]))) # (!\inst|IR [0] & (\inst10|count [15])) +// \inst|Selector3~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [8])) # (!\inst|WideNor0~combout & ((\inst|IR [8]))))) - .dataa(\inst10|count [15]), - .datab(\inst11|count [15]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [8]), + .datab(\inst|state.fetch~q ), + .datac(\inst|IR [8]), + .datad(\inst|WideNor0~combout ), + .cin(gnd), + .combout(\inst|Selector3~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector3~0 .lut_mask = 16'h2230; +defparam \inst|Selector3~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y41_N8 +fiftyfivenm_lcell_comb \inst|Selector3~1 ( +// Equation(s): +// \inst|Selector3~1_combout = (\inst|Selector3~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~16_combout )) + + .dataa(\inst|state.fetch~q ), + .datab(\inst|Selector3~0_combout ), .datac(gnd), - .datad(\inst|IR [0]), + .datad(\inst|Add0~16_combout ), .cin(gnd), - .combout(\inst13|inst1[15]~87_combout ), + .combout(\inst|Selector3~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[15]~87 .lut_mask = 16'hCCAA; -defparam \inst13|inst1[15]~87 .sum_lutc_input = "datac"; +defparam \inst|Selector3~1 .lut_mask = 16'hEECC; +defparam \inst|Selector3~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N28 -fiftyfivenm_lcell_comb \inst13|inst1[15]~88 ( +// Location: LCCOMB_X57_Y41_N4 +fiftyfivenm_lcell_comb \inst|Selector3~2 ( // Equation(s): -// \inst13|inst1[15]~88_combout = (\inst|IO_WRITE_int~q & (\inst|AC [15] & ((\inst13|inst1[15]~87_combout ) # (!\inst11|tri_enable~1_combout )))) # (!\inst|IO_WRITE_int~q & ((\inst13|inst1[15]~87_combout ) # ((!\inst11|tri_enable~1_combout )))) +// \inst|Selector3~2_combout = (\inst|state.ex_return~q & (\inst|PC_stack[0][8]~q )) # (!\inst|state.ex_return~q & (((\inst|Selector3~1_combout & \inst10|state.Init~q )))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst13|inst1[15]~87_combout ), - .datac(\inst|AC [15]), - .datad(\inst11|tri_enable~1_combout ), + .dataa(\inst|PC_stack[0][8]~q ), + .datab(\inst|Selector3~1_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst13|inst1[15]~88_combout ), + .combout(\inst|Selector3~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[15]~88 .lut_mask = 16'hC4F5; -defparam \inst13|inst1[15]~88 .sum_lutc_input = "datac"; +defparam \inst|Selector3~2 .lut_mask = 16'hAAC0; +defparam \inst|Selector3~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N22 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[15]~18 ( +// Location: FF_X57_Y41_N5 +dffeas \inst|PC[8] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector3~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC[0]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC [8]), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC[8] .is_wysiwyg = "true"; +defparam \inst|PC[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y41_N22 +fiftyfivenm_lcell_comb \inst|next_mem_addr[8]~8 ( // Equation(s): -// \inst13|inst14|data_out[15]~18_combout = (\inst13|inst|data_rd [7] & (\inst13|inst14|state.Rx2~q & (\inst13|inst14|prev_busy~q & !\inst13|inst|busy~q ))) +// \inst|next_mem_addr[8]~8_combout = (\inst|Selector3~0_combout ) # ((\inst|state.fetch~q & \inst|PC [8])) - .dataa(\inst13|inst|data_rd [7]), - .datab(\inst13|inst14|state.Rx2~q ), - .datac(\inst13|inst14|prev_busy~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst|state.fetch~q ), + .datab(\inst|PC [8]), + .datac(gnd), + .datad(\inst|Selector3~0_combout ), .cin(gnd), - .combout(\inst13|inst14|data_out[15]~18_combout ), + .combout(\inst|next_mem_addr[8]~8_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[15]~18 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[15]~18 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[8]~8 .lut_mask = 16'hFF88; +defparam \inst|next_mem_addr[8]~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N23 -dffeas \inst13|inst14|data_out[15] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[15]~18_combout ), - .asdata(vcc), +// Location: FF_X57_Y38_N3 +dffeas \inst|IR[7] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [7]), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[15]~11_combout ), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [15]), + .q(\inst|IR [7]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[15] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[15] .power_up = "low"; +defparam \inst|IR[7] .is_wysiwyg = "true"; +defparam \inst|IR[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N18 -fiftyfivenm_lcell_comb \inst13|inst1[15]~89 ( +// Location: LCCOMB_X56_Y41_N0 +fiftyfivenm_lcell_comb \inst|Selector4~0 ( // Equation(s): -// \inst13|inst1[15]~89_combout = (\inst13|inst1[15]~88_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [15]) # (!\inst3|I2C_DATA_EN~combout )))) +// \inst|Selector4~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [7]))) # (!\inst|WideNor0~combout & (\inst|IR [7])))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst13|inst1[15]~88_combout ), - .datad(\inst13|inst14|data_out [15]), + .dataa(\inst|IR [7]), + .datab(\inst|WideNor0~combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [7]), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst13|inst1[15]~89_combout ), + .combout(\inst|Selector4~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[15]~89 .lut_mask = 16'hF0B0; -defparam \inst13|inst1[15]~89 .sum_lutc_input = "datac"; +defparam \inst|Selector4~0 .lut_mask = 16'h00E2; +defparam \inst|Selector4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N24 -fiftyfivenm_lcell_comb \inst|Selector12~11 ( +// Location: LCCOMB_X52_Y42_N8 +fiftyfivenm_lcell_comb \inst|next_mem_addr[7]~7 ( // Equation(s): -// \inst|Selector12~11_combout = (\inst|Selector12~10_combout ) # ((\inst13|inst1[15]~86_combout & (\inst|state.ex_in2~q & \inst13|inst1[15]~89_combout ))) +// \inst|next_mem_addr[7]~7_combout = (\inst|Selector4~0_combout ) # ((\inst|state.fetch~q & \inst|PC [7])) - .dataa(\inst13|inst1[15]~86_combout ), - .datab(\inst|Selector12~10_combout ), - .datac(\inst|state.ex_in2~q ), - .datad(\inst13|inst1[15]~89_combout ), + .dataa(gnd), + .datab(\inst|state.fetch~q ), + .datac(\inst|Selector4~0_combout ), + .datad(\inst|PC [7]), .cin(gnd), - .combout(\inst|Selector12~11_combout ), + .combout(\inst|next_mem_addr[7]~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector12~11 .lut_mask = 16'hECCC; -defparam \inst|Selector12~11 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[7]~7 .lut_mask = 16'hFCF0; +defparam \inst|next_mem_addr[7]~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y41_N25 -dffeas \inst|AC[15] ( +// Location: FF_X58_Y38_N27 +dffeas \inst|IR[3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector12~11_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [3]), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [15]), + .q(\inst|IR [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[15] .is_wysiwyg = "true"; -defparam \inst|AC[15] .power_up = "low"; +defparam \inst|IR[3] .is_wysiwyg = "true"; +defparam \inst|IR[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N8 -fiftyfivenm_lcell_comb \inst|state~53 ( +// Location: LCCOMB_X56_Y40_N26 +fiftyfivenm_lcell_comb \inst|Selector27~4 ( // Equation(s): -// \inst|state~53_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|state~37_combout & \inst|altsyncram_component|auto_generated|q_a [13])) +// \inst|Selector27~4_combout = (\inst|state.ex_shift~q & (\inst|IR [3] & \inst|IR [4])) - .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), - .datab(\inst|state~37_combout ), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(gnd), + .dataa(\inst|state.ex_shift~q ), + .datab(gnd), + .datac(\inst|IR [3]), + .datad(\inst|IR [4]), .cin(gnd), - .combout(\inst|state~53_combout ), + .combout(\inst|Selector27~4_combout ), .cout()); // synopsys translate_off -defparam \inst|state~53 .lut_mask = 16'h4040; -defparam \inst|state~53 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X49_Y40_N9 -dffeas \inst|state.ex_jneg ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~53_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|state.ex_jneg~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|state.ex_jneg .is_wysiwyg = "true"; -defparam \inst|state.ex_jneg .power_up = "low"; +defparam \inst|Selector27~4 .lut_mask = 16'hA000; +defparam \inst|Selector27~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N14 -fiftyfivenm_lcell_comb \inst|WideOr2~0 ( +// Location: LCCOMB_X55_Y38_N30 +fiftyfivenm_lcell_comb \inst|Selector24~2 ( // Equation(s): -// \inst|WideOr2~0_combout = (\inst10|state.Init~q & (!\inst|state.fetch~q & (!\inst|state.ex_call~q & !\inst|state.ex_return~q ))) +// \inst|Selector24~2_combout = (\inst|AC [3] & (((\inst|altsyncram_component|auto_generated|q_a [3] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(\inst10|state.Init~q ), - .datab(\inst|state.fetch~q ), - .datac(\inst|state.ex_call~q ), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [3]), + .datab(\inst|state.ex_and~q ), + .datac(\inst|AC [3]), + .datad(\inst|Selector27~6_combout ), .cin(gnd), - .combout(\inst|WideOr2~0_combout ), + .combout(\inst|Selector24~2_combout ), .cout()); // synopsys translate_off -defparam \inst|WideOr2~0 .lut_mask = 16'h0002; -defparam \inst|WideOr2~0 .sum_lutc_input = "datac"; +defparam \inst|Selector24~2 .lut_mask = 16'h80F0; +defparam \inst|Selector24~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N28 -fiftyfivenm_lcell_comb \inst|state~54 ( +// Location: LCCOMB_X55_Y38_N14 +fiftyfivenm_lcell_comb \inst|Selector24~3 ( // Equation(s): -// \inst|state~54_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|Selector30~0_combout & !\inst|altsyncram_component|auto_generated|q_a [14])) +// \inst|Selector24~3_combout = (\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [3] $ (\inst|AC [3]))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [3]), .datab(gnd), - .datac(\inst|Selector30~0_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .datac(\inst|state.ex_xor~q ), + .datad(\inst|AC [3]), .cin(gnd), - .combout(\inst|state~54_combout ), + .combout(\inst|Selector24~3_combout ), .cout()); // synopsys translate_off -defparam \inst|state~54 .lut_mask = 16'h00A0; -defparam \inst|state~54 .sum_lutc_input = "datac"; +defparam \inst|Selector24~3 .lut_mask = 16'h50A0; +defparam \inst|Selector24~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y42_N29 -dffeas \inst|state.ex_jump ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~54_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|state.ex_jump~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y38_N10 +fiftyfivenm_lcell_comb \inst|Selector24~4 ( +// Equation(s): +// \inst|Selector24~4_combout = (\inst|altsyncram_component|auto_generated|q_a [3] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_loadi~q & \inst|IR [3])))) # (!\inst|altsyncram_component|auto_generated|q_a [3] & (((\inst|state.ex_loadi~q & \inst|IR +// [3])))) + + .dataa(\inst|altsyncram_component|auto_generated|q_a [3]), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|state.ex_loadi~q ), + .datad(\inst|IR [3]), + .cin(gnd), + .combout(\inst|Selector24~4_combout ), + .cout()); // synopsys translate_off -defparam \inst|state.ex_jump .is_wysiwyg = "true"; -defparam \inst|state.ex_jump .power_up = "low"; +defparam \inst|Selector24~4 .lut_mask = 16'hF888; +defparam \inst|Selector24~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N26 -fiftyfivenm_lcell_comb \inst|PC[0]~0 ( +// Location: LCCOMB_X55_Y38_N2 +fiftyfivenm_lcell_comb \inst|Selector24~5 ( // Equation(s): -// \inst|PC[0]~0_combout = (\inst|state.ex_jneg~q & (!\inst|AC [15])) # (!\inst|state.ex_jneg~q & (((\inst|WideOr2~0_combout & !\inst|state.ex_jump~q )))) +// \inst|Selector24~5_combout = (\inst|Selector24~3_combout ) # ((\inst|Selector24~4_combout ) # ((\inst|Add1~21_combout & \inst|AC[3]~0_combout ))) - .dataa(\inst|AC [15]), - .datab(\inst|state.ex_jneg~q ), - .datac(\inst|WideOr2~0_combout ), - .datad(\inst|state.ex_jump~q ), + .dataa(\inst|Add1~21_combout ), + .datab(\inst|Selector24~3_combout ), + .datac(\inst|Selector24~4_combout ), + .datad(\inst|AC[3]~0_combout ), .cin(gnd), - .combout(\inst|PC[0]~0_combout ), + .combout(\inst|Selector24~5_combout ), .cout()); // synopsys translate_off -defparam \inst|PC[0]~0 .lut_mask = 16'h4474; -defparam \inst|PC[0]~0 .sum_lutc_input = "datac"; +defparam \inst|Selector24~5 .lut_mask = 16'hFEFC; +defparam \inst|Selector24~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N10 -fiftyfivenm_lcell_comb \inst|Equal0~0 ( +// Location: LCCOMB_X58_Y34_N0 +fiftyfivenm_lcell_comb \inst|Selector24~6 ( // Equation(s): -// \inst|Equal0~0_combout = (!\inst|AC [14] & (!\inst|AC [12] & (!\inst|AC [15] & !\inst|AC [13]))) +// \inst|Selector24~6_combout = (\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[39]~62_combout & (\inst|IR [4]))) # (!\inst|IR [2] & (((\inst|shifter|auto_generated|sbit_w[35]~65_combout )))) - .dataa(\inst|AC [14]), - .datab(\inst|AC [12]), - .datac(\inst|AC [15]), - .datad(\inst|AC [13]), + .dataa(\inst|IR [2]), + .datab(\inst|shifter|auto_generated|sbit_w[39]~62_combout ), + .datac(\inst|IR [4]), + .datad(\inst|shifter|auto_generated|sbit_w[35]~65_combout ), .cin(gnd), - .combout(\inst|Equal0~0_combout ), + .combout(\inst|Selector24~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Equal0~0 .lut_mask = 16'h0001; -defparam \inst|Equal0~0 .sum_lutc_input = "datac"; +defparam \inst|Selector24~6 .lut_mask = 16'hD580; +defparam \inst|Selector24~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y41_N22 -fiftyfivenm_lcell_comb \inst|Equal0~1 ( +// Location: LCCOMB_X59_Y35_N18 +fiftyfivenm_lcell_comb \inst|Selector24~7 ( // Equation(s): -// \inst|Equal0~1_combout = (!\inst|AC [8] & (!\inst|AC [10] & (!\inst|AC [11] & !\inst|AC [9]))) +// \inst|Selector24~7_combout = (\inst|Selector24~2_combout ) # ((\inst|Selector24~5_combout ) # ((\inst|Selector20~0_combout & \inst|Selector24~6_combout ))) - .dataa(\inst|AC [8]), - .datab(\inst|AC [10]), - .datac(\inst|AC [11]), - .datad(\inst|AC [9]), + .dataa(\inst|Selector24~2_combout ), + .datab(\inst|Selector24~5_combout ), + .datac(\inst|Selector20~0_combout ), + .datad(\inst|Selector24~6_combout ), .cin(gnd), - .combout(\inst|Equal0~1_combout ), + .combout(\inst|Selector24~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Equal0~1 .lut_mask = 16'h0001; -defparam \inst|Equal0~1 .sum_lutc_input = "datac"; +defparam \inst|Selector24~7 .lut_mask = 16'hFEEE; +defparam \inst|Selector24~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N22 -fiftyfivenm_lcell_comb \inst|Equal0~3 ( +// Location: LCCOMB_X57_Y37_N12 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[59]~66 ( // Equation(s): -// \inst|Equal0~3_combout = (!\inst|AC [2] & (!\inst|AC [0] & (!\inst|AC [1] & !\inst|AC [3]))) +// \inst|shifter|auto_generated|sbit_w[59]~66_combout = (\inst|IR [2] & ((\inst|IR [4] & (\inst|AC [15])) # (!\inst|IR [4] & ((\inst|shifter|auto_generated|sbit_w[39]~62_combout ))))) - .dataa(\inst|AC [2]), - .datab(\inst|AC [0]), - .datac(\inst|AC [1]), - .datad(\inst|AC [3]), + .dataa(\inst|AC [15]), + .datab(\inst|IR [4]), + .datac(\inst|shifter|auto_generated|sbit_w[39]~62_combout ), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst|Equal0~3_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[59]~66_combout ), .cout()); // synopsys translate_off -defparam \inst|Equal0~3 .lut_mask = 16'h0001; -defparam \inst|Equal0~3 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[59]~66 .lut_mask = 16'hB800; +defparam \inst|shifter|auto_generated|sbit_w[59]~66 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N22 -fiftyfivenm_lcell_comb \inst|Equal0~2 ( +// Location: LCCOMB_X57_Y37_N2 +fiftyfivenm_lcell_comb \inst|shifter|auto_generated|sbit_w[59]~69 ( // Equation(s): -// \inst|Equal0~2_combout = (!\inst|AC [6] & (!\inst|AC [5] & (!\inst|AC [4] & !\inst|AC [7]))) +// \inst|shifter|auto_generated|sbit_w[59]~69_combout = (\inst|shifter|auto_generated|sbit_w[59]~66_combout ) # ((\inst|shifter|auto_generated|sbit_w[43]~68_combout & !\inst|IR [2])) - .dataa(\inst|AC [6]), - .datab(\inst|AC [5]), - .datac(\inst|AC [4]), - .datad(\inst|AC [7]), + .dataa(\inst|shifter|auto_generated|sbit_w[59]~66_combout ), + .datab(gnd), + .datac(\inst|shifter|auto_generated|sbit_w[43]~68_combout ), + .datad(\inst|IR [2]), .cin(gnd), - .combout(\inst|Equal0~2_combout ), + .combout(\inst|shifter|auto_generated|sbit_w[59]~69_combout ), .cout()); // synopsys translate_off -defparam \inst|Equal0~2 .lut_mask = 16'h0001; -defparam \inst|Equal0~2 .sum_lutc_input = "datac"; +defparam \inst|shifter|auto_generated|sbit_w[59]~69 .lut_mask = 16'hAAFA; +defparam \inst|shifter|auto_generated|sbit_w[59]~69 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N24 -fiftyfivenm_lcell_comb \inst|Equal0~4 ( +// Location: LCCOMB_X60_Y38_N26 +fiftyfivenm_lcell_comb \inst|Selector24~0 ( // Equation(s): -// \inst|Equal0~4_combout = (\inst|Equal0~0_combout & (\inst|Equal0~1_combout & (\inst|Equal0~3_combout & \inst|Equal0~2_combout ))) +// \inst|Selector24~0_combout = (\inst|state.ex_in2~q & (((\inst11|count [3]) # (!\inst11|tri_enable~combout )) # (!\inst13|inst1[0]~24_combout ))) - .dataa(\inst|Equal0~0_combout ), - .datab(\inst|Equal0~1_combout ), - .datac(\inst|Equal0~3_combout ), - .datad(\inst|Equal0~2_combout ), + .dataa(\inst|state.ex_in2~q ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst11|count [3]), + .datad(\inst11|tri_enable~combout ), .cin(gnd), - .combout(\inst|Equal0~4_combout ), + .combout(\inst|Selector24~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Equal0~4 .lut_mask = 16'h8000; -defparam \inst|Equal0~4 .sum_lutc_input = "datac"; +defparam \inst|Selector24~0 .lut_mask = 16'hA2AA; +defparam \inst|Selector24~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N8 -fiftyfivenm_lcell_comb \inst|PC[0]~1 ( +// Location: LCCOMB_X60_Y38_N12 +fiftyfivenm_lcell_comb \inst4|IO_BUS|dout[3]~1 ( // Equation(s): -// \inst|PC[0]~1_combout = (\inst|state.ex_jpos~q & (((\inst|Equal0~4_combout )))) # (!\inst|state.ex_jpos~q & ((\inst|state.ex_jzero~q & ((!\inst|Equal0~4_combout ))) # (!\inst|state.ex_jzero~q & (\inst|PC[0]~0_combout )))) +// \inst4|IO_BUS|dout[3]~1_combout = (((\inst4|COUNT [3]) # (\inst|IO_WRITE_int~q )) # (!\inst3|TIMER_EN~2_combout )) # (!\inst3|TIMER_EN~1_combout ) - .dataa(\inst|state.ex_jzero~q ), - .datab(\inst|state.ex_jpos~q ), - .datac(\inst|PC[0]~0_combout ), - .datad(\inst|Equal0~4_combout ), + .dataa(\inst3|TIMER_EN~1_combout ), + .datab(\inst3|TIMER_EN~2_combout ), + .datac(\inst4|COUNT [3]), + .datad(\inst|IO_WRITE_int~q ), .cin(gnd), - .combout(\inst|PC[0]~1_combout ), + .combout(\inst4|IO_BUS|dout[3]~1_combout ), .cout()); // synopsys translate_off -defparam \inst|PC[0]~1 .lut_mask = 16'hDC32; -defparam \inst|PC[0]~1 .sum_lutc_input = "datac"; +defparam \inst4|IO_BUS|dout[3]~1 .lut_mask = 16'hFFF7; +defparam \inst4|IO_BUS|dout[3]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y42_N6 -fiftyfivenm_lcell_comb \inst|PC[0]~2 ( +// Location: LCCOMB_X60_Y38_N22 +fiftyfivenm_lcell_comb \inst13|inst1[3]~35 ( // Equation(s): -// \inst|PC[0]~2_combout = (\inst13|inst14|data_out[7]~0_combout & (!\inst|PC[0]~1_combout & ((!\inst|state.ex_jpos~q ) # (!\inst|AC [15])))) +// \inst13|inst1[3]~35_combout = (!\inst13|inst4~combout & (\inst4|IO_BUS|dout[3]~1_combout & ((\inst10|count [3]) # (!\inst10|tri_enable~combout )))) - .dataa(\inst13|inst14|data_out[7]~0_combout ), - .datab(\inst|PC[0]~1_combout ), - .datac(\inst|AC [15]), - .datad(\inst|state.ex_jpos~q ), + .dataa(\inst13|inst4~combout ), + .datab(\inst10|tri_enable~combout ), + .datac(\inst4|IO_BUS|dout[3]~1_combout ), + .datad(\inst10|count [3]), .cin(gnd), - .combout(\inst|PC[0]~2_combout ), + .combout(\inst13|inst1[3]~35_combout ), .cout()); // synopsys translate_off -defparam \inst|PC[0]~2 .lut_mask = 16'h0222; -defparam \inst|PC[0]~2 .sum_lutc_input = "datac"; +defparam \inst13|inst1[3]~35 .lut_mask = 16'h5010; +defparam \inst13|inst1[3]~35 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N5 -dffeas \inst|PC[4] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector7~2_combout ), - .asdata(vcc), +// Location: IOIBUF_X54_Y54_N29 +fiftyfivenm_io_ibuf \SW[3]~input ( + .i(SW[3]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[3]~input_o )); +// synopsys translate_off +defparam \SW[3]~input .bus_hold = "false"; +defparam \SW[3]~input .listen_to_nsleep_signal = "false"; +defparam \SW[3]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X60_Y39_N9 +dffeas \inst7|B_DI[3] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[3]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [4]), + .q(\inst7|B_DI [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[4] .is_wysiwyg = "true"; -defparam \inst|PC[4] .power_up = "low"; +defparam \inst7|B_DI[3] .is_wysiwyg = "true"; +defparam \inst7|B_DI[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N24 -fiftyfivenm_lcell_comb \inst|Selector6~1 ( +// Location: LCCOMB_X60_Y39_N8 +fiftyfivenm_lcell_comb \inst13|inst1[3]~36 ( // Equation(s): -// \inst|Selector6~1_combout = (\inst|Selector6~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~10_combout )) +// \inst13|inst1[3]~36_combout = (\inst|IO_WRITE_int~q & (\inst|AC [3] & ((\inst7|B_DI [3]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [3]) # (!\inst3|SWITCH_EN~combout )))) - .dataa(gnd), - .datab(\inst|Selector6~0_combout ), - .datac(\inst|state.fetch~q ), - .datad(\inst|Add0~10_combout ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst|AC [3]), + .datac(\inst7|B_DI [3]), + .datad(\inst3|SWITCH_EN~combout ), .cin(gnd), - .combout(\inst|Selector6~1_combout ), + .combout(\inst13|inst1[3]~36_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector6~1 .lut_mask = 16'hFCCC; -defparam \inst|Selector6~1 .sum_lutc_input = "datac"; +defparam \inst13|inst1[3]~36 .lut_mask = 16'hD0DD; +defparam \inst13|inst1[3]~36 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N1 -dffeas \inst|PC_stack[9][5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|PC_stack[8][5]~q ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|PC_stack[9][0]~1_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[9][5]~q ), - .prn(vcc)); +// Location: LCCOMB_X55_Y34_N28 +fiftyfivenm_lcell_comb \inst13|inst|Decoder0~4 ( +// Equation(s): +// \inst13|inst|Decoder0~4_combout = (\inst13|inst|bit_cnt [2] & (!\inst13|inst|bit_cnt [0] & (!\inst13|inst|bit_cnt [1] & \inst13|inst|Decoder0~0_combout ))) + + .dataa(\inst13|inst|bit_cnt [2]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|bit_cnt [1]), + .datad(\inst13|inst|Decoder0~0_combout ), + .cin(gnd), + .combout(\inst13|inst|Decoder0~4_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][5] .power_up = "low"; +defparam \inst13|inst|Decoder0~4 .lut_mask = 16'h0200; +defparam \inst13|inst|Decoder0~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N30 -fiftyfivenm_lcell_comb \inst|Selector124~0 ( +// Location: LCCOMB_X55_Y34_N24 +fiftyfivenm_lcell_comb \inst13|inst|data_rx[3]~3 ( // Equation(s): -// \inst|Selector124~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][5]~q ))) +// \inst13|inst|data_rx[3]~3_combout = (\inst13|inst|Decoder0~4_combout & (\GSENSOR_SDI~input_o )) # (!\inst13|inst|Decoder0~4_combout & ((\inst13|inst|data_rx [3]))) .dataa(gnd), - .datab(\inst|PC_stack[9][5]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[7][5]~q ), + .datab(\GSENSOR_SDI~input_o ), + .datac(\inst13|inst|data_rx [3]), + .datad(\inst13|inst|Decoder0~4_combout ), .cin(gnd), - .combout(\inst|Selector124~0_combout ), + .combout(\inst13|inst|data_rx[3]~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector124~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector124~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rx[3]~3 .lut_mask = 16'hCCF0; +defparam \inst13|inst|data_rx[3]~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N31 -dffeas \inst|PC_stack[8][5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector124~0_combout ), +// Location: FF_X55_Y34_N25 +dffeas \inst13|inst|data_rx[3] ( + .clk(!\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rx[3]~3_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][5]~q ), + .q(\inst13|inst|data_rx [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][5] .power_up = "low"; +defparam \inst13|inst|data_rx[3] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rx[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N16 -fiftyfivenm_lcell_comb \inst|Selector113~0 ( +// Location: LCCOMB_X56_Y34_N2 +fiftyfivenm_lcell_comb \inst13|inst|data_rd[3]~feeder ( // Equation(s): -// \inst|Selector113~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][5]~q ))) +// \inst13|inst|data_rd[3]~feeder_combout = \inst13|inst|data_rx [3] - .dataa(\inst|state.ex_return~q ), + .dataa(gnd), .datab(gnd), - .datac(\inst|PC_stack[8][5]~q ), - .datad(\inst|PC_stack[6][5]~q ), + .datac(gnd), + .datad(\inst13|inst|data_rx [3]), .cin(gnd), - .combout(\inst|Selector113~0_combout ), + .combout(\inst13|inst|data_rd[3]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector113~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector113~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_rd[3]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst|data_rd[3]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N17 -dffeas \inst|PC_stack[7][5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector113~0_combout ), +// Location: FF_X56_Y34_N3 +dffeas \inst13|inst|data_rd[3] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_rd[3]~feeder_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst|state~14_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][5]~q ), + .q(\inst13|inst|data_rd [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][5] .power_up = "low"; +defparam \inst13|inst|data_rd[3] .is_wysiwyg = "true"; +defparam \inst13|inst|data_rd[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N10 -fiftyfivenm_lcell_comb \inst|Selector102~0 ( +// Location: LCCOMB_X60_Y36_N10 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[3]~5 ( // Equation(s): -// \inst|Selector102~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][5]~q ))) +// \inst13|inst14|data_out[3]~5_combout = (\inst13|inst14|state.Rx1~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [3]))) - .dataa(gnd), - .datab(\inst|PC_stack[7][5]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][5]~q ), + .dataa(\inst13|inst14|state.Rx1~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [3]), .cin(gnd), - .combout(\inst|Selector102~0_combout ), + .combout(\inst13|inst14|data_out[3]~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector102~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector102~0 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[3]~5 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[3]~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N11 -dffeas \inst|PC_stack[6][5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector102~0_combout ), +// Location: FF_X60_Y36_N11 +dffeas \inst13|inst14|data_out[3] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[3]~5_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][5]~q ), + .q(\inst13|inst14|data_out [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][5] .power_up = "low"; +defparam \inst13|inst14|data_out[3] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N20 -fiftyfivenm_lcell_comb \inst|Selector91~0 ( +// Location: LCCOMB_X60_Y38_N6 +fiftyfivenm_lcell_comb \inst13|inst1[3]~37 ( // Equation(s): -// \inst|Selector91~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][5]~q ))) +// \inst13|inst1[3]~37_combout = (\inst13|inst1[3]~36_combout & (((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [3])) # (!\inst3|I2C_DATA_EN~combout ))) - .dataa(\inst|PC_stack[6][5]~q ), - .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][5]~q ), + .dataa(\inst13|inst1[3]~36_combout ), + .datab(\inst3|I2C_DATA_EN~combout ), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst13|inst14|data_out [3]), .cin(gnd), - .combout(\inst|Selector91~0_combout ), + .combout(\inst13|inst1[3]~37_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector91~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector91~0 .sum_lutc_input = "datac"; +defparam \inst13|inst1[3]~37 .lut_mask = 16'hAAA2; +defparam \inst13|inst1[3]~37 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N21 -dffeas \inst|PC_stack[5][5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector91~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[5][5]~q ), - .prn(vcc)); +// Location: LCCOMB_X60_Y38_N24 +fiftyfivenm_lcell_comb \inst|Selector24~1 ( +// Equation(s): +// \inst|Selector24~1_combout = (\inst|Selector24~0_combout & (((\inst13|inst1[3]~35_combout & \inst13|inst1[3]~37_combout )) # (!\inst13|inst1[0]~24_combout ))) + + .dataa(\inst|Selector24~0_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst13|inst1[3]~35_combout ), + .datad(\inst13|inst1[3]~37_combout ), + .cin(gnd), + .combout(\inst|Selector24~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[5][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][5] .power_up = "low"; +defparam \inst|Selector24~1 .lut_mask = 16'hA222; +defparam \inst|Selector24~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N0 -fiftyfivenm_lcell_comb \inst|Selector80~0 ( +// Location: LCCOMB_X60_Y38_N8 +fiftyfivenm_lcell_comb \inst|Selector24~8 ( // Equation(s): -// \inst|Selector80~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][5]~q ))) +// \inst|Selector24~8_combout = (\inst|Selector24~7_combout ) # ((\inst|Selector24~1_combout ) # ((\inst|Selector27~4_combout & \inst|shifter|auto_generated|sbit_w[59]~69_combout ))) - .dataa(gnd), - .datab(\inst|PC_stack[5][5]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[3][5]~q ), + .dataa(\inst|Selector27~4_combout ), + .datab(\inst|Selector24~7_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[59]~69_combout ), + .datad(\inst|Selector24~1_combout ), .cin(gnd), - .combout(\inst|Selector80~0_combout ), + .combout(\inst|Selector24~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector80~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector80~0 .sum_lutc_input = "datac"; +defparam \inst|Selector24~8 .lut_mask = 16'hFFEC; +defparam \inst|Selector24~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N1 -dffeas \inst|PC_stack[4][5] ( +// Location: FF_X60_Y38_N9 +dffeas \inst|AC[3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector80~0_combout ), + .d(\inst|Selector24~8_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][5]~q ), + .q(\inst|AC [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][5] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X55_Y38_N12 -fiftyfivenm_lcell_comb \inst|Selector69~0 ( -// Equation(s): -// \inst|Selector69~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][5]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][5]~q )) - - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[2][5]~q ), - .datad(\inst|PC_stack[4][5]~q ), - .cin(gnd), - .combout(\inst|Selector69~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector69~0 .lut_mask = 16'hFA50; -defparam \inst|Selector69~0 .sum_lutc_input = "datac"; +defparam \inst|AC[3] .is_wysiwyg = "true"; +defparam \inst|AC[3] .power_up = "low"; // synopsys translate_on -// Location: FF_X55_Y38_N13 -dffeas \inst|PC_stack[3][5] ( +// Location: FF_X58_Y38_N5 +dffeas \inst|IR[6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector69~0_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [6]), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][5]~q ), + .q(\inst|IR [6]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][5] .power_up = "low"; +defparam \inst|IR[6] .is_wysiwyg = "true"; +defparam \inst|IR[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N8 -fiftyfivenm_lcell_comb \inst|Selector58~0 ( +// Location: LCCOMB_X56_Y41_N18 +fiftyfivenm_lcell_comb \inst|Selector5~0 ( // Equation(s): -// \inst|Selector58~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][5]~q ))) +// \inst|Selector5~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [6]))) # (!\inst|WideNor0~combout & (\inst|IR [6])))) - .dataa(\inst|PC_stack[3][5]~q ), - .datab(\inst|PC_stack[1][5]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|IR [6]), + .datab(\inst|altsyncram_component|auto_generated|q_a [6]), + .datac(\inst|WideNor0~combout ), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst|Selector58~0_combout ), + .combout(\inst|Selector5~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector58~0 .lut_mask = 16'hACAC; -defparam \inst|Selector58~0 .sum_lutc_input = "datac"; +defparam \inst|Selector5~0 .lut_mask = 16'h00CA; +defparam \inst|Selector5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N9 -dffeas \inst|PC_stack[2][5] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector58~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[2][5]~q ), - .prn(vcc)); +// Location: LCCOMB_X54_Y41_N26 +fiftyfivenm_lcell_comb \inst|Selector5~1 ( +// Equation(s): +// \inst|Selector5~1_combout = (\inst|Selector5~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~12_combout )) + + .dataa(gnd), + .datab(\inst|state.fetch~q ), + .datac(\inst|Add0~12_combout ), + .datad(\inst|Selector5~0_combout ), + .cin(gnd), + .combout(\inst|Selector5~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[2][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][5] .power_up = "low"; +defparam \inst|Selector5~1 .lut_mask = 16'hFFC0; +defparam \inst|Selector5~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N4 -fiftyfivenm_lcell_comb \inst|Selector47~0 ( +// Location: LCCOMB_X56_Y42_N14 +fiftyfivenm_lcell_comb \inst|PC_stack[9][6]~feeder ( // Equation(s): -// \inst|Selector47~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][5]~q ))) +// \inst|PC_stack[9][6]~feeder_combout = \inst|PC_stack[8][6]~q .dataa(gnd), - .datab(\inst|PC_stack[2][5]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][5]~q ), + .datab(gnd), + .datac(gnd), + .datad(\inst|PC_stack[8][6]~q ), .cin(gnd), - .combout(\inst|Selector47~0_combout ), + .combout(\inst|PC_stack[9][6]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector47~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector47~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][6]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N5 -dffeas \inst|PC_stack[1][5] ( +// Location: FF_X56_Y42_N15 +dffeas \inst|PC_stack[9][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector47~0_combout ), + .d(\inst|PC_stack[9][6]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][5]~q ), + .q(\inst|PC_stack[9][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][5] .power_up = "low"; +defparam \inst|PC_stack[9][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N28 -fiftyfivenm_lcell_comb \inst|Selector36~0 ( +// Location: LCCOMB_X56_Y42_N0 +fiftyfivenm_lcell_comb \inst|Selector123~0 ( // Equation(s): -// \inst|Selector36~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [5]))) +// \inst|Selector123~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][6]~q )) - .dataa(gnd), - .datab(\inst|PC_stack[1][5]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC [5]), + .dataa(\inst|PC_stack[7][6]~q ), + .datab(\inst|PC_stack[9][6]~q ), + .datac(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector36~0_combout ), + .combout(\inst|Selector123~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector36~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector36~0 .sum_lutc_input = "datac"; +defparam \inst|Selector123~0 .lut_mask = 16'hCCAA; +defparam \inst|Selector123~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N29 -dffeas \inst|PC_stack[0][5] ( +// Location: FF_X56_Y42_N1 +dffeas \inst|PC_stack[8][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector36~0_combout ), + .d(\inst|Selector123~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -19647,320 +19827,214 @@ dffeas \inst|PC_stack[0][5] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][5]~q ), + .q(\inst|PC_stack[8][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][5] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][5] .power_up = "low"; +defparam \inst|PC_stack[8][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y38_N24 -fiftyfivenm_lcell_comb \inst|Selector6~2 ( +// Location: LCCOMB_X56_Y42_N12 +fiftyfivenm_lcell_comb \inst|Selector112~0 ( // Equation(s): -// \inst|Selector6~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][5]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector6~1_combout ))) +// \inst|Selector112~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][6]~q )) - .dataa(\inst10|state.Init~q ), - .datab(\inst|Selector6~1_combout ), + .dataa(gnd), + .datab(\inst|PC_stack[6][6]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][5]~q ), + .datad(\inst|PC_stack[8][6]~q ), .cin(gnd), - .combout(\inst|Selector6~2_combout ), + .combout(\inst|Selector112~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector6~2 .lut_mask = 16'hF808; -defparam \inst|Selector6~2 .sum_lutc_input = "datac"; +defparam \inst|Selector112~0 .lut_mask = 16'hFC0C; +defparam \inst|Selector112~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y38_N25 -dffeas \inst|PC[5] ( +// Location: FF_X56_Y42_N13 +dffeas \inst|PC_stack[7][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector6~2_combout ), + .d(\inst|Selector112~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [5]), + .q(\inst|PC_stack[7][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[5] .is_wysiwyg = "true"; -defparam \inst|PC[5] .power_up = "low"; +defparam \inst|PC_stack[7][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N8 -fiftyfivenm_lcell_comb \inst|next_mem_addr[5]~5 ( +// Location: LCCOMB_X56_Y42_N24 +fiftyfivenm_lcell_comb \inst|Selector101~0 ( // Equation(s): -// \inst|next_mem_addr[5]~5_combout = (\inst|Selector6~0_combout ) # ((\inst|state.fetch~q & \inst|PC [5])) +// \inst|Selector101~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][6]~q ))) - .dataa(gnd), - .datab(\inst|Selector6~0_combout ), - .datac(\inst|state.fetch~q ), - .datad(\inst|PC [5]), + .dataa(\inst|PC_stack[7][6]~q ), + .datab(\inst|PC_stack[5][6]~q ), + .datac(gnd), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|next_mem_addr[5]~5_combout ), + .combout(\inst|Selector101~0_combout ), .cout()); // synopsys translate_off -defparam \inst|next_mem_addr[5]~5 .lut_mask = 16'hFCCC; -defparam \inst|next_mem_addr[5]~5 .sum_lutc_input = "datac"; +defparam \inst|Selector101~0 .lut_mask = 16'hAACC; +defparam \inst|Selector101~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X53_Y40_N0 -fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a1 ( - .portawe(\inst|MW~q ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .clk1(gnd), - .ena0(vcc), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\inst|AC [12],\inst|AC [5],\inst|AC [4],\inst|AC [1]}), - .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , -\inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), - .portabyteenamasks(1'b1), - .portbdatain(4'b0000), - .portbaddr(11'b00000000000), - .portbbyteenamasks(1'b1), +// Location: FF_X56_Y42_N25 +dffeas \inst|PC_stack[6][6] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector101~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .portadataout(\inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .init_file = "VelocityControl.mif"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .init_file_layout = "port_a"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .logical_ram_name = "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .operation_mode = "single_port"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_address_clear = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_address_width = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_out_clear = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_out_clock = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_width = 4; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_first_address = 0; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_first_bit_number = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_last_address = 2047; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 2048; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_logical_ram_width = 16; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_b_address_width = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_b_data_width = 4; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .ram_block_type = "M9K"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init0 = 2048'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022100F000DC3C533485EC80B7990CE804E3018EC8B484; -// synopsys translate_on - -// Location: LCCOMB_X52_Y40_N26 -fiftyfivenm_lcell_comb \inst|Selector7~0 ( -// Equation(s): -// \inst|Selector7~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [4])) # (!\inst|WideNor0~combout & ((\inst|IR [4]))))) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [4]), - .datab(\inst|state.fetch~q ), - .datac(\inst|WideNor0~combout ), - .datad(\inst|IR [4]), - .cin(gnd), - .combout(\inst|Selector7~0_combout ), - .cout()); + .q(\inst|PC_stack[6][6]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|Selector7~0 .lut_mask = 16'h2320; -defparam \inst|Selector7~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[6][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y40_N20 -fiftyfivenm_lcell_comb \inst|next_mem_addr[4]~4 ( +// Location: LCCOMB_X58_Y41_N0 +fiftyfivenm_lcell_comb \inst|Selector90~0 ( // Equation(s): -// \inst|next_mem_addr[4]~4_combout = (\inst|Selector7~0_combout ) # ((\inst|PC [4] & \inst|state.fetch~q )) +// \inst|Selector90~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][6]~q ))) - .dataa(\inst|Selector7~0_combout ), - .datab(\inst|PC [4]), - .datac(\inst|state.fetch~q ), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[6][6]~q ), + .datad(\inst|PC_stack[4][6]~q ), .cin(gnd), - .combout(\inst|next_mem_addr[4]~4_combout ), + .combout(\inst|Selector90~0_combout ), .cout()); // synopsys translate_off -defparam \inst|next_mem_addr[4]~4 .lut_mask = 16'hEAEA; -defparam \inst|next_mem_addr[4]~4 .sum_lutc_input = "datac"; +defparam \inst|Selector90~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector90~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X53_Y41_N0 -fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a11 ( - .portawe(\inst|MW~q ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .clk1(gnd), - .ena0(vcc), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\inst|AC [15],\inst|AC [14],\inst|AC [13],\inst|AC [11]}), - .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , -\inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), - .portabyteenamasks(1'b1), - .portbdatain(4'b0000), - .portbaddr(11'b00000000000), - .portbbyteenamasks(1'b1), +// Location: FF_X58_Y41_N1 +dffeas \inst|PC_stack[5][6] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector90~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .portadataout(\inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .init_file = "VelocityControl.mif"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .init_file_layout = "port_a"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .logical_ram_name = "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .operation_mode = "single_port"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_clear = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_width = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clear = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clock = "none"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_width = 4; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_address = 0; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_bit_number = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_last_address = 2047; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 2048; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_width = 16; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_b_address_width = 11; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_b_data_width = 4; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .ram_block_type = "M9K"; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; -defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init0 = 2048'h0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F097533913429889892789908962883898983131; -// synopsys translate_on - -// Location: LCCOMB_X49_Y43_N4 -fiftyfivenm_lcell_comb \inst|state~32 ( -// Equation(s): -// \inst|state~32_combout = (\inst|state.decode~q & (\inst|altsyncram_component|auto_generated|q_a [15] & (!\inst|altsyncram_component|auto_generated|q_a [13] & !\inst|altsyncram_component|auto_generated|q_a [14]))) - - .dataa(\inst|state.decode~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [15]), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), - .cin(gnd), - .combout(\inst|state~32_combout ), - .cout()); + .q(\inst|PC_stack[5][6]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|state~32 .lut_mask = 16'h0008; -defparam \inst|state~32 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[5][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N2 -fiftyfivenm_lcell_comb \inst|state~50 ( -// Equation(s): -// \inst|state~50_combout = (!\inst|altsyncram_component|auto_generated|q_a [12] & (\inst|altsyncram_component|auto_generated|q_a [11] & \inst|state~32_combout )) - - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|state~32_combout ), +// Location: LCCOMB_X58_Y41_N12 +fiftyfivenm_lcell_comb \inst|Selector79~0 ( +// Equation(s): +// \inst|Selector79~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][6]~q )) + + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[3][6]~q ), + .datad(\inst|PC_stack[5][6]~q ), .cin(gnd), - .combout(\inst|state~50_combout ), + .combout(\inst|Selector79~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~50 .lut_mask = 16'h3000; -defparam \inst|state~50 .sum_lutc_input = "datac"; +defparam \inst|Selector79~0 .lut_mask = 16'hFA50; +defparam \inst|Selector79~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y43_N3 -dffeas \inst|state.ex_return ( +// Location: FF_X58_Y41_N13 +dffeas \inst|PC_stack[4][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~50_combout ), + .d(\inst|Selector79~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_return~q ), + .q(\inst|PC_stack[4][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_return .is_wysiwyg = "true"; -defparam \inst|state.ex_return .power_up = "low"; +defparam \inst|PC_stack[4][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N6 -fiftyfivenm_lcell_comb \inst|PC_stack[9][2]~feeder ( +// Location: LCCOMB_X58_Y41_N8 +fiftyfivenm_lcell_comb \inst|Selector68~0 ( // Equation(s): -// \inst|PC_stack[9][2]~feeder_combout = \inst|PC_stack[8][2]~q +// \inst|Selector68~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][6]~q ))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst|PC_stack[8][2]~q ), + .dataa(\inst|PC_stack[4][6]~q ), + .datab(\inst|PC_stack[2][6]~q ), + .datac(\inst|state.ex_return~q ), + .datad(gnd), .cin(gnd), - .combout(\inst|PC_stack[9][2]~feeder_combout ), + .combout(\inst|Selector68~0_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][2]~feeder .lut_mask = 16'hFF00; -defparam \inst|PC_stack[9][2]~feeder .sum_lutc_input = "datac"; +defparam \inst|Selector68~0 .lut_mask = 16'hACAC; +defparam \inst|Selector68~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N7 -dffeas \inst|PC_stack[9][2] ( +// Location: FF_X58_Y41_N9 +dffeas \inst|PC_stack[3][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|PC_stack[9][2]~feeder_combout ), + .d(\inst|Selector68~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[9][0]~1_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][2]~q ), + .q(\inst|PC_stack[3][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][2] .power_up = "low"; +defparam \inst|PC_stack[3][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N12 -fiftyfivenm_lcell_comb \inst|Selector127~0 ( +// Location: LCCOMB_X58_Y41_N4 +fiftyfivenm_lcell_comb \inst|Selector57~0 ( // Equation(s): -// \inst|Selector127~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][2]~q )) +// \inst|Selector57~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][6]~q ))) .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|PC_stack[7][2]~q ), - .datad(\inst|PC_stack[9][2]~q ), + .datac(\inst|PC_stack[3][6]~q ), + .datad(\inst|PC_stack[1][6]~q ), .cin(gnd), - .combout(\inst|Selector127~0_combout ), + .combout(\inst|Selector57~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector127~0 .lut_mask = 16'hFA50; -defparam \inst|Selector127~0 .sum_lutc_input = "datac"; +defparam \inst|Selector57~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector57~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N13 -dffeas \inst|PC_stack[8][2] ( +// Location: FF_X58_Y41_N5 +dffeas \inst|PC_stack[2][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector127~0_combout ), + .d(\inst|Selector57~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -19969,34 +20043,34 @@ dffeas \inst|PC_stack[8][2] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][2]~q ), + .q(\inst|PC_stack[2][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][2] .power_up = "low"; +defparam \inst|PC_stack[2][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N30 -fiftyfivenm_lcell_comb \inst|Selector116~0 ( +// Location: LCCOMB_X58_Y41_N28 +fiftyfivenm_lcell_comb \inst|Selector46~0 ( // Equation(s): -// \inst|Selector116~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][2]~q ))) +// \inst|Selector46~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][6]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][6]~q ))) - .dataa(\inst|PC_stack[8][2]~q ), + .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[6][2]~q ), + .datac(\inst|PC_stack[2][6]~q ), + .datad(\inst|PC_stack[0][6]~q ), .cin(gnd), - .combout(\inst|Selector116~0_combout ), + .combout(\inst|Selector46~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector116~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector116~0 .sum_lutc_input = "datac"; +defparam \inst|Selector46~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector46~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N31 -dffeas \inst|PC_stack[7][2] ( +// Location: FF_X58_Y41_N29 +dffeas \inst|PC_stack[1][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector116~0_combout ), + .d(\inst|Selector46~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20005,34 +20079,34 @@ dffeas \inst|PC_stack[7][2] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][2]~q ), + .q(\inst|PC_stack[1][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][2] .power_up = "low"; +defparam \inst|PC_stack[1][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N24 -fiftyfivenm_lcell_comb \inst|Selector105~0 ( +// Location: LCCOMB_X58_Y41_N16 +fiftyfivenm_lcell_comb \inst|Selector35~0 ( // Equation(s): -// \inst|Selector105~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][2]~q ))) +// \inst|Selector35~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][6]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [6])) .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|PC_stack[7][2]~q ), - .datad(\inst|PC_stack[5][2]~q ), + .datac(\inst|PC [6]), + .datad(\inst|PC_stack[1][6]~q ), .cin(gnd), - .combout(\inst|Selector105~0_combout ), + .combout(\inst|Selector35~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector105~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector105~0 .sum_lutc_input = "datac"; +defparam \inst|Selector35~0 .lut_mask = 16'hFA50; +defparam \inst|Selector35~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N25 -dffeas \inst|PC_stack[6][2] ( +// Location: FF_X58_Y41_N17 +dffeas \inst|PC_stack[0][6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector105~0_combout ), + .d(\inst|Selector35~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20041,142 +20115,212 @@ dffeas \inst|PC_stack[6][2] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][2]~q ), + .q(\inst|PC_stack[0][6]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][2] .power_up = "low"; +defparam \inst|PC_stack[0][6] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N28 -fiftyfivenm_lcell_comb \inst|Selector94~0 ( +// Location: LCCOMB_X54_Y41_N24 +fiftyfivenm_lcell_comb \inst|Selector5~2 ( // Equation(s): -// \inst|Selector94~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][2]~q ))) +// \inst|Selector5~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][6]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector5~1_combout ))) - .dataa(gnd), - .datab(\inst|PC_stack[6][2]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][2]~q ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst10|state.Init~q ), + .datac(\inst|Selector5~1_combout ), + .datad(\inst|PC_stack[0][6]~q ), .cin(gnd), - .combout(\inst|Selector94~0_combout ), + .combout(\inst|Selector5~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector94~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector94~0 .sum_lutc_input = "datac"; +defparam \inst|Selector5~2 .lut_mask = 16'hEA40; +defparam \inst|Selector5~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N29 -dffeas \inst|PC_stack[5][2] ( +// Location: FF_X54_Y41_N25 +dffeas \inst|PC[6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector94~0_combout ), + .d(\inst|Selector5~2_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][2]~q ), + .q(\inst|PC [6]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][2] .power_up = "low"; +defparam \inst|PC[6] .is_wysiwyg = "true"; +defparam \inst|PC[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N18 -fiftyfivenm_lcell_comb \inst|Selector83~0 ( +// Location: LCCOMB_X54_Y41_N6 +fiftyfivenm_lcell_comb \inst|next_mem_addr[6]~6 ( // Equation(s): -// \inst|Selector83~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][2]~q ))) +// \inst|next_mem_addr[6]~6_combout = (\inst|Selector5~0_combout ) # ((\inst|PC [6] & \inst|state.fetch~q )) .dataa(gnd), - .datab(\inst|PC_stack[5][2]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[3][2]~q ), + .datab(\inst|PC [6]), + .datac(\inst|state.fetch~q ), + .datad(\inst|Selector5~0_combout ), .cin(gnd), - .combout(\inst|Selector83~0_combout ), + .combout(\inst|next_mem_addr[6]~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector83~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector83~0 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[6]~6 .lut_mask = 16'hFFC0; +defparam \inst|next_mem_addr[6]~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N19 -dffeas \inst|PC_stack[4][2] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector83~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), +// Location: M9K_X53_Y38_N0 +fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a1 ( + .portawe(\inst|MW~q ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(gnd), + .ena0(vcc), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\inst|AC [12],\inst|AC [5],\inst|AC [4],\inst|AC [1]}), + .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , +\inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), + .portabyteenamasks(1'b1), + .portbdatain(4'b0000), + .portbaddr(11'b00000000000), + .portbbyteenamasks(1'b1), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][2]~q ), - .prn(vcc)); + .portadataout(\inst|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ), + .portbdataout()); // synopsys translate_off -defparam \inst|PC_stack[4][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][2] .power_up = "low"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .data_interleave_offset_in_bits = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .data_interleave_width_in_bits = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .init_file = "VelocityControl.mif"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .init_file_layout = "port_a"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .logical_ram_name = "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .operation_mode = "single_port"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_address_clear = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_address_width = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_byte_enable_clock = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_out_clear = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_out_clock = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_data_width = 4; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_first_address = 0; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_first_bit_number = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_last_address = 2047; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_logical_ram_depth = 2048; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_logical_ram_width = 16; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_b_address_width = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .port_b_data_width = 4; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .ram_block_type = "M9K"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a1 .mem_init0 = 2048'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000022100F000CD2C422584EC80A7990CE848E200C8A585; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N20 -fiftyfivenm_lcell_comb \inst|Selector72~0 ( +// Location: LCCOMB_X56_Y41_N12 +fiftyfivenm_lcell_comb \inst|Selector6~0 ( // Equation(s): -// \inst|Selector72~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][2]~q )) +// \inst|Selector6~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [5])) # (!\inst|WideNor0~combout & ((\inst|IR [5]))))) - .dataa(\inst|state.ex_return~q ), + .dataa(\inst|state.fetch~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [5]), + .datac(\inst|WideNor0~combout ), + .datad(\inst|IR [5]), + .cin(gnd), + .combout(\inst|Selector6~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector6~0 .lut_mask = 16'h4540; +defparam \inst|Selector6~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y41_N22 +fiftyfivenm_lcell_comb \inst|Selector6~1 ( +// Equation(s): +// \inst|Selector6~1_combout = (\inst|Selector6~0_combout ) # ((\inst|Add0~10_combout & \inst|state.fetch~q )) + + .dataa(\inst|Add0~10_combout ), + .datab(\inst|Selector6~0_combout ), + .datac(\inst|state.fetch~q ), + .datad(gnd), + .cin(gnd), + .combout(\inst|Selector6~1_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector6~1 .lut_mask = 16'hECEC; +defparam \inst|Selector6~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y42_N4 +fiftyfivenm_lcell_comb \inst|PC_stack[9][5]~feeder ( +// Equation(s): +// \inst|PC_stack[9][5]~feeder_combout = \inst|PC_stack[8][5]~q + + .dataa(gnd), .datab(gnd), - .datac(\inst|PC_stack[2][2]~q ), - .datad(\inst|PC_stack[4][2]~q ), + .datac(gnd), + .datad(\inst|PC_stack[8][5]~q ), .cin(gnd), - .combout(\inst|Selector72~0_combout ), + .combout(\inst|PC_stack[9][5]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector72~0 .lut_mask = 16'hFA50; -defparam \inst|Selector72~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[9][5]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][5]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N21 -dffeas \inst|PC_stack[3][2] ( +// Location: FF_X56_Y42_N5 +dffeas \inst|PC_stack[9][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector72~0_combout ), + .d(\inst|PC_stack[9][5]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][2]~q ), + .q(\inst|PC_stack[9][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][2] .power_up = "low"; +defparam \inst|PC_stack[9][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N12 -fiftyfivenm_lcell_comb \inst|Selector61~0 ( +// Location: LCCOMB_X57_Y41_N18 +fiftyfivenm_lcell_comb \inst|Selector124~0 ( // Equation(s): -// \inst|Selector61~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][2]~q ))) - - .dataa(\inst|PC_stack[3][2]~q ), - .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[1][2]~q ), +// \inst|Selector124~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][5]~q ))) + + .dataa(\inst|PC_stack[9][5]~q ), + .datab(\inst|state.ex_return~q ), + .datac(gnd), + .datad(\inst|PC_stack[7][5]~q ), .cin(gnd), - .combout(\inst|Selector61~0_combout ), + .combout(\inst|Selector124~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector61~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector61~0 .sum_lutc_input = "datac"; +defparam \inst|Selector124~0 .lut_mask = 16'hBB88; +defparam \inst|Selector124~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N13 -dffeas \inst|PC_stack[2][2] ( +// Location: FF_X57_Y41_N19 +dffeas \inst|PC_stack[8][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector61~0_combout ), + .d(\inst|Selector124~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20185,34 +20329,34 @@ dffeas \inst|PC_stack[2][2] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][2]~q ), + .q(\inst|PC_stack[8][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][2] .power_up = "low"; +defparam \inst|PC_stack[8][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N28 -fiftyfivenm_lcell_comb \inst|Selector50~0 ( +// Location: LCCOMB_X57_Y41_N28 +fiftyfivenm_lcell_comb \inst|Selector113~0 ( // Equation(s): -// \inst|Selector50~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[2][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[0][2]~q )) +// \inst|Selector113~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][5]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][5]~q )) - .dataa(\inst|PC_stack[0][2]~q ), - .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[2][2]~q ), + .dataa(gnd), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[6][5]~q ), + .datad(\inst|PC_stack[8][5]~q ), .cin(gnd), - .combout(\inst|Selector50~0_combout ), + .combout(\inst|Selector113~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector50~0 .lut_mask = 16'hFA0A; -defparam \inst|Selector50~0 .sum_lutc_input = "datac"; +defparam \inst|Selector113~0 .lut_mask = 16'hFC30; +defparam \inst|Selector113~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N29 -dffeas \inst|PC_stack[1][2] ( +// Location: FF_X57_Y41_N29 +dffeas \inst|PC_stack[7][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector50~0_combout ), + .d(\inst|Selector113~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20221,34 +20365,34 @@ dffeas \inst|PC_stack[1][2] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][2]~q ), + .q(\inst|PC_stack[7][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][2] .power_up = "low"; +defparam \inst|PC_stack[7][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N10 -fiftyfivenm_lcell_comb \inst|Selector39~0 ( +// Location: LCCOMB_X57_Y41_N14 +fiftyfivenm_lcell_comb \inst|Selector102~0 ( // Equation(s): -// \inst|Selector39~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [2])) +// \inst|Selector102~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][5]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][5]~q )) - .dataa(gnd), + .dataa(\inst|PC_stack[5][5]~q ), .datab(\inst|state.ex_return~q ), - .datac(\inst|PC [2]), - .datad(\inst|PC_stack[1][2]~q ), + .datac(gnd), + .datad(\inst|PC_stack[7][5]~q ), .cin(gnd), - .combout(\inst|Selector39~0_combout ), + .combout(\inst|Selector102~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector39~0 .lut_mask = 16'hFC30; -defparam \inst|Selector39~0 .sum_lutc_input = "datac"; +defparam \inst|Selector102~0 .lut_mask = 16'hEE22; +defparam \inst|Selector102~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N11 -dffeas \inst|PC_stack[0][2] ( +// Location: FF_X57_Y41_N15 +dffeas \inst|PC_stack[6][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector39~0_combout ), + .d(\inst|Selector102~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20257,53 +20401,70 @@ dffeas \inst|PC_stack[0][2] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][2]~q ), + .q(\inst|PC_stack[6][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][2] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][2] .power_up = "low"; +defparam \inst|PC_stack[6][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][5] .power_up = "low"; // synopsys translate_on -// Location: FF_X54_Y37_N9 -dffeas \inst|PC_stack[9][1] ( +// Location: LCCOMB_X57_Y41_N12 +fiftyfivenm_lcell_comb \inst|Selector91~0 ( +// Equation(s): +// \inst|Selector91~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][5]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][5]~q )) + + .dataa(\inst|PC_stack[4][5]~q ), + .datab(\inst|PC_stack[6][5]~q ), + .datac(gnd), + .datad(\inst|state.ex_return~q ), + .cin(gnd), + .combout(\inst|Selector91~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector91~0 .lut_mask = 16'hCCAA; +defparam \inst|Selector91~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X57_Y41_N13 +dffeas \inst|PC_stack[5][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|PC_stack[8][1]~q ), + .d(\inst|Selector91~0_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(\inst|PC_stack[9][0]~1_combout ), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][1]~q ), + .q(\inst|PC_stack[5][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][1] .power_up = "low"; +defparam \inst|PC_stack[5][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N22 -fiftyfivenm_lcell_comb \inst|Selector128~0 ( +// Location: LCCOMB_X57_Y41_N26 +fiftyfivenm_lcell_comb \inst|Selector80~0 ( // Equation(s): -// \inst|Selector128~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][1]~q ))) +// \inst|Selector80~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][5]~q ))) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[9][1]~q ), - .datad(\inst|PC_stack[7][1]~q ), + .dataa(\inst|PC_stack[5][5]~q ), + .datab(\inst|state.ex_return~q ), + .datac(gnd), + .datad(\inst|PC_stack[3][5]~q ), .cin(gnd), - .combout(\inst|Selector128~0_combout ), + .combout(\inst|Selector80~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector128~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector128~0 .sum_lutc_input = "datac"; +defparam \inst|Selector80~0 .lut_mask = 16'hBB88; +defparam \inst|Selector80~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N23 -dffeas \inst|PC_stack[8][1] ( +// Location: FF_X57_Y41_N27 +dffeas \inst|PC_stack[4][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector128~0_combout ), + .d(\inst|Selector80~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20312,34 +20473,34 @@ dffeas \inst|PC_stack[8][1] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][1]~q ), + .q(\inst|PC_stack[4][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][1] .power_up = "low"; +defparam \inst|PC_stack[4][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y37_N16 -fiftyfivenm_lcell_comb \inst|Selector117~0 ( +// Location: LCCOMB_X57_Y41_N20 +fiftyfivenm_lcell_comb \inst|Selector69~0 ( // Equation(s): -// \inst|Selector117~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][1]~q ))) +// \inst|Selector69~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][5]~q ))) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[8][1]~q ), - .datad(\inst|PC_stack[6][1]~q ), + .dataa(\inst|PC_stack[4][5]~q ), + .datab(\inst|state.ex_return~q ), + .datac(gnd), + .datad(\inst|PC_stack[2][5]~q ), .cin(gnd), - .combout(\inst|Selector117~0_combout ), + .combout(\inst|Selector69~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector117~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector117~0 .sum_lutc_input = "datac"; +defparam \inst|Selector69~0 .lut_mask = 16'hBB88; +defparam \inst|Selector69~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y37_N17 -dffeas \inst|PC_stack[7][1] ( +// Location: FF_X57_Y41_N21 +dffeas \inst|PC_stack[3][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector117~0_combout ), + .d(\inst|Selector69~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20348,34 +20509,34 @@ dffeas \inst|PC_stack[7][1] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][1]~q ), + .q(\inst|PC_stack[3][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][1] .power_up = "low"; +defparam \inst|PC_stack[3][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N18 -fiftyfivenm_lcell_comb \inst|Selector106~0 ( +// Location: LCCOMB_X57_Y41_N10 +fiftyfivenm_lcell_comb \inst|Selector58~0 ( // Equation(s): -// \inst|Selector106~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][1]~q ))) +// \inst|Selector58~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][5]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][5]~q )) - .dataa(\inst|state.ex_return~q ), - .datab(\inst|PC_stack[7][1]~q ), + .dataa(\inst|PC_stack[1][5]~q ), + .datab(\inst|state.ex_return~q ), .datac(gnd), - .datad(\inst|PC_stack[5][1]~q ), + .datad(\inst|PC_stack[3][5]~q ), .cin(gnd), - .combout(\inst|Selector106~0_combout ), + .combout(\inst|Selector58~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector106~0 .lut_mask = 16'hDD88; -defparam \inst|Selector106~0 .sum_lutc_input = "datac"; +defparam \inst|Selector58~0 .lut_mask = 16'hEE22; +defparam \inst|Selector58~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N19 -dffeas \inst|PC_stack[6][1] ( +// Location: FF_X57_Y41_N11 +dffeas \inst|PC_stack[2][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector106~0_combout ), + .d(\inst|Selector58~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20384,34 +20545,34 @@ dffeas \inst|PC_stack[6][1] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][1]~q ), + .q(\inst|PC_stack[2][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][1] .power_up = "low"; +defparam \inst|PC_stack[2][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N20 -fiftyfivenm_lcell_comb \inst|Selector95~0 ( +// Location: LCCOMB_X57_Y41_N6 +fiftyfivenm_lcell_comb \inst|Selector47~0 ( // Equation(s): -// \inst|Selector95~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][1]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][1]~q )) +// \inst|Selector47~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][5]~q ))) - .dataa(\inst|PC_stack[4][1]~q ), - .datab(\inst|PC_stack[6][1]~q ), + .dataa(\inst|PC_stack[2][5]~q ), + .datab(\inst|PC_stack[0][5]~q ), .datac(gnd), .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector95~0_combout ), + .combout(\inst|Selector47~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector95~0 .lut_mask = 16'hCCAA; -defparam \inst|Selector95~0 .sum_lutc_input = "datac"; +defparam \inst|Selector47~0 .lut_mask = 16'hAACC; +defparam \inst|Selector47~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N21 -dffeas \inst|PC_stack[5][1] ( +// Location: FF_X57_Y41_N7 +dffeas \inst|PC_stack[1][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector95~0_combout ), + .d(\inst|Selector47~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20420,34 +20581,34 @@ dffeas \inst|PC_stack[5][1] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][1]~q ), + .q(\inst|PC_stack[1][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][1] .power_up = "low"; +defparam \inst|PC_stack[1][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N6 -fiftyfivenm_lcell_comb \inst|Selector84~0 ( +// Location: LCCOMB_X57_Y41_N16 +fiftyfivenm_lcell_comb \inst|Selector36~0 ( // Equation(s): -// \inst|Selector84~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][1]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][1]~q )) +// \inst|Selector36~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][5]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [5]))) - .dataa(\inst|PC_stack[3][1]~q ), - .datab(\inst|PC_stack[5][1]~q ), + .dataa(\inst|PC_stack[1][5]~q ), + .datab(\inst|state.ex_return~q ), .datac(gnd), - .datad(\inst|state.ex_return~q ), + .datad(\inst|PC [5]), .cin(gnd), - .combout(\inst|Selector84~0_combout ), + .combout(\inst|Selector36~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector84~0 .lut_mask = 16'hCCAA; -defparam \inst|Selector84~0 .sum_lutc_input = "datac"; +defparam \inst|Selector36~0 .lut_mask = 16'hBB88; +defparam \inst|Selector36~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N7 -dffeas \inst|PC_stack[4][1] ( +// Location: FF_X57_Y41_N17 +dffeas \inst|PC_stack[0][5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector84~0_combout ), + .d(\inst|Selector36~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -20456,553 +20617,555 @@ dffeas \inst|PC_stack[4][1] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][1]~q ), + .q(\inst|PC_stack[0][5]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][1] .power_up = "low"; +defparam \inst|PC_stack[0][5] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N26 -fiftyfivenm_lcell_comb \inst|Selector73~0 ( +// Location: LCCOMB_X57_Y41_N2 +fiftyfivenm_lcell_comb \inst|Selector6~2 ( // Equation(s): -// \inst|Selector73~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][1]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][1]~q )) +// \inst|Selector6~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][5]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector6~1_combout & (\inst10|state.Init~q ))) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[2][1]~q ), - .datad(\inst|PC_stack[4][1]~q ), + .dataa(\inst|Selector6~1_combout ), + .datab(\inst|state.ex_return~q ), + .datac(\inst10|state.Init~q ), + .datad(\inst|PC_stack[0][5]~q ), .cin(gnd), - .combout(\inst|Selector73~0_combout ), + .combout(\inst|Selector6~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector73~0 .lut_mask = 16'hFA50; -defparam \inst|Selector73~0 .sum_lutc_input = "datac"; +defparam \inst|Selector6~2 .lut_mask = 16'hEC20; +defparam \inst|Selector6~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N27 -dffeas \inst|PC_stack[3][1] ( +// Location: FF_X57_Y41_N3 +dffeas \inst|PC[5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector73~0_combout ), + .d(\inst|Selector6~2_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][1]~q ), + .q(\inst|PC [5]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][1] .power_up = "low"; +defparam \inst|PC[5] .is_wysiwyg = "true"; +defparam \inst|PC[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N30 -fiftyfivenm_lcell_comb \inst|Selector62~0 ( +// Location: LCCOMB_X55_Y41_N30 +fiftyfivenm_lcell_comb \inst|next_mem_addr[5]~5 ( // Equation(s): -// \inst|Selector62~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][1]~q ))) +// \inst|next_mem_addr[5]~5_combout = (\inst|Selector6~0_combout ) # ((\inst|PC [5] & \inst|state.fetch~q )) - .dataa(\inst|PC_stack[3][1]~q ), - .datab(gnd), - .datac(\inst|PC_stack[1][1]~q ), - .datad(\inst|state.ex_return~q ), + .dataa(gnd), + .datab(\inst|PC [5]), + .datac(\inst|Selector6~0_combout ), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst|Selector62~0_combout ), + .combout(\inst|next_mem_addr[5]~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector62~0 .lut_mask = 16'hAAF0; -defparam \inst|Selector62~0 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[5]~5 .lut_mask = 16'hFCF0; +defparam \inst|next_mem_addr[5]~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N31 -dffeas \inst|PC_stack[2][1] ( +// Location: FF_X57_Y38_N31 +dffeas \inst|IR[4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector62~0_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst|altsyncram_component|auto_generated|q_a [4]), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .sload(vcc), + .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][1]~q ), + .q(\inst|IR [4]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][1] .power_up = "low"; +defparam \inst|IR[4] .is_wysiwyg = "true"; +defparam \inst|IR[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y40_N18 +fiftyfivenm_lcell_comb \inst|Selector19~4 ( +// Equation(s): +// \inst|Selector19~4_combout = (\inst|state.ex_shift~q & (!\inst|IR [4] & \inst|IR [3])) + + .dataa(\inst|state.ex_shift~q ), + .datab(\inst|IR [4]), + .datac(gnd), + .datad(\inst|IR [3]), + .cin(gnd), + .combout(\inst|Selector19~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector19~4 .lut_mask = 16'h2200; +defparam \inst|Selector19~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N22 -fiftyfivenm_lcell_comb \inst|Selector51~0 ( +// Location: LCCOMB_X56_Y37_N0 +fiftyfivenm_lcell_comb \inst|Selector14~1 ( // Equation(s): -// \inst|Selector51~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][1]~q ))) +// \inst|Selector14~1_combout = (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[53]~75_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[37]~39_combout )))) - .dataa(\inst|PC_stack[2][1]~q ), - .datab(\inst|PC_stack[0][1]~q ), - .datac(gnd), - .datad(\inst|state.ex_return~q ), + .dataa(\inst|Selector19~4_combout ), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[53]~75_combout ), + .datad(\inst|shifter|auto_generated|sbit_w[37]~39_combout ), .cin(gnd), - .combout(\inst|Selector51~0_combout ), + .combout(\inst|Selector14~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector51~0 .lut_mask = 16'hAACC; -defparam \inst|Selector51~0 .sum_lutc_input = "datac"; +defparam \inst|Selector14~1 .lut_mask = 16'hA2A0; +defparam \inst|Selector14~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N23 -dffeas \inst|PC_stack[1][1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector51~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[1][1]~q ), - .prn(vcc)); +// Location: LCCOMB_X56_Y37_N6 +fiftyfivenm_lcell_comb \inst|Selector14~2 ( +// Equation(s): +// \inst|Selector14~2_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & ((\inst|state.ex_or~q ) # (\inst|state.ex_load~q ))) + + .dataa(gnd), + .datab(\inst|state.ex_or~q ), + .datac(\inst|state.ex_load~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [13]), + .cin(gnd), + .combout(\inst|Selector14~2_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[1][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][1] .power_up = "low"; +defparam \inst|Selector14~2 .lut_mask = 16'hFC00; +defparam \inst|Selector14~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N28 -fiftyfivenm_lcell_comb \inst|Selector40~0 ( +// Location: LCCOMB_X56_Y37_N18 +fiftyfivenm_lcell_comb \inst|Selector14~4 ( // Equation(s): -// \inst|Selector40~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][1]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [1]))) +// \inst|Selector14~4_combout = (\inst|state.ex_xor~q & (\inst|AC [13] $ (\inst|altsyncram_component|auto_generated|q_a [13]))) - .dataa(\inst|PC_stack[1][1]~q ), - .datab(\inst|PC [1]), - .datac(gnd), - .datad(\inst|state.ex_return~q ), + .dataa(gnd), + .datab(\inst|AC [13]), + .datac(\inst|state.ex_xor~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [13]), .cin(gnd), - .combout(\inst|Selector40~0_combout ), + .combout(\inst|Selector14~4_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector40~0 .lut_mask = 16'hAACC; -defparam \inst|Selector40~0 .sum_lutc_input = "datac"; +defparam \inst|Selector14~4 .lut_mask = 16'h30C0; +defparam \inst|Selector14~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N29 -dffeas \inst|PC_stack[0][1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector40~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[0][1]~q ), - .prn(vcc)); +// Location: LCCOMB_X56_Y37_N8 +fiftyfivenm_lcell_comb \inst|Selector14~5 ( +// Equation(s): +// \inst|Selector14~5_combout = ((\inst|Selector14~4_combout ) # ((\inst|AC[3]~0_combout & \inst|Add1~71_combout ))) # (!\inst|Selector16~0_combout ) + + .dataa(\inst|Selector16~0_combout ), + .datab(\inst|Selector14~4_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Add1~71_combout ), + .cin(gnd), + .combout(\inst|Selector14~5_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[0][1] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][1] .power_up = "low"; +defparam \inst|Selector14~5 .lut_mask = 16'hFDDD; +defparam \inst|Selector14~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N0 -fiftyfivenm_lcell_comb \inst|Add0~0 ( +// Location: LCCOMB_X56_Y37_N24 +fiftyfivenm_lcell_comb \inst|Selector14~3 ( // Equation(s): -// \inst|Add0~0_combout = \inst|PC [0] $ (VCC) -// \inst|Add0~1 = CARRY(\inst|PC [0]) +// \inst|Selector14~3_combout = (\inst|AC [13] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [13])) # (!\inst|Selector27~6_combout ))) - .dataa(\inst|PC [0]), - .datab(gnd), - .datac(gnd), - .datad(vcc), + .dataa(\inst|state.ex_and~q ), + .datab(\inst|Selector27~6_combout ), + .datac(\inst|AC [13]), + .datad(\inst|altsyncram_component|auto_generated|q_a [13]), .cin(gnd), - .combout(\inst|Add0~0_combout ), - .cout(\inst|Add0~1 )); + .combout(\inst|Selector14~3_combout ), + .cout()); // synopsys translate_off -defparam \inst|Add0~0 .lut_mask = 16'h55AA; -defparam \inst|Add0~0 .sum_lutc_input = "datac"; +defparam \inst|Selector14~3 .lut_mask = 16'hB030; +defparam \inst|Selector14~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N14 -fiftyfivenm_lcell_comb \inst|Selector11~1 ( +// Location: LCCOMB_X56_Y37_N2 +fiftyfivenm_lcell_comb \inst|Selector14~6 ( // Equation(s): -// \inst|Selector11~1_combout = (\inst|Selector11~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~0_combout )) +// \inst|Selector14~6_combout = (\inst|Selector14~5_combout ) # ((\inst|Selector14~3_combout ) # ((\inst|shifter|auto_generated|sbit_w[61]~74_combout & \inst|Selector20~0_combout ))) - .dataa(\inst|state.fetch~q ), - .datab(gnd), - .datac(\inst|Add0~0_combout ), - .datad(\inst|Selector11~0_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[61]~74_combout ), + .datab(\inst|Selector14~5_combout ), + .datac(\inst|Selector14~3_combout ), + .datad(\inst|Selector20~0_combout ), .cin(gnd), - .combout(\inst|Selector11~1_combout ), + .combout(\inst|Selector14~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector11~1 .lut_mask = 16'hFFA0; -defparam \inst|Selector11~1 .sum_lutc_input = "datac"; +defparam \inst|Selector14~6 .lut_mask = 16'hFEFC; +defparam \inst|Selector14~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N5 -dffeas \inst|PC_stack[9][0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|PC_stack[8][0]~q ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|PC_stack[9][0]~1_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[9][0]~q ), - .prn(vcc)); +// Location: LCCOMB_X59_Y36_N2 +fiftyfivenm_lcell_comb \inst|Selector14~0 ( +// Equation(s): +// \inst|Selector14~0_combout = (\inst|state.ex_in2~q & (((\inst13|inst1[13]~84_combout & \inst13|inst1[13]~81_combout )) # (!\inst13|inst1[0]~24_combout ))) + + .dataa(\inst|state.ex_in2~q ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst13|inst1[13]~84_combout ), + .datad(\inst13|inst1[13]~81_combout ), + .cin(gnd), + .combout(\inst|Selector14~0_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][0] .power_up = "low"; +defparam \inst|Selector14~0 .lut_mask = 16'hA222; +defparam \inst|Selector14~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N10 -fiftyfivenm_lcell_comb \inst|Selector129~0 ( +// Location: LCCOMB_X59_Y37_N20 +fiftyfivenm_lcell_comb \inst|Selector14~7 ( // Equation(s): -// \inst|Selector129~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][0]~q )) +// \inst|Selector14~7_combout = (\inst|Selector14~1_combout ) # ((\inst|Selector14~2_combout ) # ((\inst|Selector14~6_combout ) # (\inst|Selector14~0_combout ))) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[7][0]~q ), - .datad(\inst|PC_stack[9][0]~q ), + .dataa(\inst|Selector14~1_combout ), + .datab(\inst|Selector14~2_combout ), + .datac(\inst|Selector14~6_combout ), + .datad(\inst|Selector14~0_combout ), .cin(gnd), - .combout(\inst|Selector129~0_combout ), + .combout(\inst|Selector14~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector129~0 .lut_mask = 16'hFA50; -defparam \inst|Selector129~0 .sum_lutc_input = "datac"; +defparam \inst|Selector14~7 .lut_mask = 16'hFFFE; +defparam \inst|Selector14~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N11 -dffeas \inst|PC_stack[8][0] ( +// Location: FF_X59_Y37_N21 +dffeas \inst|AC[13] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector129~0_combout ), + .d(\inst|Selector14~7_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][0]~q ), + .q(\inst|AC [13]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][0] .power_up = "low"; +defparam \inst|AC[13] .is_wysiwyg = "true"; +defparam \inst|AC[13] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N4 -fiftyfivenm_lcell_comb \inst|Selector118~0 ( +// Location: LCCOMB_X60_Y37_N20 +fiftyfivenm_lcell_comb \inst|Equal0~0 ( // Equation(s): -// \inst|Selector118~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][0]~q )) +// \inst|Equal0~0_combout = (!\inst|AC [13] & (!\inst|AC [15] & (!\inst|AC [12] & !\inst|AC [14]))) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[6][0]~q ), - .datad(\inst|PC_stack[8][0]~q ), + .dataa(\inst|AC [13]), + .datab(\inst|AC [15]), + .datac(\inst|AC [12]), + .datad(\inst|AC [14]), .cin(gnd), - .combout(\inst|Selector118~0_combout ), + .combout(\inst|Equal0~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector118~0 .lut_mask = 16'hFA50; -defparam \inst|Selector118~0 .sum_lutc_input = "datac"; +defparam \inst|Equal0~0 .lut_mask = 16'h0001; +defparam \inst|Equal0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N5 -dffeas \inst|PC_stack[7][0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector118~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[7][0]~q ), - .prn(vcc)); +// Location: LCCOMB_X58_Y37_N10 +fiftyfivenm_lcell_comb \inst|Equal0~2 ( +// Equation(s): +// \inst|Equal0~2_combout = (!\inst|AC [4] & (!\inst|AC [6] & (!\inst|AC [5] & !\inst|AC [7]))) + + .dataa(\inst|AC [4]), + .datab(\inst|AC [6]), + .datac(\inst|AC [5]), + .datad(\inst|AC [7]), + .cin(gnd), + .combout(\inst|Equal0~2_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[7][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][0] .power_up = "low"; +defparam \inst|Equal0~2 .lut_mask = 16'h0001; +defparam \inst|Equal0~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N22 -fiftyfivenm_lcell_comb \inst|Selector107~0 ( +// Location: LCCOMB_X57_Y34_N24 +fiftyfivenm_lcell_comb \inst|Equal0~3 ( // Equation(s): -// \inst|Selector107~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][0]~q ))) +// \inst|Equal0~3_combout = (!\inst|AC [2] & (!\inst|AC [0] & (!\inst|AC [3] & !\inst|AC [1]))) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[7][0]~q ), - .datad(\inst|PC_stack[5][0]~q ), + .dataa(\inst|AC [2]), + .datab(\inst|AC [0]), + .datac(\inst|AC [3]), + .datad(\inst|AC [1]), .cin(gnd), - .combout(\inst|Selector107~0_combout ), + .combout(\inst|Equal0~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector107~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector107~0 .sum_lutc_input = "datac"; +defparam \inst|Equal0~3 .lut_mask = 16'h0001; +defparam \inst|Equal0~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N23 -dffeas \inst|PC_stack[6][0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector107~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[6][0]~q ), - .prn(vcc)); +// Location: LCCOMB_X58_Y39_N24 +fiftyfivenm_lcell_comb \inst|Equal0~1 ( +// Equation(s): +// \inst|Equal0~1_combout = (!\inst|AC [10] & (!\inst|AC [11] & (!\inst|AC [9] & !\inst|AC [8]))) + + .dataa(\inst|AC [10]), + .datab(\inst|AC [11]), + .datac(\inst|AC [9]), + .datad(\inst|AC [8]), + .cin(gnd), + .combout(\inst|Equal0~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[6][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][0] .power_up = "low"; +defparam \inst|Equal0~1 .lut_mask = 16'h0001; +defparam \inst|Equal0~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N28 -fiftyfivenm_lcell_comb \inst|Selector96~0 ( +// Location: LCCOMB_X58_Y39_N6 +fiftyfivenm_lcell_comb \inst|Equal0~4 ( // Equation(s): -// \inst|Selector96~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][0]~q ))) +// \inst|Equal0~4_combout = (\inst|Equal0~0_combout & (\inst|Equal0~2_combout & (\inst|Equal0~3_combout & \inst|Equal0~1_combout ))) - .dataa(\inst|PC_stack[6][0]~q ), + .dataa(\inst|Equal0~0_combout ), + .datab(\inst|Equal0~2_combout ), + .datac(\inst|Equal0~3_combout ), + .datad(\inst|Equal0~1_combout ), + .cin(gnd), + .combout(\inst|Equal0~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Equal0~4 .lut_mask = 16'h8000; +defparam \inst|Equal0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y42_N30 +fiftyfivenm_lcell_comb \inst|state~52 ( +// Equation(s): +// \inst|state~52_combout = (!\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~43_combout )) + + .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), .datab(gnd), - .datac(\inst|PC_stack[4][0]~q ), - .datad(\inst|state.ex_return~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~43_combout ), .cin(gnd), - .combout(\inst|Selector96~0_combout ), + .combout(\inst|state~52_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector96~0 .lut_mask = 16'hAAF0; -defparam \inst|Selector96~0 .sum_lutc_input = "datac"; +defparam \inst|state~52 .lut_mask = 16'h5000; +defparam \inst|state~52 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N29 -dffeas \inst|PC_stack[5][0] ( +// Location: FF_X54_Y42_N31 +dffeas \inst|state.ex_jzero ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector96~0_combout ), + .d(\inst|state~52_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][0]~q ), + .q(\inst|state.ex_jzero~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][0] .power_up = "low"; +defparam \inst|state.ex_jzero .is_wysiwyg = "true"; +defparam \inst|state.ex_jzero .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N30 -fiftyfivenm_lcell_comb \inst|Selector85~0 ( +// Location: LCCOMB_X54_Y42_N0 +fiftyfivenm_lcell_comb \inst|state~51 ( // Equation(s): -// \inst|Selector85~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][0]~q )) +// \inst|state~51_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (!\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~35_combout )) - .dataa(gnd), - .datab(\inst|PC_stack[3][0]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][0]~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~35_combout ), .cin(gnd), - .combout(\inst|Selector85~0_combout ), + .combout(\inst|state~51_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector85~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector85~0 .sum_lutc_input = "datac"; +defparam \inst|state~51 .lut_mask = 16'h0A00; +defparam \inst|state~51 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N31 -dffeas \inst|PC_stack[4][0] ( +// Location: FF_X54_Y42_N1 +dffeas \inst|state.ex_jpos ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector85~0_combout ), + .d(\inst|state~51_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][0]~q ), + .q(\inst|state.ex_jpos~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][0] .power_up = "low"; +defparam \inst|state.ex_jpos .is_wysiwyg = "true"; +defparam \inst|state.ex_jpos .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N24 -fiftyfivenm_lcell_comb \inst|Selector74~0 ( +// Location: LCCOMB_X54_Y38_N6 +fiftyfivenm_lcell_comb \inst|state~53 ( // Equation(s): -// \inst|Selector74~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][0]~q ))) +// \inst|state~53_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~37_combout )) - .dataa(\inst|state.ex_return~q ), - .datab(gnd), - .datac(\inst|PC_stack[4][0]~q ), - .datad(\inst|PC_stack[2][0]~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), + .datac(gnd), + .datad(\inst|state~37_combout ), .cin(gnd), - .combout(\inst|Selector74~0_combout ), + .combout(\inst|state~53_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector74~0 .lut_mask = 16'hF5A0; -defparam \inst|Selector74~0 .sum_lutc_input = "datac"; +defparam \inst|state~53 .lut_mask = 16'h4400; +defparam \inst|state~53 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N25 -dffeas \inst|PC_stack[3][0] ( +// Location: FF_X54_Y38_N7 +dffeas \inst|state.ex_jneg ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector74~0_combout ), + .d(\inst|state~53_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][0]~q ), + .q(\inst|state.ex_jneg~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][0] .power_up = "low"; +defparam \inst|state.ex_jneg .is_wysiwyg = "true"; +defparam \inst|state.ex_jneg .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N18 -fiftyfivenm_lcell_comb \inst|Selector63~0 ( +// Location: LCCOMB_X54_Y38_N12 +fiftyfivenm_lcell_comb \inst|state~54 ( // Equation(s): -// \inst|Selector63~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[3][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[1][0]~q ))) +// \inst|state~54_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|Selector30~0_combout )) - .dataa(gnd), - .datab(\inst|PC_stack[3][0]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[1][0]~q ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), + .datac(gnd), + .datad(\inst|Selector30~0_combout ), .cin(gnd), - .combout(\inst|Selector63~0_combout ), + .combout(\inst|state~54_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector63~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector63~0 .sum_lutc_input = "datac"; +defparam \inst|state~54 .lut_mask = 16'h4400; +defparam \inst|state~54 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N19 -dffeas \inst|PC_stack[2][0] ( +// Location: FF_X54_Y38_N13 +dffeas \inst|state.ex_jump ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector63~0_combout ), + .d(\inst|state~54_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][0]~q ), + .q(\inst|state.ex_jump~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][0] .power_up = "low"; +defparam \inst|state.ex_jump .is_wysiwyg = "true"; +defparam \inst|state.ex_jump .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N12 -fiftyfivenm_lcell_comb \inst|Selector52~0 ( +// Location: LCCOMB_X55_Y42_N6 +fiftyfivenm_lcell_comb \inst|WideOr2~0 ( // Equation(s): -// \inst|Selector52~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][0]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][0]~q ))) +// \inst|WideOr2~0_combout = (!\inst|state.fetch~q & (!\inst|state.ex_return~q & (\inst10|state.Init~q & !\inst|state.ex_call~q ))) - .dataa(gnd), - .datab(\inst|PC_stack[2][0]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][0]~q ), + .dataa(\inst|state.fetch~q ), + .datab(\inst|state.ex_return~q ), + .datac(\inst10|state.Init~q ), + .datad(\inst|state.ex_call~q ), .cin(gnd), - .combout(\inst|Selector52~0_combout ), + .combout(\inst|WideOr2~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector52~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector52~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X52_Y38_N13 -dffeas \inst|PC_stack[1][0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector52~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[1][0]~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|PC_stack[1][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][0] .power_up = "low"; +defparam \inst|WideOr2~0 .lut_mask = 16'h0010; +defparam \inst|WideOr2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N20 -fiftyfivenm_lcell_comb \inst|Selector41~0 ( +// Location: LCCOMB_X54_Y38_N10 +fiftyfivenm_lcell_comb \inst|PC[0]~0 ( // Equation(s): -// \inst|Selector41~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][0]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [0])) +// \inst|PC[0]~0_combout = (\inst|state.ex_jneg~q & (((!\inst|AC [15])))) # (!\inst|state.ex_jneg~q & (!\inst|state.ex_jump~q & ((\inst|WideOr2~0_combout )))) - .dataa(gnd), - .datab(\inst|PC [0]), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[1][0]~q ), + .dataa(\inst|state.ex_jneg~q ), + .datab(\inst|state.ex_jump~q ), + .datac(\inst|AC [15]), + .datad(\inst|WideOr2~0_combout ), .cin(gnd), - .combout(\inst|Selector41~0_combout ), + .combout(\inst|PC[0]~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector41~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector41~0 .sum_lutc_input = "datac"; +defparam \inst|PC[0]~0 .lut_mask = 16'h1B0A; +defparam \inst|PC[0]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N21 -dffeas \inst|PC_stack[0][0] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector41~0_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|PC_stack[0][0]~q ), - .prn(vcc)); +// Location: LCCOMB_X58_Y39_N16 +fiftyfivenm_lcell_comb \inst|PC[0]~1 ( +// Equation(s): +// \inst|PC[0]~1_combout = (\inst|state.ex_jpos~q & (\inst|Equal0~4_combout )) # (!\inst|state.ex_jpos~q & ((\inst|state.ex_jzero~q & (!\inst|Equal0~4_combout )) # (!\inst|state.ex_jzero~q & ((\inst|PC[0]~0_combout ))))) + + .dataa(\inst|Equal0~4_combout ), + .datab(\inst|state.ex_jzero~q ), + .datac(\inst|state.ex_jpos~q ), + .datad(\inst|PC[0]~0_combout ), + .cin(gnd), + .combout(\inst|PC[0]~1_combout ), + .cout()); // synopsys translate_off -defparam \inst|PC_stack[0][0] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][0] .power_up = "low"; +defparam \inst|PC[0]~1 .lut_mask = 16'hA7A4; +defparam \inst|PC[0]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y38_N2 -fiftyfivenm_lcell_comb \inst|Selector11~2 ( +// Location: LCCOMB_X58_Y39_N14 +fiftyfivenm_lcell_comb \inst|PC[0]~2 ( // Equation(s): -// \inst|Selector11~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][0]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector11~1_combout ))) +// \inst|PC[0]~2_combout = (\inst13|inst14|data_out[7]~0_combout & (!\inst|PC[0]~1_combout & ((!\inst|AC [15]) # (!\inst|state.ex_jpos~q )))) - .dataa(\inst|state.ex_return~q ), - .datab(\inst10|state.Init~q ), - .datac(\inst|Selector11~1_combout ), - .datad(\inst|PC_stack[0][0]~q ), + .dataa(\inst13|inst14|data_out[7]~0_combout ), + .datab(\inst|PC[0]~1_combout ), + .datac(\inst|state.ex_jpos~q ), + .datad(\inst|AC [15]), .cin(gnd), - .combout(\inst|Selector11~2_combout ), + .combout(\inst|PC[0]~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector11~2 .lut_mask = 16'hEA40; -defparam \inst|Selector11~2 .sum_lutc_input = "datac"; +defparam \inst|PC[0]~2 .lut_mask = 16'h0222; +defparam \inst|PC[0]~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y38_N3 +// Location: FF_X54_Y40_N23 dffeas \inst|PC[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(\inst|Selector11~2_combout ), @@ -21021,7 +21184,7 @@ defparam \inst|PC[0] .is_wysiwyg = "true"; defparam \inst|PC[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N2 +// Location: LCCOMB_X55_Y41_N2 fiftyfivenm_lcell_comb \inst|Add0~2 ( // Equation(s): // \inst|Add0~2_combout = (\inst|PC [1] & (!\inst|Add0~1 )) # (!\inst|PC [1] & ((\inst|Add0~1 ) # (GND))) @@ -21039,41 +21202,41 @@ defparam \inst|Add0~2 .lut_mask = 16'h3C3F; defparam \inst|Add0~2 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N10 +// Location: LCCOMB_X54_Y40_N16 fiftyfivenm_lcell_comb \inst|Selector10~1 ( // Equation(s): // \inst|Selector10~1_combout = (\inst|Selector10~0_combout ) # ((\inst|state.fetch~q & \inst|Add0~2_combout )) - .dataa(gnd), - .datab(\inst|state.fetch~q ), - .datac(\inst|Add0~2_combout ), - .datad(\inst|Selector10~0_combout ), + .dataa(\inst|state.fetch~q ), + .datab(gnd), + .datac(\inst|Selector10~0_combout ), + .datad(\inst|Add0~2_combout ), .cin(gnd), .combout(\inst|Selector10~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector10~1 .lut_mask = 16'hFFC0; +defparam \inst|Selector10~1 .lut_mask = 16'hFAF0; defparam \inst|Selector10~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y39_N0 +// Location: LCCOMB_X52_Y42_N24 fiftyfivenm_lcell_comb \inst|Selector10~2 ( // Equation(s): -// \inst|Selector10~2_combout = (\inst|state.ex_return~q & (\inst|PC_stack[0][1]~q )) # (!\inst|state.ex_return~q & (((\inst|Selector10~1_combout & \inst10|state.Init~q )))) +// \inst|Selector10~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][1]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & ((\inst|Selector10~1_combout )))) .dataa(\inst|state.ex_return~q ), - .datab(\inst|PC_stack[0][1]~q ), - .datac(\inst|Selector10~1_combout ), - .datad(\inst10|state.Init~q ), + .datab(\inst10|state.Init~q ), + .datac(\inst|PC_stack[0][1]~q ), + .datad(\inst|Selector10~1_combout ), .cin(gnd), .combout(\inst|Selector10~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector10~2 .lut_mask = 16'hD888; +defparam \inst|Selector10~2 .lut_mask = 16'hE4A0; defparam \inst|Selector10~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y39_N1 +// Location: FF_X52_Y42_N25 dffeas \inst|PC[1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(\inst|Selector10~2_combout ), @@ -21092,151 +21255,242 @@ defparam \inst|PC[1] .is_wysiwyg = "true"; defparam \inst|PC[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N4 +// Location: LCCOMB_X55_Y41_N4 fiftyfivenm_lcell_comb \inst|Add0~4 ( // Equation(s): // \inst|Add0~4_combout = (\inst|PC [2] & (\inst|Add0~3 $ (GND))) # (!\inst|PC [2] & (!\inst|Add0~3 & VCC)) // \inst|Add0~5 = CARRY((\inst|PC [2] & !\inst|Add0~3 )) - .dataa(\inst|PC [2]), - .datab(gnd), + .dataa(gnd), + .datab(\inst|PC [2]), .datac(gnd), .datad(vcc), .cin(\inst|Add0~3 ), .combout(\inst|Add0~4_combout ), .cout(\inst|Add0~5 )); // synopsys translate_off -defparam \inst|Add0~4 .lut_mask = 16'hA50A; +defparam \inst|Add0~4 .lut_mask = 16'hC30C; defparam \inst|Add0~4 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N0 +// Location: LCCOMB_X58_Y42_N14 fiftyfivenm_lcell_comb \inst|Selector9~1 ( // Equation(s): // \inst|Selector9~1_combout = (\inst|Selector9~0_combout ) # ((\inst|Add0~4_combout & \inst|state.fetch~q )) - .dataa(\inst|Selector9~0_combout ), - .datab(gnd), - .datac(\inst|Add0~4_combout ), - .datad(\inst|state.fetch~q ), + .dataa(gnd), + .datab(\inst|Add0~4_combout ), + .datac(\inst|state.fetch~q ), + .datad(\inst|Selector9~0_combout ), .cin(gnd), .combout(\inst|Selector9~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector9~1 .lut_mask = 16'hFAAA; -defparam \inst|Selector9~1 .sum_lutc_input = "datac"; +defparam \inst|Selector9~1 .lut_mask = 16'hFFC0; +defparam \inst|Selector9~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y42_N20 +fiftyfivenm_lcell_comb \inst|PC_stack[9][2]~feeder ( +// Equation(s): +// \inst|PC_stack[9][2]~feeder_combout = \inst|PC_stack[8][2]~q + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst|PC_stack[8][2]~q ), + .cin(gnd), + .combout(\inst|PC_stack[9][2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst|PC_stack[9][2]~feeder .lut_mask = 16'hFF00; +defparam \inst|PC_stack[9][2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X60_Y42_N21 +dffeas \inst|PC_stack[9][2] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|PC_stack[9][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[9][0]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[9][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[9][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y42_N24 +fiftyfivenm_lcell_comb \inst|Selector127~0 ( +// Equation(s): +// \inst|Selector127~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][2]~q ))) + + .dataa(gnd), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[9][2]~q ), + .datad(\inst|PC_stack[7][2]~q ), + .cin(gnd), + .combout(\inst|Selector127~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector127~0 .lut_mask = 16'hF3C0; +defparam \inst|Selector127~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X60_Y42_N25 +dffeas \inst|PC_stack[8][2] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector127~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[8][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[8][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N4 -fiftyfivenm_lcell_comb \inst|Selector9~2 ( +// Location: LCCOMB_X60_Y42_N16 +fiftyfivenm_lcell_comb \inst|Selector116~0 ( // Equation(s): -// \inst|Selector9~2_combout = (\inst|state.ex_return~q & (\inst|PC_stack[0][2]~q )) # (!\inst|state.ex_return~q & (((\inst|Selector9~1_combout & \inst10|state.Init~q )))) +// \inst|Selector116~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[8][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[6][2]~q ))) - .dataa(\inst|PC_stack[0][2]~q ), - .datab(\inst|Selector9~1_combout ), - .datac(\inst|state.ex_return~q ), - .datad(\inst10|state.Init~q ), + .dataa(gnd), + .datab(\inst|PC_stack[8][2]~q ), + .datac(\inst|PC_stack[6][2]~q ), + .datad(\inst|state.ex_return~q ), .cin(gnd), - .combout(\inst|Selector9~2_combout ), + .combout(\inst|Selector116~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector9~2 .lut_mask = 16'hACA0; -defparam \inst|Selector9~2 .sum_lutc_input = "datac"; +defparam \inst|Selector116~0 .lut_mask = 16'hCCF0; +defparam \inst|Selector116~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N5 -dffeas \inst|PC[2] ( +// Location: FF_X60_Y42_N17 +dffeas \inst|PC_stack[7][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector9~2_combout ), + .d(\inst|Selector116~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [2]), + .q(\inst|PC_stack[7][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[2] .is_wysiwyg = "true"; -defparam \inst|PC[2] .power_up = "low"; +defparam \inst|PC_stack[7][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N24 -fiftyfivenm_lcell_comb \inst|Selector8~1 ( +// Location: LCCOMB_X60_Y42_N28 +fiftyfivenm_lcell_comb \inst|Selector105~0 ( // Equation(s): -// \inst|Selector8~1_combout = (\inst|Selector8~0_combout ) # ((\inst|Add0~6_combout & \inst|state.fetch~q )) +// \inst|Selector105~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][2]~q )) - .dataa(\inst|Selector8~0_combout ), - .datab(gnd), - .datac(\inst|Add0~6_combout ), - .datad(\inst|state.fetch~q ), + .dataa(gnd), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[5][2]~q ), + .datad(\inst|PC_stack[7][2]~q ), .cin(gnd), - .combout(\inst|Selector8~1_combout ), + .combout(\inst|Selector105~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector8~1 .lut_mask = 16'hFAAA; -defparam \inst|Selector8~1 .sum_lutc_input = "datac"; +defparam \inst|Selector105~0 .lut_mask = 16'hFC30; +defparam \inst|Selector105~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X60_Y42_N29 +dffeas \inst|PC_stack[6][2] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector105~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[6][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[6][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y43_N6 -fiftyfivenm_lcell_comb \inst|PC_stack[9][3]~feeder ( +// Location: LCCOMB_X60_Y42_N8 +fiftyfivenm_lcell_comb \inst|Selector94~0 ( // Equation(s): -// \inst|PC_stack[9][3]~feeder_combout = \inst|PC_stack[8][3]~q +// \inst|Selector94~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[6][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[4][2]~q )) .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst|PC_stack[8][3]~q ), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[4][2]~q ), + .datad(\inst|PC_stack[6][2]~q ), .cin(gnd), - .combout(\inst|PC_stack[9][3]~feeder_combout ), + .combout(\inst|Selector94~0_combout ), .cout()); // synopsys translate_off -defparam \inst|PC_stack[9][3]~feeder .lut_mask = 16'hFF00; -defparam \inst|PC_stack[9][3]~feeder .sum_lutc_input = "datac"; +defparam \inst|Selector94~0 .lut_mask = 16'hFC30; +defparam \inst|Selector94~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y43_N7 -dffeas \inst|PC_stack[9][3] ( +// Location: FF_X60_Y42_N9 +dffeas \inst|PC_stack[5][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|PC_stack[9][3]~feeder_combout ), + .d(\inst|Selector94~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[9][0]~1_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[9][3]~q ), + .q(\inst|PC_stack[5][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[9][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[9][3] .power_up = "low"; +defparam \inst|PC_stack[5][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N6 -fiftyfivenm_lcell_comb \inst|Selector126~0 ( +// Location: LCCOMB_X60_Y42_N4 +fiftyfivenm_lcell_comb \inst|Selector83~0 ( // Equation(s): -// \inst|Selector126~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[9][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[7][3]~q )) +// \inst|Selector83~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][2]~q ))) .dataa(gnd), - .datab(\inst|PC_stack[7][3]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[9][3]~q ), + .datab(\inst|state.ex_return~q ), + .datac(\inst|PC_stack[5][2]~q ), + .datad(\inst|PC_stack[3][2]~q ), .cin(gnd), - .combout(\inst|Selector126~0_combout ), + .combout(\inst|Selector83~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector126~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector126~0 .sum_lutc_input = "datac"; +defparam \inst|Selector83~0 .lut_mask = 16'hF3C0; +defparam \inst|Selector83~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N7 -dffeas \inst|PC_stack[8][3] ( +// Location: FF_X60_Y42_N5 +dffeas \inst|PC_stack[4][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector126~0_combout ), + .d(\inst|Selector83~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21245,34 +21499,34 @@ dffeas \inst|PC_stack[8][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[8][3]~q ), + .q(\inst|PC_stack[4][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[8][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[8][3] .power_up = "low"; +defparam \inst|PC_stack[4][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N24 -fiftyfivenm_lcell_comb \inst|Selector115~0 ( +// Location: LCCOMB_X58_Y42_N6 +fiftyfivenm_lcell_comb \inst|Selector72~0 ( // Equation(s): -// \inst|Selector115~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][3]~q )) +// \inst|Selector72~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[4][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[2][2]~q ))) - .dataa(\inst|PC_stack[6][3]~q ), + .dataa(\inst|state.ex_return~q ), .datab(gnd), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[8][3]~q ), + .datac(\inst|PC_stack[4][2]~q ), + .datad(\inst|PC_stack[2][2]~q ), .cin(gnd), - .combout(\inst|Selector115~0_combout ), + .combout(\inst|Selector72~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector115~0 .lut_mask = 16'hFA0A; -defparam \inst|Selector115~0 .sum_lutc_input = "datac"; +defparam \inst|Selector72~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector72~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N25 -dffeas \inst|PC_stack[7][3] ( +// Location: FF_X58_Y42_N7 +dffeas \inst|PC_stack[3][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector115~0_combout ), + .d(\inst|Selector72~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21281,34 +21535,34 @@ dffeas \inst|PC_stack[7][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[7][3]~q ), + .q(\inst|PC_stack[3][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[7][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[7][3] .power_up = "low"; +defparam \inst|PC_stack[3][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N22 -fiftyfivenm_lcell_comb \inst|Selector104~0 ( +// Location: LCCOMB_X58_Y42_N2 +fiftyfivenm_lcell_comb \inst|Selector61~0 ( // Equation(s): -// \inst|Selector104~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[7][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[5][3]~q ))) +// \inst|Selector61~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][2]~q )) - .dataa(gnd), - .datab(\inst|PC_stack[7][3]~q ), + .dataa(\inst|PC_stack[1][2]~q ), + .datab(gnd), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][3]~q ), + .datad(\inst|PC_stack[3][2]~q ), .cin(gnd), - .combout(\inst|Selector104~0_combout ), + .combout(\inst|Selector61~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector104~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector104~0 .sum_lutc_input = "datac"; +defparam \inst|Selector61~0 .lut_mask = 16'hFA0A; +defparam \inst|Selector61~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N23 -dffeas \inst|PC_stack[6][3] ( +// Location: FF_X58_Y42_N3 +dffeas \inst|PC_stack[2][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector104~0_combout ), + .d(\inst|Selector61~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21317,34 +21571,34 @@ dffeas \inst|PC_stack[6][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[6][3]~q ), + .q(\inst|PC_stack[2][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[6][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[6][3] .power_up = "low"; +defparam \inst|PC_stack[2][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N16 -fiftyfivenm_lcell_comb \inst|Selector93~0 ( +// Location: LCCOMB_X58_Y42_N10 +fiftyfivenm_lcell_comb \inst|Selector50~0 ( // Equation(s): -// \inst|Selector93~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][3]~q ))) +// \inst|Selector50~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][2]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][2]~q ))) - .dataa(\inst|PC_stack[6][3]~q ), - .datab(gnd), + .dataa(gnd), + .datab(\inst|PC_stack[2][2]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[4][3]~q ), + .datad(\inst|PC_stack[0][2]~q ), .cin(gnd), - .combout(\inst|Selector93~0_combout ), + .combout(\inst|Selector50~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector93~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector93~0 .sum_lutc_input = "datac"; +defparam \inst|Selector50~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector50~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N17 -dffeas \inst|PC_stack[5][3] ( +// Location: FF_X58_Y42_N11 +dffeas \inst|PC_stack[1][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector93~0_combout ), + .d(\inst|Selector50~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21353,34 +21607,34 @@ dffeas \inst|PC_stack[5][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[5][3]~q ), + .q(\inst|PC_stack[1][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[5][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[5][3] .power_up = "low"; +defparam \inst|PC_stack[1][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N2 -fiftyfivenm_lcell_comb \inst|Selector82~0 ( +// Location: LCCOMB_X58_Y42_N0 +fiftyfivenm_lcell_comb \inst|Selector39~0 ( // Equation(s): -// \inst|Selector82~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[5][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[3][3]~q )) +// \inst|Selector39~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[1][2]~q ))) # (!\inst|state.ex_return~q & (\inst|PC [2])) - .dataa(gnd), - .datab(\inst|PC_stack[3][3]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[5][3]~q ), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC [2]), + .datad(\inst|PC_stack[1][2]~q ), .cin(gnd), - .combout(\inst|Selector82~0_combout ), + .combout(\inst|Selector39~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector82~0 .lut_mask = 16'hFC0C; -defparam \inst|Selector82~0 .sum_lutc_input = "datac"; +defparam \inst|Selector39~0 .lut_mask = 16'hFA50; +defparam \inst|Selector39~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N3 -dffeas \inst|PC_stack[4][3] ( +// Location: FF_X58_Y42_N1 +dffeas \inst|PC_stack[0][2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector82~0_combout ), + .d(\inst|Selector39~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21389,106 +21643,123 @@ dffeas \inst|PC_stack[4][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[4][3]~q ), + .q(\inst|PC_stack[0][2]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[4][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[4][3] .power_up = "low"; +defparam \inst|PC_stack[0][2] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N20 -fiftyfivenm_lcell_comb \inst|Selector71~0 ( +// Location: LCCOMB_X58_Y42_N8 +fiftyfivenm_lcell_comb \inst|Selector9~2 ( // Equation(s): -// \inst|Selector71~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][3]~q )) +// \inst|Selector9~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][2]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector9~1_combout & (\inst10|state.Init~q ))) - .dataa(\inst|PC_stack[2][3]~q ), - .datab(\inst|PC_stack[4][3]~q ), - .datac(\inst|state.ex_return~q ), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|Selector9~1_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst|PC_stack[0][2]~q ), .cin(gnd), - .combout(\inst|Selector71~0_combout ), + .combout(\inst|Selector9~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector71~0 .lut_mask = 16'hCACA; -defparam \inst|Selector71~0 .sum_lutc_input = "datac"; +defparam \inst|Selector9~2 .lut_mask = 16'hEA40; +defparam \inst|Selector9~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N21 -dffeas \inst|PC_stack[3][3] ( +// Location: FF_X58_Y42_N9 +dffeas \inst|PC[2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector71~0_combout ), + .d(\inst|Selector9~2_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[3][3]~q ), + .q(\inst|PC [2]), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[3][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[3][3] .power_up = "low"; +defparam \inst|PC[2] .is_wysiwyg = "true"; +defparam \inst|PC[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N26 -fiftyfivenm_lcell_comb \inst|Selector60~0 ( +// Location: LCCOMB_X55_Y41_N26 +fiftyfivenm_lcell_comb \inst|Selector8~0 ( // Equation(s): -// \inst|Selector60~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][3]~q )) +// \inst|Selector8~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [3]))) # (!\inst|WideNor0~combout & (\inst|IR [3])))) + + .dataa(\inst|WideNor0~combout ), + .datab(\inst|IR [3]), + .datac(\inst|state.fetch~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [3]), + .cin(gnd), + .combout(\inst|Selector8~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector8~0 .lut_mask = 16'h0E04; +defparam \inst|Selector8~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y41_N2 +fiftyfivenm_lcell_comb \inst|Selector8~1 ( +// Equation(s): +// \inst|Selector8~1_combout = (\inst|Selector8~0_combout ) # ((\inst|Add0~6_combout & \inst|state.fetch~q )) .dataa(gnd), - .datab(\inst|state.ex_return~q ), - .datac(\inst|PC_stack[1][3]~q ), - .datad(\inst|PC_stack[3][3]~q ), + .datab(\inst|Add0~6_combout ), + .datac(\inst|state.fetch~q ), + .datad(\inst|Selector8~0_combout ), .cin(gnd), - .combout(\inst|Selector60~0_combout ), + .combout(\inst|Selector8~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector60~0 .lut_mask = 16'hFC30; -defparam \inst|Selector60~0 .sum_lutc_input = "datac"; +defparam \inst|Selector8~1 .lut_mask = 16'hFFC0; +defparam \inst|Selector8~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N27 -dffeas \inst|PC_stack[2][3] ( +// Location: FF_X52_Y40_N1 +dffeas \inst|PC_stack[9][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector60~0_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst|PC_stack[8][3]~q ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst|PC_stack[0][0]~0_combout ), + .sload(vcc), + .ena(\inst|PC_stack[9][0]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[2][3]~q ), + .q(\inst|PC_stack[9][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[2][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[2][3] .power_up = "low"; +defparam \inst|PC_stack[9][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[9][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N14 -fiftyfivenm_lcell_comb \inst|Selector49~0 ( +// Location: LCCOMB_X52_Y41_N30 +fiftyfivenm_lcell_comb \inst|Selector126~0 ( // Equation(s): -// \inst|Selector49~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][3]~q ))) +// \inst|Selector126~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[9][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[7][3]~q ))) - .dataa(\inst|PC_stack[2][3]~q ), + .dataa(\inst|PC_stack[9][3]~q ), .datab(gnd), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][3]~q ), + .datad(\inst|PC_stack[7][3]~q ), .cin(gnd), - .combout(\inst|Selector49~0_combout ), + .combout(\inst|Selector126~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector49~0 .lut_mask = 16'hAFA0; -defparam \inst|Selector49~0 .sum_lutc_input = "datac"; +defparam \inst|Selector126~0 .lut_mask = 16'hAFA0; +defparam \inst|Selector126~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N15 -dffeas \inst|PC_stack[1][3] ( +// Location: FF_X52_Y41_N31 +dffeas \inst|PC_stack[8][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector49~0_combout ), + .d(\inst|Selector126~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21497,34 +21768,34 @@ dffeas \inst|PC_stack[1][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[1][3]~q ), + .q(\inst|PC_stack[8][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[1][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[1][3] .power_up = "low"; +defparam \inst|PC_stack[8][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[8][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N18 -fiftyfivenm_lcell_comb \inst|Selector38~0 ( +// Location: LCCOMB_X52_Y41_N16 +fiftyfivenm_lcell_comb \inst|Selector115~0 ( // Equation(s): -// \inst|Selector38~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [3]))) +// \inst|Selector115~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[8][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[6][3]~q )) - .dataa(gnd), - .datab(\inst|PC_stack[1][3]~q ), - .datac(\inst|state.ex_return~q ), - .datad(\inst|PC [3]), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[6][3]~q ), + .datad(\inst|PC_stack[8][3]~q ), .cin(gnd), - .combout(\inst|Selector38~0_combout ), + .combout(\inst|Selector115~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector38~0 .lut_mask = 16'hCFC0; -defparam \inst|Selector38~0 .sum_lutc_input = "datac"; +defparam \inst|Selector115~0 .lut_mask = 16'hFA50; +defparam \inst|Selector115~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N19 -dffeas \inst|PC_stack[0][3] ( +// Location: FF_X52_Y41_N17 +dffeas \inst|PC_stack[7][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector38~0_combout ), + .d(\inst|Selector115~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -21533,458 +21804,356 @@ dffeas \inst|PC_stack[0][3] ( .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC_stack[0][3]~q ), + .q(\inst|PC_stack[7][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC_stack[0][3] .is_wysiwyg = "true"; -defparam \inst|PC_stack[0][3] .power_up = "low"; +defparam \inst|PC_stack[7][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[7][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X55_Y40_N8 -fiftyfivenm_lcell_comb \inst|Selector8~2 ( +// Location: LCCOMB_X52_Y41_N22 +fiftyfivenm_lcell_comb \inst|Selector104~0 ( // Equation(s): -// \inst|Selector8~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][3]~q )))) # (!\inst|state.ex_return~q & (\inst10|state.Init~q & (\inst|Selector8~1_combout ))) +// \inst|Selector104~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[7][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[5][3]~q )) - .dataa(\inst10|state.Init~q ), - .datab(\inst|Selector8~1_combout ), + .dataa(gnd), + .datab(\inst|PC_stack[5][3]~q ), .datac(\inst|state.ex_return~q ), - .datad(\inst|PC_stack[0][3]~q ), + .datad(\inst|PC_stack[7][3]~q ), .cin(gnd), - .combout(\inst|Selector8~2_combout ), + .combout(\inst|Selector104~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector8~2 .lut_mask = 16'hF808; -defparam \inst|Selector8~2 .sum_lutc_input = "datac"; +defparam \inst|Selector104~0 .lut_mask = 16'hFC0C; +defparam \inst|Selector104~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X55_Y40_N9 -dffeas \inst|PC[3] ( +// Location: FF_X52_Y41_N23 +dffeas \inst|PC_stack[6][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector8~2_combout ), + .d(\inst|Selector104~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst|PC[0]~2_combout ), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|PC [3]), + .q(\inst|PC_stack[6][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|PC[3] .is_wysiwyg = "true"; -defparam \inst|PC[3] .power_up = "low"; +defparam \inst|PC_stack[6][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[6][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y40_N22 -fiftyfivenm_lcell_comb \inst|next_mem_addr[3]~3 ( +// Location: LCCOMB_X52_Y41_N20 +fiftyfivenm_lcell_comb \inst|Selector93~0 ( // Equation(s): -// \inst|next_mem_addr[3]~3_combout = (\inst|Selector8~0_combout ) # ((\inst|state.fetch~q & \inst|PC [3])) +// \inst|Selector93~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[6][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[4][3]~q ))) - .dataa(\inst|state.fetch~q ), - .datab(\inst|PC [3]), - .datac(gnd), - .datad(\inst|Selector8~0_combout ), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[6][3]~q ), + .datad(\inst|PC_stack[4][3]~q ), .cin(gnd), - .combout(\inst|next_mem_addr[3]~3_combout ), + .combout(\inst|Selector93~0_combout ), .cout()); // synopsys translate_off -defparam \inst|next_mem_addr[3]~3 .lut_mask = 16'hFF88; -defparam \inst|next_mem_addr[3]~3 .sum_lutc_input = "datac"; +defparam \inst|Selector93~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector93~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y43_N21 -dffeas \inst|IR[2] ( +// Location: FF_X52_Y41_N21 +dffeas \inst|PC_stack[5][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [2]), + .d(\inst|Selector93~0_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IR [2]), + .q(\inst|PC_stack[5][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|IR[2] .is_wysiwyg = "true"; -defparam \inst|IR[2] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y40_N12 -fiftyfivenm_lcell_comb \inst|Selector9~0 ( -// Equation(s): -// \inst|Selector9~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [2]))) # (!\inst|WideNor0~combout & (\inst|IR [2])))) - - .dataa(\inst|IR [2]), - .datab(\inst|state.fetch~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [2]), - .datad(\inst|WideNor0~combout ), - .cin(gnd), - .combout(\inst|Selector9~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector9~0 .lut_mask = 16'h3022; -defparam \inst|Selector9~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X55_Y40_N30 -fiftyfivenm_lcell_comb \inst|next_mem_addr[2]~2 ( -// Equation(s): -// \inst|next_mem_addr[2]~2_combout = (\inst|Selector9~0_combout ) # ((\inst|PC [2] & \inst|state.fetch~q )) - - .dataa(\inst|Selector9~0_combout ), - .datab(\inst|PC [2]), - .datac(gnd), - .datad(\inst|state.fetch~q ), - .cin(gnd), - .combout(\inst|next_mem_addr[2]~2_combout ), - .cout()); -// synopsys translate_off -defparam \inst|next_mem_addr[2]~2 .lut_mask = 16'hEEAA; -defparam \inst|next_mem_addr[2]~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y38_N26 -fiftyfivenm_lcell_comb \inst|Selector10~0 ( -// Equation(s): -// \inst|Selector10~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [1])) # (!\inst|WideNor0~combout & ((\inst|IR [1]))))) - - .dataa(\inst|WideNor0~combout ), - .datab(\inst|altsyncram_component|auto_generated|q_a [1]), - .datac(\inst|state.fetch~q ), - .datad(\inst|IR [1]), - .cin(gnd), - .combout(\inst|Selector10~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector10~0 .lut_mask = 16'h0D08; -defparam \inst|Selector10~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y39_N2 -fiftyfivenm_lcell_comb \inst|next_mem_addr[1]~1 ( -// Equation(s): -// \inst|next_mem_addr[1]~1_combout = (\inst|Selector10~0_combout ) # ((\inst|state.fetch~q & \inst|PC [1])) - - .dataa(\inst|Selector10~0_combout ), - .datab(\inst|state.fetch~q ), - .datac(gnd), - .datad(\inst|PC [1]), - .cin(gnd), - .combout(\inst|next_mem_addr[1]~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|next_mem_addr[1]~1 .lut_mask = 16'hEEAA; -defparam \inst|next_mem_addr[1]~1 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[5][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[5][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N26 -fiftyfivenm_lcell_comb \inst|state~47 ( +// Location: LCCOMB_X52_Y41_N18 +fiftyfivenm_lcell_comb \inst|Selector82~0 ( // Equation(s): -// \inst|state~47_combout = (\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|state~37_combout & \inst|altsyncram_component|auto_generated|q_a [13])) +// \inst|Selector82~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[5][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[3][3]~q ))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), - .datab(\inst|state~37_combout ), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(gnd), + .dataa(gnd), + .datab(\inst|PC_stack[5][3]~q ), + .datac(\inst|state.ex_return~q ), + .datad(\inst|PC_stack[3][3]~q ), .cin(gnd), - .combout(\inst|state~47_combout ), + .combout(\inst|Selector82~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~47 .lut_mask = 16'h8080; -defparam \inst|state~47 .sum_lutc_input = "datac"; +defparam \inst|Selector82~0 .lut_mask = 16'hCFC0; +defparam \inst|Selector82~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N27 -dffeas \inst|state.ex_iload ( +// Location: FF_X52_Y41_N19 +dffeas \inst|PC_stack[4][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~47_combout ), + .d(\inst|Selector82~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|state.ex_iload~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|state.ex_iload .is_wysiwyg = "true"; -defparam \inst|state.ex_iload .power_up = "low"; -// synopsys translate_on - -// Location: FF_X49_Y40_N13 -dffeas \inst|state.ex_istore2 ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|state.ex_istore~q ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_istore2~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|state.ex_istore2 .is_wysiwyg = "true"; -defparam \inst|state.ex_istore2 .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y40_N12 -fiftyfivenm_lcell_comb \inst|WideNor0 ( -// Equation(s): -// \inst|WideNor0~combout = (\inst|state.ex_iload~q ) # ((\inst|state.decode~q ) # (\inst|state.ex_istore2~q )) - - .dataa(\inst|state.ex_iload~q ), - .datab(\inst|state.decode~q ), - .datac(\inst|state.ex_istore2~q ), - .datad(gnd), - .cin(gnd), - .combout(\inst|WideNor0~combout ), - .cout()); -// synopsys translate_off -defparam \inst|WideNor0 .lut_mask = 16'hFEFE; -defparam \inst|WideNor0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y38_N0 -fiftyfivenm_lcell_comb \inst|Selector11~0 ( -// Equation(s): -// \inst|Selector11~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [0]))) # (!\inst|WideNor0~combout & (\inst|IR [0])))) - - .dataa(\inst|WideNor0~combout ), - .datab(\inst|IR [0]), - .datac(\inst|state.fetch~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [0]), - .cin(gnd), - .combout(\inst|Selector11~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector11~0 .lut_mask = 16'h0E04; -defparam \inst|Selector11~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y38_N16 -fiftyfivenm_lcell_comb \inst|next_mem_addr[0]~0 ( -// Equation(s): -// \inst|next_mem_addr[0]~0_combout = (\inst|Selector11~0_combout ) # ((\inst|state.fetch~q & \inst|PC [0])) - - .dataa(gnd), - .datab(\inst|Selector11~0_combout ), - .datac(\inst|state.fetch~q ), - .datad(\inst|PC [0]), - .cin(gnd), - .combout(\inst|next_mem_addr[0]~0_combout ), - .cout()); + .q(\inst|PC_stack[4][3]~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst|next_mem_addr[0]~0 .lut_mask = 16'hFCCC; -defparam \inst|next_mem_addr[0]~0 .sum_lutc_input = "datac"; +defparam \inst|PC_stack[4][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[4][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N26 -fiftyfivenm_lcell_comb \inst|state~34 ( +// Location: LCCOMB_X52_Y41_N28 +fiftyfivenm_lcell_comb \inst|Selector71~0 ( // Equation(s): -// \inst|state~34_combout = (\inst|altsyncram_component|auto_generated|q_a [12] & (\inst|altsyncram_component|auto_generated|q_a [11] & \inst|state~32_combout )) +// \inst|Selector71~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[4][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[2][3]~q )) - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|state~32_combout ), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[2][3]~q ), + .datad(\inst|PC_stack[4][3]~q ), .cin(gnd), - .combout(\inst|state~34_combout ), + .combout(\inst|Selector71~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~34 .lut_mask = 16'hC000; -defparam \inst|state~34 .sum_lutc_input = "datac"; +defparam \inst|Selector71~0 .lut_mask = 16'hFA50; +defparam \inst|Selector71~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y43_N27 -dffeas \inst|state.ex_out ( +// Location: FF_X52_Y41_N29 +dffeas \inst|PC_stack[3][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~34_combout ), + .d(\inst|Selector71~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_out~q ), + .q(\inst|PC_stack[3][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_out .is_wysiwyg = "true"; -defparam \inst|state.ex_out .power_up = "low"; +defparam \inst|PC_stack[3][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[3][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N28 -fiftyfivenm_lcell_comb \inst|WideOr7~0 ( +// Location: LCCOMB_X52_Y41_N26 +fiftyfivenm_lcell_comb \inst|Selector60~0 ( // Equation(s): -// \inst|WideOr7~0_combout = (\inst|state.ex_out~q ) # ((\inst|state.ex_in~q ) # ((\inst|state.decode~q ) # (\inst|state.ex_iload~q ))) +// \inst|Selector60~0_combout = (\inst|state.ex_return~q & ((\inst|PC_stack[3][3]~q ))) # (!\inst|state.ex_return~q & (\inst|PC_stack[1][3]~q )) - .dataa(\inst|state.ex_out~q ), - .datab(\inst|state.ex_in~q ), - .datac(\inst|state.decode~q ), - .datad(\inst|state.ex_iload~q ), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[1][3]~q ), + .datad(\inst|PC_stack[3][3]~q ), .cin(gnd), - .combout(\inst|WideOr7~0_combout ), + .combout(\inst|Selector60~0_combout ), .cout()); // synopsys translate_off -defparam \inst|WideOr7~0 .lut_mask = 16'hFFFE; -defparam \inst|WideOr7~0 .sum_lutc_input = "datac"; +defparam \inst|Selector60~0 .lut_mask = 16'hFA50; +defparam \inst|Selector60~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N4 -fiftyfivenm_lcell_comb \inst|state~48 ( +// Location: FF_X52_Y41_N27 +dffeas \inst|PC_stack[2][3] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector60~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst|PC_stack[0][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|PC_stack[2][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|PC_stack[2][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[2][3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y41_N4 +fiftyfivenm_lcell_comb \inst|Selector49~0 ( // Equation(s): -// \inst|state~48_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (\inst|state~37_combout & !\inst|altsyncram_component|auto_generated|q_a [13])) +// \inst|Selector49~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[2][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC_stack[0][3]~q ))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), - .datab(\inst|state~37_combout ), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(gnd), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[2][3]~q ), + .datad(\inst|PC_stack[0][3]~q ), .cin(gnd), - .combout(\inst|state~48_combout ), + .combout(\inst|Selector49~0_combout ), .cout()); // synopsys translate_off -defparam \inst|state~48 .lut_mask = 16'h0404; -defparam \inst|state~48 .sum_lutc_input = "datac"; +defparam \inst|Selector49~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector49~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N5 -dffeas \inst|state.ex_store ( +// Location: FF_X52_Y41_N5 +dffeas \inst|PC_stack[1][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~48_combout ), + .d(\inst|Selector49~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_store~q ), + .q(\inst|PC_stack[1][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_store .is_wysiwyg = "true"; -defparam \inst|state.ex_store .power_up = "low"; +defparam \inst|PC_stack[1][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[1][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N6 -fiftyfivenm_lcell_comb \inst|WideOr7 ( +// Location: LCCOMB_X52_Y41_N12 +fiftyfivenm_lcell_comb \inst|Selector38~0 ( // Equation(s): -// \inst|WideOr7~combout = (!\inst|WideOr7~0_combout & (!\inst|state.ex_istore~q & (!\inst|state.fetch~q & !\inst|state.ex_store~q ))) +// \inst|Selector38~0_combout = (\inst|state.ex_return~q & (\inst|PC_stack[1][3]~q )) # (!\inst|state.ex_return~q & ((\inst|PC [3]))) - .dataa(\inst|WideOr7~0_combout ), - .datab(\inst|state.ex_istore~q ), - .datac(\inst|state.fetch~q ), - .datad(\inst|state.ex_store~q ), + .dataa(\inst|state.ex_return~q ), + .datab(gnd), + .datac(\inst|PC_stack[1][3]~q ), + .datad(\inst|PC [3]), .cin(gnd), - .combout(\inst|WideOr7~combout ), + .combout(\inst|Selector38~0_combout ), .cout()); // synopsys translate_off -defparam \inst|WideOr7 .lut_mask = 16'h0001; -defparam \inst|WideOr7 .sum_lutc_input = "datac"; +defparam \inst|Selector38~0 .lut_mask = 16'hF5A0; +defparam \inst|Selector38~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N7 -dffeas \inst|state.fetch ( +// Location: FF_X52_Y41_N13 +dffeas \inst|PC_stack[0][3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|WideOr7~combout ), + .d(\inst|Selector38~0_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC_stack[0][0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.fetch~q ), + .q(\inst|PC_stack[0][3]~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.fetch .is_wysiwyg = "true"; -defparam \inst|state.fetch .power_up = "low"; +defparam \inst|PC_stack[0][3] .is_wysiwyg = "true"; +defparam \inst|PC_stack[0][3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N16 -fiftyfivenm_lcell_comb \inst|state.decode~feeder ( +// Location: LCCOMB_X52_Y41_N24 +fiftyfivenm_lcell_comb \inst|Selector8~2 ( // Equation(s): -// \inst|state.decode~feeder_combout = \inst|state.fetch~q +// \inst|Selector8~2_combout = (\inst|state.ex_return~q & (((\inst|PC_stack[0][3]~q )))) # (!\inst|state.ex_return~q & (\inst|Selector8~1_combout & (\inst10|state.Init~q ))) - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst|state.fetch~q ), + .dataa(\inst|state.ex_return~q ), + .datab(\inst|Selector8~1_combout ), + .datac(\inst10|state.Init~q ), + .datad(\inst|PC_stack[0][3]~q ), .cin(gnd), - .combout(\inst|state.decode~feeder_combout ), + .combout(\inst|Selector8~2_combout ), .cout()); // synopsys translate_off -defparam \inst|state.decode~feeder .lut_mask = 16'hFF00; -defparam \inst|state.decode~feeder .sum_lutc_input = "datac"; +defparam \inst|Selector8~2 .lut_mask = 16'hEA40; +defparam \inst|Selector8~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N17 -dffeas \inst|state.decode ( +// Location: FF_X52_Y41_N25 +dffeas \inst|PC[3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state.decode~feeder_combout ), + .d(\inst|Selector8~2_combout ), .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(vcc), + .ena(\inst|PC[0]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.decode~q ), + .q(\inst|PC [3]), .prn(vcc)); // synopsys translate_off -defparam \inst|state.decode .is_wysiwyg = "true"; -defparam \inst|state.decode .power_up = "low"; +defparam \inst|PC[3] .is_wysiwyg = "true"; +defparam \inst|PC[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y43_N10 -fiftyfivenm_lcell_comb \inst|Selector30~0 ( +// Location: LCCOMB_X52_Y41_N14 +fiftyfivenm_lcell_comb \inst|next_mem_addr[3]~3 ( +// Equation(s): +// \inst|next_mem_addr[3]~3_combout = (\inst|Selector8~0_combout ) # ((\inst|PC [3] & \inst|state.fetch~q )) + + .dataa(gnd), + .datab(\inst|PC [3]), + .datac(\inst|state.fetch~q ), + .datad(\inst|Selector8~0_combout ), + .cin(gnd), + .combout(\inst|next_mem_addr[3]~3_combout ), + .cout()); +// synopsys translate_off +defparam \inst|next_mem_addr[3]~3 .lut_mask = 16'hFFC0; +defparam \inst|next_mem_addr[3]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y42_N10 +fiftyfivenm_lcell_comb \inst|state~43 ( // Equation(s): -// \inst|Selector30~0_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (\inst|altsyncram_component|auto_generated|q_a [11] & !\inst|altsyncram_component|auto_generated|q_a [12]))) +// \inst|state~43_combout = (\inst|state.decode~q & (!\inst|altsyncram_component|auto_generated|q_a [15] & (!\inst|altsyncram_component|auto_generated|q_a [11] & !\inst|altsyncram_component|auto_generated|q_a [12]))) .dataa(\inst|state.decode~q ), .datab(\inst|altsyncram_component|auto_generated|q_a [15]), .datac(\inst|altsyncram_component|auto_generated|q_a [11]), .datad(\inst|altsyncram_component|auto_generated|q_a [12]), .cin(gnd), - .combout(\inst|Selector30~0_combout ), + .combout(\inst|state~43_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector30~0 .lut_mask = 16'h0020; -defparam \inst|Selector30~0 .sum_lutc_input = "datac"; +defparam \inst|state~43 .lut_mask = 16'h0002; +defparam \inst|state~43 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N30 -fiftyfivenm_lcell_comb \inst|state~41 ( +// Location: LCCOMB_X54_Y42_N4 +fiftyfivenm_lcell_comb \inst|state~44 ( // Equation(s): -// \inst|state~41_combout = (\inst|Selector30~0_combout & (\inst|altsyncram_component|auto_generated|q_a [13] & \inst|altsyncram_component|auto_generated|q_a [14])) +// \inst|state~44_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (!\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~43_combout )) - .dataa(\inst|Selector30~0_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), .datab(gnd), - .datac(\inst|altsyncram_component|auto_generated|q_a [13]), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~43_combout ), .cin(gnd), - .combout(\inst|state~41_combout ), + .combout(\inst|state~44_combout ), .cout()); // synopsys translate_off -defparam \inst|state~41 .lut_mask = 16'hA000; -defparam \inst|state~41 .sum_lutc_input = "datac"; +defparam \inst|state~44 .lut_mask = 16'h0A00; +defparam \inst|state~44 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N31 -dffeas \inst|state.ex_addi ( +// Location: FF_X54_Y42_N5 +dffeas \inst|state.ex_sub ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~41_combout ), + .d(\inst|state~44_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -21993,171 +22162,205 @@ dffeas \inst|state.ex_addi ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_addi~q ), + .q(\inst|state.ex_sub~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_addi .is_wysiwyg = "true"; -defparam \inst|state.ex_addi .power_up = "low"; +defparam \inst|state.ex_sub .is_wysiwyg = "true"; +defparam \inst|state.ex_sub .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N10 -fiftyfivenm_lcell_comb \inst|AC[2]~0 ( +// Location: LCCOMB_X54_Y40_N20 +fiftyfivenm_lcell_comb \inst|Add1~0 ( // Equation(s): -// \inst|AC[2]~0_combout = (\inst|state.ex_addi~q ) # ((\inst|state.ex_sub~q ) # (\inst|state.ex_add~q )) +// \inst|Add1~0_combout = (\inst|state.ex_sub~q & ((!\inst|altsyncram_component|auto_generated|q_a [0]))) # (!\inst|state.ex_sub~q & (\inst|state.ex_add~q & \inst|altsyncram_component|auto_generated|q_a [0])) - .dataa(\inst|state.ex_addi~q ), - .datab(gnd), - .datac(\inst|state.ex_sub~q ), - .datad(\inst|state.ex_add~q ), + .dataa(gnd), + .datab(\inst|state.ex_sub~q ), + .datac(\inst|state.ex_add~q ), + .datad(\inst|altsyncram_component|auto_generated|q_a [0]), .cin(gnd), - .combout(\inst|AC[2]~0_combout ), + .combout(\inst|Add1~0_combout ), .cout()); // synopsys translate_off -defparam \inst|AC[2]~0 .lut_mask = 16'hFFFA; -defparam \inst|AC[2]~0 .sum_lutc_input = "datac"; +defparam \inst|Add1~0 .lut_mask = 16'h30CC; +defparam \inst|Add1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N8 -fiftyfivenm_lcell_comb \inst|Selector25~0 ( +// Location: LCCOMB_X54_Y40_N14 +fiftyfivenm_lcell_comb \inst|Add1~2 ( // Equation(s): -// \inst|Selector25~0_combout = (\inst|IR [2] & ((\inst|state.ex_loadi~q ) # ((\inst|Selector27~1_combout & \inst|altsyncram_component|auto_generated|q_a [2])))) # (!\inst|IR [2] & (\inst|Selector27~1_combout & -// (\inst|altsyncram_component|auto_generated|q_a [2]))) +// \inst|Add1~2_combout = (\inst|Add1~0_combout & ((\inst|WideOr3~1_combout ) # ((\inst|Add1~1_combout & \inst|IR [0])))) # (!\inst|Add1~0_combout & (((\inst|Add1~1_combout & \inst|IR [0])))) - .dataa(\inst|IR [2]), + .dataa(\inst|Add1~0_combout ), + .datab(\inst|WideOr3~1_combout ), + .datac(\inst|Add1~1_combout ), + .datad(\inst|IR [0]), + .cin(gnd), + .combout(\inst|Add1~2_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Add1~2 .lut_mask = 16'hF888; +defparam \inst|Add1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y39_N18 +fiftyfivenm_lcell_comb \inst|Selector27~2 ( +// Equation(s): +// \inst|Selector27~2_combout = (\inst|state.ex_loadi~q & ((\inst|IR [0]) # ((\inst|Selector27~1_combout & \inst|altsyncram_component|auto_generated|q_a [0])))) # (!\inst|state.ex_loadi~q & (\inst|Selector27~1_combout & +// (\inst|altsyncram_component|auto_generated|q_a [0]))) + + .dataa(\inst|state.ex_loadi~q ), .datab(\inst|Selector27~1_combout ), - .datac(\inst|altsyncram_component|auto_generated|q_a [2]), - .datad(\inst|state.ex_loadi~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [0]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector25~0_combout ), + .combout(\inst|Selector27~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~0 .lut_mask = 16'hEAC0; -defparam \inst|Selector25~0 .sum_lutc_input = "datac"; +defparam \inst|Selector27~2 .lut_mask = 16'hEAC0; +defparam \inst|Selector27~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N8 -fiftyfivenm_lcell_comb \inst|Selector25~2 ( +// Location: LCCOMB_X56_Y39_N16 +fiftyfivenm_lcell_comb \inst|Selector27~0 ( // Equation(s): -// \inst|Selector25~2_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[58]~57_combout ) # ((\inst|shifter|auto_generated|sbit_w[42]~59_combout & !\inst|IR [2])))) +// \inst|Selector27~0_combout = (\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [0] $ (\inst|AC [0]))) - .dataa(\inst|shifter|auto_generated|sbit_w[42]~59_combout ), - .datab(\inst|Selector27~4_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[58]~57_combout ), - .datad(\inst|IR [2]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [0]), + .datab(gnd), + .datac(\inst|state.ex_xor~q ), + .datad(\inst|AC [0]), + .cin(gnd), + .combout(\inst|Selector27~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector27~0 .lut_mask = 16'h50A0; +defparam \inst|Selector27~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y39_N24 +fiftyfivenm_lcell_comb \inst|Selector27~3 ( +// Equation(s): +// \inst|Selector27~3_combout = (\inst|Selector27~2_combout ) # ((\inst|Selector27~0_combout ) # ((\inst|Add1~6_combout & \inst|AC[3]~0_combout ))) + + .dataa(\inst|Add1~6_combout ), + .datab(\inst|Selector27~2_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Selector27~0_combout ), .cin(gnd), - .combout(\inst|Selector25~2_combout ), + .combout(\inst|Selector27~3_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~2 .lut_mask = 16'hC0C8; -defparam \inst|Selector25~2 .sum_lutc_input = "datac"; +defparam \inst|Selector27~3 .lut_mask = 16'hFFEC; +defparam \inst|Selector27~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N24 -fiftyfivenm_lcell_comb \inst|Selector25~3 ( +// Location: LCCOMB_X57_Y35_N22 +fiftyfivenm_lcell_comb \inst|Selector27~5 ( // Equation(s): -// \inst|Selector25~3_combout = (\inst|AC [2] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [2])) # (!\inst|Selector27~6_combout ))) +// \inst|Selector27~5_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[56]~24_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[40]~28_combout )))) - .dataa(\inst|Selector27~6_combout ), - .datab(\inst|state.ex_and~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [2]), - .datad(\inst|AC [2]), + .dataa(\inst|Selector27~4_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[56]~24_combout ), + .datac(\inst|IR [2]), + .datad(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), .cin(gnd), - .combout(\inst|Selector25~3_combout ), + .combout(\inst|Selector27~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~3 .lut_mask = 16'hD500; -defparam \inst|Selector25~3 .sum_lutc_input = "datac"; +defparam \inst|Selector27~5 .lut_mask = 16'h8A88; +defparam \inst|Selector27~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y43_N28 -fiftyfivenm_lcell_comb \inst|Selector25~1 ( +// Location: LCCOMB_X56_Y39_N2 +fiftyfivenm_lcell_comb \inst|Selector27~7 ( // Equation(s): -// \inst|Selector25~1_combout = (\inst|IR [2] & (\inst|shifter|auto_generated|sbit_w[38]~52_combout & ((\inst|IR [4])))) # (!\inst|IR [2] & (((\inst|shifter|auto_generated|sbit_w[34]~55_combout )))) +// \inst|Selector27~7_combout = (\inst|AC [0] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [0])) # (!\inst|Selector27~6_combout ))) - .dataa(\inst|shifter|auto_generated|sbit_w[38]~52_combout ), - .datab(\inst|shifter|auto_generated|sbit_w[34]~55_combout ), - .datac(\inst|IR [2]), - .datad(\inst|IR [4]), + .dataa(\inst|state.ex_and~q ), + .datab(\inst|AC [0]), + .datac(\inst|Selector27~6_combout ), + .datad(\inst|altsyncram_component|auto_generated|q_a [0]), .cin(gnd), - .combout(\inst|Selector25~1_combout ), + .combout(\inst|Selector27~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~1 .lut_mask = 16'hAC0C; -defparam \inst|Selector25~1 .sum_lutc_input = "datac"; +defparam \inst|Selector27~7 .lut_mask = 16'h8C0C; +defparam \inst|Selector27~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N14 -fiftyfivenm_lcell_comb \inst|Selector25~4 ( +// Location: LCCOMB_X56_Y39_N8 +fiftyfivenm_lcell_comb \inst|Selector27~8 ( // Equation(s): -// \inst|Selector25~4_combout = (\inst|Selector25~2_combout ) # ((\inst|Selector25~3_combout ) # ((\inst|Selector20~0_combout & \inst|Selector25~1_combout ))) +// \inst|Selector27~8_combout = (\inst|Selector27~5_combout ) # ((\inst|Selector27~7_combout ) # ((\inst|Selector20~0_combout & \inst|shifter|auto_generated|sbit_w[48]~15_combout ))) - .dataa(\inst|Selector25~2_combout ), - .datab(\inst|Selector25~3_combout ), - .datac(\inst|Selector20~0_combout ), - .datad(\inst|Selector25~1_combout ), + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|Selector27~5_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[48]~15_combout ), + .datad(\inst|Selector27~7_combout ), .cin(gnd), - .combout(\inst|Selector25~4_combout ), + .combout(\inst|Selector27~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~4 .lut_mask = 16'hFEEE; -defparam \inst|Selector25~4 .sum_lutc_input = "datac"; +defparam \inst|Selector27~8 .lut_mask = 16'hFFEC; +defparam \inst|Selector27~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N20 -fiftyfivenm_lcell_comb \inst|Selector25~6 ( +// Location: LCCOMB_X60_Y38_N14 +fiftyfivenm_lcell_comb \inst|Selector27~9 ( // Equation(s): -// \inst|Selector25~6_combout = (\inst|Selector25~0_combout ) # ((\inst|Selector25~4_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~16_combout ))) +// \inst|Selector27~9_combout = (\inst|Selector27~3_combout ) # ((\inst|Selector27~8_combout ) # ((!\inst13|inst1[0]~24_combout & \inst|state.ex_in2~q ))) - .dataa(\inst|AC[2]~0_combout ), - .datab(\inst|Selector25~0_combout ), - .datac(\inst|Selector25~4_combout ), - .datad(\inst|Add1~16_combout ), + .dataa(\inst|Selector27~3_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst|Selector27~8_combout ), + .datad(\inst|state.ex_in2~q ), .cin(gnd), - .combout(\inst|Selector25~6_combout ), + .combout(\inst|Selector27~9_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~6 .lut_mask = 16'hFEFC; -defparam \inst|Selector25~6 .sum_lutc_input = "datac"; +defparam \inst|Selector27~9 .lut_mask = 16'hFBFA; +defparam \inst|Selector27~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y40_N22 -fiftyfivenm_lcell_comb \inst|Selector25~7 ( +// Location: LCCOMB_X60_Y38_N0 +fiftyfivenm_lcell_comb \inst13|inst1[0]~20 ( // Equation(s): -// \inst|Selector25~7_combout = (\inst|Selector25~6_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [2] $ (\inst|AC [2])))) +// \inst13|inst1[0]~20_combout = ((\inst|IR [0] & (\inst11|count [0])) # (!\inst|IR [0] & ((\inst10|count [0])))) # (!\inst11|tri_enable~1_combout ) - .dataa(\inst|Selector25~6_combout ), - .datab(\inst|state.ex_xor~q ), - .datac(\inst|altsyncram_component|auto_generated|q_a [2]), - .datad(\inst|AC [2]), + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst11|count [0]), + .datac(\inst10|count [0]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst|Selector25~7_combout ), + .combout(\inst13|inst1[0]~20_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~7 .lut_mask = 16'hAEEA; -defparam \inst|Selector25~7 .sum_lutc_input = "datac"; +defparam \inst13|inst1[0]~20 .lut_mask = 16'hDDF5; +defparam \inst13|inst1[0]~20 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N24 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[2]~4 ( +// Location: LCCOMB_X60_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[0]~1 ( // Equation(s): -// \inst13|inst14|data_out[2]~4_combout = (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx1~q & (\inst13|inst|data_rd [2] & \inst13|inst14|prev_busy~q ))) +// \inst13|inst14|data_out[0]~1_combout = (\inst13|inst|data_rd [0] & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst14|state.Rx1~q ))) - .dataa(\inst13|inst|busy~q ), - .datab(\inst13|inst14|state.Rx1~q ), - .datac(\inst13|inst|data_rd [2]), - .datad(\inst13|inst14|prev_busy~q ), + .dataa(\inst13|inst|data_rd [0]), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst14|state.Rx1~q ), .cin(gnd), - .combout(\inst13|inst14|data_out[2]~4_combout ), + .combout(\inst13|inst14|data_out[0]~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[2]~4 .lut_mask = 16'h4000; -defparam \inst13|inst14|data_out[2]~4 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[0]~1 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[0]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y38_N25 -dffeas \inst13|inst14|data_out[2] ( +// Location: FF_X60_Y36_N17 +dffeas \inst13|inst14|data_out[0] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[2]~4_combout ), + .d(\inst13|inst14|data_out[0]~1_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -22166,64 +22369,47 @@ dffeas \inst13|inst14|data_out[2] ( .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [2]), + .q(\inst13|inst14|data_out [0]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[2] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[2] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y43_N2 -fiftyfivenm_lcell_comb \inst13|inst1[2]~26 ( -// Equation(s): -// \inst13|inst1[2]~26_combout = (\inst|IO_WRITE_int~q & (((\inst|AC [2])))) # (!\inst|IO_WRITE_int~q & (((\inst13|inst14|data_out [2])) # (!\inst3|I2C_DATA_EN~combout ))) - - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst|AC [2]), - .datad(\inst13|inst14|data_out [2]), - .cin(gnd), - .combout(\inst13|inst1[2]~26_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst1[2]~26 .lut_mask = 16'hF5B1; -defparam \inst13|inst1[2]~26 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_out[0] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N16 -fiftyfivenm_lcell_comb \inst13|inst1[2]~27 ( +// Location: LCCOMB_X61_Y38_N0 +fiftyfivenm_lcell_comb \inst13|inst1[0]~21 ( // Equation(s): -// \inst13|inst1[2]~27_combout = (!\inst13|inst4~combout & (\inst13|inst1[2]~26_combout & ((\inst11|count [2]) # (!\inst11|tri_enable~combout )))) +// \inst13|inst1[0]~21_combout = (\inst|IO_WRITE_int~q & (((!\inst|AC [0])))) # (!\inst|IO_WRITE_int~q & (\inst3|I2C_DATA_EN~combout & ((!\inst13|inst14|data_out [0])))) - .dataa(\inst11|count [2]), - .datab(\inst13|inst4~combout ), - .datac(\inst13|inst1[2]~26_combout ), - .datad(\inst11|tri_enable~combout ), + .dataa(\inst3|I2C_DATA_EN~combout ), + .datab(\inst|AC [0]), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst13|inst14|data_out [0]), .cin(gnd), - .combout(\inst13|inst1[2]~27_combout ), + .combout(\inst13|inst1[0]~21_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[2]~27 .lut_mask = 16'h2030; -defparam \inst13|inst1[2]~27 .sum_lutc_input = "datac"; +defparam \inst13|inst1[0]~21 .lut_mask = 16'h303A; +defparam \inst13|inst1[0]~21 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOIBUF_X51_Y54_N1 -fiftyfivenm_io_ibuf \SW[2]~input ( - .i(SW[2]), +// Location: IOIBUF_X51_Y54_N29 +fiftyfivenm_io_ibuf \SW[0]~input ( + .i(SW[0]), .ibar(gnd), .nsleep(vcc), - .o(\SW[2]~input_o )); + .o(\SW[0]~input_o )); // synopsys translate_off -defparam \SW[2]~input .bus_hold = "false"; -defparam \SW[2]~input .listen_to_nsleep_signal = "false"; -defparam \SW[2]~input .simulate_z_as = "z"; +defparam \SW[0]~input .bus_hold = "false"; +defparam \SW[0]~input .listen_to_nsleep_signal = "false"; +defparam \SW[0]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: FF_X50_Y42_N3 -dffeas \inst7|B_DI[2] ( +// Location: FF_X61_Y38_N3 +dffeas \inst7|B_DI[0] ( .clk(\inst3|SWITCH_EN~clkctrl_outclk ), .d(gnd), - .asdata(\SW[2]~input_o ), + .asdata(\SW[0]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), @@ -22231,68 +22417,85 @@ dffeas \inst7|B_DI[2] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [2]), + .q(\inst7|B_DI [0]), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[2] .is_wysiwyg = "true"; -defparam \inst7|B_DI[2] .power_up = "low"; +defparam \inst7|B_DI[0] .is_wysiwyg = "true"; +defparam \inst7|B_DI[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N2 -fiftyfivenm_lcell_comb \inst13|inst1[2]~25 ( +// Location: LCCOMB_X61_Y38_N14 +fiftyfivenm_lcell_comb \inst13|inst1[0]~22 ( // Equation(s): -// \inst13|inst1[2]~25_combout = (\inst3|SWITCH_EN~combout & (\inst7|B_DI [2] & ((\inst10|count [2]) # (!\inst10|tri_enable~combout )))) # (!\inst3|SWITCH_EN~combout & (((\inst10|count [2])) # (!\inst10|tri_enable~combout ))) +// \inst13|inst1[0]~22_combout = (\inst13|inst1[0]~20_combout & (!\inst13|inst1[0]~21_combout & ((\inst7|B_DI [0]) # (!\inst3|SWITCH_EN~combout )))) - .dataa(\inst3|SWITCH_EN~combout ), - .datab(\inst10|tri_enable~combout ), - .datac(\inst7|B_DI [2]), - .datad(\inst10|count [2]), + .dataa(\inst13|inst1[0]~20_combout ), + .datab(\inst13|inst1[0]~21_combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst7|B_DI [0]), + .cin(gnd), + .combout(\inst13|inst1[0]~22_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[0]~22 .lut_mask = 16'h2202; +defparam \inst13|inst1[0]~22 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y38_N14 +fiftyfivenm_lcell_comb \inst13|inst1[0]~18 ( +// Equation(s): +// \inst13|inst1[0]~18_combout = (\inst13|inst14|go~q ) # (\inst13|inst14|running~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst14|go~q ), + .datad(\inst13|inst14|running~q ), .cin(gnd), - .combout(\inst13|inst1[2]~25_combout ), + .combout(\inst13|inst1[0]~18_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[2]~25 .lut_mask = 16'hF531; -defparam \inst13|inst1[2]~25 .sum_lutc_input = "datac"; +defparam \inst13|inst1[0]~18 .lut_mask = 16'hFFF0; +defparam \inst13|inst1[0]~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N10 -fiftyfivenm_lcell_comb \inst13|inst1[2]~28 ( +// Location: LCCOMB_X61_Y38_N12 +fiftyfivenm_lcell_comb \inst13|inst1[0]~19 ( // Equation(s): -// \inst13|inst1[2]~28_combout = (\inst13|inst1[2]~27_combout & (\inst13|inst1[2]~25_combout & ((\inst4|COUNT [2]) # (!\inst4|IO_OUT~combout )))) +// \inst13|inst1[0]~19_combout = (\inst13|inst1[0]~18_combout & (((\inst4|COUNT [0]) # (!\inst4|IO_OUT~combout )))) # (!\inst13|inst1[0]~18_combout & (!\inst13|inst4~combout & ((\inst4|COUNT [0]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst13|inst1[2]~27_combout ), - .datab(\inst13|inst1[2]~25_combout ), + .dataa(\inst13|inst1[0]~18_combout ), + .datab(\inst13|inst4~combout ), .datac(\inst4|IO_OUT~combout ), - .datad(\inst4|COUNT [2]), + .datad(\inst4|COUNT [0]), .cin(gnd), - .combout(\inst13|inst1[2]~28_combout ), + .combout(\inst13|inst1[0]~19_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[2]~28 .lut_mask = 16'h8808; -defparam \inst13|inst1[2]~28 .sum_lutc_input = "datac"; +defparam \inst13|inst1[0]~19 .lut_mask = 16'hBB0B; +defparam \inst13|inst1[0]~19 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N30 -fiftyfivenm_lcell_comb \inst|Selector25~5 ( +// Location: LCCOMB_X60_Y38_N2 +fiftyfivenm_lcell_comb \inst|Selector27~10 ( // Equation(s): -// \inst|Selector25~5_combout = (\inst|Selector25~7_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[2]~28_combout ) # (!\inst13|inst1[0]~18_combout )))) +// \inst|Selector27~10_combout = (\inst|Selector27~9_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[0]~22_combout & \inst13|inst1[0]~19_combout ))) - .dataa(\inst|Selector25~7_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[0]~18_combout ), - .datad(\inst13|inst1[2]~28_combout ), + .dataa(\inst|state.ex_in2~q ), + .datab(\inst|Selector27~9_combout ), + .datac(\inst13|inst1[0]~22_combout ), + .datad(\inst13|inst1[0]~19_combout ), .cin(gnd), - .combout(\inst|Selector25~5_combout ), + .combout(\inst|Selector27~10_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector25~5 .lut_mask = 16'hEEAE; -defparam \inst|Selector25~5 .sum_lutc_input = "datac"; +defparam \inst|Selector27~10 .lut_mask = 16'hECCC; +defparam \inst|Selector27~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y43_N31 -dffeas \inst|AC[2] ( +// Location: FF_X60_Y38_N3 +dffeas \inst|AC[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector25~5_combout ), + .d(\inst|Selector27~10_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -22301,228 +22504,267 @@ dffeas \inst|AC[2] ( .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [2]), + .q(\inst|AC [0]), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[2] .is_wysiwyg = "true"; -defparam \inst|AC[2] .power_up = "low"; +defparam \inst|AC[0] .is_wysiwyg = "true"; +defparam \inst|AC[0] .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y43_N5 -dffeas \inst|IR[7] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [7]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst|IR[0]~0_combout ), +// Location: LCCOMB_X58_Y38_N30 +fiftyfivenm_lcell_comb \inst|Selector9~0 ( +// Equation(s): +// \inst|Selector9~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [2])) # (!\inst|WideNor0~combout & ((\inst|IR [2]))))) + + .dataa(\inst|state.fetch~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [2]), + .datac(\inst|IR [2]), + .datad(\inst|WideNor0~combout ), + .cin(gnd), + .combout(\inst|Selector9~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst|Selector9~0 .lut_mask = 16'h4450; +defparam \inst|Selector9~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y41_N24 +fiftyfivenm_lcell_comb \inst|next_mem_addr[2]~2 ( +// Equation(s): +// \inst|next_mem_addr[2]~2_combout = (\inst|Selector9~0_combout ) # ((\inst|PC [2] & \inst|state.fetch~q )) + + .dataa(\inst|Selector9~0_combout ), + .datab(\inst|PC [2]), + .datac(gnd), + .datad(\inst|state.fetch~q ), + .cin(gnd), + .combout(\inst|next_mem_addr[2]~2_combout ), + .cout()); +// synopsys translate_off +defparam \inst|next_mem_addr[2]~2 .lut_mask = 16'hEEAA; +defparam \inst|next_mem_addr[2]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y39_N0 +fiftyfivenm_ram_block \inst|altsyncram_component|auto_generated|ram_block1a11 ( + .portawe(\inst|MW~q ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .clk1(gnd), + .ena0(vcc), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\inst|AC [15],\inst|AC [14],\inst|AC [13],\inst|AC [11]}), + .portaaddr({\inst|next_mem_addr[10]~10_combout ,\inst|next_mem_addr[9]~9_combout ,\inst|next_mem_addr[8]~8_combout ,\inst|next_mem_addr[7]~7_combout ,\inst|next_mem_addr[6]~6_combout ,\inst|next_mem_addr[5]~5_combout ,\inst|next_mem_addr[4]~4_combout , +\inst|next_mem_addr[3]~3_combout ,\inst|next_mem_addr[2]~2_combout ,\inst|next_mem_addr[1]~1_combout ,\inst|next_mem_addr[0]~0_combout }), + .portabyteenamasks(1'b1), + .portbdatain(4'b0000), + .portbaddr(11'b00000000000), + .portbbyteenamasks(1'b1), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IR [7]), - .prn(vcc)); + .portadataout(\inst|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ), + .portbdataout()); // synopsys translate_off -defparam \inst|IR[7] .is_wysiwyg = "true"; -defparam \inst|IR[7] .power_up = "low"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .init_file = "VelocityControl.mif"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .init_file_layout = "port_a"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .logical_ram_name = "SCOMP:inst|altsyncram:altsyncram_component|altsyncram_efs3:auto_generated|ALTSYNCRAM"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .operation_mode = "single_port"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_clear = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_width = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clear = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clock = "none"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_width = 4; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_address = 0; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_bit_number = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_last_address = 2047; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 2048; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_width = 16; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_b_address_width = 11; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .port_b_data_width = 4; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .ram_block_type = "M9K"; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init3 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init2 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init1 = 2048'h00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000; +defparam \inst|altsyncram_component|auto_generated|ram_block1a11 .mem_init0 = 2048'h000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000F0975339134298898927899089298838983131; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N14 -fiftyfivenm_lcell_comb \inst3|TIMER_EN~2 ( +// Location: LCCOMB_X54_Y42_N8 +fiftyfivenm_lcell_comb \inst|state~32 ( // Equation(s): -// \inst3|TIMER_EN~2_combout = (!\inst|IR [7] & (!\inst|IR [4] & \inst|IR [1])) +// \inst|state~32_combout = (\inst|state.decode~q & (\inst|altsyncram_component|auto_generated|q_a [15] & (!\inst|altsyncram_component|auto_generated|q_a [13] & !\inst|altsyncram_component|auto_generated|q_a [14]))) - .dataa(\inst|IR [7]), - .datab(gnd), - .datac(\inst|IR [4]), - .datad(\inst|IR [1]), + .dataa(\inst|state.decode~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [15]), + .datac(\inst|altsyncram_component|auto_generated|q_a [13]), + .datad(\inst|altsyncram_component|auto_generated|q_a [14]), .cin(gnd), - .combout(\inst3|TIMER_EN~2_combout ), + .combout(\inst|state~32_combout ), .cout()); // synopsys translate_off -defparam \inst3|TIMER_EN~2 .lut_mask = 16'h0500; -defparam \inst3|TIMER_EN~2 .sum_lutc_input = "datac"; +defparam \inst|state~32 .lut_mask = 16'h0008; +defparam \inst|state~32 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N14 -fiftyfivenm_lcell_comb \inst4|IO_OUT ( +// Location: LCCOMB_X56_Y38_N22 +fiftyfivenm_lcell_comb \inst|Selector28~0 ( // Equation(s): -// \inst4|IO_OUT~combout = (\inst3|TIMER_EN~2_combout & (!\inst|IO_WRITE_int~q & \inst3|TIMER_EN~1_combout )) +// \inst|Selector28~0_combout = (\inst|IO_WRITE_int~q & ((\inst|state.decode~q ) # ((\inst10|state.Init~q & !\inst|state.fetch~q )))) - .dataa(\inst3|TIMER_EN~2_combout ), - .datab(\inst|IO_WRITE_int~q ), - .datac(gnd), - .datad(\inst3|TIMER_EN~1_combout ), + .dataa(\inst|IO_WRITE_int~q ), + .datab(\inst10|state.Init~q ), + .datac(\inst|state.decode~q ), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst4|IO_OUT~combout ), + .combout(\inst|Selector28~0_combout ), .cout()); // synopsys translate_off -defparam \inst4|IO_OUT .lut_mask = 16'h2200; -defparam \inst4|IO_OUT .sum_lutc_input = "datac"; +defparam \inst|Selector28~0 .lut_mask = 16'hA0A8; +defparam \inst|Selector28~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N18 -fiftyfivenm_lcell_comb \inst13|inst1[1]~91 ( +// Location: LCCOMB_X55_Y38_N18 +fiftyfivenm_lcell_comb \inst|Selector28~1 ( // Equation(s): -// \inst13|inst1[1]~91_combout = (!\inst13|inst4~combout & ((\inst|IR [0]) # ((\inst10|count [1]) # (!\inst11|tri_enable~1_combout )))) +// \inst|Selector28~1_combout = (\inst|Selector28~0_combout ) # ((\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|state~32_combout & \inst|altsyncram_component|auto_generated|q_a [12]))) - .dataa(\inst|IR [0]), - .datab(\inst13|inst4~combout ), - .datac(\inst10|count [1]), - .datad(\inst11|tri_enable~1_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), + .datab(\inst|state~32_combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|Selector28~0_combout ), .cin(gnd), - .combout(\inst13|inst1[1]~91_combout ), + .combout(\inst|Selector28~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[1]~91 .lut_mask = 16'h3233; -defparam \inst13|inst1[1]~91 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: IOIBUF_X51_Y54_N22 -fiftyfivenm_io_ibuf \SW[1]~input ( - .i(SW[1]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[1]~input_o )); -// synopsys translate_off -defparam \SW[1]~input .bus_hold = "false"; -defparam \SW[1]~input .listen_to_nsleep_signal = "false"; -defparam \SW[1]~input .simulate_z_as = "z"; +defparam \inst|Selector28~1 .lut_mask = 16'hFF80; +defparam \inst|Selector28~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y42_N1 -dffeas \inst7|B_DI[1] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), +// Location: FF_X58_Y38_N3 +dffeas \inst|IO_WRITE_int ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), - .asdata(\SW[1]~input_o ), + .asdata(\inst|Selector28~1_combout ), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(vcc), - .ena(vcc), + .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [1]), + .q(\inst|IO_WRITE_int~q ), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[1] .is_wysiwyg = "true"; -defparam \inst7|B_DI[1] .power_up = "low"; +defparam \inst|IO_WRITE_int .is_wysiwyg = "true"; +defparam \inst|IO_WRITE_int .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N0 -fiftyfivenm_lcell_comb \inst13|inst1[1]~21 ( +// Location: LCCOMB_X59_Y38_N20 +fiftyfivenm_lcell_comb \inst13|inst1[0]~23 ( // Equation(s): -// \inst13|inst1[1]~21_combout = (\inst|IO_WRITE_int~q & (\inst|AC [1] & ((\inst7|B_DI [1]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|IO_WRITE_int~q & (((\inst7|B_DI [1]) # (!\inst3|SWITCH_EN~combout )))) +// \inst13|inst1[0]~23_combout = (\inst|IO_WRITE_int~q ) # ((\inst3|I2C_DATA_EN~combout ) # ((\inst3|TIMER_EN~1_combout & \inst3|TIMER_EN~2_combout ))) .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst|AC [1]), - .datac(\inst7|B_DI [1]), - .datad(\inst3|SWITCH_EN~combout ), + .datab(\inst3|TIMER_EN~1_combout ), + .datac(\inst3|I2C_DATA_EN~combout ), + .datad(\inst3|TIMER_EN~2_combout ), .cin(gnd), - .combout(\inst13|inst1[1]~21_combout ), + .combout(\inst13|inst1[0]~23_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[1]~21 .lut_mask = 16'hD0DD; -defparam \inst13|inst1[1]~21 .sum_lutc_input = "datac"; +defparam \inst13|inst1[0]~23 .lut_mask = 16'hFEFA; +defparam \inst13|inst1[0]~23 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N10 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[1]~3 ( +// Location: LCCOMB_X59_Y38_N6 +fiftyfivenm_lcell_comb \inst13|inst1[0]~24 ( // Equation(s): -// \inst13|inst14|data_out[1]~3_combout = (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx1~q & (\inst13|inst|data_rd [1] & \inst13|inst14|prev_busy~q ))) +// \inst13|inst1[0]~24_combout = (\inst13|inst1[0]~23_combout ) # ((\inst13|inst4~combout ) # ((\inst3|SWITCH_EN~combout ) # (\inst11|tri_enable~1_combout ))) - .dataa(\inst13|inst|busy~q ), - .datab(\inst13|inst14|state.Rx1~q ), - .datac(\inst13|inst|data_rd [1]), - .datad(\inst13|inst14|prev_busy~q ), + .dataa(\inst13|inst1[0]~23_combout ), + .datab(\inst13|inst4~combout ), + .datac(\inst3|SWITCH_EN~combout ), + .datad(\inst11|tri_enable~1_combout ), .cin(gnd), - .combout(\inst13|inst14|data_out[1]~3_combout ), + .combout(\inst13|inst1[0]~24_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[1]~3 .lut_mask = 16'h4000; -defparam \inst13|inst14|data_out[1]~3 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y38_N11 -dffeas \inst13|inst14|data_out[1] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[1]~3_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|data_out [1]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst14|data_out[1] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[1] .power_up = "low"; +defparam \inst13|inst1[0]~24 .lut_mask = 16'hFFFE; +defparam \inst13|inst1[0]~24 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N14 -fiftyfivenm_lcell_comb \inst13|inst1[1]~20 ( +// Location: LCCOMB_X57_Y39_N16 +fiftyfivenm_lcell_comb \inst|Selector26~1 ( // Equation(s): -// \inst13|inst1[1]~20_combout = (\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [1]) # (!\inst3|I2C_DATA_EN~combout )) +// \inst|Selector26~1_combout = (\inst|AC [1] & (((\inst|altsyncram_component|auto_generated|q_a [1] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - .dataa(gnd), - .datab(\inst|IO_WRITE_int~q ), - .datac(\inst3|I2C_DATA_EN~combout ), - .datad(\inst13|inst14|data_out [1]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [1]), + .datab(\inst|Selector27~6_combout ), + .datac(\inst|state.ex_and~q ), + .datad(\inst|AC [1]), .cin(gnd), - .combout(\inst13|inst1[1]~20_combout ), + .combout(\inst|Selector26~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[1]~20 .lut_mask = 16'hFFCF; -defparam \inst13|inst1[1]~20 .sum_lutc_input = "datac"; +defparam \inst|Selector26~1 .lut_mask = 16'hB300; +defparam \inst|Selector26~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N30 -fiftyfivenm_lcell_comb \inst13|inst1[1]~22 ( +// Location: LCCOMB_X57_Y39_N2 +fiftyfivenm_lcell_comb \inst|Selector26~0 ( // Equation(s): -// \inst13|inst1[1]~22_combout = (\inst13|inst1[1]~21_combout & (\inst13|inst1[1]~20_combout & ((\inst11|count [1]) # (!\inst11|tri_enable~combout )))) +// \inst|Selector26~0_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[57]~46_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[41]~50_combout )))) - .dataa(\inst13|inst1[1]~21_combout ), - .datab(\inst13|inst1[1]~20_combout ), - .datac(\inst11|tri_enable~combout ), - .datad(\inst11|count [1]), + .dataa(\inst|shifter|auto_generated|sbit_w[57]~46_combout ), + .datab(\inst|IR [2]), + .datac(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), + .datad(\inst|Selector27~4_combout ), .cin(gnd), - .combout(\inst13|inst1[1]~22_combout ), + .combout(\inst|Selector26~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[1]~22 .lut_mask = 16'h8808; -defparam \inst13|inst1[1]~22 .sum_lutc_input = "datac"; +defparam \inst|Selector26~0 .lut_mask = 16'hBA00; +defparam \inst|Selector26~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N12 -fiftyfivenm_lcell_comb \inst13|inst1[1]~23 ( +// Location: LCCOMB_X57_Y39_N6 +fiftyfivenm_lcell_comb \inst|Selector26~2 ( // Equation(s): -// \inst13|inst1[1]~23_combout = (\inst13|inst1[1]~91_combout & (\inst13|inst1[1]~22_combout & ((\inst4|COUNT [1]) # (!\inst4|IO_OUT~combout )))) +// \inst|Selector26~2_combout = (\inst|Selector26~1_combout ) # ((\inst|Selector26~0_combout ) # ((\inst|Selector20~0_combout & \inst|shifter|auto_generated|sbit_w[49]~40_combout ))) - .dataa(\inst4|IO_OUT~combout ), - .datab(\inst13|inst1[1]~91_combout ), - .datac(\inst4|COUNT [1]), - .datad(\inst13|inst1[1]~22_combout ), + .dataa(\inst|Selector20~0_combout ), + .datab(\inst|Selector26~1_combout ), + .datac(\inst|shifter|auto_generated|sbit_w[49]~40_combout ), + .datad(\inst|Selector26~0_combout ), .cin(gnd), - .combout(\inst13|inst1[1]~23_combout ), + .combout(\inst|Selector26~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[1]~23 .lut_mask = 16'hC400; -defparam \inst13|inst1[1]~23 .sum_lutc_input = "datac"; +defparam \inst|Selector26~2 .lut_mask = 16'hFFEC; +defparam \inst|Selector26~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N24 +// Location: LCCOMB_X57_Y38_N26 fiftyfivenm_lcell_comb \inst|Selector26~3 ( // Equation(s): -// \inst|Selector26~3_combout = (\inst|altsyncram_component|auto_generated|q_a [1] & ((\inst|Selector27~1_combout ) # ((\inst|state.ex_loadi~q & \inst|IR [1])))) # (!\inst|altsyncram_component|auto_generated|q_a [1] & (\inst|state.ex_loadi~q & (\inst|IR -// [1]))) +// \inst|Selector26~3_combout = (\inst|state.ex_loadi~q & ((\inst|IR [1]) # ((\inst|altsyncram_component|auto_generated|q_a [1] & \inst|Selector27~1_combout )))) # (!\inst|state.ex_loadi~q & (\inst|altsyncram_component|auto_generated|q_a [1] & +// (\inst|Selector27~1_combout ))) - .dataa(\inst|altsyncram_component|auto_generated|q_a [1]), - .datab(\inst|state.ex_loadi~q ), - .datac(\inst|IR [1]), - .datad(\inst|Selector27~1_combout ), + .dataa(\inst|state.ex_loadi~q ), + .datab(\inst|altsyncram_component|auto_generated|q_a [1]), + .datac(\inst|Selector27~1_combout ), + .datad(\inst|IR [1]), .cin(gnd), .combout(\inst|Selector26~3_combout ), .cout()); @@ -22531,586 +22773,518 @@ defparam \inst|Selector26~3 .lut_mask = 16'hEAC0; defparam \inst|Selector26~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N14 +// Location: LCCOMB_X57_Y39_N0 fiftyfivenm_lcell_comb \inst|Selector26~4 ( // Equation(s): // \inst|Selector26~4_combout = (\inst|Selector26~3_combout ) # ((\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [1] $ (\inst|AC [1])))) .dataa(\inst|altsyncram_component|auto_generated|q_a [1]), - .datab(\inst|AC [1]), - .datac(\inst|state.ex_xor~q ), - .datad(\inst|Selector26~3_combout ), + .datab(\inst|state.ex_xor~q ), + .datac(\inst|Selector26~3_combout ), + .datad(\inst|AC [1]), .cin(gnd), .combout(\inst|Selector26~4_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector26~4 .lut_mask = 16'hFF60; +defparam \inst|Selector26~4 .lut_mask = 16'hF4F8; defparam \inst|Selector26~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y40_N22 -fiftyfivenm_lcell_comb \inst|Selector26~0 ( -// Equation(s): -// \inst|Selector26~0_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[57]~46_combout ) # ((\inst|shifter|auto_generated|sbit_w[41]~50_combout & !\inst|IR [2])))) - - .dataa(\inst|shifter|auto_generated|sbit_w[41]~50_combout ), - .datab(\inst|IR [2]), - .datac(\inst|Selector27~4_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[57]~46_combout ), - .cin(gnd), - .combout(\inst|Selector26~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector26~0 .lut_mask = 16'hF020; -defparam \inst|Selector26~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y40_N12 -fiftyfivenm_lcell_comb \inst|Selector26~1 ( -// Equation(s): -// \inst|Selector26~1_combout = (\inst|AC [1] & (((\inst|altsyncram_component|auto_generated|q_a [1] & \inst|state.ex_and~q )) # (!\inst|Selector27~6_combout ))) - - .dataa(\inst|altsyncram_component|auto_generated|q_a [1]), - .datab(\inst|AC [1]), - .datac(\inst|state.ex_and~q ), - .datad(\inst|Selector27~6_combout ), - .cin(gnd), - .combout(\inst|Selector26~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector26~1 .lut_mask = 16'h80CC; -defparam \inst|Selector26~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y40_N18 -fiftyfivenm_lcell_comb \inst|Selector26~2 ( -// Equation(s): -// \inst|Selector26~2_combout = (\inst|Selector26~0_combout ) # ((\inst|Selector26~1_combout ) # ((\inst|Selector20~0_combout & \inst|shifter|auto_generated|sbit_w[49]~40_combout ))) - - .dataa(\inst|Selector26~0_combout ), - .datab(\inst|Selector20~0_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[49]~40_combout ), - .datad(\inst|Selector26~1_combout ), - .cin(gnd), - .combout(\inst|Selector26~2_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector26~2 .lut_mask = 16'hFFEA; -defparam \inst|Selector26~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y40_N28 +// Location: LCCOMB_X57_Y39_N14 fiftyfivenm_lcell_comb \inst|Selector26~5 ( // Equation(s): -// \inst|Selector26~5_combout = (\inst|Selector26~4_combout ) # ((\inst|Selector26~2_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~11_combout ))) +// \inst|Selector26~5_combout = (\inst|Selector26~2_combout ) # ((\inst|Selector26~4_combout ) # ((\inst|AC[3]~0_combout & \inst|Add1~11_combout ))) - .dataa(\inst|AC[2]~0_combout ), + .dataa(\inst|Selector26~2_combout ), .datab(\inst|Selector26~4_combout ), - .datac(\inst|Add1~11_combout ), - .datad(\inst|Selector26~2_combout ), + .datac(\inst|AC[3]~0_combout ), + .datad(\inst|Add1~11_combout ), .cin(gnd), .combout(\inst|Selector26~5_combout ), .cout()); -// synopsys translate_off -defparam \inst|Selector26~5 .lut_mask = 16'hFFEC; -defparam \inst|Selector26~5 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y42_N28 -fiftyfivenm_lcell_comb \inst|Selector26~6 ( -// Equation(s): -// \inst|Selector26~6_combout = (\inst|Selector26~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[1]~23_combout ) # (!\inst13|inst1[0]~18_combout )))) - - .dataa(\inst13|inst1[1]~23_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[0]~18_combout ), - .datad(\inst|Selector26~5_combout ), - .cin(gnd), - .combout(\inst|Selector26~6_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector26~6 .lut_mask = 16'hFF8C; -defparam \inst|Selector26~6 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X51_Y42_N29 -dffeas \inst|AC[1] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector26~6_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|AC [1]), - .prn(vcc)); -// synopsys translate_off -defparam \inst|AC[1] .is_wysiwyg = "true"; -defparam \inst|AC[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X49_Y43_N8 -fiftyfivenm_lcell_comb \inst|state~33 ( -// Equation(s): -// \inst|state~33_combout = (\inst|altsyncram_component|auto_generated|q_a [12] & (!\inst|altsyncram_component|auto_generated|q_a [11] & \inst|state~32_combout )) - - .dataa(gnd), - .datab(\inst|altsyncram_component|auto_generated|q_a [12]), - .datac(\inst|altsyncram_component|auto_generated|q_a [11]), - .datad(\inst|state~32_combout ), - .cin(gnd), - .combout(\inst|state~33_combout ), - .cout()); -// synopsys translate_off -defparam \inst|state~33 .lut_mask = 16'h0C00; -defparam \inst|state~33 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X49_Y43_N9 -dffeas \inst|state.ex_in ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~33_combout ), - .asdata(vcc), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|state.ex_in~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|state.ex_in .is_wysiwyg = "true"; -defparam \inst|state.ex_in .power_up = "low"; -// synopsys translate_on - -// Location: FF_X49_Y43_N21 -dffeas \inst|state.ex_in2 ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(gnd), - .asdata(\inst|state.ex_in~q ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst|state.ex_in2~q ), - .prn(vcc)); -// synopsys translate_off -defparam \inst|state.ex_in2 .is_wysiwyg = "true"; -defparam \inst|state.ex_in2 .power_up = "low"; +// synopsys translate_off +defparam \inst|Selector26~5 .lut_mask = 16'hFEEE; +defparam \inst|Selector26~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y38_N16 -fiftyfivenm_lcell_comb \inst13|inst14|data_out[0]~1 ( +// Location: LCCOMB_X60_Y38_N30 +fiftyfivenm_lcell_comb \inst13|inst1[1]~96 ( // Equation(s): -// \inst13|inst14|data_out[0]~1_combout = (\inst13|inst|data_rd [0] & (\inst13|inst14|prev_busy~q & (\inst13|inst14|state.Rx1~q & !\inst13|inst|busy~q ))) +// \inst13|inst1[1]~96_combout = (!\inst13|inst4~combout & (((\inst10|count [1]) # (\inst|IR [0])) # (!\inst11|tri_enable~1_combout ))) - .dataa(\inst13|inst|data_rd [0]), - .datab(\inst13|inst14|prev_busy~q ), - .datac(\inst13|inst14|state.Rx1~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst13|inst4~combout ), + .datab(\inst11|tri_enable~1_combout ), + .datac(\inst10|count [1]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst14|data_out[0]~1_combout ), + .combout(\inst13|inst1[1]~96_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[0]~1 .lut_mask = 16'h0080; -defparam \inst13|inst14|data_out[0]~1 .sum_lutc_input = "datac"; +defparam \inst13|inst1[1]~96 .lut_mask = 16'h5551; +defparam \inst13|inst1[1]~96 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y38_N17 -dffeas \inst13|inst14|data_out[0] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|data_out[0]~1_combout ), - .asdata(vcc), +// Location: IOIBUF_X51_Y54_N22 +fiftyfivenm_io_ibuf \SW[1]~input ( + .i(SW[1]), + .ibar(gnd), + .nsleep(vcc), + .o(\SW[1]~input_o )); +// synopsys translate_off +defparam \SW[1]~input .bus_hold = "false"; +defparam \SW[1]~input .listen_to_nsleep_signal = "false"; +defparam \SW[1]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X63_Y38_N21 +dffeas \inst7|B_DI[1] ( + .clk(\inst3|SWITCH_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\SW[1]~input_o ), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~2_combout ), + .sload(vcc), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_out [0]), + .q(\inst7|B_DI [1]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_out[0] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_out[0] .power_up = "low"; +defparam \inst7|B_DI[1] .is_wysiwyg = "true"; +defparam \inst7|B_DI[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N22 -fiftyfivenm_lcell_comb \inst13|inst1[0]~15 ( +// Location: LCCOMB_X63_Y38_N20 +fiftyfivenm_lcell_comb \inst13|inst1[1]~27 ( // Equation(s): -// \inst13|inst1[0]~15_combout = (\inst|IO_WRITE_int~q & (((!\inst|AC [0])))) # (!\inst|IO_WRITE_int~q & (\inst3|I2C_DATA_EN~combout & (!\inst13|inst14|data_out [0]))) +// \inst13|inst1[1]~27_combout = (\inst|AC [1] & (((\inst7|B_DI [1]) # (!\inst3|SWITCH_EN~combout )))) # (!\inst|AC [1] & (!\inst|IO_WRITE_int~q & ((\inst7|B_DI [1]) # (!\inst3|SWITCH_EN~combout )))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst13|inst14|data_out [0]), - .datad(\inst|AC [0]), + .dataa(\inst|AC [1]), + .datab(\inst|IO_WRITE_int~q ), + .datac(\inst7|B_DI [1]), + .datad(\inst3|SWITCH_EN~combout ), .cin(gnd), - .combout(\inst13|inst1[0]~15_combout ), + .combout(\inst13|inst1[1]~27_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~15 .lut_mask = 16'h04AE; -defparam \inst13|inst1[0]~15 .sum_lutc_input = "datac"; +defparam \inst13|inst1[1]~27 .lut_mask = 16'hB0BB; +defparam \inst13|inst1[1]~27 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOIBUF_X51_Y54_N29 -fiftyfivenm_io_ibuf \SW[0]~input ( - .i(SW[0]), - .ibar(gnd), - .nsleep(vcc), - .o(\SW[0]~input_o )); +// Location: LCCOMB_X60_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst14|data_out[1]~3 ( +// Equation(s): +// \inst13|inst14|data_out[1]~3_combout = (\inst13|inst14|state.Rx1~q & (!\inst13|inst|busy~q & (\inst13|inst14|prev_busy~q & \inst13|inst|data_rd [1]))) + + .dataa(\inst13|inst14|state.Rx1~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|prev_busy~q ), + .datad(\inst13|inst|data_rd [1]), + .cin(gnd), + .combout(\inst13|inst14|data_out[1]~3_combout ), + .cout()); // synopsys translate_off -defparam \SW[0]~input .bus_hold = "false"; -defparam \SW[0]~input .listen_to_nsleep_signal = "false"; -defparam \SW[0]~input .simulate_z_as = "z"; +defparam \inst13|inst14|data_out[1]~3 .lut_mask = 16'h2000; +defparam \inst13|inst14|data_out[1]~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y41_N9 -dffeas \inst7|B_DI[0] ( - .clk(\inst3|SWITCH_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\SW[0]~input_o ), +// Location: FF_X60_Y36_N3 +dffeas \inst13|inst14|data_out[1] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|data_out[1]~3_combout ), + .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~2_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst7|B_DI [0]), + .q(\inst13|inst14|data_out [1]), .prn(vcc)); // synopsys translate_off -defparam \inst7|B_DI[0] .is_wysiwyg = "true"; -defparam \inst7|B_DI[0] .power_up = "low"; +defparam \inst13|inst14|data_out[1] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_out[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N18 -fiftyfivenm_lcell_comb \inst13|inst1[0]~14 ( +// Location: LCCOMB_X61_Y38_N16 +fiftyfivenm_lcell_comb \inst13|inst1[1]~26 ( // Equation(s): -// \inst13|inst1[0]~14_combout = ((\inst|IR [0] & (\inst11|count [0])) # (!\inst|IR [0] & ((\inst10|count [0])))) # (!\inst11|tri_enable~1_combout ) +// \inst13|inst1[1]~26_combout = ((\inst|IO_WRITE_int~q ) # (\inst13|inst14|data_out [1])) # (!\inst3|I2C_DATA_EN~combout ) - .dataa(\inst|IR [0]), - .datab(\inst11|count [0]), - .datac(\inst10|count [0]), - .datad(\inst11|tri_enable~1_combout ), + .dataa(\inst3|I2C_DATA_EN~combout ), + .datab(gnd), + .datac(\inst|IO_WRITE_int~q ), + .datad(\inst13|inst14|data_out [1]), .cin(gnd), - .combout(\inst13|inst1[0]~14_combout ), + .combout(\inst13|inst1[1]~26_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~14 .lut_mask = 16'hD8FF; -defparam \inst13|inst1[0]~14 .sum_lutc_input = "datac"; +defparam \inst13|inst1[1]~26 .lut_mask = 16'hFFF5; +defparam \inst13|inst1[1]~26 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N20 -fiftyfivenm_lcell_comb \inst13|inst1[0]~16 ( +// Location: LCCOMB_X61_Y38_N20 +fiftyfivenm_lcell_comb \inst13|inst1[1]~28 ( // Equation(s): -// \inst13|inst1[0]~16_combout = (!\inst13|inst1[0]~15_combout & (\inst13|inst1[0]~14_combout & ((\inst7|B_DI [0]) # (!\inst3|SWITCH_EN~combout )))) +// \inst13|inst1[1]~28_combout = (\inst13|inst1[1]~27_combout & (\inst13|inst1[1]~26_combout & ((\inst11|count [1]) # (!\inst11|tri_enable~combout )))) - .dataa(\inst13|inst1[0]~15_combout ), - .datab(\inst7|B_DI [0]), - .datac(\inst3|SWITCH_EN~combout ), - .datad(\inst13|inst1[0]~14_combout ), + .dataa(\inst13|inst1[1]~27_combout ), + .datab(\inst13|inst1[1]~26_combout ), + .datac(\inst11|count [1]), + .datad(\inst11|tri_enable~combout ), .cin(gnd), - .combout(\inst13|inst1[0]~16_combout ), + .combout(\inst13|inst1[1]~28_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~16 .lut_mask = 16'h4500; -defparam \inst13|inst1[0]~16 .sum_lutc_input = "datac"; +defparam \inst13|inst1[1]~28 .lut_mask = 16'h8088; +defparam \inst13|inst1[1]~28 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N26 -fiftyfivenm_lcell_comb \inst|Selector27~7 ( +// Location: LCCOMB_X61_Y38_N18 +fiftyfivenm_lcell_comb \inst13|inst1[1]~29 ( // Equation(s): -// \inst|Selector27~7_combout = (\inst|AC [0] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [0])) # (!\inst|Selector27~6_combout ))) +// \inst13|inst1[1]~29_combout = (\inst13|inst1[1]~96_combout & (\inst13|inst1[1]~28_combout & ((\inst4|COUNT [1]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst|Selector27~6_combout ), - .datab(\inst|AC [0]), - .datac(\inst|state.ex_and~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [0]), + .dataa(\inst13|inst1[1]~96_combout ), + .datab(\inst13|inst1[1]~28_combout ), + .datac(\inst4|IO_OUT~combout ), + .datad(\inst4|COUNT [1]), .cin(gnd), - .combout(\inst|Selector27~7_combout ), + .combout(\inst13|inst1[1]~29_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~7 .lut_mask = 16'hC444; -defparam \inst|Selector27~7 .sum_lutc_input = "datac"; +defparam \inst13|inst1[1]~29 .lut_mask = 16'h8808; +defparam \inst13|inst1[1]~29 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N24 -fiftyfivenm_lcell_comb \inst|Selector27~5 ( +// Location: LCCOMB_X61_Y38_N10 +fiftyfivenm_lcell_comb \inst|Selector26~6 ( // Equation(s): -// \inst|Selector27~5_combout = (\inst|Selector27~4_combout & ((\inst|shifter|auto_generated|sbit_w[56]~24_combout ) # ((!\inst|IR [2] & \inst|shifter|auto_generated|sbit_w[40]~28_combout )))) +// \inst|Selector26~6_combout = (\inst|Selector26~5_combout ) # ((\inst|state.ex_in2~q & ((\inst13|inst1[1]~29_combout ) # (!\inst13|inst1[0]~24_combout )))) - .dataa(\inst|IR [2]), - .datab(\inst|shifter|auto_generated|sbit_w[40]~28_combout ), - .datac(\inst|Selector27~4_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[56]~24_combout ), + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst|Selector26~5_combout ), + .datac(\inst|state.ex_in2~q ), + .datad(\inst13|inst1[1]~29_combout ), .cin(gnd), - .combout(\inst|Selector27~5_combout ), + .combout(\inst|Selector26~6_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~5 .lut_mask = 16'hF040; -defparam \inst|Selector27~5 .sum_lutc_input = "datac"; +defparam \inst|Selector26~6 .lut_mask = 16'hFCDC; +defparam \inst|Selector26~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N20 -fiftyfivenm_lcell_comb \inst|Selector27~8 ( +// Location: FF_X61_Y38_N11 +dffeas \inst|AC[1] ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|Selector26~6_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|AC [1]), + .prn(vcc)); +// synopsys translate_off +defparam \inst|AC[1] .is_wysiwyg = "true"; +defparam \inst|AC[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y38_N24 +fiftyfivenm_lcell_comb \inst|Selector10~0 ( // Equation(s): -// \inst|Selector27~8_combout = (\inst|Selector27~7_combout ) # ((\inst|Selector27~5_combout ) # ((\inst|Selector20~0_combout & \inst|shifter|auto_generated|sbit_w[48]~15_combout ))) +// \inst|Selector10~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & (\inst|altsyncram_component|auto_generated|q_a [1])) # (!\inst|WideNor0~combout & ((\inst|IR [1]))))) - .dataa(\inst|Selector27~7_combout ), - .datab(\inst|Selector20~0_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[48]~15_combout ), - .datad(\inst|Selector27~5_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [1]), + .datab(\inst|state.fetch~q ), + .datac(\inst|IR [1]), + .datad(\inst|WideNor0~combout ), .cin(gnd), - .combout(\inst|Selector27~8_combout ), + .combout(\inst|Selector10~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~8 .lut_mask = 16'hFFEA; -defparam \inst|Selector27~8 .sum_lutc_input = "datac"; +defparam \inst|Selector10~0 .lut_mask = 16'h2230; +defparam \inst|Selector10~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N18 -fiftyfivenm_lcell_comb \inst|Selector27~0 ( +// Location: LCCOMB_X54_Y40_N26 +fiftyfivenm_lcell_comb \inst|next_mem_addr[1]~1 ( // Equation(s): -// \inst|Selector27~0_combout = (\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [0] $ (\inst|AC [0]))) +// \inst|next_mem_addr[1]~1_combout = (\inst|Selector10~0_combout ) # ((\inst|PC [1] & \inst|state.fetch~q )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [0]), - .datab(\inst|state.ex_xor~q ), - .datac(gnd), - .datad(\inst|AC [0]), + .dataa(\inst|Selector10~0_combout ), + .datab(gnd), + .datac(\inst|PC [1]), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst|Selector27~0_combout ), + .combout(\inst|next_mem_addr[1]~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~0 .lut_mask = 16'h4488; -defparam \inst|Selector27~0 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[1]~1 .lut_mask = 16'hFAAA; +defparam \inst|next_mem_addr[1]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N16 -fiftyfivenm_lcell_comb \inst|Selector27~2 ( +// Location: LCCOMB_X54_Y42_N2 +fiftyfivenm_lcell_comb \inst|state~49 ( // Equation(s): -// \inst|Selector27~2_combout = (\inst|Selector27~1_combout & ((\inst|altsyncram_component|auto_generated|q_a [0]) # ((\inst|IR [0] & \inst|state.ex_loadi~q )))) # (!\inst|Selector27~1_combout & (\inst|IR [0] & (\inst|state.ex_loadi~q ))) +// \inst|state~49_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|altsyncram_component|auto_generated|q_a [14] & \inst|state~35_combout )) - .dataa(\inst|Selector27~1_combout ), - .datab(\inst|IR [0]), - .datac(\inst|state.ex_loadi~q ), - .datad(\inst|altsyncram_component|auto_generated|q_a [0]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [14]), + .datad(\inst|state~35_combout ), .cin(gnd), - .combout(\inst|Selector27~2_combout ), + .combout(\inst|state~49_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~2 .lut_mask = 16'hEAC0; -defparam \inst|Selector27~2 .sum_lutc_input = "datac"; +defparam \inst|state~49 .lut_mask = 16'hA000; +defparam \inst|state~49 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y42_N30 -fiftyfivenm_lcell_comb \inst|Selector27~3 ( +// Location: FF_X54_Y42_N3 +dffeas \inst|state.ex_istore ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|state~49_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|state.ex_istore~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|state.ex_istore .is_wysiwyg = "true"; +defparam \inst|state.ex_istore .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y38_N2 +fiftyfivenm_lcell_comb \inst|WideOr7~0 ( // Equation(s): -// \inst|Selector27~3_combout = (\inst|Selector27~0_combout ) # ((\inst|Selector27~2_combout ) # ((\inst|Add1~6_combout & \inst|AC[2]~0_combout ))) +// \inst|WideOr7~0_combout = (\inst|state.decode~q ) # ((\inst|state.ex_iload~q ) # ((\inst|state.ex_in~q ) # (\inst|state.ex_out~q ))) - .dataa(\inst|Add1~6_combout ), - .datab(\inst|Selector27~0_combout ), - .datac(\inst|AC[2]~0_combout ), - .datad(\inst|Selector27~2_combout ), + .dataa(\inst|state.decode~q ), + .datab(\inst|state.ex_iload~q ), + .datac(\inst|state.ex_in~q ), + .datad(\inst|state.ex_out~q ), .cin(gnd), - .combout(\inst|Selector27~3_combout ), + .combout(\inst|WideOr7~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~3 .lut_mask = 16'hFFEC; -defparam \inst|Selector27~3 .sum_lutc_input = "datac"; +defparam \inst|WideOr7~0 .lut_mask = 16'hFFFE; +defparam \inst|WideOr7~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N10 -fiftyfivenm_lcell_comb \inst|Selector27~9 ( +// Location: LCCOMB_X54_Y38_N4 +fiftyfivenm_lcell_comb \inst|WideOr7 ( // Equation(s): -// \inst|Selector27~9_combout = (\inst|Selector27~8_combout ) # ((\inst|Selector27~3_combout ) # ((\inst|state.ex_in2~q & !\inst13|inst1[0]~18_combout ))) +// \inst|WideOr7~combout = (!\inst|state.ex_store~q & (!\inst|state.ex_istore~q & (!\inst|state.fetch~q & !\inst|WideOr7~0_combout ))) - .dataa(\inst|Selector27~8_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst|Selector27~3_combout ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst|state.ex_store~q ), + .datab(\inst|state.ex_istore~q ), + .datac(\inst|state.fetch~q ), + .datad(\inst|WideOr7~0_combout ), .cin(gnd), - .combout(\inst|Selector27~9_combout ), + .combout(\inst|WideOr7~combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~9 .lut_mask = 16'hFAFE; -defparam \inst|Selector27~9 .sum_lutc_input = "datac"; +defparam \inst|WideOr7 .lut_mask = 16'h0001; +defparam \inst|WideOr7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X54_Y38_N5 +dffeas \inst|state.fetch ( + .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), + .d(\inst|WideOr7~combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst|state.fetch~q ), + .prn(vcc)); +// synopsys translate_off +defparam \inst|state.fetch .is_wysiwyg = "true"; +defparam \inst|state.fetch .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N12 -fiftyfivenm_lcell_comb \inst13|inst1[0]~12 ( +// Location: LCCOMB_X54_Y40_N28 +fiftyfivenm_lcell_comb \inst|Selector11~0 ( // Equation(s): -// \inst13|inst1[0]~12_combout = (\inst13|inst14|go~q ) # (\inst13|inst14|running~q ) +// \inst|Selector11~0_combout = (!\inst|state.fetch~q & ((\inst|WideNor0~combout & ((\inst|altsyncram_component|auto_generated|q_a [0]))) # (!\inst|WideNor0~combout & (\inst|IR [0])))) - .dataa(gnd), - .datab(\inst13|inst14|go~q ), - .datac(gnd), - .datad(\inst13|inst14|running~q ), + .dataa(\inst|state.fetch~q ), + .datab(\inst|IR [0]), + .datac(\inst|WideNor0~combout ), + .datad(\inst|altsyncram_component|auto_generated|q_a [0]), .cin(gnd), - .combout(\inst13|inst1[0]~12_combout ), + .combout(\inst|Selector11~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~12 .lut_mask = 16'hFFCC; -defparam \inst13|inst1[0]~12 .sum_lutc_input = "datac"; +defparam \inst|Selector11~0 .lut_mask = 16'h5404; +defparam \inst|Selector11~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N2 -fiftyfivenm_lcell_comb \inst13|inst1[0]~13 ( -// Equation(s): -// \inst13|inst1[0]~13_combout = (\inst13|inst4~combout & (\inst13|inst1[0]~12_combout & ((\inst4|COUNT [0]) # (!\inst4|IO_OUT~combout )))) # (!\inst13|inst4~combout & (((\inst4|COUNT [0])) # (!\inst4|IO_OUT~combout ))) - - .dataa(\inst13|inst4~combout ), - .datab(\inst4|IO_OUT~combout ), - .datac(\inst4|COUNT [0]), - .datad(\inst13|inst1[0]~12_combout ), +// Location: LCCOMB_X54_Y40_N8 +fiftyfivenm_lcell_comb \inst|next_mem_addr[0]~0 ( +// Equation(s): +// \inst|next_mem_addr[0]~0_combout = (\inst|Selector11~0_combout ) # ((\inst|PC [0] & \inst|state.fetch~q )) + + .dataa(gnd), + .datab(\inst|Selector11~0_combout ), + .datac(\inst|PC [0]), + .datad(\inst|state.fetch~q ), .cin(gnd), - .combout(\inst13|inst1[0]~13_combout ), + .combout(\inst|next_mem_addr[0]~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~13 .lut_mask = 16'hF351; -defparam \inst13|inst1[0]~13 .sum_lutc_input = "datac"; +defparam \inst|next_mem_addr[0]~0 .lut_mask = 16'hFCCC; +defparam \inst|next_mem_addr[0]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N4 -fiftyfivenm_lcell_comb \inst|Selector27~10 ( +// Location: LCCOMB_X55_Y38_N8 +fiftyfivenm_lcell_comb \inst|state~33 ( // Equation(s): -// \inst|Selector27~10_combout = (\inst|Selector27~9_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[0]~16_combout & \inst13|inst1[0]~13_combout ))) +// \inst|state~33_combout = (!\inst|altsyncram_component|auto_generated|q_a [11] & (\inst|altsyncram_component|auto_generated|q_a [12] & \inst|state~32_combout )) - .dataa(\inst|state.ex_in2~q ), - .datab(\inst13|inst1[0]~16_combout ), - .datac(\inst|Selector27~9_combout ), - .datad(\inst13|inst1[0]~13_combout ), + .dataa(\inst|altsyncram_component|auto_generated|q_a [11]), + .datab(gnd), + .datac(\inst|altsyncram_component|auto_generated|q_a [12]), + .datad(\inst|state~32_combout ), .cin(gnd), - .combout(\inst|Selector27~10_combout ), + .combout(\inst|state~33_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector27~10 .lut_mask = 16'hF8F0; -defparam \inst|Selector27~10 .sum_lutc_input = "datac"; +defparam \inst|state~33 .lut_mask = 16'h5000; +defparam \inst|state~33 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y41_N5 -dffeas \inst|AC[0] ( +// Location: FF_X55_Y38_N9 +dffeas \inst|state.ex_in ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|Selector27~10_combout ), + .d(\inst|state~33_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|AC [0]), + .q(\inst|state.ex_in~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|AC[0] .is_wysiwyg = "true"; -defparam \inst|AC[0] .power_up = "low"; +defparam \inst|state.ex_in .is_wysiwyg = "true"; +defparam \inst|state.ex_in .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y43_N13 -dffeas \inst|IR[3] ( +// Location: FF_X54_Y38_N15 +dffeas \inst|state.ex_in2 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [3]), - .clrn(vcc), + .asdata(\inst|state.ex_in~q ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(vcc), - .ena(\inst|IR[0]~0_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IR [3]), + .q(\inst|state.ex_in2~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|IR[3] .is_wysiwyg = "true"; -defparam \inst|IR[3] .power_up = "low"; +defparam \inst|state.ex_in2 .is_wysiwyg = "true"; +defparam \inst|state.ex_in2 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y42_N6 -fiftyfivenm_lcell_comb \inst|Selector20~0 ( +// Location: LCCOMB_X55_Y38_N6 +fiftyfivenm_lcell_comb \inst|Selector16~1 ( // Equation(s): -// \inst|Selector20~0_combout = (!\inst|IR [3] & \inst|state.ex_shift~q ) +// \inst|Selector16~1_combout = (\inst|AC [11] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [11])) # (!\inst|Selector27~6_combout ))) - .dataa(gnd), - .datab(gnd), - .datac(\inst|IR [3]), - .datad(\inst|state.ex_shift~q ), + .dataa(\inst|Selector27~6_combout ), + .datab(\inst|state.ex_and~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [11]), + .datad(\inst|AC [11]), .cin(gnd), - .combout(\inst|Selector20~0_combout ), + .combout(\inst|Selector16~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector20~0 .lut_mask = 16'h0F00; -defparam \inst|Selector20~0 .sum_lutc_input = "datac"; +defparam \inst|Selector16~1 .lut_mask = 16'hD500; +defparam \inst|Selector16~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N16 +// Location: LCCOMB_X58_Y34_N12 fiftyfivenm_lcell_comb \inst|Selector16~4 ( // Equation(s): -// \inst|Selector16~4_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[43]~67_combout ) # ((\inst|Selector19~4_combout & \inst|shifter|auto_generated|sbit_w[35]~64_combout )))) # (!\inst|Selector20~0_combout & -// (\inst|Selector19~4_combout & ((\inst|shifter|auto_generated|sbit_w[35]~64_combout )))) +// \inst|Selector16~4_combout = (\inst|shifter|auto_generated|sbit_w[35]~65_combout & ((\inst|Selector19~4_combout ) # ((\inst|shifter|auto_generated|sbit_w[43]~68_combout & \inst|Selector20~0_combout )))) # +// (!\inst|shifter|auto_generated|sbit_w[35]~65_combout & (\inst|shifter|auto_generated|sbit_w[43]~68_combout & (\inst|Selector20~0_combout ))) - .dataa(\inst|Selector20~0_combout ), - .datab(\inst|Selector19~4_combout ), - .datac(\inst|shifter|auto_generated|sbit_w[43]~67_combout ), - .datad(\inst|shifter|auto_generated|sbit_w[35]~64_combout ), + .dataa(\inst|shifter|auto_generated|sbit_w[35]~65_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[43]~68_combout ), + .datac(\inst|Selector20~0_combout ), + .datad(\inst|Selector19~4_combout ), .cin(gnd), .combout(\inst|Selector16~4_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector16~4 .lut_mask = 16'hECA0; +defparam \inst|Selector16~4 .lut_mask = 16'hEAC0; defparam \inst|Selector16~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y44_N18 +// Location: LCCOMB_X58_Y34_N22 fiftyfivenm_lcell_comb \inst|Selector16~5 ( // Equation(s): -// \inst|Selector16~5_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[59]~65_combout ) # ((\inst|Selector16~4_combout & !\inst|IR [2])))) # (!\inst|Selector20~0_combout & (\inst|Selector16~4_combout & (!\inst|IR [2]))) +// \inst|Selector16~5_combout = (\inst|Selector20~0_combout & ((\inst|shifter|auto_generated|sbit_w[59]~66_combout ) # ((!\inst|IR [2] & \inst|Selector16~4_combout )))) # (!\inst|Selector20~0_combout & (((!\inst|IR [2] & \inst|Selector16~4_combout )))) .dataa(\inst|Selector20~0_combout ), - .datab(\inst|Selector16~4_combout ), + .datab(\inst|shifter|auto_generated|sbit_w[59]~66_combout ), .datac(\inst|IR [2]), - .datad(\inst|shifter|auto_generated|sbit_w[59]~65_combout ), + .datad(\inst|Selector16~4_combout ), .cin(gnd), .combout(\inst|Selector16~5_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector16~5 .lut_mask = 16'hAE0C; +defparam \inst|Selector16~5 .lut_mask = 16'h8F88; defparam \inst|Selector16~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N14 +// Location: LCCOMB_X55_Y38_N4 fiftyfivenm_lcell_comb \inst|Selector16~2 ( // Equation(s): -// \inst|Selector16~2_combout = (\inst|state.ex_xor~q & (\inst|AC [11] $ (\inst|altsyncram_component|auto_generated|q_a [11]))) +// \inst|Selector16~2_combout = (\inst|state.ex_xor~q & (\inst|altsyncram_component|auto_generated|q_a [11] $ (\inst|AC [11]))) - .dataa(\inst|AC [11]), - .datab(\inst|altsyncram_component|auto_generated|q_a [11]), - .datac(\inst|state.ex_xor~q ), - .datad(gnd), + .dataa(gnd), + .datab(\inst|state.ex_xor~q ), + .datac(\inst|altsyncram_component|auto_generated|q_a [11]), + .datad(\inst|AC [11]), .cin(gnd), .combout(\inst|Selector16~2_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector16~2 .lut_mask = 16'h6060; +defparam \inst|Selector16~2 .lut_mask = 16'h0CC0; defparam \inst|Selector16~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N24 +// Location: LCCOMB_X55_Y38_N12 fiftyfivenm_lcell_comb \inst|Selector16~3 ( // Equation(s): -// \inst|Selector16~3_combout = ((\inst|Selector16~2_combout ) # ((\inst|AC[2]~0_combout & \inst|Add1~61_combout ))) # (!\inst|Selector16~0_combout ) +// \inst|Selector16~3_combout = ((\inst|Selector16~2_combout ) # ((\inst|Add1~61_combout & \inst|AC[3]~0_combout ))) # (!\inst|Selector16~0_combout ) .dataa(\inst|Selector16~0_combout ), - .datab(\inst|AC[2]~0_combout ), + .datab(\inst|Add1~61_combout ), .datac(\inst|Selector16~2_combout ), - .datad(\inst|Add1~61_combout ), + .datad(\inst|AC[3]~0_combout ), .cin(gnd), .combout(\inst|Selector16~3_combout ), .cout()); @@ -23119,14 +23293,14 @@ defparam \inst|Selector16~3 .lut_mask = 16'hFDF5; defparam \inst|Selector16~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N10 +// Location: LCCOMB_X55_Y38_N28 fiftyfivenm_lcell_comb \inst|Selector16~6 ( // Equation(s): -// \inst|Selector16~6_combout = (\inst|Selector16~5_combout ) # ((\inst|Selector16~3_combout ) # ((\inst|altsyncram_component|auto_generated|q_a [11] & \inst|Selector27~1_combout ))) +// \inst|Selector16~6_combout = (\inst|Selector16~5_combout ) # ((\inst|Selector16~3_combout ) # ((\inst|Selector27~1_combout & \inst|altsyncram_component|auto_generated|q_a [11]))) .dataa(\inst|Selector16~5_combout ), - .datab(\inst|altsyncram_component|auto_generated|q_a [11]), - .datac(\inst|Selector27~1_combout ), + .datab(\inst|Selector27~1_combout ), + .datac(\inst|altsyncram_component|auto_generated|q_a [11]), .datad(\inst|Selector16~3_combout ), .cin(gnd), .combout(\inst|Selector16~6_combout ), @@ -23136,109 +23310,92 @@ defparam \inst|Selector16~6 .lut_mask = 16'hFFEA; defparam \inst|Selector16~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y41_N16 -fiftyfivenm_lcell_comb \inst|Selector16~1 ( -// Equation(s): -// \inst|Selector16~1_combout = (\inst|AC [11] & (((\inst|state.ex_and~q & \inst|altsyncram_component|auto_generated|q_a [11])) # (!\inst|Selector27~6_combout ))) - - .dataa(\inst|state.ex_and~q ), - .datab(\inst|altsyncram_component|auto_generated|q_a [11]), - .datac(\inst|AC [11]), - .datad(\inst|Selector27~6_combout ), - .cin(gnd), - .combout(\inst|Selector16~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst|Selector16~1 .lut_mask = 16'h80F0; -defparam \inst|Selector16~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y41_N26 +// Location: LCCOMB_X58_Y39_N8 fiftyfivenm_lcell_comb \inst|Selector16~7 ( // Equation(s): -// \inst|Selector16~7_combout = (\inst|Selector16~6_combout ) # ((\inst|Selector16~1_combout ) # ((\inst|state.ex_in2~q & !\inst13|inst1[0]~18_combout ))) +// \inst|Selector16~7_combout = (\inst|Selector16~1_combout ) # ((\inst|Selector16~6_combout ) # ((!\inst13|inst1[0]~24_combout & \inst|state.ex_in2~q ))) - .dataa(\inst|Selector16~6_combout ), - .datab(\inst|Selector16~1_combout ), - .datac(\inst|state.ex_in2~q ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst|Selector16~1_combout ), + .datab(\inst|Selector16~6_combout ), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst|state.ex_in2~q ), .cin(gnd), .combout(\inst|Selector16~7_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector16~7 .lut_mask = 16'hEEFE; +defparam \inst|Selector16~7 .lut_mask = 16'hEFEE; defparam \inst|Selector16~7 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N2 -fiftyfivenm_lcell_comb \inst13|inst1[11]~69 ( +// Location: LCCOMB_X59_Y39_N30 +fiftyfivenm_lcell_comb \inst13|inst1[11]~71 ( // Equation(s): -// \inst13|inst1[11]~69_combout = (!\inst13|inst4~combout & (!\inst3|SWITCH_EN~combout & ((\inst4|COUNT [11]) # (!\inst4|IO_OUT~combout )))) +// \inst13|inst1[11]~71_combout = (!\inst3|SWITCH_EN~combout & (!\inst13|inst4~combout & ((\inst4|COUNT [11]) # (!\inst4|IO_OUT~combout )))) - .dataa(\inst4|IO_OUT~combout ), + .dataa(\inst3|SWITCH_EN~combout ), .datab(\inst13|inst4~combout ), - .datac(\inst3|SWITCH_EN~combout ), + .datac(\inst4|IO_OUT~combout ), .datad(\inst4|COUNT [11]), .cin(gnd), - .combout(\inst13|inst1[11]~69_combout ), + .combout(\inst13|inst1[11]~71_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[11]~69 .lut_mask = 16'h0301; -defparam \inst13|inst1[11]~69 .sum_lutc_input = "datac"; +defparam \inst13|inst1[11]~71 .lut_mask = 16'h1101; +defparam \inst13|inst1[11]~71 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N2 -fiftyfivenm_lcell_comb \inst13|inst1[11]~70 ( +// Location: LCCOMB_X60_Y39_N16 +fiftyfivenm_lcell_comb \inst13|inst1[11]~72 ( // Equation(s): -// \inst13|inst1[11]~70_combout = (\inst|IR [0] & (\inst11|count [11])) # (!\inst|IR [0] & ((\inst10|count [11]))) +// \inst13|inst1[11]~72_combout = (\inst|IR [0] & ((\inst11|count [11]))) # (!\inst|IR [0] & (\inst10|count [11])) - .dataa(\inst11|count [11]), - .datab(\inst|IR [0]), - .datac(gnd), - .datad(\inst10|count [11]), + .dataa(\inst10|count [11]), + .datab(gnd), + .datac(\inst11|count [11]), + .datad(\inst|IR [0]), .cin(gnd), - .combout(\inst13|inst1[11]~70_combout ), + .combout(\inst13|inst1[11]~72_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[11]~70 .lut_mask = 16'hBB88; -defparam \inst13|inst1[11]~70 .sum_lutc_input = "datac"; +defparam \inst13|inst1[11]~72 .lut_mask = 16'hF0AA; +defparam \inst13|inst1[11]~72 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N8 -fiftyfivenm_lcell_comb \inst13|inst1[11]~71 ( +// Location: LCCOMB_X60_Y39_N18 +fiftyfivenm_lcell_comb \inst13|inst1[11]~73 ( // Equation(s): -// \inst13|inst1[11]~71_combout = (\inst|IO_WRITE_int~q & (\inst|AC [11] & ((\inst13|inst1[11]~70_combout ) # (!\inst11|tri_enable~1_combout )))) # (!\inst|IO_WRITE_int~q & ((\inst13|inst1[11]~70_combout ) # ((!\inst11|tri_enable~1_combout )))) +// \inst13|inst1[11]~73_combout = (\inst11|tri_enable~1_combout & (\inst13|inst1[11]~72_combout & ((\inst|AC [11]) # (!\inst|IO_WRITE_int~q )))) # (!\inst11|tri_enable~1_combout & (((\inst|AC [11]) # (!\inst|IO_WRITE_int~q )))) - .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst13|inst1[11]~70_combout ), - .datac(\inst11|tri_enable~1_combout ), - .datad(\inst|AC [11]), + .dataa(\inst11|tri_enable~1_combout ), + .datab(\inst13|inst1[11]~72_combout ), + .datac(\inst|AC [11]), + .datad(\inst|IO_WRITE_int~q ), .cin(gnd), - .combout(\inst13|inst1[11]~71_combout ), + .combout(\inst13|inst1[11]~73_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[11]~71 .lut_mask = 16'hCF45; -defparam \inst13|inst1[11]~71 .sum_lutc_input = "datac"; +defparam \inst13|inst1[11]~73 .lut_mask = 16'hD0DD; +defparam \inst13|inst1[11]~73 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y38_N2 +// Location: LCCOMB_X60_Y36_N22 fiftyfivenm_lcell_comb \inst13|inst14|data_out[11]~14 ( // Equation(s): -// \inst13|inst14|data_out[11]~14_combout = (\inst13|inst|data_rd [3] & (\inst13|inst14|state.Rx2~q & (\inst13|inst14|prev_busy~q & !\inst13|inst|busy~q ))) +// \inst13|inst14|data_out[11]~14_combout = (\inst13|inst14|prev_busy~q & (!\inst13|inst|busy~q & (\inst13|inst14|state.Rx2~q & \inst13|inst|data_rd [3]))) - .dataa(\inst13|inst|data_rd [3]), - .datab(\inst13|inst14|state.Rx2~q ), - .datac(\inst13|inst14|prev_busy~q ), - .datad(\inst13|inst|busy~q ), + .dataa(\inst13|inst14|prev_busy~q ), + .datab(\inst13|inst|busy~q ), + .datac(\inst13|inst14|state.Rx2~q ), + .datad(\inst13|inst|data_rd [3]), .cin(gnd), .combout(\inst13|inst14|data_out[11]~14_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_out[11]~14 .lut_mask = 16'h0080; +defparam \inst13|inst14|data_out[11]~14 .lut_mask = 16'h2000; defparam \inst13|inst14|data_out[11]~14 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y38_N3 +// Location: FF_X60_Y36_N23 dffeas \inst13|inst14|data_out[11] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|data_out[11]~14_combout ), @@ -23257,41 +23414,41 @@ defparam \inst13|inst14|data_out[11] .is_wysiwyg = "true"; defparam \inst13|inst14|data_out[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N10 -fiftyfivenm_lcell_comb \inst13|inst1[11]~72 ( +// Location: LCCOMB_X59_Y39_N4 +fiftyfivenm_lcell_comb \inst13|inst1[11]~74 ( // Equation(s): -// \inst13|inst1[11]~72_combout = (\inst13|inst1[11]~71_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [11]) # (!\inst3|I2C_DATA_EN~combout )))) +// \inst13|inst1[11]~74_combout = (\inst13|inst1[11]~73_combout & ((\inst|IO_WRITE_int~q ) # ((\inst13|inst14|data_out [11]) # (!\inst3|I2C_DATA_EN~combout )))) .dataa(\inst|IO_WRITE_int~q ), - .datab(\inst3|I2C_DATA_EN~combout ), - .datac(\inst13|inst1[11]~71_combout ), + .datab(\inst13|inst1[11]~73_combout ), + .datac(\inst3|I2C_DATA_EN~combout ), .datad(\inst13|inst14|data_out [11]), .cin(gnd), - .combout(\inst13|inst1[11]~72_combout ), + .combout(\inst13|inst1[11]~74_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[11]~72 .lut_mask = 16'hF0B0; -defparam \inst13|inst1[11]~72 .sum_lutc_input = "datac"; +defparam \inst13|inst1[11]~74 .lut_mask = 16'hCC8C; +defparam \inst13|inst1[11]~74 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N12 +// Location: LCCOMB_X58_Y39_N28 fiftyfivenm_lcell_comb \inst|Selector16~8 ( // Equation(s): -// \inst|Selector16~8_combout = (\inst|Selector16~7_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[11]~69_combout & \inst13|inst1[11]~72_combout ))) +// \inst|Selector16~8_combout = (\inst|Selector16~7_combout ) # ((\inst|state.ex_in2~q & (\inst13|inst1[11]~71_combout & \inst13|inst1[11]~74_combout ))) - .dataa(\inst|Selector16~7_combout ), - .datab(\inst|state.ex_in2~q ), - .datac(\inst13|inst1[11]~69_combout ), - .datad(\inst13|inst1[11]~72_combout ), + .dataa(\inst|state.ex_in2~q ), + .datab(\inst|Selector16~7_combout ), + .datac(\inst13|inst1[11]~71_combout ), + .datad(\inst13|inst1[11]~74_combout ), .cin(gnd), .combout(\inst|Selector16~8_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector16~8 .lut_mask = 16'hEAAA; +defparam \inst|Selector16~8 .lut_mask = 16'hECCC; defparam \inst|Selector16~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y41_N13 +// Location: FF_X58_Y39_N29 dffeas \inst|AC[11] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(\inst|Selector16~8_combout ), @@ -23310,27 +23467,27 @@ defparam \inst|AC[11] .is_wysiwyg = "true"; defparam \inst|AC[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N14 -fiftyfivenm_lcell_comb \inst|state~49 ( +// Location: LCCOMB_X54_Y38_N26 +fiftyfivenm_lcell_comb \inst|state~48 ( // Equation(s): -// \inst|state~49_combout = (\inst|altsyncram_component|auto_generated|q_a [13] & (\inst|state~35_combout & \inst|altsyncram_component|auto_generated|q_a [14])) +// \inst|state~48_combout = (!\inst|altsyncram_component|auto_generated|q_a [14] & (!\inst|altsyncram_component|auto_generated|q_a [13] & \inst|state~37_combout )) - .dataa(\inst|altsyncram_component|auto_generated|q_a [13]), - .datab(gnd), - .datac(\inst|state~35_combout ), - .datad(\inst|altsyncram_component|auto_generated|q_a [14]), + .dataa(\inst|altsyncram_component|auto_generated|q_a [14]), + .datab(\inst|altsyncram_component|auto_generated|q_a [13]), + .datac(gnd), + .datad(\inst|state~37_combout ), .cin(gnd), - .combout(\inst|state~49_combout ), + .combout(\inst|state~48_combout ), .cout()); // synopsys translate_off -defparam \inst|state~49 .lut_mask = 16'hA000; -defparam \inst|state~49 .sum_lutc_input = "datac"; +defparam \inst|state~48 .lut_mask = 16'h1100; +defparam \inst|state~48 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N15 -dffeas \inst|state.ex_istore ( +// Location: FF_X54_Y38_N27 +dffeas \inst|state.ex_store ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst|state~49_combout ), + .d(\inst|state~48_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -23339,14 +23496,14 @@ dffeas \inst|state.ex_istore ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst|state.ex_istore~q ), + .q(\inst|state.ex_store~q ), .prn(vcc)); // synopsys translate_off -defparam \inst|state.ex_istore .is_wysiwyg = "true"; -defparam \inst|state.ex_istore .power_up = "low"; +defparam \inst|state.ex_store .is_wysiwyg = "true"; +defparam \inst|state.ex_store .power_up = "low"; // synopsys translate_on -// Location: FF_X49_Y40_N1 +// Location: FF_X54_Y38_N29 dffeas \inst|state.ex_store2 ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), @@ -23365,41 +23522,41 @@ defparam \inst|state.ex_store2 .is_wysiwyg = "true"; defparam \inst|state.ex_store2 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N0 +// Location: LCCOMB_X54_Y38_N28 fiftyfivenm_lcell_comb \inst|Selector0~0 ( // Equation(s): -// \inst|Selector0~0_combout = (!\inst|state.ex_istore2~q & (\inst10|state.Init~q & (!\inst|state.ex_store2~q & \inst|MW~q ))) +// \inst|Selector0~0_combout = (\inst10|state.Init~q & (!\inst|state.ex_istore2~q & (!\inst|state.ex_store2~q & \inst|MW~q ))) - .dataa(\inst|state.ex_istore2~q ), - .datab(\inst10|state.Init~q ), + .dataa(\inst10|state.Init~q ), + .datab(\inst|state.ex_istore2~q ), .datac(\inst|state.ex_store2~q ), .datad(\inst|MW~q ), .cin(gnd), .combout(\inst|Selector0~0_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector0~0 .lut_mask = 16'h0400; +defparam \inst|Selector0~0 .lut_mask = 16'h0200; defparam \inst|Selector0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y40_N2 +// Location: LCCOMB_X54_Y38_N22 fiftyfivenm_lcell_comb \inst|Selector0~1 ( // Equation(s): -// \inst|Selector0~1_combout = (\inst|state.ex_istore~q ) # ((\inst|state.ex_store~q ) # (\inst|Selector0~0_combout )) +// \inst|Selector0~1_combout = (\inst|state.ex_store~q ) # ((\inst|state.ex_istore~q ) # (\inst|Selector0~0_combout )) - .dataa(gnd), + .dataa(\inst|state.ex_store~q ), .datab(\inst|state.ex_istore~q ), - .datac(\inst|state.ex_store~q ), + .datac(gnd), .datad(\inst|Selector0~0_combout ), .cin(gnd), .combout(\inst|Selector0~1_combout ), .cout()); // synopsys translate_off -defparam \inst|Selector0~1 .lut_mask = 16'hFFFC; +defparam \inst|Selector0~1 .lut_mask = 16'hFFEE; defparam \inst|Selector0~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y40_N3 +// Location: FF_X54_Y38_N23 dffeas \inst|MW ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(\inst|Selector0~1_combout ), @@ -23418,11 +23575,11 @@ defparam \inst|MW .is_wysiwyg = "true"; defparam \inst|MW .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y43_N7 -dffeas \inst|IR[5] ( +// Location: FF_X58_Y38_N23 +dffeas \inst|IR[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), .d(gnd), - .asdata(\inst|altsyncram_component|auto_generated|q_a [5]), + .asdata(\inst|altsyncram_component|auto_generated|q_a [0]), .clrn(vcc), .aload(gnd), .sclr(gnd), @@ -23430,65 +23587,65 @@ dffeas \inst|IR[5] ( .ena(\inst|IR[0]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst|IR [5]), + .q(\inst|IR [0]), .prn(vcc)); // synopsys translate_off -defparam \inst|IR[5] .is_wysiwyg = "true"; -defparam \inst|IR[5] .power_up = "low"; +defparam \inst|IR[0] .is_wysiwyg = "true"; +defparam \inst|IR[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N16 +// Location: LCCOMB_X58_Y38_N24 fiftyfivenm_lcell_comb \inst3|TIMER_EN~0 ( // Equation(s): -// \inst3|TIMER_EN~0_combout = (!\inst|IR [5] & (!\inst|IR [0] & !\inst|IR [3])) +// \inst3|TIMER_EN~0_combout = (!\inst|IR [3] & (!\inst|IR [6] & !\inst|IR [5])) - .dataa(\inst|IR [5]), - .datab(\inst|IR [0]), - .datac(gnd), - .datad(\inst|IR [3]), + .dataa(\inst|IR [3]), + .datab(gnd), + .datac(\inst|IR [6]), + .datad(\inst|IR [5]), .cin(gnd), .combout(\inst3|TIMER_EN~0_combout ), .cout()); // synopsys translate_off -defparam \inst3|TIMER_EN~0 .lut_mask = 16'h0011; +defparam \inst3|TIMER_EN~0 .lut_mask = 16'h0005; defparam \inst3|TIMER_EN~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N28 +// Location: LCCOMB_X59_Y40_N0 fiftyfivenm_lcell_comb \inst3|TIMER_EN~1 ( // Equation(s): -// \inst3|TIMER_EN~1_combout = (\inst3|TIMER_EN~0_combout & (\inst3|SWITCH_EN~0_combout & (!\inst|IR [6] & !\inst|IR [2]))) +// \inst3|TIMER_EN~1_combout = (!\inst|IR [0] & (!\inst|IR [2] & (\inst3|TIMER_EN~0_combout & \inst3|SWITCH_EN~0_combout ))) - .dataa(\inst3|TIMER_EN~0_combout ), - .datab(\inst3|SWITCH_EN~0_combout ), - .datac(\inst|IR [6]), - .datad(\inst|IR [2]), + .dataa(\inst|IR [0]), + .datab(\inst|IR [2]), + .datac(\inst3|TIMER_EN~0_combout ), + .datad(\inst3|SWITCH_EN~0_combout ), .cin(gnd), .combout(\inst3|TIMER_EN~1_combout ), .cout()); // synopsys translate_off -defparam \inst3|TIMER_EN~1 .lut_mask = 16'h0008; +defparam \inst3|TIMER_EN~1 .lut_mask = 16'h1000; defparam \inst3|TIMER_EN~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N22 +// Location: LCCOMB_X58_Y38_N18 fiftyfivenm_lcell_comb \inst13|inst12 ( // Equation(s): -// \inst13|inst12~combout = LCELL((\inst3|TIMER_EN~1_combout & (\inst13|inst12~0_combout & \inst|IO_WRITE_int~q ))) +// \inst13|inst12~combout = LCELL((\inst3|TIMER_EN~1_combout & (\inst|IO_WRITE_int~q & \inst13|inst12~0_combout ))) - .dataa(gnd), - .datab(\inst3|TIMER_EN~1_combout ), - .datac(\inst13|inst12~0_combout ), - .datad(\inst|IO_WRITE_int~q ), + .dataa(\inst3|TIMER_EN~1_combout ), + .datab(\inst|IO_WRITE_int~q ), + .datac(gnd), + .datad(\inst13|inst12~0_combout ), .cin(gnd), .combout(\inst13|inst12~combout ), .cout()); // synopsys translate_off -defparam \inst13|inst12 .lut_mask = 16'hC000; +defparam \inst13|inst12 .lut_mask = 16'h8800; defparam \inst13|inst12 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G5 +// Location: CLKCTRL_G6 fiftyfivenm_clkctrl \inst13|inst12~clkctrl ( .ena(vcc), .inclk({vcc,vcc,vcc,\inst13|inst12~combout }), @@ -23501,44 +23658,61 @@ defparam \inst13|inst12~clkctrl .clock_type = "global clock"; defparam \inst13|inst12~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N20 -fiftyfivenm_lcell_comb \inst13|inst1[4]~39 ( +// Location: LCCOMB_X60_Y38_N28 +fiftyfivenm_lcell_comb \inst13|inst1[2]~97 ( // Equation(s): -// \inst13|inst1[4]~39_combout = (\inst13|inst1[4]~38_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[2]~97_combout = ((\inst11|count [2]) # (!\inst11|tri_enable~1_combout )) # (!\inst|IR [0]) - .dataa(gnd), - .datab(\inst13|inst1[4]~38_combout ), + .dataa(\inst|IR [0]), + .datab(\inst11|count [2]), .datac(gnd), - .datad(\inst13|inst1[0]~18_combout ), + .datad(\inst11|tri_enable~1_combout ), .cin(gnd), - .combout(\inst13|inst1[4]~39_combout ), + .combout(\inst13|inst1[2]~97_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[4]~39 .lut_mask = 16'hCCFF; -defparam \inst13|inst1[4]~39 .sum_lutc_input = "datac"; +defparam \inst13|inst1[2]~97 .lut_mask = 16'hDDFF; +defparam \inst13|inst1[2]~97 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N4 -fiftyfivenm_lcell_comb \inst13|inst14|addr_in[4]~feeder ( +// Location: LCCOMB_X61_Y38_N4 +fiftyfivenm_lcell_comb \inst13|inst1[2]~34 ( // Equation(s): -// \inst13|inst14|addr_in[4]~feeder_combout = \inst13|inst1[4]~39_combout +// \inst13|inst1[2]~34_combout = ((\inst13|inst1[2]~31_combout & (\inst13|inst1[2]~33_combout & \inst13|inst1[2]~97_combout ))) # (!\inst13|inst1[0]~24_combout ) - .dataa(gnd), + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst13|inst1[2]~31_combout ), + .datac(\inst13|inst1[2]~33_combout ), + .datad(\inst13|inst1[2]~97_combout ), + .cin(gnd), + .combout(\inst13|inst1[2]~34_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[2]~34 .lut_mask = 16'hD555; +defparam \inst13|inst1[2]~34 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst14|addr_in[2]~feeder ( +// Equation(s): +// \inst13|inst14|addr_in[2]~feeder_combout = \inst13|inst1[2]~34_combout + + .dataa(\inst13|inst1[2]~34_combout ), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[4]~39_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst14|addr_in[4]~feeder_combout ), + .combout(\inst13|inst14|addr_in[2]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[4]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst14|addr_in[4]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|addr_in[2]~feeder .lut_mask = 16'hAAAA; +defparam \inst13|inst14|addr_in[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N5 -dffeas \inst13|inst14|addr_in[4] ( +// Location: FF_X58_Y36_N3 +dffeas \inst13|inst14|addr_in[2] ( .clk(\inst13|inst12~clkctrl_outclk ), - .d(\inst13|inst14|addr_in[4]~feeder_combout ), + .d(\inst13|inst14|addr_in[2]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -23547,38 +23721,21 @@ dffeas \inst13|inst14|addr_in[4] ( .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|addr_in [4]), + .q(\inst13|inst14|addr_in [2]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|addr_in[4] .is_wysiwyg = "true"; -defparam \inst13|inst14|addr_in[4] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y35_N24 -fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[4]~feeder ( -// Equation(s): -// \inst13|inst14|tx_addr[4]~feeder_combout = \inst13|inst14|addr_in [4] - - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst14|addr_in [4]), - .datad(gnd), - .cin(gnd), - .combout(\inst13|inst14|tx_addr[4]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst14|tx_addr[4]~feeder .lut_mask = 16'hF0F0; -defparam \inst13|inst14|tx_addr[4]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|addr_in[2] .is_wysiwyg = "true"; +defparam \inst13|inst14|addr_in[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N28 +// Location: LCCOMB_X58_Y36_N12 fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[7]~1 ( // Equation(s): -// \inst13|inst14|tx_addr[7]~1_combout = (\inst1|altpll_component|auto_generated|pll_lock_sync~q & (\inst1|altpll_component|auto_generated|wire_pll1_locked & (\inst13|inst14|go~q & !\inst13|inst14|state.idle~q ))) +// \inst13|inst14|tx_addr[7]~1_combout = (\inst13|inst14|go~q & (\inst1|altpll_component|auto_generated|wire_pll1_locked & (\inst1|altpll_component|auto_generated|pll_lock_sync~q & !\inst13|inst14|state.idle~q ))) - .dataa(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), + .dataa(\inst13|inst14|go~q ), .datab(\inst1|altpll_component|auto_generated|wire_pll1_locked ), - .datac(\inst13|inst14|go~q ), + .datac(\inst1|altpll_component|auto_generated|pll_lock_sync~q ), .datad(\inst13|inst14|state.idle~q ), .cin(gnd), .combout(\inst13|inst14|tx_addr[7]~1_combout ), @@ -23588,63 +23745,63 @@ defparam \inst13|inst14|tx_addr[7]~1 .lut_mask = 16'h0080; defparam \inst13|inst14|tx_addr[7]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N25 -dffeas \inst13|inst14|tx_addr[4] ( +// Location: FF_X55_Y36_N5 +dffeas \inst13|inst14|tx_addr[2] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|tx_addr[4]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst14|addr_in [2]), .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(\inst13|inst14|tx_addr[7]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|tx_addr [4]), + .q(\inst13|inst14|tx_addr [2]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|tx_addr[4] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_addr[4] .power_up = "low"; +defparam \inst13|inst14|tx_addr[2] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_addr[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N2 -fiftyfivenm_lcell_comb \inst13|inst1[3]~34 ( +// Location: LCCOMB_X61_Y38_N8 +fiftyfivenm_lcell_comb \inst13|inst1[1]~30 ( // Equation(s): -// \inst13|inst1[3]~34_combout = (\inst13|inst1[3]~33_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[1]~30_combout = (\inst13|inst1[1]~29_combout ) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst13|inst1[0]~18_combout ), - .datab(gnd), + .dataa(\inst13|inst1[0]~24_combout ), + .datab(\inst13|inst1[1]~29_combout ), .datac(gnd), - .datad(\inst13|inst1[3]~33_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst1[3]~34_combout ), + .combout(\inst13|inst1[1]~30_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[3]~34 .lut_mask = 16'hFF55; -defparam \inst13|inst1[3]~34 .sum_lutc_input = "datac"; +defparam \inst13|inst1[1]~30 .lut_mask = 16'hDDDD; +defparam \inst13|inst1[1]~30 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N22 -fiftyfivenm_lcell_comb \inst13|inst14|addr_in[3]~feeder ( +// Location: LCCOMB_X58_Y36_N18 +fiftyfivenm_lcell_comb \inst13|inst14|addr_in[1]~feeder ( // Equation(s): -// \inst13|inst14|addr_in[3]~feeder_combout = \inst13|inst1[3]~34_combout +// \inst13|inst14|addr_in[1]~feeder_combout = \inst13|inst1[1]~30_combout .dataa(gnd), - .datab(\inst13|inst1[3]~34_combout ), + .datab(\inst13|inst1[1]~30_combout ), .datac(gnd), .datad(gnd), .cin(gnd), - .combout(\inst13|inst14|addr_in[3]~feeder_combout ), + .combout(\inst13|inst14|addr_in[1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[3]~feeder .lut_mask = 16'hCCCC; -defparam \inst13|inst14|addr_in[3]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|addr_in[1]~feeder .lut_mask = 16'hCCCC; +defparam \inst13|inst14|addr_in[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N23 -dffeas \inst13|inst14|addr_in[3] ( +// Location: FF_X58_Y36_N19 +dffeas \inst13|inst14|addr_in[1] ( .clk(\inst13|inst12~clkctrl_outclk ), - .d(\inst13|inst14|addr_in[3]~feeder_combout ), + .d(\inst13|inst14|addr_in[1]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -23653,34 +23810,34 @@ dffeas \inst13|inst14|addr_in[3] ( .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|addr_in [3]), + .q(\inst13|inst14|addr_in [1]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|addr_in[3] .is_wysiwyg = "true"; -defparam \inst13|inst14|addr_in[3] .power_up = "low"; +defparam \inst13|inst14|addr_in[1] .is_wysiwyg = "true"; +defparam \inst13|inst14|addr_in[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N14 -fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[3]~feeder ( +// Location: LCCOMB_X55_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[1]~feeder ( // Equation(s): -// \inst13|inst14|tx_addr[3]~feeder_combout = \inst13|inst14|addr_in [3] +// \inst13|inst14|tx_addr[1]~feeder_combout = \inst13|inst14|addr_in [1] .dataa(gnd), .datab(gnd), - .datac(\inst13|inst14|addr_in [3]), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst14|addr_in [1]), .cin(gnd), - .combout(\inst13|inst14|tx_addr[3]~feeder_combout ), + .combout(\inst13|inst14|tx_addr[1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|tx_addr[3]~feeder .lut_mask = 16'hF0F0; -defparam \inst13|inst14|tx_addr[3]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|tx_addr[1]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|tx_addr[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N15 -dffeas \inst13|inst14|tx_addr[3] ( +// Location: FF_X55_Y36_N9 +dffeas \inst13|inst14|tx_addr[1] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|tx_addr[3]~feeder_combout ), + .d(\inst13|inst14|tx_addr[1]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -23689,18 +23846,18 @@ dffeas \inst13|inst14|tx_addr[3] ( .ena(\inst13|inst14|tx_addr[7]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|tx_addr [3]), + .q(\inst13|inst14|tx_addr [1]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|tx_addr[3] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_addr[3] .power_up = "low"; +defparam \inst13|inst14|tx_addr[1] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_addr[1] .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y35_N9 -dffeas \inst13|inst|addr_rw[3] ( +// Location: FF_X55_Y36_N29 +dffeas \inst13|inst|addr_rw[1] ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst14|tx_addr [3]), + .asdata(\inst13|inst14|tx_addr [1]), .clrn(vcc), .aload(gnd), .sclr(gnd), @@ -23708,18 +23865,18 @@ dffeas \inst13|inst|addr_rw[3] ( .ena(\inst13|inst|addr_rw[7]~3_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|addr_rw [3]), + .q(\inst13|inst|addr_rw [1]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|addr_rw[3] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[3] .power_up = "low"; +defparam \inst13|inst|addr_rw[1] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[1] .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y35_N23 -dffeas \inst13|inst|addr_rw[4] ( +// Location: FF_X55_Y36_N21 +dffeas \inst13|inst|addr_rw[2] ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst14|tx_addr [4]), + .asdata(\inst13|inst14|tx_addr [2]), .clrn(vcc), .aload(gnd), .sclr(gnd), @@ -23727,66 +23884,66 @@ dffeas \inst13|inst|addr_rw[4] ( .ena(\inst13|inst|addr_rw[7]~3_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|addr_rw [4]), + .q(\inst13|inst|addr_rw [2]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|addr_rw[4] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[4] .power_up = "low"; +defparam \inst13|inst|addr_rw[2] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N8 -fiftyfivenm_lcell_comb \inst13|inst|process_1~1 ( +// Location: LCCOMB_X55_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst|process_1~0 ( // Equation(s): -// \inst13|inst|process_1~1_combout = (\inst13|inst14|tx_addr [4] & (\inst13|inst|addr_rw [4] & (\inst13|inst14|tx_addr [3] $ (!\inst13|inst|addr_rw [3])))) # (!\inst13|inst14|tx_addr [4] & (!\inst13|inst|addr_rw [4] & (\inst13|inst14|tx_addr [3] $ -// (!\inst13|inst|addr_rw [3])))) +// \inst13|inst|process_1~0_combout = (\inst13|inst14|tx_addr [2] & (\inst13|inst|addr_rw [2] & (\inst13|inst14|tx_addr [1] $ (!\inst13|inst|addr_rw [1])))) # (!\inst13|inst14|tx_addr [2] & (!\inst13|inst|addr_rw [2] & (\inst13|inst14|tx_addr [1] $ +// (!\inst13|inst|addr_rw [1])))) - .dataa(\inst13|inst14|tx_addr [4]), - .datab(\inst13|inst14|tx_addr [3]), - .datac(\inst13|inst|addr_rw [3]), - .datad(\inst13|inst|addr_rw [4]), + .dataa(\inst13|inst14|tx_addr [2]), + .datab(\inst13|inst14|tx_addr [1]), + .datac(\inst13|inst|addr_rw [1]), + .datad(\inst13|inst|addr_rw [2]), .cin(gnd), - .combout(\inst13|inst|process_1~1_combout ), + .combout(\inst13|inst|process_1~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|process_1~1 .lut_mask = 16'h8241; -defparam \inst13|inst|process_1~1 .sum_lutc_input = "datac"; +defparam \inst13|inst|process_1~0 .lut_mask = 16'h8241; +defparam \inst13|inst|process_1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N14 -fiftyfivenm_lcell_comb \inst13|inst1[7]~54 ( +// Location: LCCOMB_X59_Y37_N14 +fiftyfivenm_lcell_comb \inst13|inst1[7]~57 ( // Equation(s): -// \inst13|inst1[7]~54_combout = (\inst13|inst1[7]~53_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[7]~57_combout = ((\inst13|inst1[7]~102_combout & (\inst13|inst1[7]~56_combout & \inst4|IO_BUS|dout[7]~2_combout ))) # (!\inst13|inst1[0]~24_combout ) - .dataa(gnd), - .datab(\inst13|inst1[7]~53_combout ), - .datac(gnd), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst13|inst1[7]~102_combout ), + .datab(\inst13|inst1[7]~56_combout ), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst4|IO_BUS|dout[7]~2_combout ), .cin(gnd), - .combout(\inst13|inst1[7]~54_combout ), + .combout(\inst13|inst1[7]~57_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[7]~54 .lut_mask = 16'hCCFF; -defparam \inst13|inst1[7]~54 .sum_lutc_input = "datac"; +defparam \inst13|inst1[7]~57 .lut_mask = 16'h8F0F; +defparam \inst13|inst1[7]~57 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N0 +// Location: LCCOMB_X58_Y36_N0 fiftyfivenm_lcell_comb \inst13|inst14|addr_in[7]~feeder ( // Equation(s): -// \inst13|inst14|addr_in[7]~feeder_combout = \inst13|inst1[7]~54_combout +// \inst13|inst14|addr_in[7]~feeder_combout = \inst13|inst1[7]~57_combout .dataa(gnd), .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[7]~54_combout ), + .datac(\inst13|inst1[7]~57_combout ), + .datad(gnd), .cin(gnd), .combout(\inst13|inst14|addr_in[7]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[7]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|addr_in[7]~feeder .lut_mask = 16'hF0F0; defparam \inst13|inst14|addr_in[7]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N1 +// Location: FF_X58_Y36_N1 dffeas \inst13|inst14|addr_in[7] ( .clk(\inst13|inst12~clkctrl_outclk ), .d(\inst13|inst14|addr_in[7]~feeder_combout ), @@ -23805,7 +23962,7 @@ defparam \inst13|inst14|addr_in[7] .is_wysiwyg = "true"; defparam \inst13|inst14|addr_in[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N20 +// Location: LCCOMB_X58_Y36_N24 fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[7]~feeder ( // Equation(s): // \inst13|inst14|tx_addr[7]~feeder_combout = \inst13|inst14|addr_in [7] @@ -23822,7 +23979,7 @@ defparam \inst13|inst14|tx_addr[7]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|tx_addr[7]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N21 +// Location: FF_X58_Y36_N25 dffeas \inst13|inst14|tx_addr[7] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|tx_addr[7]~feeder_combout ), @@ -23841,7 +23998,7 @@ defparam \inst13|inst14|tx_addr[7] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_addr[7] .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y35_N21 +// Location: FF_X55_Y36_N17 dffeas \inst13|inst|addr_rw[7] ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(gnd), @@ -23860,61 +24017,167 @@ defparam \inst13|inst|addr_rw[7] .is_wysiwyg = "true"; defparam \inst13|inst|addr_rw[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N20 +// Location: LCCOMB_X55_Y36_N16 fiftyfivenm_lcell_comb \inst13|inst|process_1~3 ( // Equation(s): // \inst13|inst|process_1~3_combout = (\inst13|inst14|comm_en~q & (\inst13|inst14|tx_addr [7] $ (!\inst13|inst|addr_rw [7]))) - .dataa(gnd), - .datab(\inst13|inst14|tx_addr [7]), + .dataa(\inst13|inst14|tx_addr [7]), + .datab(gnd), .datac(\inst13|inst|addr_rw [7]), .datad(\inst13|inst14|comm_en~q ), .cin(gnd), .combout(\inst13|inst|process_1~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|process_1~3 .lut_mask = 16'hC300; +defparam \inst13|inst|process_1~3 .lut_mask = 16'hA500; defparam \inst13|inst|process_1~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y43_N0 -fiftyfivenm_lcell_comb \inst13|inst1[2]~29 ( +// Location: LCCOMB_X59_Y40_N12 +fiftyfivenm_lcell_comb \inst13|inst1[4]~43 ( +// Equation(s): +// \inst13|inst1[4]~43_combout = (\inst13|inst1[4]~42_combout ) # (!\inst13|inst1[0]~24_combout ) + + .dataa(gnd), + .datab(\inst13|inst1[0]~24_combout ), + .datac(gnd), + .datad(\inst13|inst1[4]~42_combout ), + .cin(gnd), + .combout(\inst13|inst1[4]~43_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[4]~43 .lut_mask = 16'hFF33; +defparam \inst13|inst1[4]~43 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst14|addr_in[4]~feeder ( // Equation(s): -// \inst13|inst1[2]~29_combout = (\inst13|inst1[2]~28_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst14|addr_in[4]~feeder_combout = \inst13|inst1[4]~43_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[0]~18_combout ), - .datad(\inst13|inst1[2]~28_combout ), + .datac(\inst13|inst1[4]~43_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst1[2]~29_combout ), + .combout(\inst13|inst14|addr_in[4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[2]~29 .lut_mask = 16'hFF0F; -defparam \inst13|inst1[2]~29 .sum_lutc_input = "datac"; +defparam \inst13|inst14|addr_in[4]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst14|addr_in[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N18 -fiftyfivenm_lcell_comb \inst13|inst14|addr_in[2]~feeder ( +// Location: FF_X58_Y36_N17 +dffeas \inst13|inst14|addr_in[4] ( + .clk(\inst13|inst12~clkctrl_outclk ), + .d(\inst13|inst14|addr_in[4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|data_out[7]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|addr_in [4]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|addr_in[4] .is_wysiwyg = "true"; +defparam \inst13|inst14|addr_in[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[4]~feeder ( // Equation(s): -// \inst13|inst14|addr_in[2]~feeder_combout = \inst13|inst1[2]~29_combout +// \inst13|inst14|tx_addr[4]~feeder_combout = \inst13|inst14|addr_in [4] .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[2]~29_combout ), + .datad(\inst13|inst14|addr_in [4]), .cin(gnd), - .combout(\inst13|inst14|addr_in[2]~feeder_combout ), + .combout(\inst13|inst14|tx_addr[4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[2]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst14|addr_in[2]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|tx_addr[4]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|tx_addr[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N19 -dffeas \inst13|inst14|addr_in[2] ( +// Location: FF_X58_Y36_N21 +dffeas \inst13|inst14|tx_addr[4] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|tx_addr[4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst14|tx_addr[7]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|tx_addr [4]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|tx_addr[4] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_addr[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y38_N10 +fiftyfivenm_lcell_comb \inst13|inst1[3]~98 ( +// Equation(s): +// \inst13|inst1[3]~98_combout = ((\inst11|count [3]) # (!\inst|IR [0])) # (!\inst11|tri_enable~1_combout ) + + .dataa(gnd), + .datab(\inst11|tri_enable~1_combout ), + .datac(\inst11|count [3]), + .datad(\inst|IR [0]), + .cin(gnd), + .combout(\inst13|inst1[3]~98_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[3]~98 .lut_mask = 16'hF3FF; +defparam \inst13|inst1[3]~98 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y38_N4 +fiftyfivenm_lcell_comb \inst13|inst1[3]~38 ( +// Equation(s): +// \inst13|inst1[3]~38_combout = ((\inst13|inst1[3]~37_combout & (\inst13|inst1[3]~98_combout & \inst13|inst1[3]~35_combout ))) # (!\inst13|inst1[0]~24_combout ) + + .dataa(\inst13|inst1[3]~37_combout ), + .datab(\inst13|inst1[3]~98_combout ), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst13|inst1[3]~35_combout ), + .cin(gnd), + .combout(\inst13|inst1[3]~38_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[3]~38 .lut_mask = 16'h8F0F; +defparam \inst13|inst1[3]~38 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X58_Y36_N10 +fiftyfivenm_lcell_comb \inst13|inst14|addr_in[3]~feeder ( +// Equation(s): +// \inst13|inst14|addr_in[3]~feeder_combout = \inst13|inst1[3]~38_combout + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst1[3]~38_combout ), + .cin(gnd), + .combout(\inst13|inst14|addr_in[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst14|addr_in[3]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|addr_in[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X58_Y36_N11 +dffeas \inst13|inst14|addr_in[3] ( .clk(\inst13|inst12~clkctrl_outclk ), - .d(\inst13|inst14|addr_in[2]~feeder_combout ), + .d(\inst13|inst14|addr_in[3]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -23923,34 +24186,34 @@ dffeas \inst13|inst14|addr_in[2] ( .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|addr_in [2]), + .q(\inst13|inst14|addr_in [3]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|addr_in[2] .is_wysiwyg = "true"; -defparam \inst13|inst14|addr_in[2] .power_up = "low"; +defparam \inst13|inst14|addr_in[3] .is_wysiwyg = "true"; +defparam \inst13|inst14|addr_in[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N16 -fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[2]~feeder ( +// Location: LCCOMB_X58_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[3]~feeder ( // Equation(s): -// \inst13|inst14|tx_addr[2]~feeder_combout = \inst13|inst14|addr_in [2] +// \inst13|inst14|tx_addr[3]~feeder_combout = \inst13|inst14|addr_in [3] .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst13|inst14|addr_in [2]), + .datad(\inst13|inst14|addr_in [3]), .cin(gnd), - .combout(\inst13|inst14|tx_addr[2]~feeder_combout ), + .combout(\inst13|inst14|tx_addr[3]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|tx_addr[2]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst14|tx_addr[2]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|tx_addr[3]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|tx_addr[3]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N17 -dffeas \inst13|inst14|tx_addr[2] ( +// Location: FF_X58_Y36_N15 +dffeas \inst13|inst14|tx_addr[3] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|tx_addr[2]~feeder_combout ), + .d(\inst13|inst14|tx_addr[3]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -23959,18 +24222,18 @@ dffeas \inst13|inst14|tx_addr[2] ( .ena(\inst13|inst14|tx_addr[7]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|tx_addr [2]), + .q(\inst13|inst14|tx_addr [3]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|tx_addr[2] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_addr[2] .power_up = "low"; +defparam \inst13|inst14|tx_addr[3] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_addr[3] .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y35_N31 -dffeas \inst13|inst|addr_rw[2] ( +// Location: FF_X55_Y36_N31 +dffeas \inst13|inst|addr_rw[3] ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst14|tx_addr [2]), + .asdata(\inst13|inst14|tx_addr [3]), .clrn(vcc), .aload(gnd), .sclr(gnd), @@ -23978,51 +24241,88 @@ dffeas \inst13|inst|addr_rw[2] ( .ena(\inst13|inst|addr_rw[7]~3_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|addr_rw [2]), + .q(\inst13|inst|addr_rw [3]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|addr_rw[2] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[2] .power_up = "low"; +defparam \inst13|inst|addr_rw[3] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y36_N7 +dffeas \inst13|inst|addr_rw[4] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_addr [4]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|addr_rw [4]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|addr_rw[4] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y36_N30 +fiftyfivenm_lcell_comb \inst13|inst|process_1~1 ( +// Equation(s): +// \inst13|inst|process_1~1_combout = (\inst13|inst14|tx_addr [4] & (\inst13|inst|addr_rw [4] & (\inst13|inst14|tx_addr [3] $ (!\inst13|inst|addr_rw [3])))) # (!\inst13|inst14|tx_addr [4] & (!\inst13|inst|addr_rw [4] & (\inst13|inst14|tx_addr [3] $ +// (!\inst13|inst|addr_rw [3])))) + + .dataa(\inst13|inst14|tx_addr [4]), + .datab(\inst13|inst14|tx_addr [3]), + .datac(\inst13|inst|addr_rw [3]), + .datad(\inst13|inst|addr_rw [4]), + .cin(gnd), + .combout(\inst13|inst|process_1~1_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|process_1~1 .lut_mask = 16'h8241; +defparam \inst13|inst|process_1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y42_N22 -fiftyfivenm_lcell_comb \inst13|inst1[1]~24 ( +// Location: LCCOMB_X59_Y37_N22 +fiftyfivenm_lcell_comb \inst13|inst1[6]~53 ( // Equation(s): -// \inst13|inst1[1]~24_combout = (\inst13|inst1[1]~23_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[6]~53_combout = (\inst13|inst1[6]~52_combout ) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst13|inst1[0]~18_combout ), + .dataa(\inst13|inst1[6]~52_combout ), .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[1]~23_combout ), + .datac(\inst13|inst1[0]~24_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst1[1]~24_combout ), + .combout(\inst13|inst1[6]~53_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[1]~24 .lut_mask = 16'hFF55; -defparam \inst13|inst1[1]~24 .sum_lutc_input = "datac"; +defparam \inst13|inst1[6]~53 .lut_mask = 16'hAFAF; +defparam \inst13|inst1[6]~53 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N6 -fiftyfivenm_lcell_comb \inst13|inst14|addr_in[1]~feeder ( +// Location: LCCOMB_X58_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst14|addr_in[6]~feeder ( // Equation(s): -// \inst13|inst14|addr_in[1]~feeder_combout = \inst13|inst1[1]~24_combout +// \inst13|inst14|addr_in[6]~feeder_combout = \inst13|inst1[6]~53_combout .dataa(gnd), .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[1]~24_combout ), + .datac(\inst13|inst1[6]~53_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst14|addr_in[1]~feeder_combout ), + .combout(\inst13|inst14|addr_in[6]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[1]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst14|addr_in[1]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|addr_in[6]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst14|addr_in[6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N7 -dffeas \inst13|inst14|addr_in[1] ( +// Location: FF_X58_Y36_N29 +dffeas \inst13|inst14|addr_in[6] ( .clk(\inst13|inst12~clkctrl_outclk ), - .d(\inst13|inst14|addr_in[1]~feeder_combout ), + .d(\inst13|inst14|addr_in[6]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -24031,34 +24331,34 @@ dffeas \inst13|inst14|addr_in[1] ( .ena(\inst13|inst14|data_out[7]~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|addr_in [1]), + .q(\inst13|inst14|addr_in [6]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|addr_in[1] .is_wysiwyg = "true"; -defparam \inst13|inst14|addr_in[1] .power_up = "low"; +defparam \inst13|inst14|addr_in[6] .is_wysiwyg = "true"; +defparam \inst13|inst14|addr_in[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N10 -fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[1]~feeder ( +// Location: LCCOMB_X55_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[6]~feeder ( // Equation(s): -// \inst13|inst14|tx_addr[1]~feeder_combout = \inst13|inst14|addr_in [1] +// \inst13|inst14|tx_addr[6]~feeder_combout = \inst13|inst14|addr_in [6] .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst13|inst14|addr_in [1]), + .datad(\inst13|inst14|addr_in [6]), .cin(gnd), - .combout(\inst13|inst14|tx_addr[1]~feeder_combout ), + .combout(\inst13|inst14|tx_addr[6]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|tx_addr[1]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst14|tx_addr[1]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst14|tx_addr[6]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|tx_addr[6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N11 -dffeas \inst13|inst14|tx_addr[1] ( +// Location: FF_X55_Y36_N27 +dffeas \inst13|inst14|tx_addr[6] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|tx_addr[1]~feeder_combout ), + .d(\inst13|inst14|tx_addr[6]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -24067,85 +24367,48 @@ dffeas \inst13|inst14|tx_addr[1] ( .ena(\inst13|inst14|tx_addr[7]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|tx_addr [1]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst14|tx_addr[1] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_addr[1] .power_up = "low"; -// synopsys translate_on - -// Location: FF_X50_Y35_N5 -dffeas \inst13|inst|addr_rw[1] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_addr [1]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|addr_rw [1]), + .q(\inst13|inst14|tx_addr [6]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|addr_rw[1] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y35_N4 -fiftyfivenm_lcell_comb \inst13|inst|process_1~0 ( -// Equation(s): -// \inst13|inst|process_1~0_combout = (\inst13|inst|addr_rw [2] & (\inst13|inst14|tx_addr [2] & (\inst13|inst|addr_rw [1] $ (!\inst13|inst14|tx_addr [1])))) # (!\inst13|inst|addr_rw [2] & (!\inst13|inst14|tx_addr [2] & (\inst13|inst|addr_rw [1] $ -// (!\inst13|inst14|tx_addr [1])))) - - .dataa(\inst13|inst|addr_rw [2]), - .datab(\inst13|inst14|tx_addr [2]), - .datac(\inst13|inst|addr_rw [1]), - .datad(\inst13|inst14|tx_addr [1]), - .cin(gnd), - .combout(\inst13|inst|process_1~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|process_1~0 .lut_mask = 16'h9009; -defparam \inst13|inst|process_1~0 .sum_lutc_input = "datac"; +defparam \inst13|inst14|tx_addr[6] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_addr[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N30 -fiftyfivenm_lcell_comb \inst13|inst1[5]~44 ( +// Location: LCCOMB_X59_Y40_N8 +fiftyfivenm_lcell_comb \inst13|inst1[5]~48 ( // Equation(s): -// \inst13|inst1[5]~44_combout = (\inst13|inst1[5]~43_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[5]~48_combout = (\inst13|inst1[5]~47_combout ) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst13|inst1[5]~43_combout ), - .datab(gnd), + .dataa(gnd), + .datab(\inst13|inst1[5]~47_combout ), .datac(gnd), - .datad(\inst13|inst1[0]~18_combout ), + .datad(\inst13|inst1[0]~24_combout ), .cin(gnd), - .combout(\inst13|inst1[5]~44_combout ), + .combout(\inst13|inst1[5]~48_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[5]~44 .lut_mask = 16'hAAFF; -defparam \inst13|inst1[5]~44 .sum_lutc_input = "datac"; +defparam \inst13|inst1[5]~48 .lut_mask = 16'hCCFF; +defparam \inst13|inst1[5]~48 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N26 +// Location: LCCOMB_X58_Y36_N22 fiftyfivenm_lcell_comb \inst13|inst14|addr_in[5]~feeder ( // Equation(s): -// \inst13|inst14|addr_in[5]~feeder_combout = \inst13|inst1[5]~44_combout +// \inst13|inst14|addr_in[5]~feeder_combout = \inst13|inst1[5]~48_combout .dataa(gnd), .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[5]~44_combout ), + .datac(\inst13|inst1[5]~48_combout ), + .datad(gnd), .cin(gnd), .combout(\inst13|inst14|addr_in[5]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[5]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|addr_in[5]~feeder .lut_mask = 16'hF0F0; defparam \inst13|inst14|addr_in[5]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N27 +// Location: FF_X58_Y36_N23 dffeas \inst13|inst14|addr_in[5] ( .clk(\inst13|inst12~clkctrl_outclk ), .d(\inst13|inst14|addr_in[5]~feeder_combout ), @@ -24164,7 +24427,7 @@ defparam \inst13|inst14|addr_in[5] .is_wysiwyg = "true"; defparam \inst13|inst14|addr_in[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N30 +// Location: LCCOMB_X55_Y36_N22 fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[5]~feeder ( // Equation(s): // \inst13|inst14|tx_addr[5]~feeder_combout = \inst13|inst14|addr_in [5] @@ -24181,7 +24444,7 @@ defparam \inst13|inst14|tx_addr[5]~feeder .lut_mask = 16'hF0F0; defparam \inst13|inst14|tx_addr[5]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N31 +// Location: FF_X55_Y36_N23 dffeas \inst13|inst14|tx_addr[5] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|tx_addr[5]~feeder_combout ), @@ -24200,203 +24463,256 @@ defparam \inst13|inst14|tx_addr[5] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_addr[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N24 -fiftyfivenm_lcell_comb \inst13|inst1[6]~49 ( +// Location: FF_X55_Y36_N13 +dffeas \inst13|inst|addr_rw[5] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_addr [5]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|addr_rw [5]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|addr_rw[5] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y36_N25 +dffeas \inst13|inst|addr_rw[6] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_addr [6]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|addr_rw [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|addr_rw[6] .is_wysiwyg = "true"; +defparam \inst13|inst|addr_rw[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X55_Y36_N12 +fiftyfivenm_lcell_comb \inst13|inst|process_1~2 ( // Equation(s): -// \inst13|inst1[6]~49_combout = (\inst13|inst1[6]~48_combout ) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst|process_1~2_combout = (\inst13|inst14|tx_addr [6] & (\inst13|inst|addr_rw [6] & (\inst13|inst14|tx_addr [5] $ (!\inst13|inst|addr_rw [5])))) # (!\inst13|inst14|tx_addr [6] & (!\inst13|inst|addr_rw [6] & (\inst13|inst14|tx_addr [5] $ +// (!\inst13|inst|addr_rw [5])))) - .dataa(\inst13|inst1[6]~48_combout ), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst13|inst14|tx_addr [6]), + .datab(\inst13|inst14|tx_addr [5]), + .datac(\inst13|inst|addr_rw [5]), + .datad(\inst13|inst|addr_rw [6]), .cin(gnd), - .combout(\inst13|inst1[6]~49_combout ), + .combout(\inst13|inst|process_1~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[6]~49 .lut_mask = 16'hAAFF; -defparam \inst13|inst1[6]~49 .sum_lutc_input = "datac"; +defparam \inst13|inst|process_1~2 .lut_mask = 16'h8241; +defparam \inst13|inst|process_1~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N8 -fiftyfivenm_lcell_comb \inst13|inst14|addr_in[6]~feeder ( +// Location: LCCOMB_X55_Y36_N0 +fiftyfivenm_lcell_comb \inst13|inst|process_1~4 ( // Equation(s): -// \inst13|inst14|addr_in[6]~feeder_combout = \inst13|inst1[6]~49_combout +// \inst13|inst|process_1~4_combout = (\inst13|inst|process_1~0_combout & (\inst13|inst|process_1~3_combout & (\inst13|inst|process_1~1_combout & \inst13|inst|process_1~2_combout ))) - .dataa(\inst13|inst1[6]~49_combout ), - .datab(gnd), - .datac(gnd), - .datad(gnd), + .dataa(\inst13|inst|process_1~0_combout ), + .datab(\inst13|inst|process_1~3_combout ), + .datac(\inst13|inst|process_1~1_combout ), + .datad(\inst13|inst|process_1~2_combout ), .cin(gnd), - .combout(\inst13|inst14|addr_in[6]~feeder_combout ), + .combout(\inst13|inst|process_1~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[6]~feeder .lut_mask = 16'hAAAA; -defparam \inst13|inst14|addr_in[6]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst|process_1~4 .lut_mask = 16'h8000; +defparam \inst13|inst|process_1~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N9 -dffeas \inst13|inst14|addr_in[6] ( - .clk(\inst13|inst12~clkctrl_outclk ), - .d(\inst13|inst14|addr_in[6]~feeder_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(\inst13|inst14|data_out[7]~0_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|addr_in [6]), - .prn(vcc)); +// Location: LCCOMB_X56_Y36_N30 +fiftyfivenm_lcell_comb \inst13|inst|Selector23~1 ( +// Equation(s): +// \inst13|inst|Selector23~1_combout = (\inst13|inst|state.slv_ack1~q & (\inst13|inst|addr_rw [0] & !\inst13|inst|ack_error~q )) + + .dataa(\inst13|inst|state.slv_ack1~q ), + .datab(\inst13|inst|addr_rw [0]), + .datac(gnd), + .datad(\inst13|inst|ack_error~q ), + .cin(gnd), + .combout(\inst13|inst|Selector23~1_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|addr_in[6] .is_wysiwyg = "true"; -defparam \inst13|inst14|addr_in[6] .power_up = "low"; +defparam \inst13|inst|Selector23~1 .lut_mask = 16'h0088; +defparam \inst13|inst|Selector23~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y35_N12 -fiftyfivenm_lcell_comb \inst13|inst14|tx_addr[6]~feeder ( +// Location: LCCOMB_X56_Y35_N18 +fiftyfivenm_lcell_comb \inst13|inst|Selector23~2 ( // Equation(s): -// \inst13|inst14|tx_addr[6]~feeder_combout = \inst13|inst14|addr_in [6] +// \inst13|inst|Selector23~2_combout = (\inst13|inst|Selector23~1_combout ) # ((\inst13|inst|state.rd~q & !\inst13|inst|Equal1~0_combout )) .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst14|addr_in [6]), - .datad(gnd), + .datab(\inst13|inst|state.rd~q ), + .datac(\inst13|inst|Selector23~1_combout ), + .datad(\inst13|inst|Equal1~0_combout ), .cin(gnd), - .combout(\inst13|inst14|tx_addr[6]~feeder_combout ), + .combout(\inst13|inst|Selector23~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|tx_addr[6]~feeder .lut_mask = 16'hF0F0; -defparam \inst13|inst14|tx_addr[6]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector23~2 .lut_mask = 16'hF0FC; +defparam \inst13|inst|Selector23~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y35_N13 -dffeas \inst13|inst14|tx_addr[6] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|tx_addr[6]~feeder_combout ), +// Location: LCCOMB_X56_Y35_N2 +fiftyfivenm_lcell_comb \inst13|inst|Selector23~3 ( +// Equation(s): +// \inst13|inst|Selector23~3_combout = (\inst13|inst|Selector23~2_combout ) # ((\inst13|inst|state.mstr_ack~q & (\inst13|inst|process_1~4_combout & \inst13|inst14|rnw~q ))) + + .dataa(\inst13|inst|state.mstr_ack~q ), + .datab(\inst13|inst|process_1~4_combout ), + .datac(\inst13|inst14|rnw~q ), + .datad(\inst13|inst|Selector23~2_combout ), + .cin(gnd), + .combout(\inst13|inst|Selector23~3_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector23~3 .lut_mask = 16'hFF80; +defparam \inst13|inst|Selector23~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X56_Y35_N3 +dffeas \inst13|inst|state.rd ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|Selector23~3_combout ), .asdata(vcc), - .clrn(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|tx_addr[7]~1_combout ), + .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|tx_addr [6]), + .q(\inst13|inst|state.rd~q ), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|tx_addr[6] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_addr[6] .power_up = "low"; +defparam \inst13|inst|state.rd .is_wysiwyg = "true"; +defparam \inst13|inst|state.rd .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y35_N27 -dffeas \inst13|inst|addr_rw[6] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_addr [6]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|addr_rw [6]), - .prn(vcc)); +// Location: LCCOMB_X56_Y35_N24 +fiftyfivenm_lcell_comb \inst13|inst|WideOr12~0 ( +// Equation(s): +// \inst13|inst|WideOr12~0_combout = (\inst13|inst|state.rd~q ) # ((\inst13|inst|state.wr~q ) # (\inst13|inst|state.command~q )) + + .dataa(gnd), + .datab(\inst13|inst|state.rd~q ), + .datac(\inst13|inst|state.wr~q ), + .datad(\inst13|inst|state.command~q ), + .cin(gnd), + .combout(\inst13|inst|WideOr12~0_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst|addr_rw[6] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[6] .power_up = "low"; +defparam \inst13|inst|WideOr12~0 .lut_mask = 16'hFFFC; +defparam \inst13|inst|WideOr12~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y35_N25 -dffeas \inst13|inst|addr_rw[5] ( +// Location: FF_X55_Y35_N7 +dffeas \inst13|inst|bit_cnt[0] ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_addr [5]), - .clrn(vcc), + .d(\inst13|inst|bit_cnt[0]~0_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), + .sload(gnd), + .ena(\inst13|inst|WideOr12~0_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst|addr_rw [5]), + .q(\inst13|inst|bit_cnt [0]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|addr_rw[5] .is_wysiwyg = "true"; -defparam \inst13|inst|addr_rw[5] .power_up = "low"; +defparam \inst13|inst|bit_cnt[0] .is_wysiwyg = "true"; +defparam \inst13|inst|bit_cnt[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N24 -fiftyfivenm_lcell_comb \inst13|inst|process_1~2 ( +// Location: LCCOMB_X56_Y35_N4 +fiftyfivenm_lcell_comb \inst13|inst|state~16 ( // Equation(s): -// \inst13|inst|process_1~2_combout = (\inst13|inst14|tx_addr [5] & (\inst13|inst|addr_rw [5] & (\inst13|inst|addr_rw [6] $ (!\inst13|inst14|tx_addr [6])))) # (!\inst13|inst14|tx_addr [5] & (!\inst13|inst|addr_rw [5] & (\inst13|inst|addr_rw [6] $ -// (!\inst13|inst14|tx_addr [6])))) +// \inst13|inst|state~16_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|state.wr~q & (\inst13|inst|bit_cnt [2] & \inst13|inst|bit_cnt [1]))) - .dataa(\inst13|inst14|tx_addr [5]), - .datab(\inst13|inst|addr_rw [6]), - .datac(\inst13|inst|addr_rw [5]), - .datad(\inst13|inst14|tx_addr [6]), + .dataa(\inst13|inst|bit_cnt [0]), + .datab(\inst13|inst|state.wr~q ), + .datac(\inst13|inst|bit_cnt [2]), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst13|inst|process_1~2_combout ), + .combout(\inst13|inst|state~16_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|process_1~2 .lut_mask = 16'h8421; -defparam \inst13|inst|process_1~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|state~16 .lut_mask = 16'h8000; +defparam \inst13|inst|state~16 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N18 -fiftyfivenm_lcell_comb \inst13|inst|process_1~4 ( -// Equation(s): -// \inst13|inst|process_1~4_combout = (\inst13|inst|process_1~1_combout & (\inst13|inst|process_1~3_combout & (\inst13|inst|process_1~0_combout & \inst13|inst|process_1~2_combout ))) - - .dataa(\inst13|inst|process_1~1_combout ), - .datab(\inst13|inst|process_1~3_combout ), - .datac(\inst13|inst|process_1~0_combout ), - .datad(\inst13|inst|process_1~2_combout ), - .cin(gnd), - .combout(\inst13|inst|process_1~4_combout ), - .cout()); +// Location: FF_X56_Y35_N5 +dffeas \inst13|inst|state.slv_ack2 ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|state~16_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|state.slv_ack2~q ), + .prn(vcc)); // synopsys translate_off -defparam \inst13|inst|process_1~4 .lut_mask = 16'h8000; -defparam \inst13|inst|process_1~4 .sum_lutc_input = "datac"; +defparam \inst13|inst|state.slv_ack2 .is_wysiwyg = "true"; +defparam \inst13|inst|state.slv_ack2 .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N6 +// Location: LCCOMB_X57_Y36_N4 fiftyfivenm_lcell_comb \inst13|inst|Selector20~0 ( // Equation(s): -// \inst13|inst|Selector20~0_combout = (\inst13|inst14|rnw~q & (\inst13|inst|state.slv_ack2~q & ((!\inst13|inst|ack_error~q )))) # (!\inst13|inst14|rnw~q & (((\inst13|inst|state.mstr_ack~q )))) +// \inst13|inst|Selector20~0_combout = (\inst13|inst14|rnw~q & (\inst13|inst|state.slv_ack2~q & (!\inst13|inst|ack_error~q ))) # (!\inst13|inst14|rnw~q & (((\inst13|inst|state.mstr_ack~q )))) - .dataa(\inst13|inst14|rnw~q ), - .datab(\inst13|inst|state.slv_ack2~q ), - .datac(\inst13|inst|state.mstr_ack~q ), - .datad(\inst13|inst|ack_error~q ), + .dataa(\inst13|inst|state.slv_ack2~q ), + .datab(\inst13|inst|ack_error~q ), + .datac(\inst13|inst14|rnw~q ), + .datad(\inst13|inst|state.mstr_ack~q ), .cin(gnd), .combout(\inst13|inst|Selector20~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector20~0 .lut_mask = 16'h50D8; +defparam \inst13|inst|Selector20~0 .lut_mask = 16'h2F20; defparam \inst13|inst|Selector20~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N4 +// Location: LCCOMB_X57_Y36_N6 fiftyfivenm_lcell_comb \inst13|inst|Selector20~1 ( // Equation(s): -// \inst13|inst|Selector20~1_combout = (\inst13|inst|process_1~4_combout & \inst13|inst|Selector20~0_combout ) +// \inst13|inst|Selector20~1_combout = (\inst13|inst|Selector20~0_combout & \inst13|inst|process_1~4_combout ) - .dataa(\inst13|inst|process_1~4_combout ), - .datab(gnd), - .datac(\inst13|inst|Selector20~0_combout ), + .dataa(gnd), + .datab(\inst13|inst|Selector20~0_combout ), + .datac(\inst13|inst|process_1~4_combout ), .datad(gnd), .cin(gnd), .combout(\inst13|inst|Selector20~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector20~1 .lut_mask = 16'hA0A0; +defparam \inst13|inst|Selector20~1 .lut_mask = 16'hC0C0; defparam \inst13|inst|Selector20~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y35_N5 +// Location: FF_X57_Y36_N7 dffeas \inst13|inst|state.restart ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(\inst13|inst|Selector20~1_combout ), @@ -24415,109 +24731,7 @@ defparam \inst13|inst|state.restart .is_wysiwyg = "true"; defparam \inst13|inst|state.restart .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N18 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~4 ( -// Equation(s): -// \inst13|inst|Selector25~4_combout = (\inst13|inst|state.rd~q & ((\inst13|inst|addr_rw [0] $ (\inst13|inst14|rnw~q )) # (!\inst13|inst|process_1~4_combout ))) - - .dataa(\inst13|inst|addr_rw [0]), - .datab(\inst13|inst14|rnw~q ), - .datac(\inst13|inst|state.rd~q ), - .datad(\inst13|inst|process_1~4_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector25~4_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector25~4 .lut_mask = 16'h60F0; -defparam \inst13|inst|Selector25~4 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N12 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~5 ( -// Equation(s): -// \inst13|inst|Selector25~5_combout = (\inst13|inst|Equal1~0_combout & ((\inst13|inst|state.wr~q ) # ((\inst13|inst|state.command~q ) # (\inst13|inst|Selector25~4_combout )))) - - .dataa(\inst13|inst|state.wr~q ), - .datab(\inst13|inst|state.command~q ), - .datac(\inst13|inst|Equal1~0_combout ), - .datad(\inst13|inst|Selector25~4_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector25~5_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector25~5 .lut_mask = 16'hF0E0; -defparam \inst13|inst|Selector25~5 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N16 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~1 ( -// Equation(s): -// \inst13|inst|Selector25~1_combout = (\inst13|inst|state.mstr_ack~q ) # (((\inst13|inst|ack_error~q & \inst13|inst|state.slv_ack1~q )) # (!\inst13|inst|state.ready~q )) - - .dataa(\inst13|inst|state.mstr_ack~q ), - .datab(\inst13|inst|state.ready~q ), - .datac(\inst13|inst|ack_error~q ), - .datad(\inst13|inst|state.slv_ack1~q ), - .cin(gnd), - .combout(\inst13|inst|Selector25~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector25~1 .lut_mask = 16'hFBBB; -defparam \inst13|inst|Selector25~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N2 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~2 ( -// Equation(s): -// \inst13|inst|Selector25~2_combout = (\inst13|inst|state.stop~q ) # ((\inst13|inst|Selector25~1_combout ) # ((!\inst13|inst|Equal1~0_combout & \inst13|inst|state.rd~q ))) - - .dataa(\inst13|inst|state.stop~q ), - .datab(\inst13|inst|Equal1~0_combout ), - .datac(\inst13|inst|state.rd~q ), - .datad(\inst13|inst|Selector25~1_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector25~2_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector25~2 .lut_mask = 16'hFFBA; -defparam \inst13|inst|Selector25~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N14 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~0 ( -// Equation(s): -// \inst13|inst|Selector25~0_combout = (\inst13|inst|state.slv_ack2~q & (\inst13|inst14|rnw~q & (!\inst13|inst|ack_error~q & \inst13|inst|process_1~4_combout ))) - - .dataa(\inst13|inst|state.slv_ack2~q ), - .datab(\inst13|inst14|rnw~q ), - .datac(\inst13|inst|ack_error~q ), - .datad(\inst13|inst|process_1~4_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector25~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector25~0 .lut_mask = 16'h0800; -defparam \inst13|inst|Selector25~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X47_Y35_N4 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~3 ( -// Equation(s): -// \inst13|inst|Selector25~3_combout = (\inst13|inst|Selector25~0_combout ) # ((!\inst13|inst|sda_int~q & ((\inst13|inst|Selector25~2_combout ) # (!\inst13|inst|Selector0~1_combout )))) - - .dataa(\inst13|inst|sda_int~q ), - .datab(\inst13|inst|Selector25~2_combout ), - .datac(\inst13|inst|Selector25~0_combout ), - .datad(\inst13|inst|Selector0~1_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector25~3_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector25~3 .lut_mask = 16'hF4F5; -defparam \inst13|inst|Selector25~3 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y39_N8 +// Location: LCCOMB_X58_Y38_N28 fiftyfivenm_lcell_comb \inst13|inst13 ( // Equation(s): // \inst13|inst13~combout = LCELL((\inst3|I2C_DATA_EN~combout & \inst|IO_WRITE_int~q )) @@ -24534,7 +24748,7 @@ defparam \inst13|inst13 .lut_mask = 16'hCC00; defparam \inst13|inst13 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G7 +// Location: CLKCTRL_G11 fiftyfivenm_clkctrl \inst13|inst13~clkctrl ( .ena(vcc), .inclk({vcc,vcc,vcc,\inst13|inst13~combout }), @@ -24547,51 +24761,49 @@ defparam \inst13|inst13~clkctrl .clock_type = "global clock"; defparam \inst13|inst13~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: FF_X52_Y41_N3 -dffeas \inst13|inst14|data_in[7] ( - .clk(\inst13|inst13~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[7]~54_combout ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst14|data_in [7]), - .prn(vcc)); +// Location: LCCOMB_X62_Y37_N10 +fiftyfivenm_lcell_comb \inst13|inst1[15]~95 ( +// Equation(s): +// \inst13|inst1[15]~95_combout = ((\inst13|inst1[15]~94_combout & \inst13|inst1[15]~91_combout )) # (!\inst13|inst1[0]~24_combout ) + + .dataa(gnd), + .datab(\inst13|inst1[15]~94_combout ), + .datac(\inst13|inst1[15]~91_combout ), + .datad(\inst13|inst1[0]~24_combout ), + .cin(gnd), + .combout(\inst13|inst1[15]~95_combout ), + .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[7] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_in[7] .power_up = "low"; +defparam \inst13|inst1[15]~95 .lut_mask = 16'hC0FF; +defparam \inst13|inst1[15]~95 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y41_N4 -fiftyfivenm_lcell_comb \inst13|inst1[15]~90 ( +// Location: LCCOMB_X63_Y37_N22 +fiftyfivenm_lcell_comb \inst13|inst14|data_in[15]~feeder ( // Equation(s): -// \inst13|inst1[15]~90_combout = ((\inst13|inst1[15]~86_combout & \inst13|inst1[15]~89_combout )) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst14|data_in[15]~feeder_combout = \inst13|inst1[15]~95_combout - .dataa(\inst13|inst1[15]~86_combout ), - .datab(\inst13|inst1[0]~18_combout ), + .dataa(gnd), + .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[15]~89_combout ), + .datad(\inst13|inst1[15]~95_combout ), .cin(gnd), - .combout(\inst13|inst1[15]~90_combout ), + .combout(\inst13|inst14|data_in[15]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[15]~90 .lut_mask = 16'hBB33; -defparam \inst13|inst1[15]~90 .sum_lutc_input = "datac"; +defparam \inst13|inst14|data_in[15]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|data_in[15]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y41_N3 +// Location: FF_X63_Y37_N23 dffeas \inst13|inst14|data_in[15] ( .clk(\inst13|inst13~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[15]~90_combout ), + .d(\inst13|inst14|data_in[15]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -24602,42 +24814,61 @@ defparam \inst13|inst14|data_in[15] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[15] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N18 +// Location: FF_X60_Y37_N25 +dffeas \inst13|inst14|data_in[7] ( + .clk(\inst13|inst13~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst1[7]~57_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|data_in [7]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|data_in[7] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_in[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X63_Y36_N22 fiftyfivenm_lcell_comb \inst13|inst14|Selector23~0 ( // Equation(s): -// \inst13|inst14|Selector23~0_combout = (\inst13|inst14|state.idle~q & (\inst13|inst14|data_in [7])) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & ((\inst13|inst14|data_in [15]))) # (!\inst13|inst14|Equal0~0_combout & -// (\inst13|inst14|data_in [7])))) +// \inst13|inst14|Selector23~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [7])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [15])) # (!\inst13|inst14|Equal0~0_combout & +// ((\inst13|inst14|data_in [7]))))) - .dataa(\inst13|inst14|data_in [7]), + .dataa(\inst13|inst14|data_in [15]), .datab(\inst13|inst14|state.idle~q ), - .datac(\inst13|inst14|data_in [15]), + .datac(\inst13|inst14|data_in [7]), .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), .combout(\inst13|inst14|Selector23~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector23~0 .lut_mask = 16'hB8AA; +defparam \inst13|inst14|Selector23~0 .lut_mask = 16'hE2F0; defparam \inst13|inst14|Selector23~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y37_N14 +// Location: LCCOMB_X62_Y36_N12 fiftyfivenm_lcell_comb \inst13|inst14|tx_byte[7]~0 ( // Equation(s): -// \inst13|inst14|tx_byte[7]~0_combout = ((\inst13|inst14|state.idle~q ) # (\inst13|inst14|cmd_in [5] $ (!\inst13|inst14|cmd_in [4]))) # (!\inst13|inst14|go~q ) +// \inst13|inst14|tx_byte[7]~0_combout = (\inst13|inst14|state.idle~q ) # ((\inst13|inst14|cmd_in [5] $ (!\inst13|inst14|cmd_in [4])) # (!\inst13|inst14|go~q )) - .dataa(\inst13|inst14|go~q ), - .datab(\inst13|inst14|cmd_in [5]), - .datac(\inst13|inst14|cmd_in [4]), - .datad(\inst13|inst14|state.idle~q ), + .dataa(\inst13|inst14|state.idle~q ), + .datab(\inst13|inst14|go~q ), + .datac(\inst13|inst14|cmd_in [5]), + .datad(\inst13|inst14|cmd_in [4]), .cin(gnd), .combout(\inst13|inst14|tx_byte[7]~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|tx_byte[7]~0 .lut_mask = 16'hFFD7; +defparam \inst13|inst14|tx_byte[7]~0 .lut_mask = 16'hFBBF; defparam \inst13|inst14|tx_byte[7]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N14 +// Location: LCCOMB_X62_Y36_N10 fiftyfivenm_lcell_comb \inst13|inst14|tx_byte[7]~1 ( // Equation(s): // \inst13|inst14|tx_byte[7]~1_combout = (\inst13|inst14|data_out[7]~0_combout & (((\inst13|inst14|state.Tx2~q & \inst13|inst14|state_machine~1_combout )) # (!\inst13|inst14|tx_byte[7]~0_combout ))) @@ -24654,7 +24885,7 @@ defparam \inst13|inst14|tx_byte[7]~1 .lut_mask = 16'h80CC; defparam \inst13|inst14|tx_byte[7]~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N19 +// Location: FF_X63_Y36_N23 dffeas \inst13|inst14|tx_byte[7] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector23~0_combout ), @@ -24673,24 +24904,113 @@ defparam \inst13|inst14|tx_byte[7] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_byte[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N12 +// Location: LCCOMB_X54_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst|data_tx[7]~feeder ( +// Equation(s): +// \inst13|inst|data_tx[7]~feeder_combout = \inst13|inst14|tx_byte [7] + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst14|tx_byte [7]), + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst|data_tx[7]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|data_tx[7]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst|data_tx[7]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X54_Y36_N27 +dffeas \inst13|inst|data_tx[7] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_tx[7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [7]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_tx[7] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y37_N4 +fiftyfivenm_lcell_comb \inst13|inst1[14]~90 ( +// Equation(s): +// \inst13|inst1[14]~90_combout = ((\inst13|inst1[14]~86_combout & \inst13|inst1[14]~89_combout )) # (!\inst13|inst1[0]~24_combout ) + + .dataa(\inst13|inst1[0]~24_combout ), + .datab(gnd), + .datac(\inst13|inst1[14]~86_combout ), + .datad(\inst13|inst1[14]~89_combout ), + .cin(gnd), + .combout(\inst13|inst1[14]~90_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst1[14]~90 .lut_mask = 16'hF555; +defparam \inst13|inst1[14]~90 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y37_N14 +fiftyfivenm_lcell_comb \inst13|inst14|data_in[14]~feeder ( +// Equation(s): +// \inst13|inst14|data_in[14]~feeder_combout = \inst13|inst1[14]~90_combout + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst1[14]~90_combout ), + .cin(gnd), + .combout(\inst13|inst14|data_in[14]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst14|data_in[14]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|data_in[14]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X60_Y37_N15 +dffeas \inst13|inst14|data_in[14] ( + .clk(\inst13|inst13~clkctrl_outclk ), + .d(\inst13|inst14|data_in[14]~feeder_combout ), + .asdata(vcc), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst14|data_in [14]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst14|data_in[14] .is_wysiwyg = "true"; +defparam \inst13|inst14|data_in[14] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y37_N0 fiftyfivenm_lcell_comb \inst13|inst14|data_in[6]~feeder ( // Equation(s): -// \inst13|inst14|data_in[6]~feeder_combout = \inst13|inst1[6]~49_combout +// \inst13|inst14|data_in[6]~feeder_combout = \inst13|inst1[6]~53_combout - .dataa(\inst13|inst1[6]~49_combout ), + .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[6]~53_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[6]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[6]~feeder .lut_mask = 16'hAAAA; +defparam \inst13|inst14|data_in[6]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y41_N13 +// Location: FF_X60_Y37_N1 dffeas \inst13|inst14|data_in[6] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[6]~feeder_combout ), @@ -24709,97 +25029,97 @@ defparam \inst13|inst14|data_in[6] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N28 -fiftyfivenm_lcell_comb \inst13|inst1[14]~85 ( +// Location: LCCOMB_X61_Y37_N22 +fiftyfivenm_lcell_comb \inst13|inst14|Selector24~0 ( // Equation(s): -// \inst13|inst1[14]~85_combout = ((\inst13|inst1[14]~84_combout & \inst13|inst1[14]~81_combout )) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst14|Selector24~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [6])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [14])) # (!\inst13|inst14|Equal0~0_combout & +// ((\inst13|inst14|data_in [6]))))) - .dataa(\inst13|inst1[14]~84_combout ), - .datab(gnd), - .datac(\inst13|inst1[14]~81_combout ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst13|inst14|data_in [14]), + .datab(\inst13|inst14|state.idle~q ), + .datac(\inst13|inst14|data_in [6]), + .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), - .combout(\inst13|inst1[14]~85_combout ), + .combout(\inst13|inst14|Selector24~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[14]~85 .lut_mask = 16'hA0FF; -defparam \inst13|inst1[14]~85 .sum_lutc_input = "datac"; +defparam \inst13|inst14|Selector24~0 .lut_mask = 16'hE2F0; +defparam \inst13|inst14|Selector24~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y41_N5 -dffeas \inst13|inst14|data_in[14] ( - .clk(\inst13|inst13~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[14]~85_combout ), - .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), +// Location: FF_X61_Y37_N23 +dffeas \inst13|inst14|tx_byte[6] ( + .clk(\inst5|clock_100kHz~clkctrl_outclk ), + .d(\inst13|inst14|Selector24~0_combout ), + .asdata(vcc), + .clrn(vcc), .aload(gnd), .sclr(gnd), - .sload(vcc), - .ena(vcc), + .sload(gnd), + .ena(\inst13|inst14|tx_byte[7]~1_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|data_in [14]), + .q(\inst13|inst14|tx_byte [6]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_in[14] .is_wysiwyg = "true"; -defparam \inst13|inst14|data_in[14] .power_up = "low"; +defparam \inst13|inst14|tx_byte[6] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_byte[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N0 -fiftyfivenm_lcell_comb \inst13|inst14|Selector24~0 ( +// Location: LCCOMB_X54_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst|data_tx[6]~feeder ( // Equation(s): -// \inst13|inst14|Selector24~0_combout = (\inst13|inst14|state.idle~q & (\inst13|inst14|data_in [6])) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & ((\inst13|inst14|data_in [14]))) # (!\inst13|inst14|Equal0~0_combout & -// (\inst13|inst14|data_in [6])))) +// \inst13|inst|data_tx[6]~feeder_combout = \inst13|inst14|tx_byte [6] - .dataa(\inst13|inst14|state.idle~q ), - .datab(\inst13|inst14|data_in [6]), - .datac(\inst13|inst14|data_in [14]), - .datad(\inst13|inst14|Equal0~0_combout ), + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst14|tx_byte [6]), + .datad(gnd), .cin(gnd), - .combout(\inst13|inst14|Selector24~0_combout ), + .combout(\inst13|inst|data_tx[6]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector24~0 .lut_mask = 16'hD8CC; -defparam \inst13|inst14|Selector24~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|data_tx[6]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst|data_tx[6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N1 -dffeas \inst13|inst14|tx_byte[6] ( - .clk(\inst5|clock_100kHz~clkctrl_outclk ), - .d(\inst13|inst14|Selector24~0_combout ), +// Location: FF_X54_Y36_N21 +dffeas \inst13|inst|data_tx[6] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(\inst13|inst|data_tx[6]~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), .sclr(gnd), .sload(gnd), - .ena(\inst13|inst14|tx_byte[7]~1_combout ), + .ena(\inst13|inst|addr_rw[7]~3_combout ), .devclrn(devclrn), .devpor(devpor), - .q(\inst13|inst14|tx_byte [6]), + .q(\inst13|inst|data_tx [6]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|tx_byte[6] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_byte[6] .power_up = "low"; +defparam \inst13|inst|data_tx[6] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[6] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y41_N14 +// Location: LCCOMB_X63_Y37_N30 fiftyfivenm_lcell_comb \inst13|inst14|data_in[13]~feeder ( // Equation(s): -// \inst13|inst14|data_in[13]~feeder_combout = \inst13|inst1[13]~96_combout +// \inst13|inst14|data_in[13]~feeder_combout = \inst13|inst1[13]~85_combout - .dataa(gnd), - .datab(\inst13|inst1[13]~96_combout ), + .dataa(\inst13|inst1[13]~85_combout ), + .datab(gnd), .datac(gnd), .datad(gnd), .cin(gnd), .combout(\inst13|inst14|data_in[13]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[13]~feeder .lut_mask = 16'hCCCC; +defparam \inst13|inst14|data_in[13]~feeder .lut_mask = 16'hAAAA; defparam \inst13|inst14|data_in[13]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y41_N15 +// Location: FF_X63_Y37_N31 dffeas \inst13|inst14|data_in[13] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[13]~feeder_combout ), @@ -24818,24 +25138,24 @@ defparam \inst13|inst14|data_in[13] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[13] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N26 +// Location: LCCOMB_X63_Y40_N8 fiftyfivenm_lcell_comb \inst13|inst14|data_in[5]~feeder ( // Equation(s): -// \inst13|inst14|data_in[5]~feeder_combout = \inst13|inst1[5]~44_combout +// \inst13|inst14|data_in[5]~feeder_combout = \inst13|inst1[5]~48_combout - .dataa(gnd), + .dataa(\inst13|inst1[5]~48_combout ), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[5]~44_combout ), + .datad(gnd), .cin(gnd), .combout(\inst13|inst14|data_in[5]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[5]~feeder .lut_mask = 16'hFF00; +defparam \inst13|inst14|data_in[5]~feeder .lut_mask = 16'hAAAA; defparam \inst13|inst14|data_in[5]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y41_N27 +// Location: FF_X63_Y40_N9 dffeas \inst13|inst14|data_in[5] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[5]~feeder_combout ), @@ -24854,25 +25174,25 @@ defparam \inst13|inst14|data_in[5] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N30 +// Location: LCCOMB_X63_Y36_N2 fiftyfivenm_lcell_comb \inst13|inst14|Selector25~0 ( // Equation(s): -// \inst13|inst14|Selector25~0_combout = (\inst13|inst14|Equal0~0_combout & ((\inst13|inst14|state.idle~q & ((\inst13|inst14|data_in [5]))) # (!\inst13|inst14|state.idle~q & (\inst13|inst14|data_in [13])))) # (!\inst13|inst14|Equal0~0_combout & -// (((\inst13|inst14|data_in [5])))) +// \inst13|inst14|Selector25~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [5])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [13])) # (!\inst13|inst14|Equal0~0_combout & +// ((\inst13|inst14|data_in [5]))))) - .dataa(\inst13|inst14|Equal0~0_combout ), + .dataa(\inst13|inst14|data_in [13]), .datab(\inst13|inst14|state.idle~q ), - .datac(\inst13|inst14|data_in [13]), - .datad(\inst13|inst14|data_in [5]), + .datac(\inst13|inst14|data_in [5]), + .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), .combout(\inst13|inst14|Selector25~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector25~0 .lut_mask = 16'hFD20; +defparam \inst13|inst14|Selector25~0 .lut_mask = 16'hE2F0; defparam \inst13|inst14|Selector25~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N31 +// Location: FF_X63_Y36_N3 dffeas \inst13|inst14|tx_byte[5] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector25~0_combout ), @@ -24891,15 +25211,34 @@ defparam \inst13|inst14|tx_byte[5] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_byte[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N26 +// Location: FF_X55_Y36_N3 +dffeas \inst13|inst|data_tx[5] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_byte [5]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [5]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_tx[5] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X63_Y37_N4 fiftyfivenm_lcell_comb \inst13|inst14|data_in[12]~feeder ( // Equation(s): -// \inst13|inst14|data_in[12]~feeder_combout = \inst13|inst1[12]~95_combout +// \inst13|inst14|data_in[12]~feeder_combout = \inst13|inst1[12]~80_combout .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[12]~95_combout ), + .datad(\inst13|inst1[12]~80_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[12]~feeder_combout ), .cout()); @@ -24908,7 +25247,7 @@ defparam \inst13|inst14|data_in[12]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[12]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N27 +// Location: FF_X63_Y37_N5 dffeas \inst13|inst14|data_in[12] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[12]~feeder_combout ), @@ -24927,24 +25266,24 @@ defparam \inst13|inst14|data_in[12] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[12] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N28 +// Location: LCCOMB_X63_Y36_N26 fiftyfivenm_lcell_comb \inst13|inst14|data_in[4]~feeder ( // Equation(s): -// \inst13|inst14|data_in[4]~feeder_combout = \inst13|inst1[4]~39_combout +// \inst13|inst14|data_in[4]~feeder_combout = \inst13|inst1[4]~43_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[4]~39_combout ), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst1[4]~43_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[4]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst14|data_in[4]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y41_N29 +// Location: FF_X63_Y36_N27 dffeas \inst13|inst14|data_in[4] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[4]~feeder_combout ), @@ -24963,25 +25302,25 @@ defparam \inst13|inst14|data_in[4] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N20 +// Location: LCCOMB_X63_Y36_N16 fiftyfivenm_lcell_comb \inst13|inst14|Selector26~0 ( // Equation(s): -// \inst13|inst14|Selector26~0_combout = (\inst13|inst14|Equal0~0_combout & ((\inst13|inst14|state.idle~q & ((\inst13|inst14|data_in [4]))) # (!\inst13|inst14|state.idle~q & (\inst13|inst14|data_in [12])))) # (!\inst13|inst14|Equal0~0_combout & -// (((\inst13|inst14|data_in [4])))) +// \inst13|inst14|Selector26~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [4])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [12])) # (!\inst13|inst14|Equal0~0_combout & +// ((\inst13|inst14|data_in [4]))))) - .dataa(\inst13|inst14|Equal0~0_combout ), - .datab(\inst13|inst14|data_in [12]), - .datac(\inst13|inst14|state.idle~q ), - .datad(\inst13|inst14|data_in [4]), + .dataa(\inst13|inst14|data_in [12]), + .datab(\inst13|inst14|state.idle~q ), + .datac(\inst13|inst14|data_in [4]), + .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), .combout(\inst13|inst14|Selector26~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector26~0 .lut_mask = 16'hFD08; +defparam \inst13|inst14|Selector26~0 .lut_mask = 16'hE2F0; defparam \inst13|inst14|Selector26~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N21 +// Location: FF_X63_Y36_N17 dffeas \inst13|inst14|tx_byte[4] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector26~0_combout ), @@ -25000,76 +25339,94 @@ defparam \inst13|inst14|tx_byte[4] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_byte[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N16 -fiftyfivenm_lcell_comb \inst13|inst|Mux4~2 ( +// Location: FF_X54_Y36_N5 +dffeas \inst13|inst|data_tx[4] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_byte [4]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [4]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_tx[4] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst|Mux2~2 ( // Equation(s): -// \inst13|inst|Mux4~2_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & ((\inst13|inst14|tx_byte [4])))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst14|tx_byte [5])) # (!\inst13|inst|bit_cnt [1]))) +// \inst13|inst|Mux2~2_combout = (\inst13|inst|bit_cnt [0] & (((\inst13|inst|data_tx [4] & \inst13|inst|bit_cnt [1])))) # (!\inst13|inst|bit_cnt [0] & ((\inst13|inst|data_tx [5]) # ((!\inst13|inst|bit_cnt [1])))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst14|tx_byte [5]), - .datad(\inst13|inst14|tx_byte [4]), + .dataa(\inst13|inst|data_tx [5]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|data_tx [4]), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst13|inst|Mux4~2_combout ), + .combout(\inst13|inst|Mux2~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux4~2 .lut_mask = 16'hD951; -defparam \inst13|inst|Mux4~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux2~2 .lut_mask = 16'hE233; +defparam \inst13|inst|Mux2~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N22 -fiftyfivenm_lcell_comb \inst13|inst|Mux4~3 ( +// Location: LCCOMB_X54_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst|Mux2~3 ( // Equation(s): -// \inst13|inst|Mux4~3_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux4~2_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux4~2_combout & (\inst13|inst14|tx_byte [7])) # (!\inst13|inst|Mux4~2_combout & ((\inst13|inst14|tx_byte -// [6]))))) +// \inst13|inst|Mux2~3_combout = (\inst13|inst|Mux2~2_combout & ((\inst13|inst|data_tx [7]) # ((\inst13|inst|bit_cnt [1])))) # (!\inst13|inst|Mux2~2_combout & (((\inst13|inst|data_tx [6] & !\inst13|inst|bit_cnt [1])))) - .dataa(\inst13|inst14|tx_byte [7]), - .datab(\inst13|inst14|tx_byte [6]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|Mux4~2_combout ), + .dataa(\inst13|inst|data_tx [7]), + .datab(\inst13|inst|data_tx [6]), + .datac(\inst13|inst|Mux2~2_combout ), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst13|inst|Mux4~3_combout ), + .combout(\inst13|inst|Mux2~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux4~3 .lut_mask = 16'hFA0C; -defparam \inst13|inst|Mux4~3 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux2~3 .lut_mask = 16'hF0AC; +defparam \inst13|inst|Mux2~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N26 -fiftyfivenm_lcell_comb \inst13|inst1[10]~68 ( +// Location: LCCOMB_X59_Y38_N14 +fiftyfivenm_lcell_comb \inst13|inst1[10]~70 ( // Equation(s): -// \inst13|inst1[10]~68_combout = ((\inst13|inst1[10]~66_combout & (\inst13|inst1[10]~65_combout & \inst13|inst1[10]~67_combout ))) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[10]~70_combout = ((\inst13|inst1[10]~67_combout & (\inst13|inst1[10]~68_combout & \inst13|inst1[10]~69_combout ))) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst13|inst1[10]~66_combout ), - .datab(\inst13|inst1[10]~65_combout ), - .datac(\inst13|inst1[10]~67_combout ), - .datad(\inst13|inst1[0]~18_combout ), + .dataa(\inst13|inst1[10]~67_combout ), + .datab(\inst13|inst1[10]~68_combout ), + .datac(\inst13|inst1[0]~24_combout ), + .datad(\inst13|inst1[10]~69_combout ), .cin(gnd), - .combout(\inst13|inst1[10]~68_combout ), + .combout(\inst13|inst1[10]~70_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[10]~68 .lut_mask = 16'h80FF; -defparam \inst13|inst1[10]~68 .sum_lutc_input = "datac"; +defparam \inst13|inst1[10]~70 .lut_mask = 16'h8F0F; +defparam \inst13|inst1[10]~70 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N10 +// Location: LCCOMB_X60_Y37_N30 fiftyfivenm_lcell_comb \inst13|inst14|data_in[10]~feeder ( // Equation(s): -// \inst13|inst14|data_in[10]~feeder_combout = \inst13|inst1[10]~68_combout +// \inst13|inst14|data_in[10]~feeder_combout = \inst13|inst1[10]~70_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[10]~68_combout ), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst1[10]~70_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[10]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[10]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst14|data_in[10]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[10]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N11 +// Location: FF_X60_Y37_N31 dffeas \inst13|inst14|data_in[10] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[10]~feeder_combout ), @@ -25088,24 +25445,24 @@ defparam \inst13|inst14|data_in[10] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[10] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N18 +// Location: LCCOMB_X61_Y37_N12 fiftyfivenm_lcell_comb \inst13|inst14|data_in[2]~feeder ( // Equation(s): -// \inst13|inst14|data_in[2]~feeder_combout = \inst13|inst1[2]~29_combout +// \inst13|inst14|data_in[2]~feeder_combout = \inst13|inst1[2]~34_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[2]~29_combout ), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst1[2]~34_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[2]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[2]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst14|data_in[2]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N19 +// Location: FF_X61_Y37_N13 dffeas \inst13|inst14|data_in[2] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[2]~feeder_combout ), @@ -25124,25 +25481,25 @@ defparam \inst13|inst14|data_in[2] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N4 +// Location: LCCOMB_X63_Y36_N28 fiftyfivenm_lcell_comb \inst13|inst14|Selector28~0 ( // Equation(s): -// \inst13|inst14|Selector28~0_combout = (\inst13|inst14|Equal0~0_combout & ((\inst13|inst14|state.idle~q & ((\inst13|inst14|data_in [2]))) # (!\inst13|inst14|state.idle~q & (\inst13|inst14|data_in [10])))) # (!\inst13|inst14|Equal0~0_combout & -// (((\inst13|inst14|data_in [2])))) +// \inst13|inst14|Selector28~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [2])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [10])) # (!\inst13|inst14|Equal0~0_combout & +// ((\inst13|inst14|data_in [2]))))) .dataa(\inst13|inst14|data_in [10]), - .datab(\inst13|inst14|Equal0~0_combout ), - .datac(\inst13|inst14|state.idle~q ), - .datad(\inst13|inst14|data_in [2]), + .datab(\inst13|inst14|state.idle~q ), + .datac(\inst13|inst14|data_in [2]), + .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), .combout(\inst13|inst14|Selector28~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector28~0 .lut_mask = 16'hFB08; +defparam \inst13|inst14|Selector28~0 .lut_mask = 16'hE2F0; defparam \inst13|inst14|Selector28~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N5 +// Location: FF_X63_Y36_N29 dffeas \inst13|inst14|tx_byte[2] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector28~0_combout ), @@ -25161,14 +25518,33 @@ defparam \inst13|inst14|tx_byte[2] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_byte[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N6 +// Location: FF_X55_Y36_N15 +dffeas \inst13|inst|data_tx[2] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_byte [2]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [2]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_tx[2] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X61_Y37_N20 fiftyfivenm_lcell_comb \inst13|inst14|data_in[3]~feeder ( // Equation(s): -// \inst13|inst14|data_in[3]~feeder_combout = \inst13|inst1[3]~34_combout +// \inst13|inst14|data_in[3]~feeder_combout = \inst13|inst1[3]~38_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[3]~34_combout ), + .datac(\inst13|inst1[3]~38_combout ), .datad(gnd), .cin(gnd), .combout(\inst13|inst14|data_in[3]~feeder_combout ), @@ -25178,7 +25554,7 @@ defparam \inst13|inst14|data_in[3]~feeder .lut_mask = 16'hF0F0; defparam \inst13|inst14|data_in[3]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N7 +// Location: FF_X61_Y37_N21 dffeas \inst13|inst14|data_in[3] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[3]~feeder_combout ), @@ -25197,41 +25573,41 @@ defparam \inst13|inst14|data_in[3] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N12 -fiftyfivenm_lcell_comb \inst13|inst1[11]~73 ( +// Location: LCCOMB_X59_Y39_N10 +fiftyfivenm_lcell_comb \inst13|inst1[11]~75 ( // Equation(s): -// \inst13|inst1[11]~73_combout = ((\inst13|inst1[11]~72_combout & \inst13|inst1[11]~69_combout )) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[11]~75_combout = ((\inst13|inst1[11]~71_combout & \inst13|inst1[11]~74_combout )) # (!\inst13|inst1[0]~24_combout ) .dataa(gnd), - .datab(\inst13|inst1[0]~18_combout ), - .datac(\inst13|inst1[11]~72_combout ), - .datad(\inst13|inst1[11]~69_combout ), + .datab(\inst13|inst1[0]~24_combout ), + .datac(\inst13|inst1[11]~71_combout ), + .datad(\inst13|inst1[11]~74_combout ), .cin(gnd), - .combout(\inst13|inst1[11]~73_combout ), + .combout(\inst13|inst1[11]~75_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[11]~73 .lut_mask = 16'hF333; -defparam \inst13|inst1[11]~73 .sum_lutc_input = "datac"; +defparam \inst13|inst1[11]~75 .lut_mask = 16'hF333; +defparam \inst13|inst1[11]~75 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N28 +// Location: LCCOMB_X62_Y39_N0 fiftyfivenm_lcell_comb \inst13|inst14|data_in[11]~feeder ( // Equation(s): -// \inst13|inst14|data_in[11]~feeder_combout = \inst13|inst1[11]~73_combout +// \inst13|inst14|data_in[11]~feeder_combout = \inst13|inst1[11]~75_combout .dataa(gnd), - .datab(\inst13|inst1[11]~73_combout ), + .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[11]~75_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[11]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[11]~feeder .lut_mask = 16'hCCCC; +defparam \inst13|inst14|data_in[11]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[11]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y39_N29 +// Location: FF_X62_Y39_N1 dffeas \inst13|inst14|data_in[11] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[11]~feeder_combout ), @@ -25250,7 +25626,7 @@ defparam \inst13|inst14|data_in[11] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[11] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N16 +// Location: LCCOMB_X61_Y37_N24 fiftyfivenm_lcell_comb \inst13|inst14|Selector27~0 ( // Equation(s): // \inst13|inst14|Selector27~0_combout = (\inst13|inst14|state.idle~q & (\inst13|inst14|data_in [3])) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & ((\inst13|inst14|data_in [11]))) # (!\inst13|inst14|Equal0~0_combout & @@ -25268,7 +25644,7 @@ defparam \inst13|inst14|Selector27~0 .lut_mask = 16'hB8AA; defparam \inst13|inst14|Selector27~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N17 +// Location: FF_X61_Y37_N25 dffeas \inst13|inst14|tx_byte[3] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector27~0_combout ), @@ -25287,32 +25663,34 @@ defparam \inst13|inst14|tx_byte[3] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_byte[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N24 -fiftyfivenm_lcell_comb \inst13|inst14|data_in[9]~feeder ( -// Equation(s): -// \inst13|inst14|data_in[9]~feeder_combout = \inst13|inst1[9]~64_combout - - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[9]~64_combout ), - .cin(gnd), - .combout(\inst13|inst14|data_in[9]~feeder_combout ), - .cout()); +// Location: FF_X54_Y36_N29 +dffeas \inst13|inst|data_tx[3] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_byte [3]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [3]), + .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|data_in[9]~feeder .lut_mask = 16'hFF00; -defparam \inst13|inst14|data_in[9]~feeder .sum_lutc_input = "datac"; +defparam \inst13|inst|data_tx[3] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[3] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y39_N25 +// Location: FF_X61_Y39_N13 dffeas \inst13|inst14|data_in[9] ( .clk(\inst13|inst13~clkctrl_outclk ), - .d(\inst13|inst14|data_in[9]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[9]~66_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -25323,24 +25701,24 @@ defparam \inst13|inst14|data_in[9] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N4 +// Location: LCCOMB_X61_Y37_N30 fiftyfivenm_lcell_comb \inst13|inst14|data_in[1]~feeder ( // Equation(s): -// \inst13|inst14|data_in[1]~feeder_combout = \inst13|inst1[1]~24_combout +// \inst13|inst14|data_in[1]~feeder_combout = \inst13|inst1[1]~30_combout - .dataa(\inst13|inst1[1]~24_combout ), + .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[1]~30_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|data_in[1]~feeder .lut_mask = 16'hAAAA; +defparam \inst13|inst14|data_in[1]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N5 +// Location: FF_X61_Y37_N31 dffeas \inst13|inst14|data_in[1] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[1]~feeder_combout ), @@ -25359,25 +25737,25 @@ defparam \inst13|inst14|data_in[1] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N22 +// Location: LCCOMB_X63_Y36_N30 fiftyfivenm_lcell_comb \inst13|inst14|Selector29~0 ( // Equation(s): // \inst13|inst14|Selector29~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [1])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [9])) # (!\inst13|inst14|Equal0~0_combout & // ((\inst13|inst14|data_in [1]))))) - .dataa(\inst13|inst14|data_in [9]), - .datab(\inst13|inst14|state.idle~q ), + .dataa(\inst13|inst14|state.idle~q ), + .datab(\inst13|inst14|data_in [9]), .datac(\inst13|inst14|data_in [1]), .datad(\inst13|inst14|Equal0~0_combout ), .cin(gnd), .combout(\inst13|inst14|Selector29~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst14|Selector29~0 .lut_mask = 16'hE2F0; +defparam \inst13|inst14|Selector29~0 .lut_mask = 16'hE4F0; defparam \inst13|inst14|Selector29~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N23 +// Location: FF_X63_Y36_N31 dffeas \inst13|inst14|tx_byte[1] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector29~0_combout ), @@ -25396,15 +25774,51 @@ defparam \inst13|inst14|tx_byte[1] .is_wysiwyg = "true"; defparam \inst13|inst14|tx_byte[1] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y37_N9 +// Location: FF_X54_Y36_N23 +dffeas \inst13|inst|data_tx[1] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_byte [1]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [1]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_tx[1] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X62_Y39_N14 +fiftyfivenm_lcell_comb \inst13|inst14|data_in[8]~feeder ( +// Equation(s): +// \inst13|inst14|data_in[8]~feeder_combout = \inst13|inst1[8]~62_combout + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst1[8]~62_combout ), + .datad(gnd), + .cin(gnd), + .combout(\inst13|inst14|data_in[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst14|data_in[8]~feeder .lut_mask = 16'hF0F0; +defparam \inst13|inst14|data_in[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X62_Y39_N15 dffeas \inst13|inst14|data_in[8] ( .clk(\inst13|inst13~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[8]~59_combout ), + .d(\inst13|inst14|data_in[8]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -25415,32 +25829,32 @@ defparam \inst13|inst14|data_in[8] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y41_N10 -fiftyfivenm_lcell_comb \inst13|inst1[0]~19 ( +// Location: LCCOMB_X61_Y38_N2 +fiftyfivenm_lcell_comb \inst13|inst1[0]~25 ( // Equation(s): -// \inst13|inst1[0]~19_combout = ((\inst13|inst1[0]~16_combout & \inst13|inst1[0]~13_combout )) # (!\inst13|inst1[0]~18_combout ) +// \inst13|inst1[0]~25_combout = ((\inst13|inst1[0]~19_combout & \inst13|inst1[0]~22_combout )) # (!\inst13|inst1[0]~24_combout ) - .dataa(\inst13|inst1[0]~18_combout ), - .datab(\inst13|inst1[0]~16_combout ), + .dataa(\inst13|inst1[0]~19_combout ), + .datab(\inst13|inst1[0]~22_combout ), .datac(gnd), - .datad(\inst13|inst1[0]~13_combout ), + .datad(\inst13|inst1[0]~24_combout ), .cin(gnd), - .combout(\inst13|inst1[0]~19_combout ), + .combout(\inst13|inst1[0]~25_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst1[0]~19 .lut_mask = 16'hDD55; -defparam \inst13|inst1[0]~19 .sum_lutc_input = "datac"; +defparam \inst13|inst1[0]~25 .lut_mask = 16'h88FF; +defparam \inst13|inst1[0]~25 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N24 +// Location: LCCOMB_X63_Y36_N24 fiftyfivenm_lcell_comb \inst13|inst14|data_in[0]~feeder ( // Equation(s): -// \inst13|inst14|data_in[0]~feeder_combout = \inst13|inst1[0]~19_combout +// \inst13|inst14|data_in[0]~feeder_combout = \inst13|inst1[0]~25_combout .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[0]~19_combout ), + .datad(\inst13|inst1[0]~25_combout ), .cin(gnd), .combout(\inst13|inst14|data_in[0]~feeder_combout ), .cout()); @@ -25449,7 +25863,7 @@ defparam \inst13|inst14|data_in[0]~feeder .lut_mask = 16'hFF00; defparam \inst13|inst14|data_in[0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N25 +// Location: FF_X63_Y36_N25 dffeas \inst13|inst14|data_in[0] ( .clk(\inst13|inst13~clkctrl_outclk ), .d(\inst13|inst14|data_in[0]~feeder_combout ), @@ -25468,7 +25882,7 @@ defparam \inst13|inst14|data_in[0] .is_wysiwyg = "true"; defparam \inst13|inst14|data_in[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N28 +// Location: LCCOMB_X63_Y36_N20 fiftyfivenm_lcell_comb \inst13|inst14|Selector30~0 ( // Equation(s): // \inst13|inst14|Selector30~0_combout = (\inst13|inst14|state.idle~q & (((\inst13|inst14|data_in [0])))) # (!\inst13|inst14|state.idle~q & ((\inst13|inst14|Equal0~0_combout & (\inst13|inst14|data_in [8])) # (!\inst13|inst14|Equal0~0_combout & @@ -25486,7 +25900,7 @@ defparam \inst13|inst14|Selector30~0 .lut_mask = 16'hCACC; defparam \inst13|inst14|Selector30~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y37_N29 +// Location: FF_X63_Y36_N21 dffeas \inst13|inst14|tx_byte[0] ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst14|Selector30~0_combout ), @@ -25501,241 +25915,235 @@ dffeas \inst13|inst14|tx_byte[0] ( .q(\inst13|inst14|tx_byte [0]), .prn(vcc)); // synopsys translate_off -defparam \inst13|inst14|tx_byte[0] .is_wysiwyg = "true"; -defparam \inst13|inst14|tx_byte[0] .power_up = "low"; +defparam \inst13|inst14|tx_byte[0] .is_wysiwyg = "true"; +defparam \inst13|inst14|tx_byte[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y36_N1 +dffeas \inst13|inst|data_tx[0] ( + .clk(\inst13|inst|data_clk~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst14|tx_byte [0]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\inst13|inst|addr_rw[7]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst13|inst|data_tx [0]), + .prn(vcc)); +// synopsys translate_off +defparam \inst13|inst|data_tx[0] .is_wysiwyg = "true"; +defparam \inst13|inst|data_tx[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y36_N0 +fiftyfivenm_lcell_comb \inst13|inst|Mux2~0 ( +// Equation(s): +// \inst13|inst|Mux2~0_combout = (\inst13|inst|bit_cnt [0] & (((\inst13|inst|data_tx [0] & \inst13|inst|bit_cnt [1])))) # (!\inst13|inst|bit_cnt [0] & ((\inst13|inst|data_tx [1]) # ((!\inst13|inst|bit_cnt [1])))) + + .dataa(\inst13|inst|data_tx [1]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|data_tx [0]), + .datad(\inst13|inst|bit_cnt [1]), + .cin(gnd), + .combout(\inst13|inst|Mux2~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Mux2~0 .lut_mask = 16'hE233; +defparam \inst13|inst|Mux2~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X54_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst|Mux2~1 ( +// Equation(s): +// \inst13|inst|Mux2~1_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux2~0_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux2~0_combout & ((\inst13|inst|data_tx [3]))) # (!\inst13|inst|Mux2~0_combout & (\inst13|inst|data_tx [2])))) + + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst|data_tx [2]), + .datac(\inst13|inst|data_tx [3]), + .datad(\inst13|inst|Mux2~0_combout ), + .cin(gnd), + .combout(\inst13|inst|Mux2~1_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Mux2~1 .lut_mask = 16'hFA44; +defparam \inst13|inst|Mux2~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst|Selector23~0 ( +// Equation(s): +// \inst13|inst|Selector23~0_combout = (\inst13|inst|state.slv_ack1~q & !\inst13|inst|ack_error~q ) + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst|state.slv_ack1~q ), + .datad(\inst13|inst|ack_error~q ), + .cin(gnd), + .combout(\inst13|inst|Selector23~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector23~0 .lut_mask = 16'h00F0; +defparam \inst13|inst|Selector23~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N6 -fiftyfivenm_lcell_comb \inst13|inst|Mux4~0 ( +// Location: LCCOMB_X56_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~11 ( // Equation(s): -// \inst13|inst|Mux4~0_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|bit_cnt [0] & ((\inst13|inst14|tx_byte [0]))) # (!\inst13|inst|bit_cnt [0] & (\inst13|inst14|tx_byte [1])))) # (!\inst13|inst|bit_cnt [1] & (((!\inst13|inst|bit_cnt [0])))) +// \inst13|inst|Selector25~11_combout = (\inst13|inst|Selector23~0_combout & ((\inst13|inst|bit_cnt [2] & ((\inst13|inst|Mux2~1_combout ))) # (!\inst13|inst|bit_cnt [2] & (\inst13|inst|Mux2~3_combout )))) - .dataa(\inst13|inst14|tx_byte [1]), - .datab(\inst13|inst14|tx_byte [0]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|bit_cnt [0]), + .dataa(\inst13|inst|Mux2~3_combout ), + .datab(\inst13|inst|bit_cnt [2]), + .datac(\inst13|inst|Mux2~1_combout ), + .datad(\inst13|inst|Selector23~0_combout ), .cin(gnd), - .combout(\inst13|inst|Mux4~0_combout ), + .combout(\inst13|inst|Selector25~11_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux4~0 .lut_mask = 16'hC0AF; -defparam \inst13|inst|Mux4~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~11 .lut_mask = 16'hE200; +defparam \inst13|inst|Selector25~11 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y37_N2 -fiftyfivenm_lcell_comb \inst13|inst|Mux4~1 ( +// Location: LCCOMB_X54_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst|Mux0~2 ( // Equation(s): -// \inst13|inst|Mux4~1_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux4~0_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux4~0_combout & ((\inst13|inst14|tx_byte [3]))) # (!\inst13|inst|Mux4~0_combout & (\inst13|inst14|tx_byte -// [2])))) +// \inst13|inst|Mux0~2_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|addr_rw [4] & ((\inst13|inst|bit_cnt [1])))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst|addr_rw [5]) # (!\inst13|inst|bit_cnt [1])))) - .dataa(\inst13|inst14|tx_byte [2]), - .datab(\inst13|inst14|tx_byte [3]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|Mux4~0_combout ), + .dataa(\inst13|inst|addr_rw [4]), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst|addr_rw [5]), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst13|inst|Mux4~1_combout ), + .combout(\inst13|inst|Mux0~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux4~1 .lut_mask = 16'hFC0A; -defparam \inst13|inst|Mux4~1 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux0~2 .lut_mask = 16'hB833; +defparam \inst13|inst|Mux0~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N24 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~7 ( +// Location: LCCOMB_X54_Y36_N18 +fiftyfivenm_lcell_comb \inst13|inst|Mux0~3 ( // Equation(s): -// \inst13|inst|Selector25~7_combout = (\inst13|inst|Selector25~6_combout & ((\inst13|inst|bit_cnt [2] & ((\inst13|inst|Mux4~1_combout ))) # (!\inst13|inst|bit_cnt [2] & (\inst13|inst|Mux4~3_combout )))) +// \inst13|inst|Mux0~3_combout = (\inst13|inst|Mux0~2_combout & ((\inst13|inst|addr_rw [7]) # ((\inst13|inst|bit_cnt [1])))) # (!\inst13|inst|Mux0~2_combout & (((\inst13|inst|addr_rw [6] & !\inst13|inst|bit_cnt [1])))) - .dataa(\inst13|inst|Mux4~3_combout ), - .datab(\inst13|inst|bit_cnt [2]), - .datac(\inst13|inst|Mux4~1_combout ), - .datad(\inst13|inst|Selector25~6_combout ), + .dataa(\inst13|inst|addr_rw [7]), + .datab(\inst13|inst|addr_rw [6]), + .datac(\inst13|inst|Mux0~2_combout ), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst13|inst|Selector25~7_combout ), + .combout(\inst13|inst|Mux0~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~7 .lut_mask = 16'hE200; -defparam \inst13|inst|Selector25~7 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux0~3 .lut_mask = 16'hF0AC; +defparam \inst13|inst|Mux0~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N28 +// Location: LCCOMB_X55_Y36_N18 fiftyfivenm_lcell_comb \inst13|inst|Mux0~0 ( // Equation(s): -// \inst13|inst|Mux0~0_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|bit_cnt [0] & (\inst13|inst|addr_rw [0])) # (!\inst13|inst|bit_cnt [0] & ((\inst13|inst|addr_rw [1]))))) # (!\inst13|inst|bit_cnt [1] & (((!\inst13|inst|bit_cnt [0])))) +// \inst13|inst|Mux0~0_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|bit_cnt [0] & ((\inst13|inst|addr_rw [0]))) # (!\inst13|inst|bit_cnt [0] & (\inst13|inst|addr_rw [1])))) # (!\inst13|inst|bit_cnt [1] & (((!\inst13|inst|bit_cnt [0])))) - .dataa(\inst13|inst|addr_rw [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|bit_cnt [0]), - .datad(\inst13|inst|addr_rw [1]), + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst|addr_rw [1]), + .datac(\inst13|inst|addr_rw [0]), + .datad(\inst13|inst|bit_cnt [0]), .cin(gnd), .combout(\inst13|inst|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux0~0 .lut_mask = 16'h8F83; +defparam \inst13|inst|Mux0~0 .lut_mask = 16'hA0DD; defparam \inst13|inst|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N30 +// Location: LCCOMB_X56_Y36_N12 fiftyfivenm_lcell_comb \inst13|inst|Mux0~1 ( // Equation(s): // \inst13|inst|Mux0~1_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux0~0_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux0~0_combout & ((\inst13|inst|addr_rw [3]))) # (!\inst13|inst|Mux0~0_combout & (\inst13|inst|addr_rw [2])))) - .dataa(\inst13|inst|addr_rw [2]), - .datab(\inst13|inst|addr_rw [3]), - .datac(\inst13|inst|bit_cnt [1]), + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst|addr_rw [2]), + .datac(\inst13|inst|addr_rw [3]), .datad(\inst13|inst|Mux0~0_combout ), .cin(gnd), .combout(\inst13|inst|Mux0~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux0~1 .lut_mask = 16'hFC0A; +defparam \inst13|inst|Mux0~1 .lut_mask = 16'hFA44; defparam \inst13|inst|Mux0~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N2 -fiftyfivenm_lcell_comb \inst13|inst|Mux0~2 ( +// Location: LCCOMB_X57_Y36_N10 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~13 ( // Equation(s): -// \inst13|inst|Mux0~2_combout = (\inst13|inst|bit_cnt [0] & (((\inst13|inst|bit_cnt [1] & \inst13|inst|addr_rw [4])))) # (!\inst13|inst|bit_cnt [0] & ((\inst13|inst|addr_rw [5]) # ((!\inst13|inst|bit_cnt [1])))) +// \inst13|inst|Selector25~13_combout = (\inst13|inst|state.start~q & ((\inst13|inst|bit_cnt [2] & ((\inst13|inst|Mux0~1_combout ))) # (!\inst13|inst|bit_cnt [2] & (\inst13|inst|Mux0~3_combout )))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|addr_rw [5]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|addr_rw [4]), + .dataa(\inst13|inst|bit_cnt [2]), + .datab(\inst13|inst|state.start~q ), + .datac(\inst13|inst|Mux0~3_combout ), + .datad(\inst13|inst|Mux0~1_combout ), .cin(gnd), - .combout(\inst13|inst|Mux0~2_combout ), + .combout(\inst13|inst|Selector25~13_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux0~2 .lut_mask = 16'hE545; -defparam \inst13|inst|Mux0~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~13 .lut_mask = 16'hC840; +defparam \inst13|inst|Selector25~13 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N0 -fiftyfivenm_lcell_comb \inst13|inst|Mux0~3 ( +// Location: LCCOMB_X54_Y36_N2 +fiftyfivenm_lcell_comb \inst13|inst|Mux3~0 ( // Equation(s): -// \inst13|inst|Mux0~3_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux0~2_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux0~2_combout & ((\inst13|inst|addr_rw [7]))) # (!\inst13|inst|Mux0~2_combout & (\inst13|inst|addr_rw [6])))) +// \inst13|inst|Mux3~0_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|data_tx [3] & ((\inst13|inst|bit_cnt [1])))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst|data_tx [2]) # (\inst13|inst|bit_cnt [1])))) - .dataa(\inst13|inst|addr_rw [6]), - .datab(\inst13|inst|addr_rw [7]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|Mux0~2_combout ), + .dataa(\inst13|inst|data_tx [3]), + .datab(\inst13|inst|data_tx [2]), + .datac(\inst13|inst|bit_cnt [0]), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), - .combout(\inst13|inst|Mux0~3_combout ), + .combout(\inst13|inst|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux0~3 .lut_mask = 16'hFC0A; -defparam \inst13|inst|Mux0~3 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux3~0 .lut_mask = 16'hAF0C; +defparam \inst13|inst|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N18 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~13 ( +// Location: LCCOMB_X54_Y36_N22 +fiftyfivenm_lcell_comb \inst13|inst|Mux3~1 ( // Equation(s): -// \inst13|inst|Selector25~13_combout = (\inst13|inst|state.start~q & ((\inst13|inst|bit_cnt [2] & (\inst13|inst|Mux0~1_combout )) # (!\inst13|inst|bit_cnt [2] & ((\inst13|inst|Mux0~3_combout ))))) +// \inst13|inst|Mux3~1_combout = (\inst13|inst|Selector27~0_combout & ((\inst13|inst|Mux3~0_combout & (\inst13|inst|data_tx [0])) # (!\inst13|inst|Mux3~0_combout & ((\inst13|inst|data_tx [1]))))) # (!\inst13|inst|Selector27~0_combout & +// (((\inst13|inst|Mux3~0_combout )))) - .dataa(\inst13|inst|Mux0~1_combout ), - .datab(\inst13|inst|state.start~q ), - .datac(\inst13|inst|bit_cnt [2]), - .datad(\inst13|inst|Mux0~3_combout ), + .dataa(\inst13|inst|Selector27~0_combout ), + .datab(\inst13|inst|data_tx [0]), + .datac(\inst13|inst|data_tx [1]), + .datad(\inst13|inst|Mux3~0_combout ), .cin(gnd), - .combout(\inst13|inst|Selector25~13_combout ), + .combout(\inst13|inst|Mux3~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~13 .lut_mask = 16'h8C80; -defparam \inst13|inst|Selector25~13 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y35_N3 -dffeas \inst13|inst|data_tx[5] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [5]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [5]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[5] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[5] .power_up = "low"; -// synopsys translate_on - -// Location: FF_X49_Y35_N15 -dffeas \inst13|inst|data_tx[4] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [4]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [4]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[4] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[4] .power_up = "low"; -// synopsys translate_on - -// Location: FF_X50_Y35_N7 -dffeas \inst13|inst|data_tx[7] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [7]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [7]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[7] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[7] .power_up = "low"; -// synopsys translate_on - -// Location: FF_X50_Y35_N1 -dffeas \inst13|inst|data_tx[6] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [6]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [6]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[6] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[6] .power_up = "low"; +defparam \inst13|inst|Mux3~1 .lut_mask = 16'hDDA0; +defparam \inst13|inst|Mux3~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N0 +// Location: LCCOMB_X54_Y36_N30 fiftyfivenm_lcell_comb \inst13|inst|Mux3~2 ( // Equation(s): // \inst13|inst|Mux3~2_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|data_tx [7] & ((\inst13|inst|bit_cnt [1])))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst|data_tx [6]) # (\inst13|inst|bit_cnt [1])))) .dataa(\inst13|inst|data_tx [7]), - .datab(\inst13|inst|bit_cnt [0]), - .datac(\inst13|inst|data_tx [6]), + .datab(\inst13|inst|data_tx [6]), + .datac(\inst13|inst|bit_cnt [0]), .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), .combout(\inst13|inst|Mux3~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux3~2 .lut_mask = 16'hBB30; +defparam \inst13|inst|Mux3~2 .lut_mask = 16'hAF0C; defparam \inst13|inst|Mux3~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N4 +// Location: LCCOMB_X54_Y36_N10 fiftyfivenm_lcell_comb \inst13|inst|Mux3~3 ( // Equation(s): // \inst13|inst|Mux3~3_combout = (\inst13|inst|Mux3~2_combout & (((\inst13|inst|data_tx [4]) # (!\inst13|inst|Selector27~0_combout )))) # (!\inst13|inst|Mux3~2_combout & (\inst13|inst|data_tx [5] & ((\inst13|inst|Selector27~0_combout )))) @@ -25752,134 +26160,24 @@ defparam \inst13|inst|Mux3~3 .lut_mask = 16'hCAF0; defparam \inst13|inst|Mux3~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y35_N13 -dffeas \inst13|inst|data_tx[0] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [0]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [0]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[0] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[0] .power_up = "low"; -// synopsys translate_on - -// Location: FF_X50_Y35_N29 -dffeas \inst13|inst|data_tx[2] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [2]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [2]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[2] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[2] .power_up = "low"; -// synopsys translate_on - -// Location: FF_X50_Y35_N15 -dffeas \inst13|inst|data_tx[3] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [3]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [3]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[3] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[3] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y35_N28 -fiftyfivenm_lcell_comb \inst13|inst|Mux3~0 ( -// Equation(s): -// \inst13|inst|Mux3~0_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|data_tx [3])) # (!\inst13|inst|bit_cnt [0]))) # (!\inst13|inst|bit_cnt [1] & (!\inst13|inst|bit_cnt [0] & (\inst13|inst|data_tx [2]))) - - .dataa(\inst13|inst|bit_cnt [1]), - .datab(\inst13|inst|bit_cnt [0]), - .datac(\inst13|inst|data_tx [2]), - .datad(\inst13|inst|data_tx [3]), - .cin(gnd), - .combout(\inst13|inst|Mux3~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Mux3~0 .lut_mask = 16'hBA32; -defparam \inst13|inst|Mux3~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y35_N17 -dffeas \inst13|inst|data_tx[1] ( - .clk(\inst13|inst|data_clk~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst14|tx_byte [1]), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(\inst13|inst|addr_rw[7]~3_combout ), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst13|inst|data_tx [1]), - .prn(vcc)); -// synopsys translate_off -defparam \inst13|inst|data_tx[1] .is_wysiwyg = "true"; -defparam \inst13|inst|data_tx[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X50_Y35_N16 -fiftyfivenm_lcell_comb \inst13|inst|Mux3~1 ( -// Equation(s): -// \inst13|inst|Mux3~1_combout = (\inst13|inst|Mux3~0_combout & ((\inst13|inst|data_tx [0]) # ((!\inst13|inst|Selector27~0_combout )))) # (!\inst13|inst|Mux3~0_combout & (((\inst13|inst|data_tx [1] & \inst13|inst|Selector27~0_combout )))) - - .dataa(\inst13|inst|data_tx [0]), - .datab(\inst13|inst|Mux3~0_combout ), - .datac(\inst13|inst|data_tx [1]), - .datad(\inst13|inst|Selector27~0_combout ), - .cin(gnd), - .combout(\inst13|inst|Mux3~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Mux3~1 .lut_mask = 16'hB8CC; -defparam \inst13|inst|Mux3~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X46_Y35_N16 +// Location: LCCOMB_X54_Y36_N24 fiftyfivenm_lcell_comb \inst13|inst|Selector25~8 ( // Equation(s): -// \inst13|inst|Selector25~8_combout = (\inst13|inst|state.wr~q & ((\inst13|inst|Add1~0_combout & ((\inst13|inst|Mux3~1_combout ))) # (!\inst13|inst|Add1~0_combout & (\inst13|inst|Mux3~3_combout )))) +// \inst13|inst|Selector25~8_combout = (\inst13|inst|state.wr~q & ((\inst13|inst|Add1~0_combout & (\inst13|inst|Mux3~1_combout )) # (!\inst13|inst|Add1~0_combout & ((\inst13|inst|Mux3~3_combout ))))) - .dataa(\inst13|inst|Add1~0_combout ), - .datab(\inst13|inst|state.wr~q ), - .datac(\inst13|inst|Mux3~3_combout ), - .datad(\inst13|inst|Mux3~1_combout ), + .dataa(\inst13|inst|state.wr~q ), + .datab(\inst13|inst|Add1~0_combout ), + .datac(\inst13|inst|Mux3~1_combout ), + .datad(\inst13|inst|Mux3~3_combout ), .cin(gnd), .combout(\inst13|inst|Selector25~8_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~8 .lut_mask = 16'hC840; +defparam \inst13|inst|Selector25~8 .lut_mask = 16'hA280; defparam \inst13|inst|Selector25~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N30 +// Location: LCCOMB_X55_Y36_N20 fiftyfivenm_lcell_comb \inst13|inst|Mux1~0 ( // Equation(s): // \inst13|inst|Mux1~0_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|addr_rw [3]) # ((!\inst13|inst|bit_cnt [0])))) # (!\inst13|inst|bit_cnt [1] & (((\inst13|inst|addr_rw [2] & !\inst13|inst|bit_cnt [0])))) @@ -25896,58 +26194,60 @@ defparam \inst13|inst|Mux1~0 .lut_mask = 16'h88FA; defparam \inst13|inst|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N26 +// Location: LCCOMB_X55_Y35_N14 fiftyfivenm_lcell_comb \inst13|inst|Mux1~1 ( // Equation(s): -// \inst13|inst|Mux1~1_combout = (\inst13|inst|Mux1~0_combout & ((\inst13|inst|addr_rw [0]) # ((!\inst13|inst|Selector27~0_combout )))) # (!\inst13|inst|Mux1~0_combout & (((\inst13|inst|addr_rw [1] & \inst13|inst|Selector27~0_combout )))) +// \inst13|inst|Mux1~1_combout = (\inst13|inst|Selector27~0_combout & ((\inst13|inst|Mux1~0_combout & ((\inst13|inst|addr_rw [0]))) # (!\inst13|inst|Mux1~0_combout & (\inst13|inst|addr_rw [1])))) # (!\inst13|inst|Selector27~0_combout & +// (((\inst13|inst|Mux1~0_combout )))) - .dataa(\inst13|inst|addr_rw [0]), + .dataa(\inst13|inst|Selector27~0_combout ), .datab(\inst13|inst|addr_rw [1]), - .datac(\inst13|inst|Mux1~0_combout ), - .datad(\inst13|inst|Selector27~0_combout ), + .datac(\inst13|inst|addr_rw [0]), + .datad(\inst13|inst|Mux1~0_combout ), .cin(gnd), .combout(\inst13|inst|Mux1~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux1~1 .lut_mask = 16'hACF0; +defparam \inst13|inst|Mux1~1 .lut_mask = 16'hF588; defparam \inst13|inst|Mux1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N26 +// Location: LCCOMB_X55_Y36_N24 fiftyfivenm_lcell_comb \inst13|inst|Mux1~2 ( // Equation(s): -// \inst13|inst|Mux1~2_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|addr_rw [7]) # ((!\inst13|inst|bit_cnt [0])))) # (!\inst13|inst|bit_cnt [1] & (((\inst13|inst|addr_rw [6] & !\inst13|inst|bit_cnt [0])))) +// \inst13|inst|Mux1~2_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|addr_rw [7] & ((\inst13|inst|bit_cnt [1])))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst|addr_rw [6]) # (\inst13|inst|bit_cnt [1])))) - .dataa(\inst13|inst|bit_cnt [1]), - .datab(\inst13|inst|addr_rw [7]), + .dataa(\inst13|inst|addr_rw [7]), + .datab(\inst13|inst|bit_cnt [0]), .datac(\inst13|inst|addr_rw [6]), - .datad(\inst13|inst|bit_cnt [0]), + .datad(\inst13|inst|bit_cnt [1]), .cin(gnd), .combout(\inst13|inst|Mux1~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux1~2 .lut_mask = 16'h88FA; +defparam \inst13|inst|Mux1~2 .lut_mask = 16'hBB30; defparam \inst13|inst|Mux1~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N22 +// Location: LCCOMB_X55_Y36_N6 fiftyfivenm_lcell_comb \inst13|inst|Mux1~3 ( // Equation(s): -// \inst13|inst|Mux1~3_combout = (\inst13|inst|Mux1~2_combout & (((\inst13|inst|addr_rw [4]) # (!\inst13|inst|Selector27~0_combout )))) # (!\inst13|inst|Mux1~2_combout & (\inst13|inst|addr_rw [5] & ((\inst13|inst|Selector27~0_combout )))) +// \inst13|inst|Mux1~3_combout = (\inst13|inst|Selector27~0_combout & ((\inst13|inst|Mux1~2_combout & ((\inst13|inst|addr_rw [4]))) # (!\inst13|inst|Mux1~2_combout & (\inst13|inst|addr_rw [5])))) # (!\inst13|inst|Selector27~0_combout & +// (((\inst13|inst|Mux1~2_combout )))) - .dataa(\inst13|inst|Mux1~2_combout ), + .dataa(\inst13|inst|Selector27~0_combout ), .datab(\inst13|inst|addr_rw [5]), .datac(\inst13|inst|addr_rw [4]), - .datad(\inst13|inst|Selector27~0_combout ), + .datad(\inst13|inst|Mux1~2_combout ), .cin(gnd), .combout(\inst13|inst|Mux1~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux1~3 .lut_mask = 16'hE4AA; +defparam \inst13|inst|Mux1~3 .lut_mask = 16'hF588; defparam \inst13|inst|Mux1~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N30 +// Location: LCCOMB_X55_Y35_N8 fiftyfivenm_lcell_comb \inst13|inst|Selector25~9 ( // Equation(s): // \inst13|inst|Selector25~9_combout = (\inst13|inst|state.command~q & ((\inst13|inst|Add1~0_combout & (\inst13|inst|Mux1~1_combout )) # (!\inst13|inst|Add1~0_combout & ((\inst13|inst|Mux1~3_combout ))))) @@ -25964,151 +26264,238 @@ defparam \inst13|inst|Selector25~9 .lut_mask = 16'hC480; defparam \inst13|inst|Selector25~9 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N4 +// Location: LCCOMB_X56_Y36_N18 fiftyfivenm_lcell_comb \inst13|inst|Selector25~10 ( // Equation(s): -// \inst13|inst|Selector25~10_combout = (\inst13|inst|Selector25~8_combout ) # ((\inst13|inst|Selector25~9_combout ) # ((\inst13|inst|state.mstr_ack~q & \inst13|inst|process_1~4_combout ))) +// \inst13|inst|Selector25~10_combout = (\inst13|inst|Selector25~8_combout ) # ((\inst13|inst|Selector25~9_combout ) # ((\inst13|inst|process_1~4_combout & \inst13|inst|state.mstr_ack~q ))) - .dataa(\inst13|inst|state.mstr_ack~q ), - .datab(\inst13|inst|Selector25~8_combout ), - .datac(\inst13|inst|Selector25~9_combout ), - .datad(\inst13|inst|process_1~4_combout ), + .dataa(\inst13|inst|process_1~4_combout ), + .datab(\inst13|inst|state.mstr_ack~q ), + .datac(\inst13|inst|Selector25~8_combout ), + .datad(\inst13|inst|Selector25~9_combout ), .cin(gnd), .combout(\inst13|inst|Selector25~10_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~10 .lut_mask = 16'hFEFC; +defparam \inst13|inst|Selector25~10 .lut_mask = 16'hFFF8; defparam \inst13|inst|Selector25~10 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N12 -fiftyfivenm_lcell_comb \inst13|inst|Mux2~0 ( +// Location: LCCOMB_X56_Y36_N10 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~14 ( // Equation(s): -// \inst13|inst|Mux2~0_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & (\inst13|inst|data_tx [0]))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst|data_tx [1])) # (!\inst13|inst|bit_cnt [1]))) +// \inst13|inst|Selector25~14_combout = (\inst13|inst|Selector23~1_combout ) # ((\inst13|inst|Selector25~11_combout ) # ((\inst13|inst|Selector25~13_combout ) # (\inst13|inst|Selector25~10_combout ))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|data_tx [0]), - .datad(\inst13|inst|data_tx [1]), + .dataa(\inst13|inst|Selector23~1_combout ), + .datab(\inst13|inst|Selector25~11_combout ), + .datac(\inst13|inst|Selector25~13_combout ), + .datad(\inst13|inst|Selector25~10_combout ), .cin(gnd), - .combout(\inst13|inst|Mux2~0_combout ), + .combout(\inst13|inst|Selector25~14_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux2~0 .lut_mask = 16'hD591; -defparam \inst13|inst|Mux2~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~14 .lut_mask = 16'hFFFE; +defparam \inst13|inst|Selector25~14 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N20 -fiftyfivenm_lcell_comb \inst13|inst|Mux2~1 ( +// Location: LCCOMB_X54_Y36_N6 +fiftyfivenm_lcell_comb \inst13|inst|Mux4~2 ( // Equation(s): -// \inst13|inst|Mux2~1_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux2~0_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux2~0_combout & (\inst13|inst|data_tx [3])) # (!\inst13|inst|Mux2~0_combout & ((\inst13|inst|data_tx [2]))))) +// \inst13|inst|Mux4~2_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|bit_cnt [0] & (\inst13|inst14|tx_byte [4])) # (!\inst13|inst|bit_cnt [0] & ((\inst13|inst14|tx_byte [5]))))) # (!\inst13|inst|bit_cnt [1] & (((!\inst13|inst|bit_cnt [0])))) - .dataa(\inst13|inst|data_tx [3]), - .datab(\inst13|inst|data_tx [2]), - .datac(\inst13|inst|bit_cnt [1]), - .datad(\inst13|inst|Mux2~0_combout ), + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst14|tx_byte [4]), + .datac(\inst13|inst|bit_cnt [0]), + .datad(\inst13|inst14|tx_byte [5]), .cin(gnd), - .combout(\inst13|inst|Mux2~1_combout ), + .combout(\inst13|inst|Mux4~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux2~1 .lut_mask = 16'hFA0C; -defparam \inst13|inst|Mux2~1 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux4~2 .lut_mask = 16'h8F85; +defparam \inst13|inst|Mux4~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X49_Y35_N14 -fiftyfivenm_lcell_comb \inst13|inst|Mux2~2 ( +// Location: LCCOMB_X54_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst|Mux4~3 ( // Equation(s): -// \inst13|inst|Mux2~2_combout = (\inst13|inst|bit_cnt [0] & (\inst13|inst|bit_cnt [1] & (\inst13|inst|data_tx [4]))) # (!\inst13|inst|bit_cnt [0] & (((\inst13|inst|data_tx [5])) # (!\inst13|inst|bit_cnt [1]))) +// \inst13|inst|Mux4~3_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux4~2_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux4~2_combout & ((\inst13|inst14|tx_byte [7]))) # (!\inst13|inst|Mux4~2_combout & (\inst13|inst14|tx_byte +// [6])))) - .dataa(\inst13|inst|bit_cnt [0]), - .datab(\inst13|inst|bit_cnt [1]), - .datac(\inst13|inst|data_tx [4]), - .datad(\inst13|inst|data_tx [5]), + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst14|tx_byte [6]), + .datac(\inst13|inst14|tx_byte [7]), + .datad(\inst13|inst|Mux4~2_combout ), .cin(gnd), - .combout(\inst13|inst|Mux2~2_combout ), + .combout(\inst13|inst|Mux4~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux2~2 .lut_mask = 16'hD591; -defparam \inst13|inst|Mux2~2 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux4~3 .lut_mask = 16'hFA44; +defparam \inst13|inst|Mux4~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y35_N6 -fiftyfivenm_lcell_comb \inst13|inst|Mux2~3 ( +// Location: LCCOMB_X54_Y36_N12 +fiftyfivenm_lcell_comb \inst13|inst|Mux4~0 ( // Equation(s): -// \inst13|inst|Mux2~3_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux2~2_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux2~2_combout & ((\inst13|inst|data_tx [7]))) # (!\inst13|inst|Mux2~2_combout & (\inst13|inst|data_tx [6])))) +// \inst13|inst|Mux4~0_combout = (\inst13|inst|bit_cnt [1] & ((\inst13|inst|bit_cnt [0] & (\inst13|inst14|tx_byte [0])) # (!\inst13|inst|bit_cnt [0] & ((\inst13|inst14|tx_byte [1]))))) # (!\inst13|inst|bit_cnt [1] & (!\inst13|inst|bit_cnt [0])) .dataa(\inst13|inst|bit_cnt [1]), - .datab(\inst13|inst|data_tx [6]), - .datac(\inst13|inst|data_tx [7]), - .datad(\inst13|inst|Mux2~2_combout ), + .datab(\inst13|inst|bit_cnt [0]), + .datac(\inst13|inst14|tx_byte [0]), + .datad(\inst13|inst14|tx_byte [1]), .cin(gnd), - .combout(\inst13|inst|Mux2~3_combout ), + .combout(\inst13|inst|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Mux2~3 .lut_mask = 16'hFA44; -defparam \inst13|inst|Mux2~3 .sum_lutc_input = "datac"; +defparam \inst13|inst|Mux4~0 .lut_mask = 16'hB391; +defparam \inst13|inst|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N10 -fiftyfivenm_lcell_comb \inst13|inst|Selector23~0 ( +// Location: LCCOMB_X55_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst|Mux4~1 ( // Equation(s): -// \inst13|inst|Selector23~0_combout = (\inst13|inst|state.slv_ack1~q & !\inst13|inst|ack_error~q ) +// \inst13|inst|Mux4~1_combout = (\inst13|inst|bit_cnt [1] & (((\inst13|inst|Mux4~0_combout )))) # (!\inst13|inst|bit_cnt [1] & ((\inst13|inst|Mux4~0_combout & (\inst13|inst14|tx_byte [3])) # (!\inst13|inst|Mux4~0_combout & ((\inst13|inst14|tx_byte +// [2]))))) - .dataa(gnd), - .datab(gnd), + .dataa(\inst13|inst|bit_cnt [1]), + .datab(\inst13|inst14|tx_byte [3]), + .datac(\inst13|inst14|tx_byte [2]), + .datad(\inst13|inst|Mux4~0_combout ), + .cin(gnd), + .combout(\inst13|inst|Mux4~1_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Mux4~1 .lut_mask = 16'hEE50; +defparam \inst13|inst|Mux4~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y36_N28 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~7 ( +// Equation(s): +// \inst13|inst|Selector25~7_combout = (\inst13|inst|Selector25~6_combout & ((\inst13|inst|bit_cnt [2] & ((\inst13|inst|Mux4~1_combout ))) # (!\inst13|inst|bit_cnt [2] & (\inst13|inst|Mux4~3_combout )))) + + .dataa(\inst13|inst|Selector25~6_combout ), + .datab(\inst13|inst|bit_cnt [2]), + .datac(\inst13|inst|Mux4~3_combout ), + .datad(\inst13|inst|Mux4~1_combout ), + .cin(gnd), + .combout(\inst13|inst|Selector25~7_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector25~7 .lut_mask = 16'hA820; +defparam \inst13|inst|Selector25~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y36_N4 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~0 ( +// Equation(s): +// \inst13|inst|Selector25~0_combout = (\inst13|inst|state.slv_ack2~q & (\inst13|inst14|rnw~q & (\inst13|inst|process_1~4_combout & !\inst13|inst|ack_error~q ))) + + .dataa(\inst13|inst|state.slv_ack2~q ), + .datab(\inst13|inst14|rnw~q ), + .datac(\inst13|inst|process_1~4_combout ), + .datad(\inst13|inst|ack_error~q ), + .cin(gnd), + .combout(\inst13|inst|Selector25~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector25~0 .lut_mask = 16'h0080; +defparam \inst13|inst|Selector25~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y36_N6 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~1 ( +// Equation(s): +// \inst13|inst|Selector25~1_combout = (\inst13|inst|state.mstr_ack~q ) # (((\inst13|inst|state.slv_ack1~q & \inst13|inst|ack_error~q )) # (!\inst13|inst|state.ready~q )) + + .dataa(\inst13|inst|state.mstr_ack~q ), + .datab(\inst13|inst|state.ready~q ), .datac(\inst13|inst|state.slv_ack1~q ), .datad(\inst13|inst|ack_error~q ), .cin(gnd), - .combout(\inst13|inst|Selector23~0_combout ), + .combout(\inst13|inst|Selector25~1_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector23~0 .lut_mask = 16'h00F0; -defparam \inst13|inst|Selector23~0 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~1 .lut_mask = 16'hFBBB; +defparam \inst13|inst|Selector25~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N28 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~11 ( +// Location: LCCOMB_X56_Y36_N20 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~2 ( // Equation(s): -// \inst13|inst|Selector25~11_combout = (\inst13|inst|Selector23~0_combout & ((\inst13|inst|bit_cnt [2] & (\inst13|inst|Mux2~1_combout )) # (!\inst13|inst|bit_cnt [2] & ((\inst13|inst|Mux2~3_combout ))))) +// \inst13|inst|Selector25~2_combout = (\inst13|inst|state.stop~q ) # ((\inst13|inst|Selector25~1_combout ) # ((\inst13|inst|state.rd~q & !\inst13|inst|Equal1~0_combout ))) - .dataa(\inst13|inst|Mux2~1_combout ), - .datab(\inst13|inst|bit_cnt [2]), - .datac(\inst13|inst|Mux2~3_combout ), - .datad(\inst13|inst|Selector23~0_combout ), + .dataa(\inst13|inst|state.rd~q ), + .datab(\inst13|inst|state.stop~q ), + .datac(\inst13|inst|Equal1~0_combout ), + .datad(\inst13|inst|Selector25~1_combout ), .cin(gnd), - .combout(\inst13|inst|Selector25~11_combout ), + .combout(\inst13|inst|Selector25~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~11 .lut_mask = 16'hB800; -defparam \inst13|inst|Selector25~11 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~2 .lut_mask = 16'hFFCE; +defparam \inst13|inst|Selector25~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N14 -fiftyfivenm_lcell_comb \inst13|inst|Selector25~14 ( +// Location: LCCOMB_X56_Y36_N14 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~3 ( // Equation(s): -// \inst13|inst|Selector25~14_combout = (\inst13|inst|Selector25~13_combout ) # ((\inst13|inst|Selector23~1_combout ) # ((\inst13|inst|Selector25~10_combout ) # (\inst13|inst|Selector25~11_combout ))) +// \inst13|inst|Selector25~3_combout = (\inst13|inst|Selector25~0_combout ) # ((!\inst13|inst|sda_int~q & ((\inst13|inst|Selector25~2_combout ) # (!\inst13|inst|Selector0~1_combout )))) - .dataa(\inst13|inst|Selector25~13_combout ), - .datab(\inst13|inst|Selector23~1_combout ), - .datac(\inst13|inst|Selector25~10_combout ), - .datad(\inst13|inst|Selector25~11_combout ), + .dataa(\inst13|inst|Selector0~1_combout ), + .datab(\inst13|inst|sda_int~q ), + .datac(\inst13|inst|Selector25~0_combout ), + .datad(\inst13|inst|Selector25~2_combout ), .cin(gnd), - .combout(\inst13|inst|Selector25~14_combout ), + .combout(\inst13|inst|Selector25~3_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector25~14 .lut_mask = 16'hFFFE; -defparam \inst13|inst|Selector25~14 .sum_lutc_input = "datac"; +defparam \inst13|inst|Selector25~3 .lut_mask = 16'hF3F1; +defparam \inst13|inst|Selector25~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~4 ( +// Equation(s): +// \inst13|inst|Selector25~4_combout = (\inst13|inst|state.rd~q & ((\inst13|inst14|rnw~q $ (\inst13|inst|addr_rw [0])) # (!\inst13|inst|process_1~4_combout ))) + + .dataa(\inst13|inst|state.rd~q ), + .datab(\inst13|inst14|rnw~q ), + .datac(\inst13|inst|process_1~4_combout ), + .datad(\inst13|inst|addr_rw [0]), + .cin(gnd), + .combout(\inst13|inst|Selector25~4_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector25~4 .lut_mask = 16'h2A8A; +defparam \inst13|inst|Selector25~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X56_Y36_N26 +fiftyfivenm_lcell_comb \inst13|inst|Selector25~5 ( +// Equation(s): +// \inst13|inst|Selector25~5_combout = (\inst13|inst|Equal1~0_combout & ((\inst13|inst|state.command~q ) # ((\inst13|inst|state.wr~q ) # (\inst13|inst|Selector25~4_combout )))) + + .dataa(\inst13|inst|state.command~q ), + .datab(\inst13|inst|state.wr~q ), + .datac(\inst13|inst|Selector25~4_combout ), + .datad(\inst13|inst|Equal1~0_combout ), + .cin(gnd), + .combout(\inst13|inst|Selector25~5_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector25~5 .lut_mask = 16'hFE00; +defparam \inst13|inst|Selector25~5 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X47_Y35_N10 +// Location: LCCOMB_X56_Y36_N0 fiftyfivenm_lcell_comb \inst13|inst|Selector25~12 ( // Equation(s): -// \inst13|inst|Selector25~12_combout = (!\inst13|inst|Selector25~5_combout & (!\inst13|inst|Selector25~3_combout & (!\inst13|inst|Selector25~7_combout & !\inst13|inst|Selector25~14_combout ))) +// \inst13|inst|Selector25~12_combout = (!\inst13|inst|Selector25~14_combout & (!\inst13|inst|Selector25~7_combout & (!\inst13|inst|Selector25~3_combout & !\inst13|inst|Selector25~5_combout ))) - .dataa(\inst13|inst|Selector25~5_combout ), - .datab(\inst13|inst|Selector25~3_combout ), - .datac(\inst13|inst|Selector25~7_combout ), - .datad(\inst13|inst|Selector25~14_combout ), + .dataa(\inst13|inst|Selector25~14_combout ), + .datab(\inst13|inst|Selector25~7_combout ), + .datac(\inst13|inst|Selector25~3_combout ), + .datad(\inst13|inst|Selector25~5_combout ), .cin(gnd), .combout(\inst13|inst|Selector25~12_combout ), .cout()); @@ -26117,7 +26504,7 @@ defparam \inst13|inst|Selector25~12 .lut_mask = 16'h0001; defparam \inst13|inst|Selector25~12 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X47_Y35_N11 +// Location: FF_X56_Y36_N1 dffeas \inst13|inst|sda_int ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(\inst13|inst|Selector25~12_combout ), @@ -26136,15 +26523,15 @@ defparam \inst13|inst|sda_int .is_wysiwyg = "true"; defparam \inst13|inst|sda_int .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N20 +// Location: LCCOMB_X57_Y36_N18 fiftyfivenm_lcell_comb \inst13|inst|Selector30~0 ( // Equation(s): -// \inst13|inst|Selector30~0_combout = (\inst13|inst|state.restart~q ) # ((!\inst13|inst|sda_int~q & (!\inst13|inst|state.start~q & !\inst13|inst|state.stop~q ))) +// \inst13|inst|Selector30~0_combout = (\inst13|inst|state.restart~q ) # ((!\inst13|inst|state.start~q & (!\inst13|inst|state.stop~q & !\inst13|inst|sda_int~q ))) .dataa(\inst13|inst|state.restart~q ), - .datab(\inst13|inst|sda_int~q ), - .datac(\inst13|inst|state.start~q ), - .datad(\inst13|inst|state.stop~q ), + .datab(\inst13|inst|state.start~q ), + .datac(\inst13|inst|state.stop~q ), + .datad(\inst13|inst|sda_int~q ), .cin(gnd), .combout(\inst13|inst|Selector30~0_combout ), .cout()); @@ -26153,13 +26540,47 @@ defparam \inst13|inst|Selector30~0 .lut_mask = 16'hAAAB; defparam \inst13|inst|Selector30~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X46_Y35_N12 +// Location: LCCOMB_X57_Y36_N16 +fiftyfivenm_lcell_comb \inst13|inst|Selector17~0 ( +// Equation(s): +// \inst13|inst|Selector17~0_combout = ((\inst13|inst|process_1~4_combout & (\inst13|inst|scl_req~q & \inst13|inst14|rnw~q ))) # (!\inst13|inst|state.mstr_ack~q ) + + .dataa(\inst13|inst|process_1~4_combout ), + .datab(\inst13|inst|scl_req~q ), + .datac(\inst13|inst|state.mstr_ack~q ), + .datad(\inst13|inst14|rnw~q ), + .cin(gnd), + .combout(\inst13|inst|Selector17~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|Selector17~0 .lut_mask = 16'h8F0F; +defparam \inst13|inst|Selector17~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y36_N8 +fiftyfivenm_lcell_comb \inst13|inst|scl_req~0 ( +// Equation(s): +// \inst13|inst|scl_req~0_combout = (\inst13|inst|scl_req~q & (\inst13|inst|process_1~4_combout & (!\inst13|inst14|rnw~q & !\inst13|inst|ack_error~q ))) + + .dataa(\inst13|inst|scl_req~q ), + .datab(\inst13|inst|process_1~4_combout ), + .datac(\inst13|inst14|rnw~q ), + .datad(\inst13|inst|ack_error~q ), + .cin(gnd), + .combout(\inst13|inst|scl_req~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst13|inst|scl_req~0 .lut_mask = 16'h0008; +defparam \inst13|inst|scl_req~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X57_Y36_N22 fiftyfivenm_lcell_comb \inst13|inst|Selector17~1 ( // Equation(s): -// \inst13|inst|Selector17~1_combout = (\inst13|inst|scl_req~q ) # ((!\inst13|inst|state.stop~q & (!\inst13|inst|state.command~q & \inst13|inst|WideOr3~0_combout ))) +// \inst13|inst|Selector17~1_combout = (\inst13|inst|scl_req~q ) # ((!\inst13|inst|state.command~q & (!\inst13|inst|state.stop~q & \inst13|inst|WideOr3~0_combout ))) - .dataa(\inst13|inst|state.stop~q ), - .datab(\inst13|inst|state.command~q ), + .dataa(\inst13|inst|state.command~q ), + .datab(\inst13|inst|state.stop~q ), .datac(\inst13|inst|WideOr3~0_combout ), .datad(\inst13|inst|scl_req~q ), .cin(gnd), @@ -26170,31 +26591,31 @@ defparam \inst13|inst|Selector17~1 .lut_mask = 16'hFF10; defparam \inst13|inst|Selector17~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N10 +// Location: LCCOMB_X57_Y36_N0 fiftyfivenm_lcell_comb \inst13|inst|Selector17~2 ( // Equation(s): // \inst13|inst|Selector17~2_combout = (\inst13|inst|Selector17~1_combout & (((\inst13|inst|scl_req~q & !\inst13|inst|ack_error~q )) # (!\inst13|inst|state.slv_ack1~q ))) - .dataa(\inst13|inst|scl_req~q ), - .datab(\inst13|inst|state.slv_ack1~q ), + .dataa(\inst13|inst|state.slv_ack1~q ), + .datab(\inst13|inst|scl_req~q ), .datac(\inst13|inst|Selector17~1_combout ), .datad(\inst13|inst|ack_error~q ), .cin(gnd), .combout(\inst13|inst|Selector17~2_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector17~2 .lut_mask = 16'h30B0; +defparam \inst13|inst|Selector17~2 .lut_mask = 16'h50D0; defparam \inst13|inst|Selector17~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N28 +// Location: LCCOMB_X57_Y36_N26 fiftyfivenm_lcell_comb \inst13|inst|Selector17~3 ( // Equation(s): -// \inst13|inst|Selector17~3_combout = (\inst13|inst|Selector17~2_combout & ((\inst13|inst14|comm_en~q ) # ((\inst13|inst|scl_req~q ) # (\inst13|inst|state.ready~q )))) +// \inst13|inst|Selector17~3_combout = (\inst13|inst|Selector17~2_combout & ((\inst13|inst14|comm_en~q ) # ((\inst13|inst|state.ready~q ) # (\inst13|inst|scl_req~q )))) .dataa(\inst13|inst14|comm_en~q ), - .datab(\inst13|inst|scl_req~q ), - .datac(\inst13|inst|state.ready~q ), + .datab(\inst13|inst|state.ready~q ), + .datac(\inst13|inst|scl_req~q ), .datad(\inst13|inst|Selector17~2_combout ), .cin(gnd), .combout(\inst13|inst|Selector17~3_combout ), @@ -26204,58 +26625,24 @@ defparam \inst13|inst|Selector17~3 .lut_mask = 16'hFE00; defparam \inst13|inst|Selector17~3 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N18 -fiftyfivenm_lcell_comb \inst13|inst|scl_req~0 ( -// Equation(s): -// \inst13|inst|scl_req~0_combout = (!\inst13|inst14|rnw~q & (!\inst13|inst|ack_error~q & (\inst13|inst|scl_req~q & \inst13|inst|process_1~4_combout ))) - - .dataa(\inst13|inst14|rnw~q ), - .datab(\inst13|inst|ack_error~q ), - .datac(\inst13|inst|scl_req~q ), - .datad(\inst13|inst|process_1~4_combout ), - .cin(gnd), - .combout(\inst13|inst|scl_req~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|scl_req~0 .lut_mask = 16'h1000; -defparam \inst13|inst|scl_req~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X45_Y35_N20 -fiftyfivenm_lcell_comb \inst13|inst|Selector17~0 ( -// Equation(s): -// \inst13|inst|Selector17~0_combout = ((\inst13|inst|scl_req~q & (\inst13|inst14|rnw~q & \inst13|inst|process_1~4_combout ))) # (!\inst13|inst|state.mstr_ack~q ) - - .dataa(\inst13|inst|scl_req~q ), - .datab(\inst13|inst14|rnw~q ), - .datac(\inst13|inst|state.mstr_ack~q ), - .datad(\inst13|inst|process_1~4_combout ), - .cin(gnd), - .combout(\inst13|inst|Selector17~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst13|inst|Selector17~0 .lut_mask = 16'h8F0F; -defparam \inst13|inst|Selector17~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X45_Y35_N8 +// Location: LCCOMB_X57_Y36_N2 fiftyfivenm_lcell_comb \inst13|inst|Selector17~4 ( // Equation(s): -// \inst13|inst|Selector17~4_combout = (\inst13|inst|Selector17~3_combout & (\inst13|inst|Selector17~0_combout & ((\inst13|inst|scl_req~0_combout ) # (!\inst13|inst|state.slv_ack2~q )))) +// \inst13|inst|Selector17~4_combout = (\inst13|inst|Selector17~0_combout & (\inst13|inst|Selector17~3_combout & ((\inst13|inst|scl_req~0_combout ) # (!\inst13|inst|state.slv_ack2~q )))) - .dataa(\inst13|inst|Selector17~3_combout ), - .datab(\inst13|inst|scl_req~0_combout ), - .datac(\inst13|inst|Selector17~0_combout ), - .datad(\inst13|inst|state.slv_ack2~q ), + .dataa(\inst13|inst|state.slv_ack2~q ), + .datab(\inst13|inst|Selector17~0_combout ), + .datac(\inst13|inst|scl_req~0_combout ), + .datad(\inst13|inst|Selector17~3_combout ), .cin(gnd), .combout(\inst13|inst|Selector17~4_combout ), .cout()); // synopsys translate_off -defparam \inst13|inst|Selector17~4 .lut_mask = 16'h80A0; +defparam \inst13|inst|Selector17~4 .lut_mask = 16'hC400; defparam \inst13|inst|Selector17~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y35_N9 +// Location: FF_X57_Y36_N3 dffeas \inst13|inst|scl_req ( .clk(\inst13|inst|data_clk~clkctrl_outclk ), .d(\inst13|inst|Selector17~4_combout ), @@ -26274,7 +26661,7 @@ defparam \inst13|inst|scl_req .is_wysiwyg = "true"; defparam \inst13|inst|scl_req .power_up = "low"; // synopsys translate_on -// Location: FF_X45_Y35_N23 +// Location: FF_X56_Y36_N31 dffeas \inst13|inst|scl_ena ( .clk(!\inst13|inst|data_clk~clkctrl_outclk ), .d(gnd), @@ -26293,7 +26680,7 @@ defparam \inst13|inst|scl_ena .is_wysiwyg = "true"; defparam \inst13|inst|scl_ena .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X49_Y38_N28 +// Location: LCCOMB_X56_Y38_N10 fiftyfivenm_lcell_comb \inst13|inst|scl_clk~1 ( // Equation(s): // \inst13|inst|scl_clk~1_combout = !\inst13|inst|count~0_combout @@ -26310,7 +26697,7 @@ defparam \inst13|inst|scl_clk~1 .lut_mask = 16'h0F0F; defparam \inst13|inst|scl_clk~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X49_Y38_N29 +// Location: FF_X56_Y38_N11 dffeas \inst13|inst|scl_clk~en ( .clk(\inst5|clock_100kHz~clkctrl_outclk ), .d(\inst13|inst|scl_clk~1_combout ), @@ -26329,7 +26716,7 @@ defparam \inst13|inst|scl_clk~en .is_wysiwyg = "true"; defparam \inst13|inst|scl_clk~en .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y35_N22 +// Location: LCCOMB_X56_Y38_N16 fiftyfivenm_lcell_comb \inst13|inst|scl~1 ( // Equation(s): // \inst13|inst|scl~1_combout = (!\inst13|inst|scl_clk~en_q ) # (!\inst13|inst|scl_ena~q ) @@ -26346,64 +26733,28 @@ defparam \inst13|inst|scl~1 .lut_mask = 16'h0FFF; defparam \inst13|inst|scl~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N4 -fiftyfivenm_lcell_comb \inst5|count_10kHz[0]~9 ( +// Location: LCCOMB_X45_Y1_N0 +fiftyfivenm_lcell_comb \inst5|count_25kHz[0]~8 ( // Equation(s): -// \inst5|count_10kHz[0]~9_combout = \inst5|count_10kHz [0] $ (VCC) -// \inst5|count_10kHz[0]~10 = CARRY(\inst5|count_10kHz [0]) +// \inst5|count_25kHz[0]~8_combout = \inst5|count_25kHz [0] $ (VCC) +// \inst5|count_25kHz[0]~9 = CARRY(\inst5|count_25kHz [0]) .dataa(gnd), - .datab(\inst5|count_10kHz [0]), + .datab(\inst5|count_25kHz [0]), .datac(gnd), .datad(vcc), .cin(gnd), - .combout(\inst5|count_10kHz[0]~9_combout ), - .cout(\inst5|count_10kHz[0]~10 )); -// synopsys translate_off -defparam \inst5|count_10kHz[0]~9 .lut_mask = 16'h33CC; -defparam \inst5|count_10kHz[0]~9 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X44_Y1_N12 -fiftyfivenm_lcell_comb \inst5|count_10kHz[4]~17 ( -// Equation(s): -// \inst5|count_10kHz[4]~17_combout = (\inst5|count_10kHz [4] & (\inst5|count_10kHz[3]~16 $ (GND))) # (!\inst5|count_10kHz [4] & (!\inst5|count_10kHz[3]~16 & VCC)) -// \inst5|count_10kHz[4]~18 = CARRY((\inst5|count_10kHz [4] & !\inst5|count_10kHz[3]~16 )) - - .dataa(\inst5|count_10kHz [4]), - .datab(gnd), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10kHz[3]~16 ), - .combout(\inst5|count_10kHz[4]~17_combout ), - .cout(\inst5|count_10kHz[4]~18 )); -// synopsys translate_off -defparam \inst5|count_10kHz[4]~17 .lut_mask = 16'hA50A; -defparam \inst5|count_10kHz[4]~17 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: LCCOMB_X44_Y1_N14 -fiftyfivenm_lcell_comb \inst5|count_10kHz[5]~19 ( -// Equation(s): -// \inst5|count_10kHz[5]~19_combout = (\inst5|count_10kHz [5] & (!\inst5|count_10kHz[4]~18 )) # (!\inst5|count_10kHz [5] & ((\inst5|count_10kHz[4]~18 ) # (GND))) -// \inst5|count_10kHz[5]~20 = CARRY((!\inst5|count_10kHz[4]~18 ) # (!\inst5|count_10kHz [5])) - - .dataa(gnd), - .datab(\inst5|count_10kHz [5]), - .datac(gnd), - .datad(vcc), - .cin(\inst5|count_10kHz[4]~18 ), - .combout(\inst5|count_10kHz[5]~19_combout ), - .cout(\inst5|count_10kHz[5]~20 )); + .combout(\inst5|count_25kHz[0]~8_combout ), + .cout(\inst5|count_25kHz[0]~9 )); // synopsys translate_off -defparam \inst5|count_10kHz[5]~19 .lut_mask = 16'h3C3F; -defparam \inst5|count_10kHz[5]~19 .sum_lutc_input = "cin"; +defparam \inst5|count_25kHz[0]~8 .lut_mask = 16'h33CC; +defparam \inst5|count_25kHz[0]~8 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X44_Y1_N15 -dffeas \inst5|count_10kHz[5] ( +// Location: FF_X45_Y1_N1 +dffeas \inst5|count_25kHz[0] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[5]~19_combout ), + .d(\inst5|count_25kHz[0]~8_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26412,35 +26763,35 @@ dffeas \inst5|count_10kHz[5] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [5]), + .q(\inst5|count_25kHz [0]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[5] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[5] .power_up = "low"; +defparam \inst5|count_25kHz[0] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N16 -fiftyfivenm_lcell_comb \inst5|count_10kHz[6]~21 ( +// Location: LCCOMB_X45_Y1_N2 +fiftyfivenm_lcell_comb \inst5|count_25kHz[1]~10 ( // Equation(s): -// \inst5|count_10kHz[6]~21_combout = (\inst5|count_10kHz [6] & (\inst5|count_10kHz[5]~20 $ (GND))) # (!\inst5|count_10kHz [6] & (!\inst5|count_10kHz[5]~20 & VCC)) -// \inst5|count_10kHz[6]~22 = CARRY((\inst5|count_10kHz [6] & !\inst5|count_10kHz[5]~20 )) +// \inst5|count_25kHz[1]~10_combout = (\inst5|count_25kHz [1] & (!\inst5|count_25kHz[0]~9 )) # (!\inst5|count_25kHz [1] & ((\inst5|count_25kHz[0]~9 ) # (GND))) +// \inst5|count_25kHz[1]~11 = CARRY((!\inst5|count_25kHz[0]~9 ) # (!\inst5|count_25kHz [1])) .dataa(gnd), - .datab(\inst5|count_10kHz [6]), + .datab(\inst5|count_25kHz [1]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10kHz[5]~20 ), - .combout(\inst5|count_10kHz[6]~21_combout ), - .cout(\inst5|count_10kHz[6]~22 )); + .cin(\inst5|count_25kHz[0]~9 ), + .combout(\inst5|count_25kHz[1]~10_combout ), + .cout(\inst5|count_25kHz[1]~11 )); // synopsys translate_off -defparam \inst5|count_10kHz[6]~21 .lut_mask = 16'hC30C; -defparam \inst5|count_10kHz[6]~21 .sum_lutc_input = "cin"; +defparam \inst5|count_25kHz[1]~10 .lut_mask = 16'h3C3F; +defparam \inst5|count_25kHz[1]~10 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N17 -dffeas \inst5|count_10kHz[6] ( +// Location: FF_X45_Y1_N3 +dffeas \inst5|count_25kHz[1] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[6]~21_combout ), + .d(\inst5|count_25kHz[1]~10_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26449,71 +26800,35 @@ dffeas \inst5|count_10kHz[6] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [6]), + .q(\inst5|count_25kHz [1]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[6] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[6] .power_up = "low"; +defparam \inst5|count_25kHz[1] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N18 -fiftyfivenm_lcell_comb \inst5|count_10kHz[7]~23 ( +// Location: LCCOMB_X45_Y1_N4 +fiftyfivenm_lcell_comb \inst5|count_25kHz[2]~12 ( // Equation(s): -// \inst5|count_10kHz[7]~23_combout = (\inst5|count_10kHz [7] & (!\inst5|count_10kHz[6]~22 )) # (!\inst5|count_10kHz [7] & ((\inst5|count_10kHz[6]~22 ) # (GND))) -// \inst5|count_10kHz[7]~24 = CARRY((!\inst5|count_10kHz[6]~22 ) # (!\inst5|count_10kHz [7])) +// \inst5|count_25kHz[2]~12_combout = (\inst5|count_25kHz [2] & (\inst5|count_25kHz[1]~11 $ (GND))) # (!\inst5|count_25kHz [2] & (!\inst5|count_25kHz[1]~11 & VCC)) +// \inst5|count_25kHz[2]~13 = CARRY((\inst5|count_25kHz [2] & !\inst5|count_25kHz[1]~11 )) .dataa(gnd), - .datab(\inst5|count_10kHz [7]), + .datab(\inst5|count_25kHz [2]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10kHz[6]~22 ), - .combout(\inst5|count_10kHz[7]~23_combout ), - .cout(\inst5|count_10kHz[7]~24 )); -// synopsys translate_off -defparam \inst5|count_10kHz[7]~23 .lut_mask = 16'h3C3F; -defparam \inst5|count_10kHz[7]~23 .sum_lutc_input = "cin"; -// synopsys translate_on - -// Location: FF_X44_Y1_N19 -dffeas \inst5|count_10kHz[7] ( - .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[7]~23_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(\inst5|LessThan1~2_combout ), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\inst5|count_10kHz [7]), - .prn(vcc)); -// synopsys translate_off -defparam \inst5|count_10kHz[7] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[7] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X44_Y1_N20 -fiftyfivenm_lcell_comb \inst5|count_10kHz[8]~25 ( -// Equation(s): -// \inst5|count_10kHz[8]~25_combout = \inst5|count_10kHz[7]~24 $ (!\inst5|count_10kHz [8]) - - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst5|count_10kHz [8]), - .cin(\inst5|count_10kHz[7]~24 ), - .combout(\inst5|count_10kHz[8]~25_combout ), - .cout()); + .cin(\inst5|count_25kHz[1]~11 ), + .combout(\inst5|count_25kHz[2]~12_combout ), + .cout(\inst5|count_25kHz[2]~13 )); // synopsys translate_off -defparam \inst5|count_10kHz[8]~25 .lut_mask = 16'hF00F; -defparam \inst5|count_10kHz[8]~25 .sum_lutc_input = "cin"; +defparam \inst5|count_25kHz[2]~12 .lut_mask = 16'hC30C; +defparam \inst5|count_25kHz[2]~12 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N21 -dffeas \inst5|count_10kHz[8] ( +// Location: FF_X45_Y1_N5 +dffeas \inst5|count_25kHz[2] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[8]~25_combout ), + .d(\inst5|count_25kHz[2]~12_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26522,51 +26837,35 @@ dffeas \inst5|count_10kHz[8] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [8]), + .q(\inst5|count_25kHz [2]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[8] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[8] .power_up = "low"; +defparam \inst5|count_25kHz[2] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N2 -fiftyfivenm_lcell_comb \inst5|LessThan1~0 ( -// Equation(s): -// \inst5|LessThan1~0_combout = (!\inst5|count_10kHz [2] & (!\inst5|count_10kHz [3] & ((!\inst5|count_10kHz [0]) # (!\inst5|count_10kHz [1])))) - - .dataa(\inst5|count_10kHz [1]), - .datab(\inst5|count_10kHz [2]), - .datac(\inst5|count_10kHz [0]), - .datad(\inst5|count_10kHz [3]), - .cin(gnd), - .combout(\inst5|LessThan1~0_combout ), - .cout()); -// synopsys translate_off -defparam \inst5|LessThan1~0 .lut_mask = 16'h0013; -defparam \inst5|LessThan1~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X44_Y1_N24 -fiftyfivenm_lcell_comb \inst5|LessThan1~2 ( +// Location: LCCOMB_X45_Y1_N6 +fiftyfivenm_lcell_comb \inst5|count_25kHz[3]~14 ( // Equation(s): -// \inst5|LessThan1~2_combout = (\inst5|count_10kHz [8] & (!\inst5|LessThan1~1_combout & !\inst5|LessThan1~0_combout )) +// \inst5|count_25kHz[3]~14_combout = (\inst5|count_25kHz [3] & (!\inst5|count_25kHz[2]~13 )) # (!\inst5|count_25kHz [3] & ((\inst5|count_25kHz[2]~13 ) # (GND))) +// \inst5|count_25kHz[3]~15 = CARRY((!\inst5|count_25kHz[2]~13 ) # (!\inst5|count_25kHz [3])) - .dataa(gnd), - .datab(\inst5|count_10kHz [8]), - .datac(\inst5|LessThan1~1_combout ), - .datad(\inst5|LessThan1~0_combout ), - .cin(gnd), - .combout(\inst5|LessThan1~2_combout ), - .cout()); + .dataa(\inst5|count_25kHz [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst5|count_25kHz[2]~13 ), + .combout(\inst5|count_25kHz[3]~14_combout ), + .cout(\inst5|count_25kHz[3]~15 )); // synopsys translate_off -defparam \inst5|LessThan1~2 .lut_mask = 16'h000C; -defparam \inst5|LessThan1~2 .sum_lutc_input = "datac"; +defparam \inst5|count_25kHz[3]~14 .lut_mask = 16'h5A5F; +defparam \inst5|count_25kHz[3]~14 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N5 -dffeas \inst5|count_10kHz[0] ( +// Location: FF_X45_Y1_N7 +dffeas \inst5|count_25kHz[3] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[0]~9_combout ), + .d(\inst5|count_25kHz[3]~14_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26575,35 +26874,35 @@ dffeas \inst5|count_10kHz[0] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [0]), + .q(\inst5|count_25kHz [3]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[0] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[0] .power_up = "low"; +defparam \inst5|count_25kHz[3] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N6 -fiftyfivenm_lcell_comb \inst5|count_10kHz[1]~11 ( +// Location: LCCOMB_X45_Y1_N8 +fiftyfivenm_lcell_comb \inst5|count_25kHz[4]~16 ( // Equation(s): -// \inst5|count_10kHz[1]~11_combout = (\inst5|count_10kHz [1] & (!\inst5|count_10kHz[0]~10 )) # (!\inst5|count_10kHz [1] & ((\inst5|count_10kHz[0]~10 ) # (GND))) -// \inst5|count_10kHz[1]~12 = CARRY((!\inst5|count_10kHz[0]~10 ) # (!\inst5|count_10kHz [1])) +// \inst5|count_25kHz[4]~16_combout = (\inst5|count_25kHz [4] & (\inst5|count_25kHz[3]~15 $ (GND))) # (!\inst5|count_25kHz [4] & (!\inst5|count_25kHz[3]~15 & VCC)) +// \inst5|count_25kHz[4]~17 = CARRY((\inst5|count_25kHz [4] & !\inst5|count_25kHz[3]~15 )) - .dataa(\inst5|count_10kHz [1]), - .datab(gnd), + .dataa(gnd), + .datab(\inst5|count_25kHz [4]), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10kHz[0]~10 ), - .combout(\inst5|count_10kHz[1]~11_combout ), - .cout(\inst5|count_10kHz[1]~12 )); + .cin(\inst5|count_25kHz[3]~15 ), + .combout(\inst5|count_25kHz[4]~16_combout ), + .cout(\inst5|count_25kHz[4]~17 )); // synopsys translate_off -defparam \inst5|count_10kHz[1]~11 .lut_mask = 16'h5A5F; -defparam \inst5|count_10kHz[1]~11 .sum_lutc_input = "cin"; +defparam \inst5|count_25kHz[4]~16 .lut_mask = 16'hC30C; +defparam \inst5|count_25kHz[4]~16 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N7 -dffeas \inst5|count_10kHz[1] ( +// Location: FF_X45_Y1_N9 +dffeas \inst5|count_25kHz[4] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[1]~11_combout ), + .d(\inst5|count_25kHz[4]~16_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26612,35 +26911,35 @@ dffeas \inst5|count_10kHz[1] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [1]), + .q(\inst5|count_25kHz [4]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[1] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[1] .power_up = "low"; +defparam \inst5|count_25kHz[4] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N8 -fiftyfivenm_lcell_comb \inst5|count_10kHz[2]~13 ( +// Location: LCCOMB_X45_Y1_N10 +fiftyfivenm_lcell_comb \inst5|count_25kHz[5]~18 ( // Equation(s): -// \inst5|count_10kHz[2]~13_combout = (\inst5|count_10kHz [2] & (\inst5|count_10kHz[1]~12 $ (GND))) # (!\inst5|count_10kHz [2] & (!\inst5|count_10kHz[1]~12 & VCC)) -// \inst5|count_10kHz[2]~14 = CARRY((\inst5|count_10kHz [2] & !\inst5|count_10kHz[1]~12 )) +// \inst5|count_25kHz[5]~18_combout = (\inst5|count_25kHz [5] & (!\inst5|count_25kHz[4]~17 )) # (!\inst5|count_25kHz [5] & ((\inst5|count_25kHz[4]~17 ) # (GND))) +// \inst5|count_25kHz[5]~19 = CARRY((!\inst5|count_25kHz[4]~17 ) # (!\inst5|count_25kHz [5])) - .dataa(gnd), - .datab(\inst5|count_10kHz [2]), + .dataa(\inst5|count_25kHz [5]), + .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10kHz[1]~12 ), - .combout(\inst5|count_10kHz[2]~13_combout ), - .cout(\inst5|count_10kHz[2]~14 )); + .cin(\inst5|count_25kHz[4]~17 ), + .combout(\inst5|count_25kHz[5]~18_combout ), + .cout(\inst5|count_25kHz[5]~19 )); // synopsys translate_off -defparam \inst5|count_10kHz[2]~13 .lut_mask = 16'hC30C; -defparam \inst5|count_10kHz[2]~13 .sum_lutc_input = "cin"; +defparam \inst5|count_25kHz[5]~18 .lut_mask = 16'h5A5F; +defparam \inst5|count_25kHz[5]~18 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N9 -dffeas \inst5|count_10kHz[2] ( +// Location: FF_X45_Y1_N11 +dffeas \inst5|count_25kHz[5] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[2]~13_combout ), + .d(\inst5|count_25kHz[5]~18_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26649,35 +26948,35 @@ dffeas \inst5|count_10kHz[2] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [2]), + .q(\inst5|count_25kHz [5]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[2] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[2] .power_up = "low"; +defparam \inst5|count_25kHz[5] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N10 -fiftyfivenm_lcell_comb \inst5|count_10kHz[3]~15 ( +// Location: LCCOMB_X45_Y1_N12 +fiftyfivenm_lcell_comb \inst5|count_25kHz[6]~20 ( // Equation(s): -// \inst5|count_10kHz[3]~15_combout = (\inst5|count_10kHz [3] & (!\inst5|count_10kHz[2]~14 )) # (!\inst5|count_10kHz [3] & ((\inst5|count_10kHz[2]~14 ) # (GND))) -// \inst5|count_10kHz[3]~16 = CARRY((!\inst5|count_10kHz[2]~14 ) # (!\inst5|count_10kHz [3])) +// \inst5|count_25kHz[6]~20_combout = (\inst5|count_25kHz [6] & (\inst5|count_25kHz[5]~19 $ (GND))) # (!\inst5|count_25kHz [6] & (!\inst5|count_25kHz[5]~19 & VCC)) +// \inst5|count_25kHz[6]~21 = CARRY((\inst5|count_25kHz [6] & !\inst5|count_25kHz[5]~19 )) - .dataa(\inst5|count_10kHz [3]), + .dataa(\inst5|count_25kHz [6]), .datab(gnd), .datac(gnd), .datad(vcc), - .cin(\inst5|count_10kHz[2]~14 ), - .combout(\inst5|count_10kHz[3]~15_combout ), - .cout(\inst5|count_10kHz[3]~16 )); + .cin(\inst5|count_25kHz[5]~19 ), + .combout(\inst5|count_25kHz[6]~20_combout ), + .cout(\inst5|count_25kHz[6]~21 )); // synopsys translate_off -defparam \inst5|count_10kHz[3]~15 .lut_mask = 16'h5A5F; -defparam \inst5|count_10kHz[3]~15 .sum_lutc_input = "cin"; +defparam \inst5|count_25kHz[6]~20 .lut_mask = 16'hA50A; +defparam \inst5|count_25kHz[6]~20 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N11 -dffeas \inst5|count_10kHz[3] ( +// Location: FF_X45_Y1_N13 +dffeas \inst5|count_25kHz[6] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[3]~15_combout ), + .d(\inst5|count_25kHz[6]~20_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26686,17 +26985,34 @@ dffeas \inst5|count_10kHz[3] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [3]), + .q(\inst5|count_25kHz [6]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[3] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[3] .power_up = "low"; +defparam \inst5|count_25kHz[6] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y1_N14 +fiftyfivenm_lcell_comb \inst5|count_25kHz[7]~22 ( +// Equation(s): +// \inst5|count_25kHz[7]~22_combout = \inst5|count_25kHz [7] $ (\inst5|count_25kHz[6]~21 ) + + .dataa(gnd), + .datab(\inst5|count_25kHz [7]), + .datac(gnd), + .datad(gnd), + .cin(\inst5|count_25kHz[6]~21 ), + .combout(\inst5|count_25kHz[7]~22_combout ), + .cout()); +// synopsys translate_off +defparam \inst5|count_25kHz[7]~22 .lut_mask = 16'h3C3C; +defparam \inst5|count_25kHz[7]~22 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X44_Y1_N13 -dffeas \inst5|count_10kHz[4] ( +// Location: FF_X45_Y1_N15 +dffeas \inst5|count_25kHz[7] ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|count_10kHz[4]~17_combout ), + .d(\inst5|count_25kHz[7]~22_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26705,51 +27021,85 @@ dffeas \inst5|count_10kHz[4] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|count_10kHz [4]), + .q(\inst5|count_25kHz [7]), .prn(vcc)); // synopsys translate_off -defparam \inst5|count_10kHz[4] .is_wysiwyg = "true"; -defparam \inst5|count_10kHz[4] .power_up = "low"; +defparam \inst5|count_25kHz[7] .is_wysiwyg = "true"; +defparam \inst5|count_25kHz[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N22 +// Location: LCCOMB_X45_Y1_N26 fiftyfivenm_lcell_comb \inst5|LessThan1~1 ( // Equation(s): -// \inst5|LessThan1~1_combout = (((!\inst5|count_10kHz [6]) # (!\inst5|count_10kHz [5])) # (!\inst5|count_10kHz [7])) # (!\inst5|count_10kHz [4]) +// \inst5|LessThan1~1_combout = (!\inst5|count_25kHz [4] & !\inst5|count_25kHz [5]) - .dataa(\inst5|count_10kHz [4]), - .datab(\inst5|count_10kHz [7]), - .datac(\inst5|count_10kHz [5]), - .datad(\inst5|count_10kHz [6]), + .dataa(gnd), + .datab(gnd), + .datac(\inst5|count_25kHz [4]), + .datad(\inst5|count_25kHz [5]), .cin(gnd), .combout(\inst5|LessThan1~1_combout ), .cout()); // synopsys translate_off -defparam \inst5|LessThan1~1 .lut_mask = 16'h7FFF; +defparam \inst5|LessThan1~1 .lut_mask = 16'h000F; defparam \inst5|LessThan1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X44_Y1_N28 -fiftyfivenm_lcell_comb \inst5|clock_10kHz_int~0 ( +// Location: LCCOMB_X45_Y1_N18 +fiftyfivenm_lcell_comb \inst5|LessThan1~0 ( +// Equation(s): +// \inst5|LessThan1~0_combout = (!\inst5|count_25kHz [3] & (((!\inst5|count_25kHz [0]) # (!\inst5|count_25kHz [2])) # (!\inst5|count_25kHz [1]))) + + .dataa(\inst5|count_25kHz [3]), + .datab(\inst5|count_25kHz [1]), + .datac(\inst5|count_25kHz [2]), + .datad(\inst5|count_25kHz [0]), + .cin(gnd), + .combout(\inst5|LessThan1~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst5|LessThan1~0 .lut_mask = 16'h1555; +defparam \inst5|LessThan1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y1_N24 +fiftyfivenm_lcell_comb \inst5|LessThan1~2 ( // Equation(s): -// \inst5|clock_10kHz_int~0_combout = \inst5|clock_10kHz_int~q $ (((!\inst5|LessThan1~1_combout & (\inst5|count_10kHz [8] & !\inst5|LessThan1~0_combout )))) +// \inst5|LessThan1~2_combout = (\inst5|count_25kHz [6] & (\inst5|count_25kHz [7] & ((!\inst5|LessThan1~0_combout ) # (!\inst5|LessThan1~1_combout )))) - .dataa(\inst5|LessThan1~1_combout ), - .datab(\inst5|count_10kHz [8]), - .datac(\inst5|clock_10kHz_int~q ), + .dataa(\inst5|count_25kHz [6]), + .datab(\inst5|count_25kHz [7]), + .datac(\inst5|LessThan1~1_combout ), .datad(\inst5|LessThan1~0_combout ), .cin(gnd), - .combout(\inst5|clock_10kHz_int~0_combout ), + .combout(\inst5|LessThan1~2_combout ), + .cout()); +// synopsys translate_off +defparam \inst5|LessThan1~2 .lut_mask = 16'h0888; +defparam \inst5|LessThan1~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y1_N28 +fiftyfivenm_lcell_comb \inst5|clock_25kHz_int~0 ( +// Equation(s): +// \inst5|clock_25kHz_int~0_combout = \inst5|clock_25kHz_int~q $ (\inst5|LessThan1~2_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(\inst5|clock_25kHz_int~q ), + .datad(\inst5|LessThan1~2_combout ), + .cin(gnd), + .combout(\inst5|clock_25kHz_int~0_combout ), .cout()); // synopsys translate_off -defparam \inst5|clock_10kHz_int~0 .lut_mask = 16'hF0B4; -defparam \inst5|clock_10kHz_int~0 .sum_lutc_input = "datac"; +defparam \inst5|clock_25kHz_int~0 .lut_mask = 16'h0FF0; +defparam \inst5|clock_25kHz_int~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X44_Y1_N29 -dffeas \inst5|clock_10kHz_int ( +// Location: FF_X45_Y1_N29 +dffeas \inst5|clock_25kHz_int ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|clock_10kHz_int~0_combout ), + .d(\inst5|clock_25kHz_int~0_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26758,34 +27108,34 @@ dffeas \inst5|clock_10kHz_int ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|clock_10kHz_int~q ), + .q(\inst5|clock_25kHz_int~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|clock_10kHz_int .is_wysiwyg = "true"; -defparam \inst5|clock_10kHz_int .power_up = "low"; +defparam \inst5|clock_25kHz_int .is_wysiwyg = "true"; +defparam \inst5|clock_25kHz_int .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X45_Y1_N0 -fiftyfivenm_lcell_comb \inst5|clock_10kHz~feeder ( +// Location: LCCOMB_X45_Y1_N22 +fiftyfivenm_lcell_comb \inst5|clock_25kHz~feeder ( // Equation(s): -// \inst5|clock_10kHz~feeder_combout = \inst5|clock_10kHz_int~q +// \inst5|clock_25kHz~feeder_combout = \inst5|clock_25kHz_int~q .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst5|clock_10kHz_int~q ), + .datad(\inst5|clock_25kHz_int~q ), .cin(gnd), - .combout(\inst5|clock_10kHz~feeder_combout ), + .combout(\inst5|clock_25kHz~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst5|clock_10kHz~feeder .lut_mask = 16'hFF00; -defparam \inst5|clock_10kHz~feeder .sum_lutc_input = "datac"; +defparam \inst5|clock_25kHz~feeder .lut_mask = 16'hFF00; +defparam \inst5|clock_25kHz~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X45_Y1_N1 -dffeas \inst5|clock_10kHz ( +// Location: FF_X45_Y1_N23 +dffeas \inst5|clock_25kHz ( .clk(\inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl_outclk ), - .d(\inst5|clock_10kHz~feeder_combout ), + .d(\inst5|clock_25kHz~feeder_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26794,47 +27144,47 @@ dffeas \inst5|clock_10kHz ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst5|clock_10kHz~q ), + .q(\inst5|clock_25kHz~q ), .prn(vcc)); // synopsys translate_off -defparam \inst5|clock_10kHz .is_wysiwyg = "true"; -defparam \inst5|clock_10kHz .power_up = "low"; +defparam \inst5|clock_25kHz .is_wysiwyg = "true"; +defparam \inst5|clock_25kHz .power_up = "low"; // synopsys translate_on -// Location: CLKCTRL_G16 -fiftyfivenm_clkctrl \inst5|clock_10kHz~clkctrl ( +// Location: CLKCTRL_G19 +fiftyfivenm_clkctrl \inst5|clock_25kHz~clkctrl ( .ena(vcc), - .inclk({vcc,vcc,vcc,\inst5|clock_10kHz~q }), + .inclk({vcc,vcc,vcc,\inst5|clock_25kHz~q }), .clkselect(2'b00), .devclrn(devclrn), .devpor(devpor), - .outclk(\inst5|clock_10kHz~clkctrl_outclk )); + .outclk(\inst5|clock_25kHz~clkctrl_outclk )); // synopsys translate_off -defparam \inst5|clock_10kHz~clkctrl .clock_type = "global clock"; -defparam \inst5|clock_10kHz~clkctrl .ena_register_mode = "none"; +defparam \inst5|clock_25kHz~clkctrl .clock_type = "global clock"; +defparam \inst5|clock_25kHz~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N12 -fiftyfivenm_lcell_comb \inst14|COUNT[0]~12 ( +// Location: LCCOMB_X60_Y41_N30 +fiftyfivenm_lcell_comb \inst14|COUNT[0]~18 ( // Equation(s): -// \inst14|COUNT[0]~12_combout = !\inst14|COUNT [0] +// \inst14|COUNT[0]~18_combout = !\inst14|COUNT [0] .dataa(gnd), .datab(gnd), .datac(\inst14|COUNT [0]), .datad(gnd), .cin(gnd), - .combout(\inst14|COUNT[0]~12_combout ), + .combout(\inst14|COUNT[0]~18_combout ), .cout()); // synopsys translate_off -defparam \inst14|COUNT[0]~12 .lut_mask = 16'h0F0F; -defparam \inst14|COUNT[0]~12 .sum_lutc_input = "datac"; +defparam \inst14|COUNT[0]~18 .lut_mask = 16'h0F0F; +defparam \inst14|COUNT[0]~18 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N13 +// Location: FF_X60_Y41_N31 dffeas \inst14|COUNT[0] ( - .clk(\inst5|clock_10kHz~clkctrl_outclk ), - .d(\inst14|COUNT[0]~12_combout ), + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[0]~18_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26850,28 +27200,28 @@ defparam \inst14|COUNT[0] .is_wysiwyg = "true"; defparam \inst14|COUNT[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N18 -fiftyfivenm_lcell_comb \inst14|COUNT[1]~4 ( +// Location: LCCOMB_X60_Y41_N14 +fiftyfivenm_lcell_comb \inst14|COUNT[1]~6 ( // Equation(s): -// \inst14|COUNT[1]~4_combout = (\inst14|COUNT [0] & (\inst14|COUNT [1] $ (VCC))) # (!\inst14|COUNT [0] & (\inst14|COUNT [1] & VCC)) -// \inst14|COUNT[1]~5 = CARRY((\inst14|COUNT [0] & \inst14|COUNT [1])) +// \inst14|COUNT[1]~6_combout = (\inst14|COUNT [0] & (\inst14|COUNT [1] $ (VCC))) # (!\inst14|COUNT [0] & (\inst14|COUNT [1] & VCC)) +// \inst14|COUNT[1]~7 = CARRY((\inst14|COUNT [0] & \inst14|COUNT [1])) .dataa(\inst14|COUNT [0]), .datab(\inst14|COUNT [1]), .datac(gnd), .datad(vcc), .cin(gnd), - .combout(\inst14|COUNT[1]~4_combout ), - .cout(\inst14|COUNT[1]~5 )); + .combout(\inst14|COUNT[1]~6_combout ), + .cout(\inst14|COUNT[1]~7 )); // synopsys translate_off -defparam \inst14|COUNT[1]~4 .lut_mask = 16'h6688; -defparam \inst14|COUNT[1]~4 .sum_lutc_input = "datac"; +defparam \inst14|COUNT[1]~6 .lut_mask = 16'h6688; +defparam \inst14|COUNT[1]~6 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N19 +// Location: FF_X60_Y41_N15 dffeas \inst14|COUNT[1] ( - .clk(\inst5|clock_10kHz~clkctrl_outclk ), - .d(\inst14|COUNT[1]~4_combout ), + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[1]~6_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26887,28 +27237,28 @@ defparam \inst14|COUNT[1] .is_wysiwyg = "true"; defparam \inst14|COUNT[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N20 -fiftyfivenm_lcell_comb \inst14|COUNT[2]~6 ( +// Location: LCCOMB_X60_Y41_N16 +fiftyfivenm_lcell_comb \inst14|COUNT[2]~8 ( // Equation(s): -// \inst14|COUNT[2]~6_combout = (\inst14|COUNT [2] & (!\inst14|COUNT[1]~5 )) # (!\inst14|COUNT [2] & ((\inst14|COUNT[1]~5 ) # (GND))) -// \inst14|COUNT[2]~7 = CARRY((!\inst14|COUNT[1]~5 ) # (!\inst14|COUNT [2])) +// \inst14|COUNT[2]~8_combout = (\inst14|COUNT [2] & (!\inst14|COUNT[1]~7 )) # (!\inst14|COUNT [2] & ((\inst14|COUNT[1]~7 ) # (GND))) +// \inst14|COUNT[2]~9 = CARRY((!\inst14|COUNT[1]~7 ) # (!\inst14|COUNT [2])) .dataa(gnd), .datab(\inst14|COUNT [2]), .datac(gnd), .datad(vcc), - .cin(\inst14|COUNT[1]~5 ), - .combout(\inst14|COUNT[2]~6_combout ), - .cout(\inst14|COUNT[2]~7 )); + .cin(\inst14|COUNT[1]~7 ), + .combout(\inst14|COUNT[2]~8_combout ), + .cout(\inst14|COUNT[2]~9 )); // synopsys translate_off -defparam \inst14|COUNT[2]~6 .lut_mask = 16'h3C3F; -defparam \inst14|COUNT[2]~6 .sum_lutc_input = "cin"; +defparam \inst14|COUNT[2]~8 .lut_mask = 16'h3C3F; +defparam \inst14|COUNT[2]~8 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X51_Y45_N21 +// Location: FF_X60_Y41_N17 dffeas \inst14|COUNT[2] ( - .clk(\inst5|clock_10kHz~clkctrl_outclk ), - .d(\inst14|COUNT[2]~6_combout ), + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[2]~8_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26924,28 +27274,28 @@ defparam \inst14|COUNT[2] .is_wysiwyg = "true"; defparam \inst14|COUNT[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N22 -fiftyfivenm_lcell_comb \inst14|COUNT[3]~8 ( +// Location: LCCOMB_X60_Y41_N18 +fiftyfivenm_lcell_comb \inst14|COUNT[3]~10 ( // Equation(s): -// \inst14|COUNT[3]~8_combout = (\inst14|COUNT [3] & (\inst14|COUNT[2]~7 $ (GND))) # (!\inst14|COUNT [3] & (!\inst14|COUNT[2]~7 & VCC)) -// \inst14|COUNT[3]~9 = CARRY((\inst14|COUNT [3] & !\inst14|COUNT[2]~7 )) +// \inst14|COUNT[3]~10_combout = (\inst14|COUNT [3] & (\inst14|COUNT[2]~9 $ (GND))) # (!\inst14|COUNT [3] & (!\inst14|COUNT[2]~9 & VCC)) +// \inst14|COUNT[3]~11 = CARRY((\inst14|COUNT [3] & !\inst14|COUNT[2]~9 )) - .dataa(\inst14|COUNT [3]), - .datab(gnd), + .dataa(gnd), + .datab(\inst14|COUNT [3]), .datac(gnd), .datad(vcc), - .cin(\inst14|COUNT[2]~7 ), - .combout(\inst14|COUNT[3]~8_combout ), - .cout(\inst14|COUNT[3]~9 )); + .cin(\inst14|COUNT[2]~9 ), + .combout(\inst14|COUNT[3]~10_combout ), + .cout(\inst14|COUNT[3]~11 )); // synopsys translate_off -defparam \inst14|COUNT[3]~8 .lut_mask = 16'hA50A; -defparam \inst14|COUNT[3]~8 .sum_lutc_input = "cin"; +defparam \inst14|COUNT[3]~10 .lut_mask = 16'hC30C; +defparam \inst14|COUNT[3]~10 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X51_Y45_N23 +// Location: FF_X60_Y41_N19 dffeas \inst14|COUNT[3] ( - .clk(\inst5|clock_10kHz~clkctrl_outclk ), - .d(\inst14|COUNT[3]~8_combout ), + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[3]~10_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26961,27 +27311,45 @@ defparam \inst14|COUNT[3] .is_wysiwyg = "true"; defparam \inst14|COUNT[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N24 -fiftyfivenm_lcell_comb \inst14|COUNT[4]~10 ( +// Location: LCCOMB_X60_Y41_N12 +fiftyfivenm_lcell_comb \inst14|Equal1~0 ( +// Equation(s): +// \inst14|Equal1~0_combout = (\inst14|COUNT [1] & (\inst14|COUNT [0] & (\inst14|COUNT [3] & \inst14|COUNT [2]))) + + .dataa(\inst14|COUNT [1]), + .datab(\inst14|COUNT [0]), + .datac(\inst14|COUNT [3]), + .datad(\inst14|COUNT [2]), + .cin(gnd), + .combout(\inst14|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \inst14|Equal1~0 .lut_mask = 16'h8000; +defparam \inst14|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y41_N20 +fiftyfivenm_lcell_comb \inst14|COUNT[4]~12 ( // Equation(s): -// \inst14|COUNT[4]~10_combout = \inst14|COUNT[3]~9 $ (\inst14|COUNT [4]) +// \inst14|COUNT[4]~12_combout = (\inst14|COUNT [4] & (!\inst14|COUNT[3]~11 )) # (!\inst14|COUNT [4] & ((\inst14|COUNT[3]~11 ) # (GND))) +// \inst14|COUNT[4]~13 = CARRY((!\inst14|COUNT[3]~11 ) # (!\inst14|COUNT [4])) .dataa(gnd), - .datab(gnd), + .datab(\inst14|COUNT [4]), .datac(gnd), - .datad(\inst14|COUNT [4]), - .cin(\inst14|COUNT[3]~9 ), - .combout(\inst14|COUNT[4]~10_combout ), - .cout()); + .datad(vcc), + .cin(\inst14|COUNT[3]~11 ), + .combout(\inst14|COUNT[4]~12_combout ), + .cout(\inst14|COUNT[4]~13 )); // synopsys translate_off -defparam \inst14|COUNT[4]~10 .lut_mask = 16'h0FF0; -defparam \inst14|COUNT[4]~10 .sum_lutc_input = "cin"; +defparam \inst14|COUNT[4]~12 .lut_mask = 16'h3C3F; +defparam \inst14|COUNT[4]~12 .sum_lutc_input = "cin"; // synopsys translate_on -// Location: FF_X51_Y45_N25 +// Location: FF_X60_Y41_N21 dffeas \inst14|COUNT[4] ( - .clk(\inst5|clock_10kHz~clkctrl_outclk ), - .d(\inst14|COUNT[4]~10_combout ), + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[4]~12_combout ), .asdata(vcc), .clrn(vcc), .aload(gnd), @@ -26997,48 +27365,121 @@ defparam \inst14|COUNT[4] .is_wysiwyg = "true"; defparam \inst14|COUNT[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N30 -fiftyfivenm_lcell_comb \inst14|PWM_OUT~0 ( +// Location: LCCOMB_X60_Y41_N22 +fiftyfivenm_lcell_comb \inst14|COUNT[5]~14 ( // Equation(s): -// \inst14|PWM_OUT~0_combout = (\inst14|COUNT [0] & (\inst14|COUNT [4] & (\inst14|COUNT [2] & \inst14|COUNT [1]))) +// \inst14|COUNT[5]~14_combout = (\inst14|COUNT [5] & (\inst14|COUNT[4]~13 $ (GND))) # (!\inst14|COUNT [5] & (!\inst14|COUNT[4]~13 & VCC)) +// \inst14|COUNT[5]~15 = CARRY((\inst14|COUNT [5] & !\inst14|COUNT[4]~13 )) - .dataa(\inst14|COUNT [0]), - .datab(\inst14|COUNT [4]), - .datac(\inst14|COUNT [2]), - .datad(\inst14|COUNT [1]), + .dataa(\inst14|COUNT [5]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\inst14|COUNT[4]~13 ), + .combout(\inst14|COUNT[5]~14_combout ), + .cout(\inst14|COUNT[5]~15 )); +// synopsys translate_off +defparam \inst14|COUNT[5]~14 .lut_mask = 16'hA50A; +defparam \inst14|COUNT[5]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X60_Y41_N23 +dffeas \inst14|COUNT[5] ( + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[5]~14_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst14|COUNT [5]), + .prn(vcc)); +// synopsys translate_off +defparam \inst14|COUNT[5] .is_wysiwyg = "true"; +defparam \inst14|COUNT[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y41_N24 +fiftyfivenm_lcell_comb \inst14|COUNT[6]~16 ( +// Equation(s): +// \inst14|COUNT[6]~16_combout = \inst14|COUNT[5]~15 $ (\inst14|COUNT [6]) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst14|COUNT [6]), + .cin(\inst14|COUNT[5]~15 ), + .combout(\inst14|COUNT[6]~16_combout ), + .cout()); +// synopsys translate_off +defparam \inst14|COUNT[6]~16 .lut_mask = 16'h0FF0; +defparam \inst14|COUNT[6]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X60_Y41_N25 +dffeas \inst14|COUNT[6] ( + .clk(\inst5|clock_25kHz~clkctrl_outclk ), + .d(\inst14|COUNT[6]~16_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst14|COUNT [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst14|COUNT[6] .is_wysiwyg = "true"; +defparam \inst14|COUNT[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y41_N26 +fiftyfivenm_lcell_comb \inst14|Equal1~1 ( +// Equation(s): +// \inst14|Equal1~1_combout = (\inst14|COUNT [4] & (\inst14|COUNT [6] & \inst14|COUNT [5])) + + .dataa(\inst14|COUNT [4]), + .datab(\inst14|COUNT [6]), + .datac(gnd), + .datad(\inst14|COUNT [5]), .cin(gnd), - .combout(\inst14|PWM_OUT~0_combout ), + .combout(\inst14|Equal1~1_combout ), .cout()); // synopsys translate_off -defparam \inst14|PWM_OUT~0 .lut_mask = 16'h8000; -defparam \inst14|PWM_OUT~0 .sum_lutc_input = "datac"; +defparam \inst14|Equal1~1 .lut_mask = 16'h8800; +defparam \inst14|Equal1~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N24 +// Location: LCCOMB_X57_Y38_N14 fiftyfivenm_lcell_comb \inst3|PWM_EN~1 ( // Equation(s): -// \inst3|PWM_EN~1_combout = (\inst|IR [0] & (!\inst|IR [7] & (!\inst|IR [1] & !\inst|IR [4]))) +// \inst3|PWM_EN~1_combout = (!\inst|IR [1] & (!\inst|IR [7] & (!\inst|IR [4] & \inst|IR [0]))) - .dataa(\inst|IR [0]), + .dataa(\inst|IR [1]), .datab(\inst|IR [7]), - .datac(\inst|IR [1]), - .datad(\inst|IR [4]), + .datac(\inst|IR [4]), + .datad(\inst|IR [0]), .cin(gnd), .combout(\inst3|PWM_EN~1_combout ), .cout()); // synopsys translate_off -defparam \inst3|PWM_EN~1 .lut_mask = 16'h0002; +defparam \inst3|PWM_EN~1 .lut_mask = 16'h0100; defparam \inst3|PWM_EN~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N6 +// Location: LCCOMB_X58_Y38_N6 fiftyfivenm_lcell_comb \inst3|PWM_EN~2 ( // Equation(s): -// \inst3|PWM_EN~2_combout = (!\inst|IR [2] & (\inst3|SWITCH_EN~0_combout & (\inst|IR [5] & !\inst|IR [3]))) +// \inst3|PWM_EN~2_combout = (!\inst|IR [2] & (\inst|IR [5] & (\inst3|SWITCH_EN~0_combout & !\inst|IR [3]))) .dataa(\inst|IR [2]), - .datab(\inst3|SWITCH_EN~0_combout ), - .datac(\inst|IR [5]), + .datab(\inst|IR [5]), + .datac(\inst3|SWITCH_EN~0_combout ), .datad(\inst|IR [3]), .cin(gnd), .combout(\inst3|PWM_EN~2_combout ), @@ -27048,24 +27489,24 @@ defparam \inst3|PWM_EN~2 .lut_mask = 16'h0040; defparam \inst3|PWM_EN~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N12 +// Location: LCCOMB_X58_Y38_N4 fiftyfivenm_lcell_comb \inst3|PWM_EN ( // Equation(s): -// \inst3|PWM_EN~combout = LCELL((\inst3|PWM_EN~1_combout & (\inst3|PWM_EN~2_combout & !\inst|IR [6]))) +// \inst3|PWM_EN~combout = LCELL((\inst3|PWM_EN~1_combout & (!\inst|IR [6] & \inst3|PWM_EN~2_combout ))) .dataa(\inst3|PWM_EN~1_combout ), - .datab(\inst3|PWM_EN~2_combout ), - .datac(gnd), - .datad(\inst|IR [6]), + .datab(gnd), + .datac(\inst|IR [6]), + .datad(\inst3|PWM_EN~2_combout ), .cin(gnd), .combout(\inst3|PWM_EN~combout ), .cout()); // synopsys translate_off -defparam \inst3|PWM_EN .lut_mask = 16'h0088; +defparam \inst3|PWM_EN .lut_mask = 16'h0A00; defparam \inst3|PWM_EN .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G13 +// Location: CLKCTRL_G5 fiftyfivenm_clkctrl \inst3|PWM_EN~clkctrl ( .ena(vcc), .inclk({vcc,vcc,vcc,\inst3|PWM_EN~combout }), @@ -27078,32 +27519,51 @@ defparam \inst3|PWM_EN~clkctrl .clock_type = "global clock"; defparam \inst3|PWM_EN~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N6 -fiftyfivenm_lcell_comb \inst14|COMPARE[3]~feeder ( +// Location: FF_X60_Y41_N7 +dffeas \inst14|COMPARE[6] ( + .clk(\inst3|PWM_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst1[6]~53_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst14|COMPARE [6]), + .prn(vcc)); +// synopsys translate_off +defparam \inst14|COMPARE[6] .is_wysiwyg = "true"; +defparam \inst14|COMPARE[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y41_N6 +fiftyfivenm_lcell_comb \inst14|Equal0~0 ( // Equation(s): -// \inst14|COMPARE[3]~feeder_combout = \inst13|inst1[3]~34_combout +// \inst14|Equal0~0_combout = \inst14|COMPARE [6] $ (\inst14|COUNT [6]) .dataa(gnd), - .datab(\inst13|inst1[3]~34_combout ), - .datac(gnd), - .datad(gnd), + .datab(gnd), + .datac(\inst14|COMPARE [6]), + .datad(\inst14|COUNT [6]), .cin(gnd), - .combout(\inst14|COMPARE[3]~feeder_combout ), + .combout(\inst14|Equal0~0_combout ), .cout()); // synopsys translate_off -defparam \inst14|COMPARE[3]~feeder .lut_mask = 16'hCCCC; -defparam \inst14|COMPARE[3]~feeder .sum_lutc_input = "datac"; +defparam \inst14|Equal0~0 .lut_mask = 16'h0FF0; +defparam \inst14|Equal0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N7 +// Location: FF_X60_Y41_N9 dffeas \inst14|COMPARE[3] ( .clk(\inst3|PWM_EN~clkctrl_outclk ), - .d(\inst14|COMPARE[3]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[3]~38_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -27114,44 +27574,27 @@ defparam \inst14|COMPARE[3] .is_wysiwyg = "true"; defparam \inst14|COMPARE[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N28 -fiftyfivenm_lcell_comb \inst14|PWM_OUT~1 ( -// Equation(s): -// \inst14|PWM_OUT~1_combout = (\inst14|COUNT [3] & ((\inst14|PWM_OUT~0_combout ) # ((\inst14|PWM_OUT~q & !\inst14|COMPARE [3])))) # (!\inst14|COUNT [3] & (\inst14|PWM_OUT~q & ((\inst14|COMPARE [3])))) - - .dataa(\inst14|PWM_OUT~q ), - .datab(\inst14|COUNT [3]), - .datac(\inst14|PWM_OUT~0_combout ), - .datad(\inst14|COMPARE [3]), - .cin(gnd), - .combout(\inst14|PWM_OUT~1_combout ), - .cout()); -// synopsys translate_off -defparam \inst14|PWM_OUT~1 .lut_mask = 16'hE2C8; -defparam \inst14|PWM_OUT~1 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X51_Y45_N26 -fiftyfivenm_lcell_comb \inst14|COMPARE[1]~feeder ( +// Location: LCCOMB_X60_Y41_N2 +fiftyfivenm_lcell_comb \inst14|COMPARE[2]~feeder ( // Equation(s): -// \inst14|COMPARE[1]~feeder_combout = \inst13|inst1[1]~24_combout +// \inst14|COMPARE[2]~feeder_combout = \inst13|inst1[2]~34_combout - .dataa(gnd), + .dataa(\inst13|inst1[2]~34_combout ), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[1]~24_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst14|COMPARE[1]~feeder_combout ), + .combout(\inst14|COMPARE[2]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst14|COMPARE[1]~feeder .lut_mask = 16'hFF00; -defparam \inst14|COMPARE[1]~feeder .sum_lutc_input = "datac"; +defparam \inst14|COMPARE[2]~feeder .lut_mask = 16'hAAAA; +defparam \inst14|COMPARE[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N27 -dffeas \inst14|COMPARE[1] ( +// Location: FF_X60_Y41_N3 +dffeas \inst14|COMPARE[2] ( .clk(\inst3|PWM_EN~clkctrl_outclk ), - .d(\inst14|COMPARE[1]~feeder_combout ), + .d(\inst14|COMPARE[2]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -27160,39 +27603,39 @@ dffeas \inst14|COMPARE[1] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst14|COMPARE [1]), + .q(\inst14|COMPARE [2]), .prn(vcc)); // synopsys translate_off -defparam \inst14|COMPARE[1] .is_wysiwyg = "true"; -defparam \inst14|COMPARE[1] .power_up = "low"; +defparam \inst14|COMPARE[2] .is_wysiwyg = "true"; +defparam \inst14|COMPARE[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N0 -fiftyfivenm_lcell_comb \inst14|COMPARE[0]~feeder ( +// Location: LCCOMB_X60_Y41_N8 +fiftyfivenm_lcell_comb \inst14|PWM_OUT~1 ( // Equation(s): -// \inst14|COMPARE[0]~feeder_combout = \inst13|inst1[0]~19_combout +// \inst14|PWM_OUT~1_combout = (\inst14|COUNT [3] & ((\inst14|COUNT [2] $ (\inst14|COMPARE [2])) # (!\inst14|COMPARE [3]))) # (!\inst14|COUNT [3] & ((\inst14|COMPARE [3]) # (\inst14|COUNT [2] $ (\inst14|COMPARE [2])))) - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst1[0]~19_combout ), - .datad(gnd), + .dataa(\inst14|COUNT [3]), + .datab(\inst14|COUNT [2]), + .datac(\inst14|COMPARE [3]), + .datad(\inst14|COMPARE [2]), .cin(gnd), - .combout(\inst14|COMPARE[0]~feeder_combout ), + .combout(\inst14|PWM_OUT~1_combout ), .cout()); // synopsys translate_off -defparam \inst14|COMPARE[0]~feeder .lut_mask = 16'hF0F0; -defparam \inst14|COMPARE[0]~feeder .sum_lutc_input = "datac"; +defparam \inst14|PWM_OUT~1 .lut_mask = 16'h7BDE; +defparam \inst14|PWM_OUT~1 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N1 +// Location: FF_X60_Y41_N27 dffeas \inst14|COMPARE[0] ( .clk(\inst3|PWM_EN~clkctrl_outclk ), - .d(\inst14|COMPARE[0]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[0]~25_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -27203,77 +27646,79 @@ defparam \inst14|COMPARE[0] .is_wysiwyg = "true"; defparam \inst14|COMPARE[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N16 -fiftyfivenm_lcell_comb \inst14|PWM_OUT~3 ( -// Equation(s): -// \inst14|PWM_OUT~3_combout = (\inst14|COUNT [1] & ((\inst14|COUNT [0] $ (\inst14|COMPARE [0])) # (!\inst14|COMPARE [1]))) # (!\inst14|COUNT [1] & ((\inst14|COMPARE [1]) # (\inst14|COUNT [0] $ (\inst14|COMPARE [0])))) - - .dataa(\inst14|COUNT [1]), - .datab(\inst14|COUNT [0]), - .datac(\inst14|COMPARE [1]), - .datad(\inst14|COMPARE [0]), - .cin(gnd), - .combout(\inst14|PWM_OUT~3_combout ), - .cout()); +// Location: FF_X60_Y41_N5 +dffeas \inst14|COMPARE[1] ( + .clk(\inst3|PWM_EN~clkctrl_outclk ), + .d(gnd), + .asdata(\inst13|inst1[1]~30_combout ), + .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\inst14|COMPARE [1]), + .prn(vcc)); // synopsys translate_off -defparam \inst14|PWM_OUT~3 .lut_mask = 16'h7BDE; -defparam \inst14|PWM_OUT~3 .sum_lutc_input = "datac"; +defparam \inst14|COMPARE[1] .is_wysiwyg = "true"; +defparam \inst14|COMPARE[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N4 -fiftyfivenm_lcell_comb \inst14|COMPARE[2]~feeder ( +// Location: LCCOMB_X60_Y41_N4 +fiftyfivenm_lcell_comb \inst14|PWM_OUT~0 ( // Equation(s): -// \inst14|COMPARE[2]~feeder_combout = \inst13|inst1[2]~29_combout +// \inst14|PWM_OUT~0_combout = (\inst14|COMPARE [0] & ((\inst14|COUNT [1] $ (\inst14|COMPARE [1])) # (!\inst14|COUNT [0]))) # (!\inst14|COMPARE [0] & ((\inst14|COUNT [0]) # (\inst14|COUNT [1] $ (\inst14|COMPARE [1])))) - .dataa(gnd), - .datab(\inst13|inst1[2]~29_combout ), - .datac(gnd), - .datad(gnd), + .dataa(\inst14|COMPARE [0]), + .datab(\inst14|COUNT [1]), + .datac(\inst14|COMPARE [1]), + .datad(\inst14|COUNT [0]), .cin(gnd), - .combout(\inst14|COMPARE[2]~feeder_combout ), + .combout(\inst14|PWM_OUT~0_combout ), .cout()); // synopsys translate_off -defparam \inst14|COMPARE[2]~feeder .lut_mask = 16'hCCCC; -defparam \inst14|COMPARE[2]~feeder .sum_lutc_input = "datac"; +defparam \inst14|PWM_OUT~0 .lut_mask = 16'h7DBE; +defparam \inst14|PWM_OUT~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N5 -dffeas \inst14|COMPARE[2] ( +// Location: FF_X60_Y41_N29 +dffeas \inst14|COMPARE[5] ( .clk(\inst3|PWM_EN~clkctrl_outclk ), - .d(\inst14|COMPARE[2]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[5]~48_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst14|COMPARE [2]), + .q(\inst14|COMPARE [5]), .prn(vcc)); // synopsys translate_off -defparam \inst14|COMPARE[2] .is_wysiwyg = "true"; -defparam \inst14|COMPARE[2] .power_up = "low"; +defparam \inst14|COMPARE[5] .is_wysiwyg = "true"; +defparam \inst14|COMPARE[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N2 +// Location: LCCOMB_X59_Y41_N24 fiftyfivenm_lcell_comb \inst14|COMPARE[4]~feeder ( // Equation(s): -// \inst14|COMPARE[4]~feeder_combout = \inst13|inst1[4]~39_combout +// \inst14|COMPARE[4]~feeder_combout = \inst13|inst1[4]~43_combout - .dataa(gnd), + .dataa(\inst13|inst1[4]~43_combout ), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[4]~39_combout ), + .datad(gnd), .cin(gnd), .combout(\inst14|COMPARE[4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst14|COMPARE[4]~feeder .lut_mask = 16'hFF00; +defparam \inst14|COMPARE[4]~feeder .lut_mask = 16'hAAAA; defparam \inst14|COMPARE[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N3 +// Location: FF_X59_Y41_N25 dffeas \inst14|COMPARE[4] ( .clk(\inst3|PWM_EN~clkctrl_outclk ), .d(\inst14|COMPARE[4]~feeder_combout ), @@ -27292,14 +27737,14 @@ defparam \inst14|COMPARE[4] .is_wysiwyg = "true"; defparam \inst14|COMPARE[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N10 +// Location: LCCOMB_X60_Y41_N28 fiftyfivenm_lcell_comb \inst14|PWM_OUT~2 ( // Equation(s): -// \inst14|PWM_OUT~2_combout = (\inst14|COUNT [2] & ((\inst14|COUNT [4] $ (\inst14|COMPARE [4])) # (!\inst14|COMPARE [2]))) # (!\inst14|COUNT [2] & ((\inst14|COMPARE [2]) # (\inst14|COUNT [4] $ (\inst14|COMPARE [4])))) +// \inst14|PWM_OUT~2_combout = (\inst14|COUNT [5] & ((\inst14|COUNT [4] $ (\inst14|COMPARE [4])) # (!\inst14|COMPARE [5]))) # (!\inst14|COUNT [5] & ((\inst14|COMPARE [5]) # (\inst14|COUNT [4] $ (\inst14|COMPARE [4])))) - .dataa(\inst14|COUNT [2]), + .dataa(\inst14|COUNT [5]), .datab(\inst14|COUNT [4]), - .datac(\inst14|COMPARE [2]), + .datac(\inst14|COMPARE [5]), .datad(\inst14|COMPARE [4]), .cin(gnd), .combout(\inst14|PWM_OUT~2_combout ), @@ -27309,26 +27754,43 @@ defparam \inst14|PWM_OUT~2 .lut_mask = 16'h7BDE; defparam \inst14|PWM_OUT~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y45_N8 +// Location: LCCOMB_X60_Y41_N10 +fiftyfivenm_lcell_comb \inst14|PWM_OUT~3 ( +// Equation(s): +// \inst14|PWM_OUT~3_combout = (\inst14|Equal0~0_combout ) # ((\inst14|PWM_OUT~1_combout ) # ((\inst14|PWM_OUT~0_combout ) # (\inst14|PWM_OUT~2_combout ))) + + .dataa(\inst14|Equal0~0_combout ), + .datab(\inst14|PWM_OUT~1_combout ), + .datac(\inst14|PWM_OUT~0_combout ), + .datad(\inst14|PWM_OUT~2_combout ), + .cin(gnd), + .combout(\inst14|PWM_OUT~3_combout ), + .cout()); +// synopsys translate_off +defparam \inst14|PWM_OUT~3 .lut_mask = 16'hFFFE; +defparam \inst14|PWM_OUT~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X60_Y41_N0 fiftyfivenm_lcell_comb \inst14|PWM_OUT~4 ( // Equation(s): -// \inst14|PWM_OUT~4_combout = (\inst14|PWM_OUT~1_combout ) # ((\inst14|PWM_OUT~q & ((\inst14|PWM_OUT~3_combout ) # (\inst14|PWM_OUT~2_combout )))) +// \inst14|PWM_OUT~4_combout = (\inst14|Equal1~0_combout & ((\inst14|Equal1~1_combout ) # ((\inst14|PWM_OUT~q & \inst14|PWM_OUT~3_combout )))) # (!\inst14|Equal1~0_combout & (((\inst14|PWM_OUT~q & \inst14|PWM_OUT~3_combout )))) - .dataa(\inst14|PWM_OUT~1_combout ), - .datab(\inst14|PWM_OUT~3_combout ), + .dataa(\inst14|Equal1~0_combout ), + .datab(\inst14|Equal1~1_combout ), .datac(\inst14|PWM_OUT~q ), - .datad(\inst14|PWM_OUT~2_combout ), + .datad(\inst14|PWM_OUT~3_combout ), .cin(gnd), .combout(\inst14|PWM_OUT~4_combout ), .cout()); // synopsys translate_off -defparam \inst14|PWM_OUT~4 .lut_mask = 16'hFAEA; +defparam \inst14|PWM_OUT~4 .lut_mask = 16'hF888; defparam \inst14|PWM_OUT~4 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y45_N9 +// Location: FF_X60_Y41_N1 dffeas \inst14|PWM_OUT ( - .clk(\inst5|clock_10kHz~clkctrl_outclk ), + .clk(\inst5|clock_25kHz~clkctrl_outclk ), .d(\inst14|PWM_OUT~4_combout ), .asdata(vcc), .clrn(vcc), @@ -27345,41 +27807,41 @@ defparam \inst14|PWM_OUT .is_wysiwyg = "true"; defparam \inst14|PWM_OUT .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N20 +// Location: LCCOMB_X57_Y38_N30 fiftyfivenm_lcell_comb \inst3|HEX0_EN~0 ( // Equation(s): -// \inst3|HEX0_EN~0_combout = (!\inst|IR [0] & (!\inst|IR [1] & (\inst|IR [2] & !\inst|IR [4]))) +// \inst3|HEX0_EN~0_combout = (\inst|IR [2] & (!\inst|IR [1] & (!\inst|IR [4] & !\inst|IR [0]))) - .dataa(\inst|IR [0]), + .dataa(\inst|IR [2]), .datab(\inst|IR [1]), - .datac(\inst|IR [2]), - .datad(\inst|IR [4]), + .datac(\inst|IR [4]), + .datad(\inst|IR [0]), .cin(gnd), .combout(\inst3|HEX0_EN~0_combout ), .cout()); // synopsys translate_off -defparam \inst3|HEX0_EN~0 .lut_mask = 16'h0010; +defparam \inst3|HEX0_EN~0 .lut_mask = 16'h0002; defparam \inst3|HEX0_EN~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N28 +// Location: LCCOMB_X57_Y38_N16 fiftyfivenm_lcell_comb \inst3|HEX0_EN ( // Equation(s): -// \inst3|HEX0_EN~combout = LCELL((\inst3|SWITCH_EN~1_combout & (!\inst|IR [7] & \inst3|HEX0_EN~0_combout ))) +// \inst3|HEX0_EN~combout = LCELL((\inst3|HEX0_EN~0_combout & (\inst3|SWITCH_EN~1_combout & !\inst|IR [7]))) - .dataa(\inst3|SWITCH_EN~1_combout ), - .datab(\inst|IR [7]), - .datac(gnd), - .datad(\inst3|HEX0_EN~0_combout ), + .dataa(gnd), + .datab(\inst3|HEX0_EN~0_combout ), + .datac(\inst3|SWITCH_EN~1_combout ), + .datad(\inst|IR [7]), .cin(gnd), .combout(\inst3|HEX0_EN~combout ), .cout()); // synopsys translate_off -defparam \inst3|HEX0_EN .lut_mask = 16'h2200; +defparam \inst3|HEX0_EN .lut_mask = 16'h00C0; defparam \inst3|HEX0_EN .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G11 +// Location: CLKCTRL_G10 fiftyfivenm_clkctrl \inst3|HEX0_EN~clkctrl ( .ena(vcc), .inclk({vcc,vcc,vcc,\inst3|HEX0_EN~combout }), @@ -27392,27 +27854,27 @@ defparam \inst3|HEX0_EN~clkctrl .clock_type = "global clock"; defparam \inst3|HEX0_EN~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N12 -fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[0]~feeder ( +// Location: LCCOMB_X62_Y38_N22 +fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[1]~feeder ( // Equation(s): -// \inst9|inst1|latched_hex[0]~feeder_combout = \inst13|inst1[0]~19_combout +// \inst9|inst1|latched_hex[1]~feeder_combout = \inst13|inst1[1]~30_combout .dataa(gnd), - .datab(\inst13|inst1[0]~19_combout ), + .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[1]~30_combout ), .cin(gnd), - .combout(\inst9|inst1|latched_hex[0]~feeder_combout ), + .combout(\inst9|inst1|latched_hex[1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|latched_hex[0]~feeder .lut_mask = 16'hCCCC; -defparam \inst9|inst1|latched_hex[0]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst1|latched_hex[1]~feeder .lut_mask = 16'hFF00; +defparam \inst9|inst1|latched_hex[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N13 -dffeas \inst9|inst1|latched_hex[0] ( +// Location: FF_X62_Y38_N23 +dffeas \inst9|inst1|latched_hex[1] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst1|latched_hex[0]~feeder_combout ), + .d(\inst9|inst1|latched_hex[1]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -27421,22 +27883,22 @@ dffeas \inst9|inst1|latched_hex[0] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst1|latched_hex [0]), + .q(\inst9|inst1|latched_hex [1]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst1|latched_hex[0] .is_wysiwyg = "true"; -defparam \inst9|inst1|latched_hex[0] .power_up = "low"; +defparam \inst9|inst1|latched_hex[1] .is_wysiwyg = "true"; +defparam \inst9|inst1|latched_hex[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N28 +// Location: LCCOMB_X62_Y38_N20 fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[2]~feeder ( // Equation(s): -// \inst9|inst1|latched_hex[2]~feeder_combout = \inst13|inst1[2]~29_combout +// \inst9|inst1|latched_hex[2]~feeder_combout = \inst13|inst1[2]~34_combout .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[2]~29_combout ), + .datad(\inst13|inst1[2]~34_combout ), .cin(gnd), .combout(\inst9|inst1|latched_hex[2]~feeder_combout ), .cout()); @@ -27445,7 +27907,7 @@ defparam \inst9|inst1|latched_hex[2]~feeder .lut_mask = 16'hFF00; defparam \inst9|inst1|latched_hex[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N29 +// Location: FF_X62_Y38_N21 dffeas \inst9|inst1|latched_hex[2] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(\inst9|inst1|latched_hex[2]~feeder_combout ), @@ -27464,27 +27926,27 @@ defparam \inst9|inst1|latched_hex[2] .is_wysiwyg = "true"; defparam \inst9|inst1|latched_hex[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N26 -fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[1]~feeder ( +// Location: LCCOMB_X62_Y38_N14 +fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[3]~feeder ( // Equation(s): -// \inst9|inst1|latched_hex[1]~feeder_combout = \inst13|inst1[1]~24_combout +// \inst9|inst1|latched_hex[3]~feeder_combout = \inst13|inst1[3]~38_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[1]~24_combout ), + .datac(\inst13|inst1[3]~38_combout ), .datad(gnd), .cin(gnd), - .combout(\inst9|inst1|latched_hex[1]~feeder_combout ), + .combout(\inst9|inst1|latched_hex[3]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|latched_hex[1]~feeder .lut_mask = 16'hF0F0; -defparam \inst9|inst1|latched_hex[1]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst1|latched_hex[3]~feeder .lut_mask = 16'hF0F0; +defparam \inst9|inst1|latched_hex[3]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N27 -dffeas \inst9|inst1|latched_hex[1] ( +// Location: FF_X62_Y38_N15 +dffeas \inst9|inst1|latched_hex[3] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst1|latched_hex[1]~feeder_combout ), + .d(\inst9|inst1|latched_hex[3]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -27493,34 +27955,34 @@ dffeas \inst9|inst1|latched_hex[1] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst1|latched_hex [1]), + .q(\inst9|inst1|latched_hex [3]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst1|latched_hex[1] .is_wysiwyg = "true"; -defparam \inst9|inst1|latched_hex[1] .power_up = "low"; +defparam \inst9|inst1|latched_hex[3] .is_wysiwyg = "true"; +defparam \inst9|inst1|latched_hex[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N30 -fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[3]~feeder ( +// Location: LCCOMB_X62_Y38_N16 +fiftyfivenm_lcell_comb \inst9|inst1|latched_hex[0]~feeder ( // Equation(s): -// \inst9|inst1|latched_hex[3]~feeder_combout = \inst13|inst1[3]~34_combout +// \inst9|inst1|latched_hex[0]~feeder_combout = \inst13|inst1[0]~25_combout - .dataa(\inst13|inst1[3]~34_combout ), + .dataa(gnd), .datab(gnd), - .datac(gnd), + .datac(\inst13|inst1[0]~25_combout ), .datad(gnd), .cin(gnd), - .combout(\inst9|inst1|latched_hex[3]~feeder_combout ), + .combout(\inst9|inst1|latched_hex[0]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|latched_hex[3]~feeder .lut_mask = 16'hAAAA; -defparam \inst9|inst1|latched_hex[3]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst1|latched_hex[0]~feeder .lut_mask = 16'hF0F0; +defparam \inst9|inst1|latched_hex[0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y39_N31 -dffeas \inst9|inst1|latched_hex[3] ( +// Location: FF_X62_Y38_N17 +dffeas \inst9|inst1|latched_hex[0] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst1|latched_hex[3]~feeder_combout ), + .d(\inst9|inst1|latched_hex[0]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -27529,157 +27991,157 @@ dffeas \inst9|inst1|latched_hex[3] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst1|latched_hex [3]), + .q(\inst9|inst1|latched_hex [0]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst1|latched_hex[3] .is_wysiwyg = "true"; -defparam \inst9|inst1|latched_hex[3] .power_up = "low"; +defparam \inst9|inst1|latched_hex[0] .is_wysiwyg = "true"; +defparam \inst9|inst1|latched_hex[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N0 +// Location: LCCOMB_X62_Y38_N0 fiftyfivenm_lcell_comb \inst9|inst1|Mux0~0 ( // Equation(s): -// \inst9|inst1|Mux0~0_combout = (\inst9|inst1|latched_hex [0] & ((\inst9|inst1|latched_hex [3]) # (\inst9|inst1|latched_hex [2] $ (\inst9|inst1|latched_hex [1])))) # (!\inst9|inst1|latched_hex [0] & ((\inst9|inst1|latched_hex [1]) # +// \inst9|inst1|Mux0~0_combout = (\inst9|inst1|latched_hex [0] & ((\inst9|inst1|latched_hex [3]) # (\inst9|inst1|latched_hex [1] $ (\inst9|inst1|latched_hex [2])))) # (!\inst9|inst1|latched_hex [0] & ((\inst9|inst1|latched_hex [1]) # // (\inst9|inst1|latched_hex [2] $ (\inst9|inst1|latched_hex [3])))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux0~0 .lut_mask = 16'hFB7C; +defparam \inst9|inst1|Mux0~0 .lut_mask = 16'hF6BE; defparam \inst9|inst1|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N14 +// Location: LCCOMB_X62_Y38_N26 fiftyfivenm_lcell_comb \inst9|inst1|Mux1~0 ( // Equation(s): -// \inst9|inst1|Mux1~0_combout = (\inst9|inst1|latched_hex [0] & (\inst9|inst1|latched_hex [3] $ (((\inst9|inst1|latched_hex [1]) # (!\inst9|inst1|latched_hex [2]))))) # (!\inst9|inst1|latched_hex [0] & (!\inst9|inst1|latched_hex [2] & -// (\inst9|inst1|latched_hex [1] & !\inst9|inst1|latched_hex [3]))) +// \inst9|inst1|Mux1~0_combout = (\inst9|inst1|latched_hex [1] & (!\inst9|inst1|latched_hex [3] & ((\inst9|inst1|latched_hex [0]) # (!\inst9|inst1|latched_hex [2])))) # (!\inst9|inst1|latched_hex [1] & (\inst9|inst1|latched_hex [0] & +// (\inst9|inst1|latched_hex [2] $ (!\inst9|inst1|latched_hex [3])))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux1~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux1~0 .lut_mask = 16'h08B2; +defparam \inst9|inst1|Mux1~0 .lut_mask = 16'h4B02; defparam \inst9|inst1|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N16 +// Location: LCCOMB_X62_Y38_N24 fiftyfivenm_lcell_comb \inst9|inst1|Mux2~0 ( // Equation(s): -// \inst9|inst1|Mux2~0_combout = (\inst9|inst1|latched_hex [1] & (\inst9|inst1|latched_hex [0] & ((!\inst9|inst1|latched_hex [3])))) # (!\inst9|inst1|latched_hex [1] & ((\inst9|inst1|latched_hex [2] & ((!\inst9|inst1|latched_hex [3]))) # -// (!\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [0])))) +// \inst9|inst1|Mux2~0_combout = (\inst9|inst1|latched_hex [1] & (((!\inst9|inst1|latched_hex [3] & \inst9|inst1|latched_hex [0])))) # (!\inst9|inst1|latched_hex [1] & ((\inst9|inst1|latched_hex [2] & (!\inst9|inst1|latched_hex [3])) # +// (!\inst9|inst1|latched_hex [2] & ((\inst9|inst1|latched_hex [0]))))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux2~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux2~0 .lut_mask = 16'h02AE; +defparam \inst9|inst1|Mux2~0 .lut_mask = 16'h1F04; defparam \inst9|inst1|Mux2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N2 +// Location: LCCOMB_X62_Y38_N10 fiftyfivenm_lcell_comb \inst9|inst1|Mux3~0 ( // Equation(s): -// \inst9|inst1|Mux3~0_combout = (\inst9|inst1|latched_hex [1] & ((\inst9|inst1|latched_hex [0] & (\inst9|inst1|latched_hex [2])) # (!\inst9|inst1|latched_hex [0] & (!\inst9|inst1|latched_hex [2] & \inst9|inst1|latched_hex [3])))) # -// (!\inst9|inst1|latched_hex [1] & (!\inst9|inst1|latched_hex [3] & (\inst9|inst1|latched_hex [0] $ (\inst9|inst1|latched_hex [2])))) +// \inst9|inst1|Mux3~0_combout = (\inst9|inst1|latched_hex [1] & ((\inst9|inst1|latched_hex [2] & ((\inst9|inst1|latched_hex [0]))) # (!\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [3] & !\inst9|inst1|latched_hex [0])))) # +// (!\inst9|inst1|latched_hex [1] & (!\inst9|inst1|latched_hex [3] & (\inst9|inst1|latched_hex [2] $ (\inst9|inst1|latched_hex [0])))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux3~0 .lut_mask = 16'h9086; +defparam \inst9|inst1|Mux3~0 .lut_mask = 16'h8924; defparam \inst9|inst1|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N24 +// Location: LCCOMB_X62_Y38_N12 fiftyfivenm_lcell_comb \inst9|inst1|Mux4~0 ( // Equation(s): -// \inst9|inst1|Mux4~0_combout = (\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [3] & ((\inst9|inst1|latched_hex [1]) # (!\inst9|inst1|latched_hex [0])))) # (!\inst9|inst1|latched_hex [2] & (!\inst9|inst1|latched_hex [0] & -// (\inst9|inst1|latched_hex [1] & !\inst9|inst1|latched_hex [3]))) +// \inst9|inst1|Mux4~0_combout = (\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [3] & ((\inst9|inst1|latched_hex [1]) # (!\inst9|inst1|latched_hex [0])))) # (!\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [1] & +// (!\inst9|inst1|latched_hex [3] & !\inst9|inst1|latched_hex [0]))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux4~0 .lut_mask = 16'hC410; +defparam \inst9|inst1|Mux4~0 .lut_mask = 16'h80C2; defparam \inst9|inst1|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N10 +// Location: LCCOMB_X62_Y38_N18 fiftyfivenm_lcell_comb \inst9|inst1|Mux5~0 ( // Equation(s): // \inst9|inst1|Mux5~0_combout = (\inst9|inst1|latched_hex [1] & ((\inst9|inst1|latched_hex [0] & ((\inst9|inst1|latched_hex [3]))) # (!\inst9|inst1|latched_hex [0] & (\inst9|inst1|latched_hex [2])))) # (!\inst9|inst1|latched_hex [1] & -// (\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [0] $ (\inst9|inst1|latched_hex [3])))) +// (\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [3] $ (\inst9|inst1|latched_hex [0])))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux5~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux5~0 .lut_mask = 16'hE448; +defparam \inst9|inst1|Mux5~0 .lut_mask = 16'hA4C8; defparam \inst9|inst1|Mux5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y39_N20 +// Location: LCCOMB_X62_Y38_N4 fiftyfivenm_lcell_comb \inst9|inst1|Mux6~0 ( // Equation(s): -// \inst9|inst1|Mux6~0_combout = (\inst9|inst1|latched_hex [2] & (!\inst9|inst1|latched_hex [1] & (\inst9|inst1|latched_hex [0] $ (!\inst9|inst1|latched_hex [3])))) # (!\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [0] & (\inst9|inst1|latched_hex +// \inst9|inst1|Mux6~0_combout = (\inst9|inst1|latched_hex [2] & (!\inst9|inst1|latched_hex [1] & (\inst9|inst1|latched_hex [3] $ (!\inst9|inst1|latched_hex [0])))) # (!\inst9|inst1|latched_hex [2] & (\inst9|inst1|latched_hex [0] & (\inst9|inst1|latched_hex // [1] $ (!\inst9|inst1|latched_hex [3])))) - .dataa(\inst9|inst1|latched_hex [0]), + .dataa(\inst9|inst1|latched_hex [1]), .datab(\inst9|inst1|latched_hex [2]), - .datac(\inst9|inst1|latched_hex [1]), - .datad(\inst9|inst1|latched_hex [3]), + .datac(\inst9|inst1|latched_hex [3]), + .datad(\inst9|inst1|latched_hex [0]), .cin(gnd), .combout(\inst9|inst1|Mux6~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst1|Mux6~0 .lut_mask = 16'h2806; +defparam \inst9|inst1|Mux6~0 .lut_mask = 16'h6104; defparam \inst9|inst1|Mux6~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N6 +// Location: LCCOMB_X58_Y40_N12 fiftyfivenm_lcell_comb \inst9|inst2|latched_hex[3]~feeder ( // Equation(s): -// \inst9|inst2|latched_hex[3]~feeder_combout = \inst13|inst1[7]~54_combout +// \inst9|inst2|latched_hex[3]~feeder_combout = \inst13|inst1[7]~57_combout - .dataa(gnd), + .dataa(\inst13|inst1[7]~57_combout ), .datab(gnd), - .datac(\inst13|inst1[7]~54_combout ), + .datac(gnd), .datad(gnd), .cin(gnd), .combout(\inst9|inst2|latched_hex[3]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|latched_hex[3]~feeder .lut_mask = 16'hF0F0; +defparam \inst9|inst2|latched_hex[3]~feeder .lut_mask = 16'hAAAA; defparam \inst9|inst2|latched_hex[3]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y41_N7 +// Location: FF_X58_Y40_N13 dffeas \inst9|inst2|latched_hex[3] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(\inst9|inst2|latched_hex[3]~feeder_combout ), @@ -27698,63 +28160,46 @@ defparam \inst9|inst2|latched_hex[3] .is_wysiwyg = "true"; defparam \inst9|inst2|latched_hex[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N20 -fiftyfivenm_lcell_comb \inst9|inst2|latched_hex[2]~feeder ( -// Equation(s): -// \inst9|inst2|latched_hex[2]~feeder_combout = \inst13|inst1[6]~49_combout - - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst1[6]~49_combout ), - .datad(gnd), - .cin(gnd), - .combout(\inst9|inst2|latched_hex[2]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst9|inst2|latched_hex[2]~feeder .lut_mask = 16'hF0F0; -defparam \inst9|inst2|latched_hex[2]~feeder .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X52_Y41_N21 -dffeas \inst9|inst2|latched_hex[2] ( +// Location: FF_X59_Y40_N29 +dffeas \inst9|inst2|latched_hex[1] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst2|latched_hex[2]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[5]~48_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst2|latched_hex [2]), + .q(\inst9|inst2|latched_hex [1]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst2|latched_hex[2] .is_wysiwyg = "true"; -defparam \inst9|inst2|latched_hex[2] .power_up = "low"; +defparam \inst9|inst2|latched_hex[1] .is_wysiwyg = "true"; +defparam \inst9|inst2|latched_hex[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N22 -fiftyfivenm_lcell_comb \inst9|inst2|latched_hex[1]~feeder ( +// Location: LCCOMB_X60_Y37_N12 +fiftyfivenm_lcell_comb \inst9|inst2|latched_hex[2]~feeder ( // Equation(s): -// \inst9|inst2|latched_hex[1]~feeder_combout = \inst13|inst1[5]~44_combout +// \inst9|inst2|latched_hex[2]~feeder_combout = \inst13|inst1[6]~53_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[5]~44_combout ), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst1[6]~53_combout ), .cin(gnd), - .combout(\inst9|inst2|latched_hex[1]~feeder_combout ), + .combout(\inst9|inst2|latched_hex[2]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|latched_hex[1]~feeder .lut_mask = 16'hF0F0; -defparam \inst9|inst2|latched_hex[1]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst2|latched_hex[2]~feeder .lut_mask = 16'hFF00; +defparam \inst9|inst2|latched_hex[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y41_N23 -dffeas \inst9|inst2|latched_hex[1] ( +// Location: FF_X60_Y37_N13 +dffeas \inst9|inst2|latched_hex[2] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst2|latched_hex[1]~feeder_combout ), + .d(\inst9|inst2|latched_hex[2]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -27763,39 +28208,22 @@ dffeas \inst9|inst2|latched_hex[1] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst2|latched_hex [1]), + .q(\inst9|inst2|latched_hex [2]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst2|latched_hex[1] .is_wysiwyg = "true"; -defparam \inst9|inst2|latched_hex[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X52_Y41_N8 -fiftyfivenm_lcell_comb \inst9|inst2|latched_hex[0]~feeder ( -// Equation(s): -// \inst9|inst2|latched_hex[0]~feeder_combout = \inst13|inst1[4]~39_combout - - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst1[4]~39_combout ), - .datad(gnd), - .cin(gnd), - .combout(\inst9|inst2|latched_hex[0]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst9|inst2|latched_hex[0]~feeder .lut_mask = 16'hF0F0; -defparam \inst9|inst2|latched_hex[0]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst2|latched_hex[2] .is_wysiwyg = "true"; +defparam \inst9|inst2|latched_hex[2] .power_up = "low"; // synopsys translate_on -// Location: FF_X52_Y41_N9 +// Location: FF_X59_Y40_N17 dffeas \inst9|inst2|latched_hex[0] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst2|latched_hex[0]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[4]~43_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -27806,137 +28234,137 @@ defparam \inst9|inst2|latched_hex[0] .is_wysiwyg = "true"; defparam \inst9|inst2|latched_hex[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N4 +// Location: LCCOMB_X58_Y40_N2 fiftyfivenm_lcell_comb \inst9|inst2|Mux0~0 ( // Equation(s): -// \inst9|inst2|Mux0~0_combout = (\inst9|inst2|latched_hex [0] & ((\inst9|inst2|latched_hex [3]) # (\inst9|inst2|latched_hex [2] $ (\inst9|inst2|latched_hex [1])))) # (!\inst9|inst2|latched_hex [0] & ((\inst9|inst2|latched_hex [1]) # +// \inst9|inst2|Mux0~0_combout = (\inst9|inst2|latched_hex [0] & ((\inst9|inst2|latched_hex [3]) # (\inst9|inst2|latched_hex [1] $ (\inst9|inst2|latched_hex [2])))) # (!\inst9|inst2|latched_hex [0] & ((\inst9|inst2|latched_hex [1]) # // (\inst9|inst2|latched_hex [3] $ (\inst9|inst2|latched_hex [2])))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux0~0 .lut_mask = 16'hBEF6; +defparam \inst9|inst2|Mux0~0 .lut_mask = 16'hBEDE; defparam \inst9|inst2|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N30 +// Location: LCCOMB_X58_Y40_N16 fiftyfivenm_lcell_comb \inst9|inst2|Mux1~0 ( // Equation(s): -// \inst9|inst2|Mux1~0_combout = (\inst9|inst2|latched_hex [2] & (\inst9|inst2|latched_hex [0] & (\inst9|inst2|latched_hex [3] $ (\inst9|inst2|latched_hex [1])))) # (!\inst9|inst2|latched_hex [2] & (!\inst9|inst2|latched_hex [3] & ((\inst9|inst2|latched_hex -// [1]) # (\inst9|inst2|latched_hex [0])))) +// \inst9|inst2|Mux1~0_combout = (\inst9|inst2|latched_hex [1] & (!\inst9|inst2|latched_hex [3] & ((\inst9|inst2|latched_hex [0]) # (!\inst9|inst2|latched_hex [2])))) # (!\inst9|inst2|latched_hex [1] & (\inst9|inst2|latched_hex [0] & +// (\inst9|inst2|latched_hex [3] $ (!\inst9|inst2|latched_hex [2])))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux1~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux1~0 .lut_mask = 16'h5910; +defparam \inst9|inst2|Mux1~0 .lut_mask = 16'h6504; defparam \inst9|inst2|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N16 +// Location: LCCOMB_X58_Y40_N10 fiftyfivenm_lcell_comb \inst9|inst2|Mux2~0 ( // Equation(s): // \inst9|inst2|Mux2~0_combout = (\inst9|inst2|latched_hex [1] & (!\inst9|inst2|latched_hex [3] & ((\inst9|inst2|latched_hex [0])))) # (!\inst9|inst2|latched_hex [1] & ((\inst9|inst2|latched_hex [2] & (!\inst9|inst2|latched_hex [3])) # // (!\inst9|inst2|latched_hex [2] & ((\inst9|inst2|latched_hex [0]))))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux2~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux2~0 .lut_mask = 16'h5704; +defparam \inst9|inst2|Mux2~0 .lut_mask = 16'h5710; defparam \inst9|inst2|Mux2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N14 +// Location: LCCOMB_X58_Y40_N20 fiftyfivenm_lcell_comb \inst9|inst2|Mux3~0 ( // Equation(s): // \inst9|inst2|Mux3~0_combout = (\inst9|inst2|latched_hex [1] & ((\inst9|inst2|latched_hex [2] & ((\inst9|inst2|latched_hex [0]))) # (!\inst9|inst2|latched_hex [2] & (\inst9|inst2|latched_hex [3] & !\inst9|inst2|latched_hex [0])))) # // (!\inst9|inst2|latched_hex [1] & (!\inst9|inst2|latched_hex [3] & (\inst9|inst2|latched_hex [2] $ (\inst9|inst2|latched_hex [0])))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux3~0 .lut_mask = 16'hC124; +defparam \inst9|inst2|Mux3~0 .lut_mask = 16'hC118; defparam \inst9|inst2|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N24 +// Location: LCCOMB_X58_Y40_N18 fiftyfivenm_lcell_comb \inst9|inst2|Mux4~0 ( // Equation(s): -// \inst9|inst2|Mux4~0_combout = (\inst9|inst2|latched_hex [3] & (\inst9|inst2|latched_hex [2] & ((\inst9|inst2|latched_hex [1]) # (!\inst9|inst2|latched_hex [0])))) # (!\inst9|inst2|latched_hex [3] & (!\inst9|inst2|latched_hex [2] & -// (\inst9|inst2|latched_hex [1] & !\inst9|inst2|latched_hex [0]))) +// \inst9|inst2|Mux4~0_combout = (\inst9|inst2|latched_hex [3] & (\inst9|inst2|latched_hex [2] & ((\inst9|inst2|latched_hex [1]) # (!\inst9|inst2|latched_hex [0])))) # (!\inst9|inst2|latched_hex [3] & (\inst9|inst2|latched_hex [1] & +// (!\inst9|inst2|latched_hex [2] & !\inst9|inst2|latched_hex [0]))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux4~0 .lut_mask = 16'h8098; +defparam \inst9|inst2|Mux4~0 .lut_mask = 16'h80A4; defparam \inst9|inst2|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N18 +// Location: LCCOMB_X58_Y40_N0 fiftyfivenm_lcell_comb \inst9|inst2|Mux5~0 ( // Equation(s): -// \inst9|inst2|Mux5~0_combout = (\inst9|inst2|latched_hex [3] & ((\inst9|inst2|latched_hex [0] & ((\inst9|inst2|latched_hex [1]))) # (!\inst9|inst2|latched_hex [0] & (\inst9|inst2|latched_hex [2])))) # (!\inst9|inst2|latched_hex [3] & +// \inst9|inst2|Mux5~0_combout = (\inst9|inst2|latched_hex [3] & ((\inst9|inst2|latched_hex [0] & (\inst9|inst2|latched_hex [1])) # (!\inst9|inst2|latched_hex [0] & ((\inst9|inst2|latched_hex [2]))))) # (!\inst9|inst2|latched_hex [3] & // (\inst9|inst2|latched_hex [2] & (\inst9|inst2|latched_hex [1] $ (\inst9|inst2|latched_hex [0])))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux5~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux5~0 .lut_mask = 16'hA4C8; +defparam \inst9|inst2|Mux5~0 .lut_mask = 16'h98E0; defparam \inst9|inst2|Mux5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y41_N0 +// Location: LCCOMB_X58_Y40_N26 fiftyfivenm_lcell_comb \inst9|inst2|Mux6~0 ( // Equation(s): -// \inst9|inst2|Mux6~0_combout = (\inst9|inst2|latched_hex [3] & (\inst9|inst2|latched_hex [0] & (\inst9|inst2|latched_hex [2] $ (\inst9|inst2|latched_hex [1])))) # (!\inst9|inst2|latched_hex [3] & (!\inst9|inst2|latched_hex [1] & (\inst9|inst2|latched_hex +// \inst9|inst2|Mux6~0_combout = (\inst9|inst2|latched_hex [3] & (\inst9|inst2|latched_hex [0] & (\inst9|inst2|latched_hex [1] $ (\inst9|inst2|latched_hex [2])))) # (!\inst9|inst2|latched_hex [3] & (!\inst9|inst2|latched_hex [1] & (\inst9|inst2|latched_hex // [2] $ (\inst9|inst2|latched_hex [0])))) .dataa(\inst9|inst2|latched_hex [3]), - .datab(\inst9|inst2|latched_hex [2]), - .datac(\inst9|inst2|latched_hex [1]), + .datab(\inst9|inst2|latched_hex [1]), + .datac(\inst9|inst2|latched_hex [2]), .datad(\inst9|inst2|latched_hex [0]), .cin(gnd), .combout(\inst9|inst2|Mux6~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst2|Mux6~0 .lut_mask = 16'h2904; +defparam \inst9|inst2|Mux6~0 .lut_mask = 16'h2910; defparam \inst9|inst2|Mux6~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y39_N23 -dffeas \inst9|inst3|latched_hex[3] ( +// Location: FF_X59_Y38_N29 +dffeas \inst9|inst3|latched_hex[2] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst1[11]~73_combout ), + .asdata(\inst13|inst1[10]~70_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), @@ -27944,18 +28372,18 @@ dffeas \inst9|inst3|latched_hex[3] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst3|latched_hex [3]), + .q(\inst9|inst3|latched_hex [2]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst3|latched_hex[3] .is_wysiwyg = "true"; -defparam \inst9|inst3|latched_hex[3] .power_up = "low"; +defparam \inst9|inst3|latched_hex[2] .is_wysiwyg = "true"; +defparam \inst9|inst3|latched_hex[2] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y39_N5 -dffeas \inst9|inst3|latched_hex[2] ( +// Location: FF_X59_Y39_N1 +dffeas \inst9|inst3|latched_hex[0] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst1[10]~68_combout ), + .asdata(\inst13|inst1[8]~62_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), @@ -27963,18 +28391,18 @@ dffeas \inst9|inst3|latched_hex[2] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst3|latched_hex [2]), + .q(\inst9|inst3|latched_hex [0]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst3|latched_hex[2] .is_wysiwyg = "true"; -defparam \inst9|inst3|latched_hex[2] .power_up = "low"; +defparam \inst9|inst3|latched_hex[0] .is_wysiwyg = "true"; +defparam \inst9|inst3|latched_hex[0] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y39_N21 +// Location: FF_X59_Y39_N15 dffeas \inst9|inst3|latched_hex[1] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst1[9]~64_combout ), + .asdata(\inst13|inst1[9]~66_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), @@ -27989,11 +28417,11 @@ defparam \inst9|inst3|latched_hex[1] .is_wysiwyg = "true"; defparam \inst9|inst3|latched_hex[1] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y39_N9 -dffeas \inst9|inst3|latched_hex[0] ( +// Location: FF_X59_Y39_N29 +dffeas \inst9|inst3|latched_hex[3] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst1[8]~59_combout ), + .asdata(\inst13|inst1[11]~75_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), @@ -28001,157 +28429,157 @@ dffeas \inst9|inst3|latched_hex[0] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst3|latched_hex [0]), + .q(\inst9|inst3|latched_hex [3]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst3|latched_hex[0] .is_wysiwyg = "true"; -defparam \inst9|inst3|latched_hex[0] .power_up = "low"; +defparam \inst9|inst3|latched_hex[3] .is_wysiwyg = "true"; +defparam \inst9|inst3|latched_hex[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N6 +// Location: LCCOMB_X59_Y39_N2 fiftyfivenm_lcell_comb \inst9|inst3|Mux0~0 ( // Equation(s): // \inst9|inst3|Mux0~0_combout = (\inst9|inst3|latched_hex [0] & ((\inst9|inst3|latched_hex [3]) # (\inst9|inst3|latched_hex [2] $ (\inst9|inst3|latched_hex [1])))) # (!\inst9|inst3|latched_hex [0] & ((\inst9|inst3|latched_hex [1]) # -// (\inst9|inst3|latched_hex [3] $ (\inst9|inst3|latched_hex [2])))) +// (\inst9|inst3|latched_hex [2] $ (\inst9|inst3|latched_hex [3])))) - .dataa(\inst9|inst3|latched_hex [3]), - .datab(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [0]), .datac(\inst9|inst3|latched_hex [1]), - .datad(\inst9|inst3|latched_hex [0]), + .datad(\inst9|inst3|latched_hex [3]), .cin(gnd), .combout(\inst9|inst3|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux0~0 .lut_mask = 16'hBEF6; +defparam \inst9|inst3|Mux0~0 .lut_mask = 16'hFD7A; defparam \inst9|inst3|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N26 +// Location: LCCOMB_X59_Y39_N8 fiftyfivenm_lcell_comb \inst9|inst3|Mux1~0 ( // Equation(s): -// \inst9|inst3|Mux1~0_combout = (\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0] & (\inst9|inst3|latched_hex [3] $ (\inst9|inst3|latched_hex [1])))) # (!\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [3] & ((\inst9|inst3|latched_hex -// [1]) # (\inst9|inst3|latched_hex [0])))) +// \inst9|inst3|Mux1~0_combout = (\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0] & (\inst9|inst3|latched_hex [1] $ (\inst9|inst3|latched_hex [3])))) # (!\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [3] & ((\inst9|inst3|latched_hex +// [0]) # (\inst9|inst3|latched_hex [1])))) - .dataa(\inst9|inst3|latched_hex [3]), - .datab(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [0]), .datac(\inst9|inst3|latched_hex [1]), - .datad(\inst9|inst3|latched_hex [0]), + .datad(\inst9|inst3|latched_hex [3]), .cin(gnd), .combout(\inst9|inst3|Mux1~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux1~0 .lut_mask = 16'h5910; +defparam \inst9|inst3|Mux1~0 .lut_mask = 16'h08D4; defparam \inst9|inst3|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N16 +// Location: LCCOMB_X59_Y39_N22 fiftyfivenm_lcell_comb \inst9|inst3|Mux2~0 ( // Equation(s): -// \inst9|inst3|Mux2~0_combout = (\inst9|inst3|latched_hex [1] & (!\inst9|inst3|latched_hex [3] & ((\inst9|inst3|latched_hex [0])))) # (!\inst9|inst3|latched_hex [1] & ((\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [3])) # -// (!\inst9|inst3|latched_hex [2] & ((\inst9|inst3|latched_hex [0]))))) +// \inst9|inst3|Mux2~0_combout = (\inst9|inst3|latched_hex [1] & (((\inst9|inst3|latched_hex [0] & !\inst9|inst3|latched_hex [3])))) # (!\inst9|inst3|latched_hex [1] & ((\inst9|inst3|latched_hex [2] & ((!\inst9|inst3|latched_hex [3]))) # +// (!\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0])))) - .dataa(\inst9|inst3|latched_hex [3]), - .datab(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [0]), .datac(\inst9|inst3|latched_hex [1]), - .datad(\inst9|inst3|latched_hex [0]), + .datad(\inst9|inst3|latched_hex [3]), .cin(gnd), .combout(\inst9|inst3|Mux2~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux2~0 .lut_mask = 16'h5704; +defparam \inst9|inst3|Mux2~0 .lut_mask = 16'h04CE; defparam \inst9|inst3|Mux2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N14 +// Location: LCCOMB_X59_Y39_N20 fiftyfivenm_lcell_comb \inst9|inst3|Mux3~0 ( // Equation(s): -// \inst9|inst3|Mux3~0_combout = (\inst9|inst3|latched_hex [1] & ((\inst9|inst3|latched_hex [2] & ((\inst9|inst3|latched_hex [0]))) # (!\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [3] & !\inst9|inst3|latched_hex [0])))) # +// \inst9|inst3|Mux3~0_combout = (\inst9|inst3|latched_hex [1] & ((\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0])) # (!\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [0] & \inst9|inst3|latched_hex [3])))) # // (!\inst9|inst3|latched_hex [1] & (!\inst9|inst3|latched_hex [3] & (\inst9|inst3|latched_hex [2] $ (\inst9|inst3|latched_hex [0])))) - .dataa(\inst9|inst3|latched_hex [3]), - .datab(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [0]), .datac(\inst9|inst3|latched_hex [1]), - .datad(\inst9|inst3|latched_hex [0]), + .datad(\inst9|inst3|latched_hex [3]), .cin(gnd), .combout(\inst9|inst3|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux3~0 .lut_mask = 16'hC124; +defparam \inst9|inst3|Mux3~0 .lut_mask = 16'h9086; defparam \inst9|inst3|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N20 +// Location: LCCOMB_X59_Y39_N14 fiftyfivenm_lcell_comb \inst9|inst3|Mux4~0 ( // Equation(s): -// \inst9|inst3|Mux4~0_combout = (\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [3] & ((\inst9|inst3|latched_hex [1]) # (!\inst9|inst3|latched_hex [0])))) # (!\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [0] & -// (\inst9|inst3|latched_hex [1] & !\inst9|inst3|latched_hex [3]))) +// \inst9|inst3|Mux4~0_combout = (\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [3] & ((\inst9|inst3|latched_hex [1]) # (!\inst9|inst3|latched_hex [0])))) # (!\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [3] & +// (\inst9|inst3|latched_hex [1] & !\inst9|inst3|latched_hex [0]))) - .dataa(\inst9|inst3|latched_hex [0]), - .datab(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [3]), .datac(\inst9|inst3|latched_hex [1]), - .datad(\inst9|inst3|latched_hex [3]), + .datad(\inst9|inst3|latched_hex [0]), .cin(gnd), .combout(\inst9|inst3|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux4~0 .lut_mask = 16'hC410; +defparam \inst9|inst3|Mux4~0 .lut_mask = 16'h8098; defparam \inst9|inst3|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N4 +// Location: LCCOMB_X59_Y39_N18 fiftyfivenm_lcell_comb \inst9|inst3|Mux5~0 ( // Equation(s): // \inst9|inst3|Mux5~0_combout = (\inst9|inst3|latched_hex [1] & ((\inst9|inst3|latched_hex [0] & ((\inst9|inst3|latched_hex [3]))) # (!\inst9|inst3|latched_hex [0] & (\inst9|inst3|latched_hex [2])))) # (!\inst9|inst3|latched_hex [1] & // (\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0] $ (\inst9|inst3|latched_hex [3])))) - .dataa(\inst9|inst3|latched_hex [0]), - .datab(\inst9|inst3|latched_hex [1]), - .datac(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [0]), + .datac(\inst9|inst3|latched_hex [1]), .datad(\inst9|inst3|latched_hex [3]), .cin(gnd), .combout(\inst9|inst3|Mux5~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux5~0 .lut_mask = 16'hD860; +defparam \inst9|inst3|Mux5~0 .lut_mask = 16'hE228; defparam \inst9|inst3|Mux5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y39_N22 +// Location: LCCOMB_X59_Y39_N28 fiftyfivenm_lcell_comb \inst9|inst3|Mux6~0 ( // Equation(s): -// \inst9|inst3|Mux6~0_combout = (\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [1] & (\inst9|inst3|latched_hex [0] $ (!\inst9|inst3|latched_hex [3])))) # (!\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0] & (\inst9|inst3|latched_hex -// [3] $ (!\inst9|inst3|latched_hex [1])))) +// \inst9|inst3|Mux6~0_combout = (\inst9|inst3|latched_hex [2] & (!\inst9|inst3|latched_hex [1] & (\inst9|inst3|latched_hex [3] $ (!\inst9|inst3|latched_hex [0])))) # (!\inst9|inst3|latched_hex [2] & (\inst9|inst3|latched_hex [0] & (\inst9|inst3|latched_hex +// [1] $ (!\inst9|inst3|latched_hex [3])))) - .dataa(\inst9|inst3|latched_hex [0]), - .datab(\inst9|inst3|latched_hex [2]), + .dataa(\inst9|inst3|latched_hex [2]), + .datab(\inst9|inst3|latched_hex [1]), .datac(\inst9|inst3|latched_hex [3]), - .datad(\inst9|inst3|latched_hex [1]), + .datad(\inst9|inst3|latched_hex [0]), .cin(gnd), .combout(\inst9|inst3|Mux6~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst3|Mux6~0 .lut_mask = 16'h2086; +defparam \inst9|inst3|Mux6~0 .lut_mask = 16'h6102; defparam \inst9|inst3|Mux6~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N12 +// Location: LCCOMB_X60_Y37_N10 fiftyfivenm_lcell_comb \inst9|inst4|latched_hex[2]~feeder ( // Equation(s): -// \inst9|inst4|latched_hex[2]~feeder_combout = \inst13|inst1[14]~85_combout +// \inst9|inst4|latched_hex[2]~feeder_combout = \inst13|inst1[14]~90_combout - .dataa(\inst13|inst1[14]~85_combout ), + .dataa(gnd), .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[14]~90_combout ), .cin(gnd), .combout(\inst9|inst4|latched_hex[2]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|latched_hex[2]~feeder .lut_mask = 16'hAAAA; +defparam \inst9|inst4|latched_hex[2]~feeder .lut_mask = 16'hFF00; defparam \inst9|inst4|latched_hex[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y41_N13 +// Location: FF_X60_Y37_N11 dffeas \inst9|inst4|latched_hex[2] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), .d(\inst9|inst4|latched_hex[2]~feeder_combout ), @@ -28170,68 +28598,34 @@ defparam \inst9|inst4|latched_hex[2] .is_wysiwyg = "true"; defparam \inst9|inst4|latched_hex[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N18 -fiftyfivenm_lcell_comb \inst9|inst4|latched_hex[1]~feeder ( -// Equation(s): -// \inst9|inst4|latched_hex[1]~feeder_combout = \inst13|inst1[13]~96_combout - - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[13]~96_combout ), - .cin(gnd), - .combout(\inst9|inst4|latched_hex[1]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst9|inst4|latched_hex[1]~feeder .lut_mask = 16'hFF00; -defparam \inst9|inst4|latched_hex[1]~feeder .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X54_Y41_N19 -dffeas \inst9|inst4|latched_hex[1] ( +// Location: FF_X62_Y37_N9 +dffeas \inst9|inst4|latched_hex[0] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst4|latched_hex[1]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[12]~80_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst4|latched_hex [1]), + .q(\inst9|inst4|latched_hex [0]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst4|latched_hex[1] .is_wysiwyg = "true"; -defparam \inst9|inst4|latched_hex[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X54_Y41_N30 -fiftyfivenm_lcell_comb \inst9|inst4|latched_hex[3]~feeder ( -// Equation(s): -// \inst9|inst4|latched_hex[3]~feeder_combout = \inst13|inst1[15]~90_combout - - .dataa(gnd), - .datab(gnd), - .datac(gnd), - .datad(\inst13|inst1[15]~90_combout ), - .cin(gnd), - .combout(\inst9|inst4|latched_hex[3]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst9|inst4|latched_hex[3]~feeder .lut_mask = 16'hFF00; -defparam \inst9|inst4|latched_hex[3]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst4|latched_hex[0] .is_wysiwyg = "true"; +defparam \inst9|inst4|latched_hex[0] .power_up = "low"; // synopsys translate_on -// Location: FF_X54_Y41_N31 +// Location: FF_X62_Y37_N15 dffeas \inst9|inst4|latched_hex[3] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst4|latched_hex[3]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[15]~95_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -28242,27 +28636,27 @@ defparam \inst9|inst4|latched_hex[3] .is_wysiwyg = "true"; defparam \inst9|inst4|latched_hex[3] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N24 -fiftyfivenm_lcell_comb \inst9|inst4|latched_hex[0]~feeder ( +// Location: LCCOMB_X63_Y37_N24 +fiftyfivenm_lcell_comb \inst9|inst4|latched_hex[1]~feeder ( // Equation(s): -// \inst9|inst4|latched_hex[0]~feeder_combout = \inst13|inst1[12]~95_combout +// \inst9|inst4|latched_hex[1]~feeder_combout = \inst13|inst1[13]~85_combout - .dataa(gnd), + .dataa(\inst13|inst1[13]~85_combout ), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[12]~95_combout ), + .datad(gnd), .cin(gnd), - .combout(\inst9|inst4|latched_hex[0]~feeder_combout ), + .combout(\inst9|inst4|latched_hex[1]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|latched_hex[0]~feeder .lut_mask = 16'hFF00; -defparam \inst9|inst4|latched_hex[0]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst4|latched_hex[1]~feeder .lut_mask = 16'hAAAA; +defparam \inst9|inst4|latched_hex[1]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X54_Y41_N25 -dffeas \inst9|inst4|latched_hex[0] ( +// Location: FF_X63_Y37_N25 +dffeas \inst9|inst4|latched_hex[1] ( .clk(\inst3|HEX0_EN~clkctrl_outclk ), - .d(\inst9|inst4|latched_hex[0]~feeder_combout ), + .d(\inst9|inst4|latched_hex[1]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -28271,157 +28665,157 @@ dffeas \inst9|inst4|latched_hex[0] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst4|latched_hex [0]), + .q(\inst9|inst4|latched_hex [1]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst4|latched_hex[0] .is_wysiwyg = "true"; -defparam \inst9|inst4|latched_hex[0] .power_up = "low"; +defparam \inst9|inst4|latched_hex[1] .is_wysiwyg = "true"; +defparam \inst9|inst4|latched_hex[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N4 +// Location: LCCOMB_X62_Y37_N12 fiftyfivenm_lcell_comb \inst9|inst4|Mux0~0 ( // Equation(s): // \inst9|inst4|Mux0~0_combout = (\inst9|inst4|latched_hex [0] & ((\inst9|inst4|latched_hex [3]) # (\inst9|inst4|latched_hex [2] $ (\inst9|inst4|latched_hex [1])))) # (!\inst9|inst4|latched_hex [0] & ((\inst9|inst4|latched_hex [1]) # // (\inst9|inst4|latched_hex [2] $ (\inst9|inst4|latched_hex [3])))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux0~0 .lut_mask = 16'hF6DE; +defparam \inst9|inst4|Mux0~0 .lut_mask = 16'hF7DA; defparam \inst9|inst4|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N26 +// Location: LCCOMB_X62_Y37_N26 fiftyfivenm_lcell_comb \inst9|inst4|Mux1~0 ( // Equation(s): -// \inst9|inst4|Mux1~0_combout = (\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0] & (\inst9|inst4|latched_hex [1] $ (\inst9|inst4|latched_hex [3])))) # (!\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [3] & ((\inst9|inst4|latched_hex -// [1]) # (\inst9|inst4|latched_hex [0])))) +// \inst9|inst4|Mux1~0_combout = (\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0] & (\inst9|inst4|latched_hex [3] $ (\inst9|inst4|latched_hex [1])))) # (!\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [3] & ((\inst9|inst4|latched_hex +// [0]) # (\inst9|inst4|latched_hex [1])))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux1~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux1~0 .lut_mask = 16'h2D04; +defparam \inst9|inst4|Mux1~0 .lut_mask = 16'h0D84; defparam \inst9|inst4|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N28 +// Location: LCCOMB_X62_Y37_N24 fiftyfivenm_lcell_comb \inst9|inst4|Mux2~0 ( // Equation(s): -// \inst9|inst4|Mux2~0_combout = (\inst9|inst4|latched_hex [1] & (((!\inst9|inst4|latched_hex [3] & \inst9|inst4|latched_hex [0])))) # (!\inst9|inst4|latched_hex [1] & ((\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [3])) # -// (!\inst9|inst4|latched_hex [2] & ((\inst9|inst4|latched_hex [0]))))) +// \inst9|inst4|Mux2~0_combout = (\inst9|inst4|latched_hex [1] & (((\inst9|inst4|latched_hex [0] & !\inst9|inst4|latched_hex [3])))) # (!\inst9|inst4|latched_hex [1] & ((\inst9|inst4|latched_hex [2] & ((!\inst9|inst4|latched_hex [3]))) # +// (!\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0])))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux2~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux2~0 .lut_mask = 16'h1F02; +defparam \inst9|inst4|Mux2~0 .lut_mask = 16'h0C4E; defparam \inst9|inst4|Mux2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N10 +// Location: LCCOMB_X62_Y37_N18 fiftyfivenm_lcell_comb \inst9|inst4|Mux3~0 ( // Equation(s): -// \inst9|inst4|Mux3~0_combout = (\inst9|inst4|latched_hex [1] & ((\inst9|inst4|latched_hex [2] & ((\inst9|inst4|latched_hex [0]))) # (!\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [3] & !\inst9|inst4|latched_hex [0])))) # +// \inst9|inst4|Mux3~0_combout = (\inst9|inst4|latched_hex [1] & ((\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0])) # (!\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [0] & \inst9|inst4|latched_hex [3])))) # // (!\inst9|inst4|latched_hex [1] & (!\inst9|inst4|latched_hex [3] & (\inst9|inst4|latched_hex [2] $ (\inst9|inst4|latched_hex [0])))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux3~0 .lut_mask = 16'h8942; +defparam \inst9|inst4|Mux3~0 .lut_mask = 16'h9806; defparam \inst9|inst4|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N16 +// Location: LCCOMB_X62_Y37_N16 fiftyfivenm_lcell_comb \inst9|inst4|Mux4~0 ( // Equation(s): -// \inst9|inst4|Mux4~0_combout = (\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [3] & ((\inst9|inst4|latched_hex [1]) # (!\inst9|inst4|latched_hex [0])))) # (!\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [1] & -// (!\inst9|inst4|latched_hex [3] & !\inst9|inst4|latched_hex [0]))) +// \inst9|inst4|Mux4~0_combout = (\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [3] & ((\inst9|inst4|latched_hex [1]) # (!\inst9|inst4|latched_hex [0])))) # (!\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [0] & +// (!\inst9|inst4|latched_hex [3] & \inst9|inst4|latched_hex [1]))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux4~0 .lut_mask = 16'h80A4; +defparam \inst9|inst4|Mux4~0 .lut_mask = 16'hA120; defparam \inst9|inst4|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N14 +// Location: LCCOMB_X62_Y37_N22 fiftyfivenm_lcell_comb \inst9|inst4|Mux5~0 ( // Equation(s): -// \inst9|inst4|Mux5~0_combout = (\inst9|inst4|latched_hex [1] & ((\inst9|inst4|latched_hex [0] & ((\inst9|inst4|latched_hex [3]))) # (!\inst9|inst4|latched_hex [0] & (\inst9|inst4|latched_hex [2])))) # (!\inst9|inst4|latched_hex [1] & -// (\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [3] $ (\inst9|inst4|latched_hex [0])))) +// \inst9|inst4|Mux5~0_combout = (\inst9|inst4|latched_hex [3] & ((\inst9|inst4|latched_hex [0] & ((\inst9|inst4|latched_hex [1]))) # (!\inst9|inst4|latched_hex [0] & (\inst9|inst4|latched_hex [2])))) # (!\inst9|inst4|latched_hex [3] & +// (\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0] $ (\inst9|inst4|latched_hex [1])))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux5~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux5~0 .lut_mask = 16'hC2A8; +defparam \inst9|inst4|Mux5~0 .lut_mask = 16'hE228; defparam \inst9|inst4|Mux5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X54_Y41_N8 +// Location: LCCOMB_X62_Y37_N14 fiftyfivenm_lcell_comb \inst9|inst4|Mux6~0 ( // Equation(s): -// \inst9|inst4|Mux6~0_combout = (\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [1] & (\inst9|inst4|latched_hex [3] $ (!\inst9|inst4|latched_hex [0])))) # (!\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0] & (\inst9|inst4|latched_hex -// [1] $ (!\inst9|inst4|latched_hex [3])))) +// \inst9|inst4|Mux6~0_combout = (\inst9|inst4|latched_hex [2] & (!\inst9|inst4|latched_hex [1] & (\inst9|inst4|latched_hex [0] $ (!\inst9|inst4|latched_hex [3])))) # (!\inst9|inst4|latched_hex [2] & (\inst9|inst4|latched_hex [0] & (\inst9|inst4|latched_hex +// [3] $ (!\inst9|inst4|latched_hex [1])))) .dataa(\inst9|inst4|latched_hex [2]), - .datab(\inst9|inst4|latched_hex [1]), + .datab(\inst9|inst4|latched_hex [0]), .datac(\inst9|inst4|latched_hex [3]), - .datad(\inst9|inst4|latched_hex [0]), + .datad(\inst9|inst4|latched_hex [1]), .cin(gnd), .combout(\inst9|inst4|Mux6~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst4|Mux6~0 .lut_mask = 16'h6102; +defparam \inst9|inst4|Mux6~0 .lut_mask = 16'h4086; defparam \inst9|inst4|Mux6~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N30 +// Location: LCCOMB_X57_Y38_N12 fiftyfivenm_lcell_comb \inst3|HEX1_EN ( // Equation(s): -// \inst3|HEX1_EN~combout = LCELL((\inst3|PWM_EN~1_combout & (\inst3|SWITCH_EN~1_combout & \inst|IR [2]))) +// \inst3|HEX1_EN~combout = LCELL((\inst|IR [2] & (\inst3|PWM_EN~1_combout & \inst3|SWITCH_EN~1_combout ))) - .dataa(\inst3|PWM_EN~1_combout ), - .datab(\inst3|SWITCH_EN~1_combout ), - .datac(gnd), - .datad(\inst|IR [2]), + .dataa(\inst|IR [2]), + .datab(gnd), + .datac(\inst3|PWM_EN~1_combout ), + .datad(\inst3|SWITCH_EN~1_combout ), .cin(gnd), .combout(\inst3|HEX1_EN~combout ), .cout()); // synopsys translate_off -defparam \inst3|HEX1_EN .lut_mask = 16'h8800; +defparam \inst3|HEX1_EN .lut_mask = 16'hA000; defparam \inst3|HEX1_EN .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G14 +// Location: CLKCTRL_G13 fiftyfivenm_clkctrl \inst3|HEX1_EN~clkctrl ( .ena(vcc), .inclk({vcc,vcc,vcc,\inst3|HEX1_EN~combout }), @@ -28430,19 +28824,36 @@ fiftyfivenm_clkctrl \inst3|HEX1_EN~clkctrl ( .devpor(devpor), .outclk(\inst3|HEX1_EN~clkctrl_outclk )); // synopsys translate_off -defparam \inst3|HEX1_EN~clkctrl .clock_type = "global clock"; -defparam \inst3|HEX1_EN~clkctrl .ena_register_mode = "none"; +defparam \inst3|HEX1_EN~clkctrl .clock_type = "global clock"; +defparam \inst3|HEX1_EN~clkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X65_Y38_N12 +fiftyfivenm_lcell_comb \inst9|inst5|latched_hex[0]~feeder ( +// Equation(s): +// \inst9|inst5|latched_hex[0]~feeder_combout = \inst13|inst1[0]~25_combout + + .dataa(gnd), + .datab(\inst13|inst1[0]~25_combout ), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\inst9|inst5|latched_hex[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst9|inst5|latched_hex[0]~feeder .lut_mask = 16'hCCCC; +defparam \inst9|inst5|latched_hex[0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y42_N9 +// Location: FF_X65_Y38_N13 dffeas \inst9|inst5|latched_hex[0] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[0]~19_combout ), + .d(\inst9|inst5|latched_hex[0]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -28453,53 +28864,104 @@ defparam \inst9|inst5|latched_hex[0] .is_wysiwyg = "true"; defparam \inst9|inst5|latched_hex[0] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y42_N5 -dffeas \inst9|inst5|latched_hex[1] ( +// Location: LCCOMB_X65_Y38_N18 +fiftyfivenm_lcell_comb \inst9|inst5|latched_hex[3]~feeder ( +// Equation(s): +// \inst9|inst5|latched_hex[3]~feeder_combout = \inst13|inst1[3]~38_combout + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst1[3]~38_combout ), + .datad(gnd), + .cin(gnd), + .combout(\inst9|inst5|latched_hex[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst9|inst5|latched_hex[3]~feeder .lut_mask = 16'hF0F0; +defparam \inst9|inst5|latched_hex[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X65_Y38_N19 +dffeas \inst9|inst5|latched_hex[3] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[1]~24_combout ), + .d(\inst9|inst5|latched_hex[3]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst5|latched_hex [1]), + .q(\inst9|inst5|latched_hex [3]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst5|latched_hex[1] .is_wysiwyg = "true"; -defparam \inst9|inst5|latched_hex[1] .power_up = "low"; +defparam \inst9|inst5|latched_hex[3] .is_wysiwyg = "true"; +defparam \inst9|inst5|latched_hex[3] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y42_N23 -dffeas \inst9|inst5|latched_hex[3] ( +// Location: LCCOMB_X65_Y38_N22 +fiftyfivenm_lcell_comb \inst9|inst5|latched_hex[1]~feeder ( +// Equation(s): +// \inst9|inst5|latched_hex[1]~feeder_combout = \inst13|inst1[1]~30_combout + + .dataa(\inst13|inst1[1]~30_combout ), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\inst9|inst5|latched_hex[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst9|inst5|latched_hex[1]~feeder .lut_mask = 16'hAAAA; +defparam \inst9|inst5|latched_hex[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X65_Y38_N23 +dffeas \inst9|inst5|latched_hex[1] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[3]~34_combout ), + .d(\inst9|inst5|latched_hex[1]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst5|latched_hex [3]), + .q(\inst9|inst5|latched_hex [1]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst5|latched_hex[3] .is_wysiwyg = "true"; -defparam \inst9|inst5|latched_hex[3] .power_up = "low"; +defparam \inst9|inst5|latched_hex[1] .is_wysiwyg = "true"; +defparam \inst9|inst5|latched_hex[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X65_Y38_N24 +fiftyfivenm_lcell_comb \inst9|inst5|latched_hex[2]~feeder ( +// Equation(s): +// \inst9|inst5|latched_hex[2]~feeder_combout = \inst13|inst1[2]~34_combout + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst1[2]~34_combout ), + .cin(gnd), + .combout(\inst9|inst5|latched_hex[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst9|inst5|latched_hex[2]~feeder .lut_mask = 16'hFF00; +defparam \inst9|inst5|latched_hex[2]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y43_N15 +// Location: FF_X65_Y38_N25 dffeas \inst9|inst5|latched_hex[2] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[2]~29_combout ), + .d(\inst9|inst5|latched_hex[2]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -28510,105 +28972,105 @@ defparam \inst9|inst5|latched_hex[2] .is_wysiwyg = "true"; defparam \inst9|inst5|latched_hex[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N24 +// Location: LCCOMB_X65_Y38_N16 fiftyfivenm_lcell_comb \inst9|inst5|Mux0~0 ( // Equation(s): // \inst9|inst5|Mux0~0_combout = (\inst9|inst5|latched_hex [0] & ((\inst9|inst5|latched_hex [3]) # (\inst9|inst5|latched_hex [1] $ (\inst9|inst5|latched_hex [2])))) # (!\inst9|inst5|latched_hex [0] & ((\inst9|inst5|latched_hex [1]) # // (\inst9|inst5|latched_hex [3] $ (\inst9|inst5|latched_hex [2])))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst5|Mux0~0 .lut_mask = 16'hE7FC; +defparam \inst9|inst5|Mux0~0 .lut_mask = 16'hDBFC; defparam \inst9|inst5|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N22 +// Location: LCCOMB_X65_Y38_N2 fiftyfivenm_lcell_comb \inst9|inst5|Mux1~0 ( // Equation(s): -// \inst9|inst5|Mux1~0_combout = (\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [3] $ (((\inst9|inst5|latched_hex [1]) # (!\inst9|inst5|latched_hex [2]))))) # (!\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [1] & -// (!\inst9|inst5|latched_hex [3] & !\inst9|inst5|latched_hex [2]))) +// \inst9|inst5|Mux1~0_combout = (\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [3] $ (((\inst9|inst5|latched_hex [1]) # (!\inst9|inst5|latched_hex [2]))))) # (!\inst9|inst5|latched_hex [0] & (!\inst9|inst5|latched_hex [3] & +// (\inst9|inst5|latched_hex [1] & !\inst9|inst5|latched_hex [2]))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux1~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst5|Mux1~0 .lut_mask = 16'h280E; +defparam \inst9|inst5|Mux1~0 .lut_mask = 16'h2832; defparam \inst9|inst5|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N4 +// Location: LCCOMB_X65_Y38_N20 fiftyfivenm_lcell_comb \inst9|inst5|Mux2~0 ( // Equation(s): // \inst9|inst5|Mux2~0_combout = (\inst9|inst5|latched_hex [1] & (\inst9|inst5|latched_hex [0] & (!\inst9|inst5|latched_hex [3]))) # (!\inst9|inst5|latched_hex [1] & ((\inst9|inst5|latched_hex [2] & ((!\inst9|inst5|latched_hex [3]))) # // (!\inst9|inst5|latched_hex [2] & (\inst9|inst5|latched_hex [0])))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux2~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst5|Mux2~0 .lut_mask = 16'h0B2A; +defparam \inst9|inst5|Mux2~0 .lut_mask = 16'h232A; defparam \inst9|inst5|Mux2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N18 +// Location: LCCOMB_X65_Y38_N6 fiftyfivenm_lcell_comb \inst9|inst5|Mux3~0 ( // Equation(s): // \inst9|inst5|Mux3~0_combout = (\inst9|inst5|latched_hex [1] & ((\inst9|inst5|latched_hex [0] & ((\inst9|inst5|latched_hex [2]))) # (!\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [3] & !\inst9|inst5|latched_hex [2])))) # // (!\inst9|inst5|latched_hex [1] & (!\inst9|inst5|latched_hex [3] & (\inst9|inst5|latched_hex [0] $ (\inst9|inst5|latched_hex [2])))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst5|Mux3~0 .lut_mask = 16'h8942; +defparam \inst9|inst5|Mux3~0 .lut_mask = 16'hA142; defparam \inst9|inst5|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N8 +// Location: LCCOMB_X65_Y38_N8 fiftyfivenm_lcell_comb \inst9|inst5|Mux4~0 ( // Equation(s): // \inst9|inst5|Mux4~0_combout = (\inst9|inst5|latched_hex [3] & (\inst9|inst5|latched_hex [2] & ((\inst9|inst5|latched_hex [1]) # (!\inst9|inst5|latched_hex [0])))) # (!\inst9|inst5|latched_hex [3] & (!\inst9|inst5|latched_hex [0] & // (\inst9|inst5|latched_hex [1] & !\inst9|inst5|latched_hex [2]))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst5|Mux4~0 .lut_mask = 16'hD004; +defparam \inst9|inst5|Mux4~0 .lut_mask = 16'hC410; defparam \inst9|inst5|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N10 +// Location: LCCOMB_X65_Y38_N10 fiftyfivenm_lcell_comb \inst9|inst5|Mux5~0 ( // Equation(s): -// \inst9|inst5|Mux5~0_combout = (\inst9|inst5|latched_hex [1] & ((\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [3])) # (!\inst9|inst5|latched_hex [0] & ((\inst9|inst5|latched_hex [2]))))) # (!\inst9|inst5|latched_hex [1] & -// (\inst9|inst5|latched_hex [2] & (\inst9|inst5|latched_hex [0] $ (\inst9|inst5|latched_hex [3])))) +// \inst9|inst5|Mux5~0_combout = (\inst9|inst5|latched_hex [3] & ((\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [1])) # (!\inst9|inst5|latched_hex [0] & ((\inst9|inst5|latched_hex [2]))))) # (!\inst9|inst5|latched_hex [3] & +// (\inst9|inst5|latched_hex [2] & (\inst9|inst5|latched_hex [0] $ (\inst9|inst5|latched_hex [1])))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux5~0_combout ), @@ -28618,48 +29080,65 @@ defparam \inst9|inst5|Mux5~0 .lut_mask = 16'hD680; defparam \inst9|inst5|Mux5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X56_Y39_N0 +// Location: LCCOMB_X65_Y38_N28 fiftyfivenm_lcell_comb \inst9|inst5|Mux6~0 ( // Equation(s): // \inst9|inst5|Mux6~0_combout = (\inst9|inst5|latched_hex [3] & (\inst9|inst5|latched_hex [0] & (\inst9|inst5|latched_hex [1] $ (\inst9|inst5|latched_hex [2])))) # (!\inst9|inst5|latched_hex [3] & (!\inst9|inst5|latched_hex [1] & (\inst9|inst5|latched_hex // [0] $ (\inst9|inst5|latched_hex [2])))) .dataa(\inst9|inst5|latched_hex [0]), - .datab(\inst9|inst5|latched_hex [1]), - .datac(\inst9|inst5|latched_hex [3]), + .datab(\inst9|inst5|latched_hex [3]), + .datac(\inst9|inst5|latched_hex [1]), .datad(\inst9|inst5|latched_hex [2]), .cin(gnd), .combout(\inst9|inst5|Mux6~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst5|Mux6~0 .lut_mask = 16'h2182; +defparam \inst9|inst5|Mux6~0 .lut_mask = 16'h0982; defparam \inst9|inst5|Mux6~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X51_Y44_N3 -dffeas \inst9|inst6|latched_hex[3] ( +// Location: LCCOMB_X59_Y37_N30 +fiftyfivenm_lcell_comb \inst9|inst6|latched_hex[1]~feeder ( +// Equation(s): +// \inst9|inst6|latched_hex[1]~feeder_combout = \inst13|inst1[5]~48_combout + + .dataa(\inst13|inst1[5]~48_combout ), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\inst9|inst6|latched_hex[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst9|inst6|latched_hex[1]~feeder .lut_mask = 16'hAAAA; +defparam \inst9|inst6|latched_hex[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X59_Y37_N31 +dffeas \inst9|inst6|latched_hex[1] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[7]~54_combout ), + .d(\inst9|inst6|latched_hex[1]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst6|latched_hex [3]), + .q(\inst9|inst6|latched_hex [1]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst6|latched_hex[3] .is_wysiwyg = "true"; -defparam \inst9|inst6|latched_hex[3] .power_up = "low"; +defparam \inst9|inst6|latched_hex[1] .is_wysiwyg = "true"; +defparam \inst9|inst6|latched_hex[1] .power_up = "low"; // synopsys translate_on -// Location: FF_X52_Y42_N9 -dffeas \inst9|inst6|latched_hex[0] ( +// Location: FF_X59_Y37_N1 +dffeas \inst9|inst6|latched_hex[2] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst1[4]~39_combout ), + .asdata(\inst13|inst1[6]~53_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), @@ -28667,34 +29146,34 @@ dffeas \inst9|inst6|latched_hex[0] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst6|latched_hex [0]), + .q(\inst9|inst6|latched_hex [2]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst6|latched_hex[0] .is_wysiwyg = "true"; -defparam \inst9|inst6|latched_hex[0] .power_up = "low"; +defparam \inst9|inst6|latched_hex[2] .is_wysiwyg = "true"; +defparam \inst9|inst6|latched_hex[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N26 -fiftyfivenm_lcell_comb \inst9|inst6|latched_hex[1]~feeder ( +// Location: LCCOMB_X59_Y37_N2 +fiftyfivenm_lcell_comb \inst9|inst6|latched_hex[3]~feeder ( // Equation(s): -// \inst9|inst6|latched_hex[1]~feeder_combout = \inst13|inst1[5]~44_combout +// \inst9|inst6|latched_hex[3]~feeder_combout = \inst13|inst1[7]~57_combout .dataa(gnd), .datab(gnd), - .datac(\inst13|inst1[5]~44_combout ), - .datad(gnd), + .datac(gnd), + .datad(\inst13|inst1[7]~57_combout ), .cin(gnd), - .combout(\inst9|inst6|latched_hex[1]~feeder_combout ), + .combout(\inst9|inst6|latched_hex[3]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|latched_hex[1]~feeder .lut_mask = 16'hF0F0; -defparam \inst9|inst6|latched_hex[1]~feeder .sum_lutc_input = "datac"; +defparam \inst9|inst6|latched_hex[3]~feeder .lut_mask = 16'hFF00; +defparam \inst9|inst6|latched_hex[3]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y42_N27 -dffeas \inst9|inst6|latched_hex[1] ( +// Location: FF_X59_Y37_N3 +dffeas \inst9|inst6|latched_hex[3] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(\inst9|inst6|latched_hex[1]~feeder_combout ), + .d(\inst9|inst6|latched_hex[3]~feeder_combout ), .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), @@ -28703,141 +29182,158 @@ dffeas \inst9|inst6|latched_hex[1] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst6|latched_hex [1]), + .q(\inst9|inst6|latched_hex [3]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst6|latched_hex[1] .is_wysiwyg = "true"; -defparam \inst9|inst6|latched_hex[1] .power_up = "low"; +defparam \inst9|inst6|latched_hex[3] .is_wysiwyg = "true"; +defparam \inst9|inst6|latched_hex[3] .power_up = "low"; // synopsys translate_on -// Location: FF_X51_Y44_N9 -dffeas \inst9|inst6|latched_hex[2] ( +// Location: LCCOMB_X59_Y37_N24 +fiftyfivenm_lcell_comb \inst9|inst6|latched_hex[0]~feeder ( +// Equation(s): +// \inst9|inst6|latched_hex[0]~feeder_combout = \inst13|inst1[4]~43_combout + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst1[4]~43_combout ), + .cin(gnd), + .combout(\inst9|inst6|latched_hex[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst9|inst6|latched_hex[0]~feeder .lut_mask = 16'hFF00; +defparam \inst9|inst6|latched_hex[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X59_Y37_N25 +dffeas \inst9|inst6|latched_hex[0] ( .clk(\inst3|HEX1_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[6]~49_combout ), + .d(\inst9|inst6|latched_hex[0]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\inst9|inst6|latched_hex [2]), + .q(\inst9|inst6|latched_hex [0]), .prn(vcc)); // synopsys translate_off -defparam \inst9|inst6|latched_hex[2] .is_wysiwyg = "true"; -defparam \inst9|inst6|latched_hex[2] .power_up = "low"; +defparam \inst9|inst6|latched_hex[0] .is_wysiwyg = "true"; +defparam \inst9|inst6|latched_hex[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N28 +// Location: LCCOMB_X63_Y37_N2 fiftyfivenm_lcell_comb \inst9|inst6|Mux0~0 ( // Equation(s): // \inst9|inst6|Mux0~0_combout = (\inst9|inst6|latched_hex [0] & ((\inst9|inst6|latched_hex [3]) # (\inst9|inst6|latched_hex [1] $ (\inst9|inst6|latched_hex [2])))) # (!\inst9|inst6|latched_hex [0] & ((\inst9|inst6|latched_hex [1]) # -// (\inst9|inst6|latched_hex [3] $ (\inst9|inst6|latched_hex [2])))) +// (\inst9|inst6|latched_hex [2] $ (\inst9|inst6|latched_hex [3])))) - .dataa(\inst9|inst6|latched_hex [3]), - .datab(\inst9|inst6|latched_hex [0]), - .datac(\inst9|inst6|latched_hex [1]), - .datad(\inst9|inst6|latched_hex [2]), + .dataa(\inst9|inst6|latched_hex [1]), + .datab(\inst9|inst6|latched_hex [2]), + .datac(\inst9|inst6|latched_hex [3]), + .datad(\inst9|inst6|latched_hex [0]), .cin(gnd), .combout(\inst9|inst6|Mux0~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|Mux0~0 .lut_mask = 16'hBDFA; +defparam \inst9|inst6|Mux0~0 .lut_mask = 16'hF6BE; defparam \inst9|inst6|Mux0~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N14 +// Location: LCCOMB_X63_Y37_N0 fiftyfivenm_lcell_comb \inst9|inst6|Mux1~0 ( // Equation(s): -// \inst9|inst6|Mux1~0_combout = (\inst9|inst6|latched_hex [0] & (\inst9|inst6|latched_hex [3] $ (((\inst9|inst6|latched_hex [1]) # (!\inst9|inst6|latched_hex [2]))))) # (!\inst9|inst6|latched_hex [0] & (!\inst9|inst6|latched_hex [3] & -// (\inst9|inst6|latched_hex [1] & !\inst9|inst6|latched_hex [2]))) +// \inst9|inst6|Mux1~0_combout = (\inst9|inst6|latched_hex [1] & (!\inst9|inst6|latched_hex [3] & ((\inst9|inst6|latched_hex [0]) # (!\inst9|inst6|latched_hex [2])))) # (!\inst9|inst6|latched_hex [1] & (\inst9|inst6|latched_hex [0] & +// (\inst9|inst6|latched_hex [2] $ (!\inst9|inst6|latched_hex [3])))) - .dataa(\inst9|inst6|latched_hex [3]), - .datab(\inst9|inst6|latched_hex [0]), - .datac(\inst9|inst6|latched_hex [1]), - .datad(\inst9|inst6|latched_hex [2]), + .dataa(\inst9|inst6|latched_hex [1]), + .datab(\inst9|inst6|latched_hex [2]), + .datac(\inst9|inst6|latched_hex [3]), + .datad(\inst9|inst6|latched_hex [0]), .cin(gnd), .combout(\inst9|inst6|Mux1~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|Mux1~0 .lut_mask = 16'h4854; +defparam \inst9|inst6|Mux1~0 .lut_mask = 16'h4B02; defparam \inst9|inst6|Mux1~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N4 +// Location: LCCOMB_X63_Y37_N14 fiftyfivenm_lcell_comb \inst9|inst6|Mux2~0 ( // Equation(s): -// \inst9|inst6|Mux2~0_combout = (\inst9|inst6|latched_hex [1] & (!\inst9|inst6|latched_hex [3] & (\inst9|inst6|latched_hex [0]))) # (!\inst9|inst6|latched_hex [1] & ((\inst9|inst6|latched_hex [2] & (!\inst9|inst6|latched_hex [3])) # +// \inst9|inst6|Mux2~0_combout = (\inst9|inst6|latched_hex [1] & (((!\inst9|inst6|latched_hex [3] & \inst9|inst6|latched_hex [0])))) # (!\inst9|inst6|latched_hex [1] & ((\inst9|inst6|latched_hex [2] & (!\inst9|inst6|latched_hex [3])) # // (!\inst9|inst6|latched_hex [2] & ((\inst9|inst6|latched_hex [0]))))) - .dataa(\inst9|inst6|latched_hex [3]), - .datab(\inst9|inst6|latched_hex [0]), - .datac(\inst9|inst6|latched_hex [1]), - .datad(\inst9|inst6|latched_hex [2]), + .dataa(\inst9|inst6|latched_hex [1]), + .datab(\inst9|inst6|latched_hex [2]), + .datac(\inst9|inst6|latched_hex [3]), + .datad(\inst9|inst6|latched_hex [0]), .cin(gnd), .combout(\inst9|inst6|Mux2~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|Mux2~0 .lut_mask = 16'h454C; +defparam \inst9|inst6|Mux2~0 .lut_mask = 16'h1F04; defparam \inst9|inst6|Mux2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N10 +// Location: LCCOMB_X63_Y37_N12 fiftyfivenm_lcell_comb \inst9|inst6|Mux3~0 ( // Equation(s): -// \inst9|inst6|Mux3~0_combout = (\inst9|inst6|latched_hex [1] & ((\inst9|inst6|latched_hex [0] & ((\inst9|inst6|latched_hex [2]))) # (!\inst9|inst6|latched_hex [0] & (\inst9|inst6|latched_hex [3] & !\inst9|inst6|latched_hex [2])))) # -// (!\inst9|inst6|latched_hex [1] & (!\inst9|inst6|latched_hex [3] & (\inst9|inst6|latched_hex [0] $ (\inst9|inst6|latched_hex [2])))) +// \inst9|inst6|Mux3~0_combout = (\inst9|inst6|latched_hex [1] & ((\inst9|inst6|latched_hex [2] & ((\inst9|inst6|latched_hex [0]))) # (!\inst9|inst6|latched_hex [2] & (\inst9|inst6|latched_hex [3] & !\inst9|inst6|latched_hex [0])))) # +// (!\inst9|inst6|latched_hex [1] & (!\inst9|inst6|latched_hex [3] & (\inst9|inst6|latched_hex [2] $ (\inst9|inst6|latched_hex [0])))) - .dataa(\inst9|inst6|latched_hex [3]), - .datab(\inst9|inst6|latched_hex [0]), - .datac(\inst9|inst6|latched_hex [1]), - .datad(\inst9|inst6|latched_hex [2]), + .dataa(\inst9|inst6|latched_hex [1]), + .datab(\inst9|inst6|latched_hex [2]), + .datac(\inst9|inst6|latched_hex [3]), + .datad(\inst9|inst6|latched_hex [0]), .cin(gnd), .combout(\inst9|inst6|Mux3~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|Mux3~0 .lut_mask = 16'hC124; +defparam \inst9|inst6|Mux3~0 .lut_mask = 16'h8924; defparam \inst9|inst6|Mux3~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X52_Y42_N24 +// Location: LCCOMB_X63_Y37_N26 fiftyfivenm_lcell_comb \inst9|inst6|Mux4~0 ( // Equation(s): -// \inst9|inst6|Mux4~0_combout = (\inst9|inst6|latched_hex [3] & (\inst9|inst6|latched_hex [2] & ((\inst9|inst6|latched_hex [1]) # (!\inst9|inst6|latched_hex [0])))) # (!\inst9|inst6|latched_hex [3] & (!\inst9|inst6|latched_hex [0] & -// (\inst9|inst6|latched_hex [1] & !\inst9|inst6|latched_hex [2]))) +// \inst9|inst6|Mux4~0_combout = (\inst9|inst6|latched_hex [2] & (\inst9|inst6|latched_hex [3] & ((\inst9|inst6|latched_hex [1]) # (!\inst9|inst6|latched_hex [0])))) # (!\inst9|inst6|latched_hex [2] & (\inst9|inst6|latched_hex [1] & +// (!\inst9|inst6|latched_hex [3] & !\inst9|inst6|latched_hex [0]))) - .dataa(\inst9|inst6|latched_hex [3]), - .datab(\inst9|inst6|latched_hex [0]), - .datac(\inst9|inst6|latched_hex [1]), - .datad(\inst9|inst6|latched_hex [2]), + .dataa(\inst9|inst6|latched_hex [1]), + .datab(\inst9|inst6|latched_hex [2]), + .datac(\inst9|inst6|latched_hex [3]), + .datad(\inst9|inst6|latched_hex [0]), .cin(gnd), .combout(\inst9|inst6|Mux4~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|Mux4~0 .lut_mask = 16'hA210; +defparam \inst9|inst6|Mux4~0 .lut_mask = 16'h80C2; defparam \inst9|inst6|Mux4~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N16 +// Location: LCCOMB_X63_Y37_N20 fiftyfivenm_lcell_comb \inst9|inst6|Mux5~0 ( // Equation(s): -// \inst9|inst6|Mux5~0_combout = (\inst9|inst6|latched_hex [3] & ((\inst9|inst6|latched_hex [0] & ((\inst9|inst6|latched_hex [1]))) # (!\inst9|inst6|latched_hex [0] & (\inst9|inst6|latched_hex [2])))) # (!\inst9|inst6|latched_hex [3] & -// (\inst9|inst6|latched_hex [2] & (\inst9|inst6|latched_hex [0] $ (\inst9|inst6|latched_hex [1])))) +// \inst9|inst6|Mux5~0_combout = (\inst9|inst6|latched_hex [1] & ((\inst9|inst6|latched_hex [0] & ((\inst9|inst6|latched_hex [3]))) # (!\inst9|inst6|latched_hex [0] & (\inst9|inst6|latched_hex [2])))) # (!\inst9|inst6|latched_hex [1] & +// (\inst9|inst6|latched_hex [2] & (\inst9|inst6|latched_hex [3] $ (\inst9|inst6|latched_hex [0])))) - .dataa(\inst9|inst6|latched_hex [0]), - .datab(\inst9|inst6|latched_hex [3]), - .datac(\inst9|inst6|latched_hex [2]), - .datad(\inst9|inst6|latched_hex [1]), + .dataa(\inst9|inst6|latched_hex [1]), + .datab(\inst9|inst6|latched_hex [2]), + .datac(\inst9|inst6|latched_hex [3]), + .datad(\inst9|inst6|latched_hex [0]), .cin(gnd), .combout(\inst9|inst6|Mux5~0_combout ), .cout()); // synopsys translate_off -defparam \inst9|inst6|Mux5~0 .lut_mask = 16'hD860; +defparam \inst9|inst6|Mux5~0 .lut_mask = 16'hA4C8; defparam \inst9|inst6|Mux5~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X51_Y44_N2 +// Location: LCCOMB_X63_Y37_N10 fiftyfivenm_lcell_comb \inst9|inst6|Mux6~0 ( // Equation(s): // \inst9|inst6|Mux6~0_combout = (\inst9|inst6|latched_hex [2] & (!\inst9|inst6|latched_hex [1] & (\inst9|inst6|latched_hex [3] $ (!\inst9|inst6|latched_hex [0])))) # (!\inst9|inst6|latched_hex [2] & (\inst9|inst6|latched_hex [0] & (\inst9|inst6|latched_hex @@ -28855,24 +29351,24 @@ defparam \inst9|inst6|Mux6~0 .lut_mask = 16'h6104; defparam \inst9|inst6|Mux6~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X50_Y43_N2 +// Location: LCCOMB_X58_Y38_N26 fiftyfivenm_lcell_comb \inst3|LED_EN ( // Equation(s): -// \inst3|LED_EN~combout = LCELL((\inst3|PWM_EN~1_combout & (\inst3|SWITCH_EN~1_combout & !\inst|IR [2]))) +// \inst3|LED_EN~combout = LCELL((!\inst|IR [2] & (\inst3|SWITCH_EN~1_combout & \inst3|PWM_EN~1_combout ))) - .dataa(\inst3|PWM_EN~1_combout ), + .dataa(\inst|IR [2]), .datab(\inst3|SWITCH_EN~1_combout ), .datac(gnd), - .datad(\inst|IR [2]), + .datad(\inst3|PWM_EN~1_combout ), .cin(gnd), .combout(\inst3|LED_EN~combout ), .cout()); // synopsys translate_off -defparam \inst3|LED_EN .lut_mask = 16'h0088; +defparam \inst3|LED_EN .lut_mask = 16'h4400; defparam \inst3|LED_EN .sum_lutc_input = "datac"; // synopsys translate_on -// Location: CLKCTRL_G10 +// Location: CLKCTRL_G9 fiftyfivenm_clkctrl \inst3|LED_EN~clkctrl ( .ena(vcc), .inclk({vcc,vcc,vcc,\inst3|LED_EN~combout }), @@ -28885,24 +29381,24 @@ defparam \inst3|LED_EN~clkctrl .clock_type = "global clock"; defparam \inst3|LED_EN~clkctrl .ena_register_mode = "none"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N12 +// Location: LCCOMB_X59_Y39_N16 fiftyfivenm_lcell_comb \inst6|DATA[9]~feeder ( // Equation(s): -// \inst6|DATA[9]~feeder_combout = \inst13|inst1[9]~64_combout +// \inst6|DATA[9]~feeder_combout = \inst13|inst1[9]~66_combout .dataa(gnd), - .datab(gnd), + .datab(\inst13|inst1[9]~66_combout ), .datac(gnd), - .datad(\inst13|inst1[9]~64_combout ), + .datad(gnd), .cin(gnd), .combout(\inst6|DATA[9]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst6|DATA[9]~feeder .lut_mask = 16'hFF00; +defparam \inst6|DATA[9]~feeder .lut_mask = 16'hCCCC; defparam \inst6|DATA[9]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y39_N13 +// Location: FF_X59_Y39_N17 dffeas \inst6|DATA[9] ( .clk(\inst3|LED_EN~clkctrl_outclk ), .d(\inst6|DATA[9]~feeder_combout ), @@ -28921,24 +29417,24 @@ defparam \inst6|DATA[9] .is_wysiwyg = "true"; defparam \inst6|DATA[9] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y39_N14 +// Location: LCCOMB_X59_Y39_N26 fiftyfivenm_lcell_comb \inst6|DATA[8]~feeder ( // Equation(s): -// \inst6|DATA[8]~feeder_combout = \inst13|inst1[8]~59_combout +// \inst6|DATA[8]~feeder_combout = \inst13|inst1[8]~62_combout - .dataa(\inst13|inst1[8]~59_combout ), + .dataa(gnd), .datab(gnd), - .datac(gnd), + .datac(\inst13|inst1[8]~62_combout ), .datad(gnd), .cin(gnd), .combout(\inst6|DATA[8]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst6|DATA[8]~feeder .lut_mask = 16'hAAAA; +defparam \inst6|DATA[8]~feeder .lut_mask = 16'hF0F0; defparam \inst6|DATA[8]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X50_Y39_N15 +// Location: FF_X59_Y39_N27 dffeas \inst6|DATA[8] ( .clk(\inst3|LED_EN~clkctrl_outclk ), .d(\inst6|DATA[8]~feeder_combout ), @@ -28957,24 +29453,24 @@ defparam \inst6|DATA[8] .is_wysiwyg = "true"; defparam \inst6|DATA[8] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y44_N24 +// Location: LCCOMB_X58_Y40_N4 fiftyfivenm_lcell_comb \inst6|DATA[7]~feeder ( // Equation(s): -// \inst6|DATA[7]~feeder_combout = \inst13|inst1[7]~54_combout +// \inst6|DATA[7]~feeder_combout = \inst13|inst1[7]~57_combout .dataa(gnd), - .datab(\inst13|inst1[7]~54_combout ), + .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[7]~57_combout ), .cin(gnd), .combout(\inst6|DATA[7]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst6|DATA[7]~feeder .lut_mask = 16'hCCCC; +defparam \inst6|DATA[7]~feeder .lut_mask = 16'hFF00; defparam \inst6|DATA[7]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y44_N25 +// Location: FF_X58_Y40_N5 dffeas \inst6|DATA[7] ( .clk(\inst3|LED_EN~clkctrl_outclk ), .d(\inst6|DATA[7]~feeder_combout ), @@ -28993,32 +29489,15 @@ defparam \inst6|DATA[7] .is_wysiwyg = "true"; defparam \inst6|DATA[7] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y44_N26 -fiftyfivenm_lcell_comb \inst6|DATA[6]~feeder ( -// Equation(s): -// \inst6|DATA[6]~feeder_combout = \inst13|inst1[6]~49_combout - - .dataa(gnd), - .datab(\inst13|inst1[6]~49_combout ), - .datac(gnd), - .datad(gnd), - .cin(gnd), - .combout(\inst6|DATA[6]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst6|DATA[6]~feeder .lut_mask = 16'hCCCC; -defparam \inst6|DATA[6]~feeder .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X52_Y44_N27 +// Location: FF_X58_Y37_N17 dffeas \inst6|DATA[6] ( .clk(\inst3|LED_EN~clkctrl_outclk ), - .d(\inst6|DATA[6]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[6]~53_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -29029,15 +29508,32 @@ defparam \inst6|DATA[6] .is_wysiwyg = "true"; defparam \inst6|DATA[6] .power_up = "low"; // synopsys translate_on -// Location: FF_X54_Y42_N1 +// Location: LCCOMB_X58_Y40_N22 +fiftyfivenm_lcell_comb \inst6|DATA[5]~feeder ( +// Equation(s): +// \inst6|DATA[5]~feeder_combout = \inst13|inst1[5]~48_combout + + .dataa(gnd), + .datab(gnd), + .datac(\inst13|inst1[5]~48_combout ), + .datad(gnd), + .cin(gnd), + .combout(\inst6|DATA[5]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst6|DATA[5]~feeder .lut_mask = 16'hF0F0; +defparam \inst6|DATA[5]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X58_Y40_N23 dffeas \inst6|DATA[5] ( .clk(\inst3|LED_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[5]~44_combout ), + .d(\inst6|DATA[5]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -29048,24 +29544,24 @@ defparam \inst6|DATA[5] .is_wysiwyg = "true"; defparam \inst6|DATA[5] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X56_Y42_N24 +// Location: LCCOMB_X58_Y40_N28 fiftyfivenm_lcell_comb \inst6|DATA[4]~feeder ( // Equation(s): -// \inst6|DATA[4]~feeder_combout = \inst13|inst1[4]~39_combout +// \inst6|DATA[4]~feeder_combout = \inst13|inst1[4]~43_combout .dataa(gnd), - .datab(\inst13|inst1[4]~39_combout ), + .datab(gnd), .datac(gnd), - .datad(gnd), + .datad(\inst13|inst1[4]~43_combout ), .cin(gnd), .combout(\inst6|DATA[4]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst6|DATA[4]~feeder .lut_mask = 16'hCCCC; +defparam \inst6|DATA[4]~feeder .lut_mask = 16'hFF00; defparam \inst6|DATA[4]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X56_Y42_N25 +// Location: FF_X58_Y40_N29 dffeas \inst6|DATA[4] ( .clk(\inst3|LED_EN~clkctrl_outclk ), .d(\inst6|DATA[4]~feeder_combout ), @@ -29084,32 +29580,15 @@ defparam \inst6|DATA[4] .is_wysiwyg = "true"; defparam \inst6|DATA[4] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X50_Y42_N4 -fiftyfivenm_lcell_comb \inst6|DATA[3]~feeder ( -// Equation(s): -// \inst6|DATA[3]~feeder_combout = \inst13|inst1[3]~34_combout - - .dataa(gnd), - .datab(gnd), - .datac(\inst13|inst1[3]~34_combout ), - .datad(gnd), - .cin(gnd), - .combout(\inst6|DATA[3]~feeder_combout ), - .cout()); -// synopsys translate_off -defparam \inst6|DATA[3]~feeder .lut_mask = 16'hF0F0; -defparam \inst6|DATA[3]~feeder .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: FF_X50_Y42_N5 +// Location: FF_X60_Y38_N21 dffeas \inst6|DATA[3] ( .clk(\inst3|LED_EN~clkctrl_outclk ), - .d(\inst6|DATA[3]~feeder_combout ), - .asdata(vcc), + .d(gnd), + .asdata(\inst13|inst1[3]~38_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(gnd), + .sload(vcc), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -29120,11 +29599,11 @@ defparam \inst6|DATA[3] .is_wysiwyg = "true"; defparam \inst6|DATA[3] .power_up = "low"; // synopsys translate_on -// Location: FF_X52_Y44_N13 +// Location: FF_X60_Y38_N19 dffeas \inst6|DATA[2] ( .clk(\inst3|LED_EN~clkctrl_outclk ), .d(gnd), - .asdata(\inst13|inst1[2]~29_combout ), + .asdata(\inst13|inst1[2]~34_combout ), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), @@ -29139,15 +29618,32 @@ defparam \inst6|DATA[2] .is_wysiwyg = "true"; defparam \inst6|DATA[2] .power_up = "low"; // synopsys translate_on -// Location: FF_X50_Y42_N23 +// Location: LCCOMB_X62_Y38_N30 +fiftyfivenm_lcell_comb \inst6|DATA[1]~feeder ( +// Equation(s): +// \inst6|DATA[1]~feeder_combout = \inst13|inst1[1]~30_combout + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\inst13|inst1[1]~30_combout ), + .cin(gnd), + .combout(\inst6|DATA[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \inst6|DATA[1]~feeder .lut_mask = 16'hFF00; +defparam \inst6|DATA[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X62_Y38_N31 dffeas \inst6|DATA[1] ( .clk(\inst3|LED_EN~clkctrl_outclk ), - .d(gnd), - .asdata(\inst13|inst1[1]~24_combout ), + .d(\inst6|DATA[1]~feeder_combout ), + .asdata(vcc), .clrn(\inst13|inst14|data_out[7]~0clkctrl_outclk ), .aload(gnd), .sclr(gnd), - .sload(vcc), + .sload(gnd), .ena(vcc), .devclrn(devclrn), .devpor(devpor), @@ -29158,24 +29654,24 @@ defparam \inst6|DATA[1] .is_wysiwyg = "true"; defparam \inst6|DATA[1] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X52_Y44_N14 +// Location: LCCOMB_X62_Y38_N8 fiftyfivenm_lcell_comb \inst6|DATA[0]~feeder ( // Equation(s): -// \inst6|DATA[0]~feeder_combout = \inst13|inst1[0]~19_combout +// \inst6|DATA[0]~feeder_combout = \inst13|inst1[0]~25_combout - .dataa(gnd), + .dataa(\inst13|inst1[0]~25_combout ), .datab(gnd), .datac(gnd), - .datad(\inst13|inst1[0]~19_combout ), + .datad(gnd), .cin(gnd), .combout(\inst6|DATA[0]~feeder_combout ), .cout()); // synopsys translate_off -defparam \inst6|DATA[0]~feeder .lut_mask = 16'hFF00; +defparam \inst6|DATA[0]~feeder .lut_mask = 16'hAAAA; defparam \inst6|DATA[0]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X52_Y44_N15 +// Location: FF_X62_Y38_N9 dffeas \inst6|DATA[0] ( .clk(\inst3|LED_EN~clkctrl_outclk ), .d(\inst6|DATA[0]~feeder_combout ), diff --git a/simulation/modelsim/SCOMP_modelsim.xrf b/simulation/modelsim/SCOMP_modelsim.xrf index d6d6749..394e922 100644 --- a/simulation/modelsim/SCOMP_modelsim.xrf +++ b/simulation/modelsim/SCOMP_modelsim.xrf @@ -1,48 +1,49 @@ vendor_name = ModelSim -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/I2C_INTERFACE.bdf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_master.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/i2c_ctrl.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_OUT.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/DIG_IN.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/clk_div.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/TIMER.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/IO_DECODER.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_System.bdf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP_test.vwf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.qip -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PLL_main.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/HEX_DISP_6.bdf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/Incrementer.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/QuadratureDecoder.vhd -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/PWMGenerator.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/I2C_INTERFACE.bdf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_master.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/i2c_ctrl.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_OUT.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/DIG_IN.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/clk_div.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/TIMER.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/IO_DECODER.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_System.bdf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP_test.vwf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.qip +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PLL_main.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/HEX_DISP_6.bdf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/Incrementer.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/QuadratureDecoder.vhd +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/PWMGenerator.vhd source_file = 1, output_files/PositionControl.vhd -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/vhdl/ieee/prmtvs_b.vhd -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/vhdl/ieee/prmtvs_p.vhd -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/vhdl/ieee/timing_b.vhd -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/vhdl/ieee/timing_p.vhd -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altpll.tdf -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/aglobal191.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/stratix_pll.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/stratixii_pll.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/cycloneii_pll.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/cbx.lst -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/pll_main_altpll.v -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altsyncram.tdf -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/stratix_ram_block.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_mux.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_decode.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/a_rdenreg.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altrom.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altram.inc -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/altdpram.inc -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/altsyncram_efs3.tdf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/velocitycontrol.mif -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_clshift.tdf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/db/lpm_clshift_fuc.tdf -source_file = 1, c:/users/ivanzou/quartuslite/quartus/libraries/megafunctions/lpm_bustri.tdf -source_file = 1, C:/Users/IvanZou/OneDrive/Documents/ECE2031/MotorDecoderInterface/SCOMP.sdc +source_file = 1, VelocityControl.vhd +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/vhdl/ieee/prmtvs_b.vhd +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/vhdl/ieee/prmtvs_p.vhd +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/vhdl/ieee/timing_b.vhd +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/vhdl/ieee/timing_p.vhd +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altpll.tdf +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/aglobal191.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/stratix_pll.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/stratixii_pll.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/cycloneii_pll.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/cbx.lst +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/pll_main_altpll.v +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altsyncram.tdf +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/stratix_ram_block.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_mux.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_decode.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/a_rdenreg.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altrom.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altram.inc +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/altdpram.inc +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/altsyncram_efs3.tdf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/velocitycontrol.mif +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_clshift.tdf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/db/lpm_clshift_fuc.tdf +source_file = 1, c:/intelfpga_lite/19.1/quartus/libraries/megafunctions/lpm_bustri.tdf +source_file = 1, C:/Users/Hari/Documents/GitHub/MotorDecoderInterface/SCOMP.sdc design_name = SCOMP_System instance = comp, \~QUARTUS_CREATED_GND~I , ~QUARTUS_CREATED_GND~I, SCOMP_System, 1 instance = comp, \GSENSOR_CS_n~output , GSENSOR_CS_n~output, SCOMP_System, 1 @@ -111,31 +112,31 @@ instance = comp, \clock_50~input , clock_50~input, SCOMP_System, 1 instance = comp, \inst1|altpll_component|auto_generated|pll1 , inst1|altpll_component|auto_generated|pll1, SCOMP_System, 1 instance = comp, \inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl , inst1|altpll_component|auto_generated|wire_pll1_clk[0]~clkctrl, SCOMP_System, 1 instance = comp, \inst5|count_100kHz[0]~6 , inst5|count_100kHz[0]~6, SCOMP_System, 1 -instance = comp, \inst5|count_100kHz[1]~8 , inst5|count_100kHz[1]~8, SCOMP_System, 1 -instance = comp, \inst5|count_100kHz[2]~10 , inst5|count_100kHz[2]~10, SCOMP_System, 1 -instance = comp, \inst5|count_100kHz[2] , inst5|count_100kHz[2], SCOMP_System, 1 instance = comp, \inst5|count_100kHz[3]~12 , inst5|count_100kHz[3]~12, SCOMP_System, 1 -instance = comp, \inst5|count_100kHz[3] , inst5|count_100kHz[3], SCOMP_System, 1 instance = comp, \inst5|count_100kHz[4]~14 , inst5|count_100kHz[4]~14, SCOMP_System, 1 instance = comp, \inst5|count_100kHz[4] , inst5|count_100kHz[4], SCOMP_System, 1 instance = comp, \inst5|count_100kHz[5]~16 , inst5|count_100kHz[5]~16, SCOMP_System, 1 instance = comp, \inst5|count_100kHz[5] , inst5|count_100kHz[5], SCOMP_System, 1 instance = comp, \inst5|LessThan0~1 , inst5|LessThan0~1, SCOMP_System, 1 instance = comp, \inst5|count_100kHz[0] , inst5|count_100kHz[0], SCOMP_System, 1 +instance = comp, \inst5|count_100kHz[1]~8 , inst5|count_100kHz[1]~8, SCOMP_System, 1 instance = comp, \inst5|count_100kHz[1] , inst5|count_100kHz[1], SCOMP_System, 1 +instance = comp, \inst5|count_100kHz[2]~10 , inst5|count_100kHz[2]~10, SCOMP_System, 1 +instance = comp, \inst5|count_100kHz[2] , inst5|count_100kHz[2], SCOMP_System, 1 +instance = comp, \inst5|count_100kHz[3] , inst5|count_100kHz[3], SCOMP_System, 1 instance = comp, \inst5|LessThan0~0 , inst5|LessThan0~0, SCOMP_System, 1 instance = comp, \inst5|clock_100kHz_int~0 , inst5|clock_100kHz_int~0, SCOMP_System, 1 instance = comp, \inst5|clock_100kHz_int , inst5|clock_100kHz_int, SCOMP_System, 1 instance = comp, \inst5|clock_100kHz~feeder , inst5|clock_100kHz~feeder, SCOMP_System, 1 instance = comp, \inst5|clock_100kHz , inst5|clock_100kHz, SCOMP_System, 1 instance = comp, \inst5|clock_100kHz~clkctrl , inst5|clock_100kHz~clkctrl, SCOMP_System, 1 -instance = comp, \GSENSOR_SCLK~input , GSENSOR_SCLK~input, SCOMP_System, 1 instance = comp, \inst13|inst|count~1 , inst13|inst|count~1, SCOMP_System, 1 instance = comp, \inst1|altpll_component|auto_generated|pll_lock_sync~feeder , inst1|altpll_component|auto_generated|pll_lock_sync~feeder, SCOMP_System, 1 instance = comp, \inst1|altpll_component|auto_generated|pll_lock_sync , inst1|altpll_component|auto_generated|pll_lock_sync, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[7]~0 , inst13|inst14|data_out[7]~0, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[7]~0clkctrl , inst13|inst14|data_out[7]~0clkctrl, SCOMP_System, 1 instance = comp, \inst13|inst|count[0] , inst13|inst|count[0], SCOMP_System, 1 +instance = comp, \GSENSOR_SCLK~input , GSENSOR_SCLK~input, SCOMP_System, 1 instance = comp, \inst13|inst|stretch~0 , inst13|inst|stretch~0, SCOMP_System, 1 instance = comp, \inst13|inst|stretch , inst13|inst|stretch, SCOMP_System, 1 instance = comp, \inst13|inst|count~0 , inst13|inst|count~0, SCOMP_System, 1 @@ -143,16 +144,81 @@ instance = comp, \inst13|inst|count[1] , inst13|inst|count[1], SCOMP_System, 1 instance = comp, \inst13|inst|data_clk~0 , inst13|inst|data_clk~0, SCOMP_System, 1 instance = comp, \inst13|inst|data_clk , inst13|inst|data_clk, SCOMP_System, 1 instance = comp, \inst13|inst|data_clk~clkctrl , inst13|inst|data_clk~clkctrl, SCOMP_System, 1 +instance = comp, \inst13|inst|bit_cnt[0]~0 , inst13|inst|bit_cnt[0]~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector27~0 , inst13|inst|Selector27~0, SCOMP_System, 1 +instance = comp, \inst13|inst|bit_cnt[1]~feeder , inst13|inst|bit_cnt[1]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|bit_cnt[1] , inst13|inst|bit_cnt[1], SCOMP_System, 1 +instance = comp, \inst13|inst|Add1~0 , inst13|inst|Add1~0, SCOMP_System, 1 +instance = comp, \inst13|inst|bit_cnt[2] , inst13|inst|bit_cnt[2], SCOMP_System, 1 +instance = comp, \inst13|inst|state~14 , inst13|inst|state~14, SCOMP_System, 1 +instance = comp, \inst13|inst|state.mstr_ack~feeder , inst13|inst|state.mstr_ack~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|state.mstr_ack , inst13|inst|state.mstr_ack, SCOMP_System, 1 +instance = comp, \inst|state.decode , inst|state.decode, SCOMP_System, 1 +instance = comp, \inst|state~50 , inst|state~50, SCOMP_System, 1 +instance = comp, \inst|state.ex_return , inst|state.ex_return, SCOMP_System, 1 instance = comp, \inst10|state.Init~feeder , inst10|state.Init~feeder, SCOMP_System, 1 instance = comp, \inst10|state.Init , inst10|state.Init, SCOMP_System, 1 -instance = comp, \inst|Selector8~0 , inst|Selector8~0, SCOMP_System, 1 -instance = comp, \inst|Selector6~0 , inst|Selector6~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][1]~feeder , inst|PC_stack[9][1]~feeder, SCOMP_System, 1 instance = comp, \inst|state~55 , inst|state~55, SCOMP_System, 1 instance = comp, \inst|state.ex_call , inst|state.ex_call, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][0]~1 , inst|PC_stack[9][0]~1, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][1] , inst|PC_stack[9][1], SCOMP_System, 1 +instance = comp, \inst|Selector128~0 , inst|Selector128~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[0][0]~0 , inst|PC_stack[0][0]~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[8][1] , inst|PC_stack[8][1], SCOMP_System, 1 +instance = comp, \inst|Selector117~0 , inst|Selector117~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[7][1] , inst|PC_stack[7][1], SCOMP_System, 1 +instance = comp, \inst|Selector106~0 , inst|Selector106~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[6][1] , inst|PC_stack[6][1], SCOMP_System, 1 +instance = comp, \inst|Selector95~0 , inst|Selector95~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[5][1] , inst|PC_stack[5][1], SCOMP_System, 1 +instance = comp, \inst|Selector84~0 , inst|Selector84~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[4][1] , inst|PC_stack[4][1], SCOMP_System, 1 +instance = comp, \inst|Selector73~0 , inst|Selector73~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[3][1] , inst|PC_stack[3][1], SCOMP_System, 1 +instance = comp, \inst|Selector62~0 , inst|Selector62~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[2][1] , inst|PC_stack[2][1], SCOMP_System, 1 +instance = comp, \inst|Selector51~0 , inst|Selector51~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[1][1] , inst|PC_stack[1][1], SCOMP_System, 1 +instance = comp, \inst|Selector40~0 , inst|Selector40~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[0][1] , inst|PC_stack[0][1], SCOMP_System, 1 +instance = comp, \inst|Add0~0 , inst|Add0~0, SCOMP_System, 1 +instance = comp, \inst|Selector11~1 , inst|Selector11~1, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][0]~feeder , inst|PC_stack[9][0]~feeder, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][0] , inst|PC_stack[9][0], SCOMP_System, 1 +instance = comp, \inst|Selector129~0 , inst|Selector129~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[8][0] , inst|PC_stack[8][0], SCOMP_System, 1 +instance = comp, \inst|Selector118~0 , inst|Selector118~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[7][0] , inst|PC_stack[7][0], SCOMP_System, 1 +instance = comp, \inst|Selector107~0 , inst|Selector107~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[6][0] , inst|PC_stack[6][0], SCOMP_System, 1 +instance = comp, \inst|Selector96~0 , inst|Selector96~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[5][0] , inst|PC_stack[5][0], SCOMP_System, 1 +instance = comp, \inst|Selector85~0 , inst|Selector85~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[4][0] , inst|PC_stack[4][0], SCOMP_System, 1 +instance = comp, \inst|Selector74~0 , inst|Selector74~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[3][0] , inst|PC_stack[3][0], SCOMP_System, 1 +instance = comp, \inst|Selector63~0 , inst|Selector63~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[2][0] , inst|PC_stack[2][0], SCOMP_System, 1 +instance = comp, \inst|Selector52~0 , inst|Selector52~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[1][0] , inst|PC_stack[1][0], SCOMP_System, 1 +instance = comp, \inst|Selector41~0 , inst|Selector41~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[0][0] , inst|PC_stack[0][0], SCOMP_System, 1 +instance = comp, \inst|Selector11~2 , inst|Selector11~2, SCOMP_System, 1 +instance = comp, \inst|state~46 , inst|state~46, SCOMP_System, 1 +instance = comp, \inst|state.ex_shift , inst|state.ex_shift, SCOMP_System, 1 +instance = comp, \inst|Add0~6 , inst|Add0~6, SCOMP_System, 1 +instance = comp, \inst|Add0~8 , inst|Add0~8, SCOMP_System, 1 +instance = comp, \inst|state~37 , inst|state~37, SCOMP_System, 1 +instance = comp, \inst|state~47 , inst|state~47, SCOMP_System, 1 +instance = comp, \inst|state.ex_iload , inst|state.ex_iload, SCOMP_System, 1 +instance = comp, \inst|state.ex_istore2 , inst|state.ex_istore2, SCOMP_System, 1 +instance = comp, \inst|WideNor0 , inst|WideNor0, SCOMP_System, 1 +instance = comp, \inst|Selector7~0 , inst|Selector7~0, SCOMP_System, 1 +instance = comp, \inst|Selector7~1 , inst|Selector7~1, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][4]~feeder , inst|PC_stack[9][4]~feeder, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][4] , inst|PC_stack[9][4], SCOMP_System, 1 instance = comp, \inst|Selector125~0 , inst|Selector125~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[0][0]~0 , inst|PC_stack[0][0]~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[8][4] , inst|PC_stack[8][4], SCOMP_System, 1 instance = comp, \inst|Selector114~0 , inst|Selector114~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[7][4] , inst|PC_stack[7][4], SCOMP_System, 1 @@ -170,50 +236,51 @@ instance = comp, \inst|Selector48~0 , inst|Selector48~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[1][4] , inst|PC_stack[1][4], SCOMP_System, 1 instance = comp, \inst|Selector37~0 , inst|Selector37~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[0][4] , inst|PC_stack[0][4], SCOMP_System, 1 -instance = comp, \inst|Add0~6 , inst|Add0~6, SCOMP_System, 1 -instance = comp, \inst|Add0~8 , inst|Add0~8, SCOMP_System, 1 -instance = comp, \inst|Selector7~1 , inst|Selector7~1, SCOMP_System, 1 instance = comp, \inst|Selector7~2 , inst|Selector7~2, SCOMP_System, 1 -instance = comp, \inst|state~43 , inst|state~43, SCOMP_System, 1 -instance = comp, \inst|state~52 , inst|state~52, SCOMP_System, 1 -instance = comp, \inst|state.ex_jzero , inst|state.ex_jzero, SCOMP_System, 1 -instance = comp, \inst|state~35 , inst|state~35, SCOMP_System, 1 -instance = comp, \inst|state~51 , inst|state~51, SCOMP_System, 1 -instance = comp, \inst|state.ex_jpos , inst|state.ex_jpos, SCOMP_System, 1 -instance = comp, \inst|Selector28~0 , inst|Selector28~0, SCOMP_System, 1 -instance = comp, \inst|Selector28~1 , inst|Selector28~1, SCOMP_System, 1 -instance = comp, \inst|IO_WRITE_int , inst|IO_WRITE_int, SCOMP_System, 1 -instance = comp, \inst|IR[0]~0 , inst|IR[0]~0, SCOMP_System, 1 -instance = comp, \inst|IR[4] , inst|IR[4], SCOMP_System, 1 -instance = comp, \inst|IR[1] , inst|IR[1], SCOMP_System, 1 -instance = comp, \inst3|I2C_RDY_EN~0 , inst3|I2C_RDY_EN~0, SCOMP_System, 1 -instance = comp, \inst13|inst4 , inst13|inst4, SCOMP_System, 1 -instance = comp, \inst|Selector4~0 , inst|Selector4~0, SCOMP_System, 1 +instance = comp, \inst|PC[4] , inst|PC[4], SCOMP_System, 1 +instance = comp, \inst|next_mem_addr[4]~4 , inst|next_mem_addr[4]~4, SCOMP_System, 1 instance = comp, \inst|Add0~10 , inst|Add0~10, SCOMP_System, 1 instance = comp, \inst|Add0~12 , inst|Add0~12, SCOMP_System, 1 -instance = comp, \inst|Selector5~1 , inst|Selector5~1, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][6]~feeder , inst|PC_stack[9][6]~feeder, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][6] , inst|PC_stack[9][6], SCOMP_System, 1 -instance = comp, \inst|Selector123~0 , inst|Selector123~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[8][6] , inst|PC_stack[8][6], SCOMP_System, 1 -instance = comp, \inst|Selector112~0 , inst|Selector112~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[7][6] , inst|PC_stack[7][6], SCOMP_System, 1 -instance = comp, \inst|Selector101~0 , inst|Selector101~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[6][6] , inst|PC_stack[6][6], SCOMP_System, 1 -instance = comp, \inst|Selector90~0 , inst|Selector90~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[5][6] , inst|PC_stack[5][6], SCOMP_System, 1 -instance = comp, \inst|Selector79~0 , inst|Selector79~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[4][6] , inst|PC_stack[4][6], SCOMP_System, 1 -instance = comp, \inst|Selector68~0 , inst|Selector68~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[3][6] , inst|PC_stack[3][6], SCOMP_System, 1 -instance = comp, \inst|Selector57~0 , inst|Selector57~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[2][6] , inst|PC_stack[2][6], SCOMP_System, 1 -instance = comp, \inst|Selector46~0 , inst|Selector46~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[1][6] , inst|PC_stack[1][6], SCOMP_System, 1 -instance = comp, \inst|Selector35~0 , inst|Selector35~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[0][6] , inst|PC_stack[0][6], SCOMP_System, 1 -instance = comp, \inst|Selector5~2 , inst|Selector5~2, SCOMP_System, 1 -instance = comp, \inst|PC[6] , inst|PC[6], SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][8]~feeder , inst|PC_stack[9][8]~feeder, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][8] , inst|PC_stack[9][8], SCOMP_System, 1 +instance = comp, \inst|Selector121~0 , inst|Selector121~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[8][8] , inst|PC_stack[8][8], SCOMP_System, 1 +instance = comp, \inst|Selector110~0 , inst|Selector110~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[7][8] , inst|PC_stack[7][8], SCOMP_System, 1 +instance = comp, \inst|Selector99~0 , inst|Selector99~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[6][8] , inst|PC_stack[6][8], SCOMP_System, 1 +instance = comp, \inst|Selector88~0 , inst|Selector88~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[5][8] , inst|PC_stack[5][8], SCOMP_System, 1 +instance = comp, \inst|Selector77~0 , inst|Selector77~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[4][8] , inst|PC_stack[4][8], SCOMP_System, 1 +instance = comp, \inst|Selector66~0 , inst|Selector66~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[3][8] , inst|PC_stack[3][8], SCOMP_System, 1 +instance = comp, \inst|Selector55~0 , inst|Selector55~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[2][8] , inst|PC_stack[2][8], SCOMP_System, 1 +instance = comp, \inst|Selector44~0 , inst|Selector44~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[1][8] , inst|PC_stack[1][8], SCOMP_System, 1 +instance = comp, \inst|Selector33~0 , inst|Selector33~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[0][8] , inst|PC_stack[0][8], SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][10]~feeder , inst|PC_stack[9][10]~feeder, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][10] , inst|PC_stack[9][10], SCOMP_System, 1 +instance = comp, \inst|Selector119~0 , inst|Selector119~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[8][10] , inst|PC_stack[8][10], SCOMP_System, 1 +instance = comp, \inst|Selector108~0 , inst|Selector108~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[7][10] , inst|PC_stack[7][10], SCOMP_System, 1 +instance = comp, \inst|Selector97~0 , inst|Selector97~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[6][10] , inst|PC_stack[6][10], SCOMP_System, 1 +instance = comp, \inst|Selector86~0 , inst|Selector86~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[5][10] , inst|PC_stack[5][10], SCOMP_System, 1 +instance = comp, \inst|Selector75~0 , inst|Selector75~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[4][10] , inst|PC_stack[4][10], SCOMP_System, 1 +instance = comp, \inst|Selector64~0 , inst|Selector64~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[3][10] , inst|PC_stack[3][10], SCOMP_System, 1 +instance = comp, \inst|Selector53~0 , inst|Selector53~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[2][10] , inst|PC_stack[2][10], SCOMP_System, 1 +instance = comp, \inst|Selector42~0 , inst|Selector42~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[1][10] , inst|PC_stack[1][10], SCOMP_System, 1 +instance = comp, \inst|Selector31~0 , inst|Selector31~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[0][10] , inst|PC_stack[0][10], SCOMP_System, 1 instance = comp, \inst|Add0~14 , inst|Add0~14, SCOMP_System, 1 instance = comp, \inst|Selector4~1 , inst|Selector4~1, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][7]~feeder , inst|PC_stack[9][7]~feeder, SCOMP_System, 1 @@ -238,189 +305,167 @@ instance = comp, \inst|Selector34~0 , inst|Selector34~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[0][7] , inst|PC_stack[0][7], SCOMP_System, 1 instance = comp, \inst|Selector4~2 , inst|Selector4~2, SCOMP_System, 1 instance = comp, \inst|PC[7] , inst|PC[7], SCOMP_System, 1 -instance = comp, \inst|next_mem_addr[7]~7 , inst|next_mem_addr[7]~7, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][8] , inst|PC_stack[9][8], SCOMP_System, 1 -instance = comp, \inst|Selector121~0 , inst|Selector121~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[8][8] , inst|PC_stack[8][8], SCOMP_System, 1 -instance = comp, \inst|Selector110~0 , inst|Selector110~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[7][8] , inst|PC_stack[7][8], SCOMP_System, 1 -instance = comp, \inst|Selector99~0 , inst|Selector99~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[6][8] , inst|PC_stack[6][8], SCOMP_System, 1 -instance = comp, \inst|Selector88~0 , inst|Selector88~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[5][8] , inst|PC_stack[5][8], SCOMP_System, 1 -instance = comp, \inst|Selector77~0 , inst|Selector77~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[4][8] , inst|PC_stack[4][8], SCOMP_System, 1 -instance = comp, \inst|Selector66~0 , inst|Selector66~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[3][8] , inst|PC_stack[3][8], SCOMP_System, 1 -instance = comp, \inst|Selector55~0 , inst|Selector55~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[2][8] , inst|PC_stack[2][8], SCOMP_System, 1 -instance = comp, \inst|Selector44~0 , inst|Selector44~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[1][8] , inst|PC_stack[1][8], SCOMP_System, 1 -instance = comp, \inst|Selector33~0 , inst|Selector33~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[0][8] , inst|PC_stack[0][8], SCOMP_System, 1 instance = comp, \inst|Add0~16 , inst|Add0~16, SCOMP_System, 1 -instance = comp, \inst|Selector3~1 , inst|Selector3~1, SCOMP_System, 1 -instance = comp, \inst|Selector3~2 , inst|Selector3~2, SCOMP_System, 1 -instance = comp, \inst|PC[8] , inst|PC[8], SCOMP_System, 1 instance = comp, \inst|Add0~18 , inst|Add0~18, SCOMP_System, 1 -instance = comp, \inst|state~37 , inst|state~37, SCOMP_System, 1 +instance = comp, \inst|Add0~20 , inst|Add0~20, SCOMP_System, 1 +instance = comp, \inst|state~35 , inst|state~35, SCOMP_System, 1 +instance = comp, \inst|state~36 , inst|state~36, SCOMP_System, 1 +instance = comp, \inst|state.ex_xor , inst|state.ex_xor, SCOMP_System, 1 +instance = comp, \inst|Selector25~3 , inst|Selector25~3, SCOMP_System, 1 instance = comp, \inst|state~38 , inst|state~38, SCOMP_System, 1 instance = comp, \inst|state.ex_or , inst|state.ex_or, SCOMP_System, 1 +instance = comp, \inst|Selector30~0 , inst|Selector30~0, SCOMP_System, 1 instance = comp, \inst|Selector30~1 , inst|Selector30~1, SCOMP_System, 1 instance = comp, \inst|state.ex_load , inst|state.ex_load, SCOMP_System, 1 instance = comp, \inst|Selector27~1 , inst|Selector27~1, SCOMP_System, 1 -instance = comp, \inst|state~36 , inst|state~36, SCOMP_System, 1 -instance = comp, \inst|state.ex_xor , inst|state.ex_xor, SCOMP_System, 1 -instance = comp, \inst|Selector20~1 , inst|Selector20~1, SCOMP_System, 1 -instance = comp, \inst|state~46 , inst|state~46, SCOMP_System, 1 -instance = comp, \inst|state.ex_shift , inst|state.ex_shift, SCOMP_System, 1 -instance = comp, \inst|Selector19~0 , inst|Selector19~0, SCOMP_System, 1 -instance = comp, \inst|state~42 , inst|state~42, SCOMP_System, 1 -instance = comp, \inst|state.ex_add , inst|state.ex_add, SCOMP_System, 1 -instance = comp, \inst|state~44 , inst|state~44, SCOMP_System, 1 -instance = comp, \inst|state.ex_sub , inst|state.ex_sub, SCOMP_System, 1 -instance = comp, \inst|Add1~40 , inst|Add1~40, SCOMP_System, 1 instance = comp, \inst|state~39 , inst|state~39, SCOMP_System, 1 instance = comp, \inst|state~40 , inst|state~40, SCOMP_System, 1 instance = comp, \inst|state.ex_loadi , inst|state.ex_loadi, SCOMP_System, 1 +instance = comp, \inst|IR[0]~0 , inst|IR[0]~0, SCOMP_System, 1 +instance = comp, \inst|IR[2] , inst|IR[2], SCOMP_System, 1 +instance = comp, \inst|Selector25~4 , inst|Selector25~4, SCOMP_System, 1 +instance = comp, \inst|state~41 , inst|state~41, SCOMP_System, 1 +instance = comp, \inst|state.ex_addi , inst|state.ex_addi, SCOMP_System, 1 +instance = comp, \inst|state~42 , inst|state~42, SCOMP_System, 1 +instance = comp, \inst|state.ex_add , inst|state.ex_add, SCOMP_System, 1 +instance = comp, \inst|AC[3]~0 , inst|AC[3]~0, SCOMP_System, 1 +instance = comp, \inst|Add1~15 , inst|Add1~15, SCOMP_System, 1 instance = comp, \inst|Add1~1 , inst|Add1~1, SCOMP_System, 1 -instance = comp, \inst|Add1~38 , inst|Add1~38, SCOMP_System, 1 +instance = comp, \inst|Add1~13 , inst|Add1~13, SCOMP_System, 1 instance = comp, \inst|state~45 , inst|state~45, SCOMP_System, 1 instance = comp, \inst|state.ex_and , inst|state.ex_and, SCOMP_System, 1 instance = comp, \inst|WideOr3~0 , inst|WideOr3~0, SCOMP_System, 1 instance = comp, \inst|WideOr3~1 , inst|WideOr3~1, SCOMP_System, 1 -instance = comp, \inst|Add1~39 , inst|Add1~39, SCOMP_System, 1 -instance = comp, \inst|IR[10] , inst|IR[10], SCOMP_System, 1 -instance = comp, \inst|state.ex_out2 , inst|state.ex_out2, SCOMP_System, 1 -instance = comp, \inst|Selector29~0 , inst|Selector29~0, SCOMP_System, 1 -instance = comp, \inst|Selector29~1 , inst|Selector29~1, SCOMP_System, 1 -instance = comp, \inst|IO_CYCLE , inst|IO_CYCLE, SCOMP_System, 1 -instance = comp, \inst3|SWITCH_EN~0 , inst3|SWITCH_EN~0, SCOMP_System, 1 -instance = comp, \inst11|tri_enable~0 , inst11|tri_enable~0, SCOMP_System, 1 -instance = comp, \inst13|inst12~0 , inst13|inst12~0, SCOMP_System, 1 -instance = comp, \inst11|tri_enable~1 , inst11|tri_enable~1, SCOMP_System, 1 -instance = comp, \inst10|count[0]~16 , inst10|count[0]~16, SCOMP_System, 1 -instance = comp, \KEY1~input , KEY1~input, SCOMP_System, 1 -instance = comp, \inst10|state.BTN_high , inst10|state.BTN_high, SCOMP_System, 1 -instance = comp, \inst10|count[15]~18 , inst10|count[15]~18, SCOMP_System, 1 -instance = comp, \inst10|count[0] , inst10|count[0], SCOMP_System, 1 -instance = comp, \inst10|count[1]~19 , inst10|count[1]~19, SCOMP_System, 1 -instance = comp, \inst10|count[1] , inst10|count[1], SCOMP_System, 1 -instance = comp, \inst10|count[2]~21 , inst10|count[2]~21, SCOMP_System, 1 -instance = comp, \inst10|count[2] , inst10|count[2], SCOMP_System, 1 -instance = comp, \inst10|count[3]~23 , inst10|count[3]~23, SCOMP_System, 1 -instance = comp, \inst10|count[3] , inst10|count[3], SCOMP_System, 1 -instance = comp, \inst10|count[4]~25 , inst10|count[4]~25, SCOMP_System, 1 -instance = comp, \inst10|count[4] , inst10|count[4], SCOMP_System, 1 -instance = comp, \inst10|count[5]~27 , inst10|count[5]~27, SCOMP_System, 1 -instance = comp, \inst10|count[5] , inst10|count[5], SCOMP_System, 1 -instance = comp, \inst10|count[6]~29 , inst10|count[6]~29, SCOMP_System, 1 -instance = comp, \inst10|count[6] , inst10|count[6], SCOMP_System, 1 -instance = comp, \inst13|inst1[6]~94 , inst13|inst1[6]~94, SCOMP_System, 1 -instance = comp, \inst3|SWITCH_EN~clkctrl , inst3|SWITCH_EN~clkctrl, SCOMP_System, 1 -instance = comp, \SW[6]~input , SW[6]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[6] , inst7|B_DI[6], SCOMP_System, 1 -instance = comp, \inst13|inst1[6]~46 , inst13|inst1[6]~46, SCOMP_System, 1 -instance = comp, \inst3|I2C_DATA_EN~0 , inst3|I2C_DATA_EN~0, SCOMP_System, 1 -instance = comp, \inst3|I2C_DATA_EN , inst3|I2C_DATA_EN, SCOMP_System, 1 -instance = comp, \inst13|inst|bit_cnt[0]~0 , inst13|inst|bit_cnt[0]~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|prev_busy , inst13|inst14|prev_busy, SCOMP_System, 1 +instance = comp, \inst|Add1~14 , inst|Add1~14, SCOMP_System, 1 +instance = comp, \inst|Add1~10 , inst|Add1~10, SCOMP_System, 1 +instance = comp, \inst|IR[1] , inst|IR[1], SCOMP_System, 1 +instance = comp, \inst|Add1~8 , inst|Add1~8, SCOMP_System, 1 +instance = comp, \inst|Add1~9 , inst|Add1~9, SCOMP_System, 1 +instance = comp, \inst|Add1~3 , inst|Add1~3, SCOMP_System, 1 +instance = comp, \inst|Add1~5 , inst|Add1~5, SCOMP_System, 1 +instance = comp, \inst|Add1~6 , inst|Add1~6, SCOMP_System, 1 +instance = comp, \inst|Add1~11 , inst|Add1~11, SCOMP_System, 1 +instance = comp, \inst|Add1~16 , inst|Add1~16, SCOMP_System, 1 +instance = comp, \inst|Selector25~5 , inst|Selector25~5, SCOMP_System, 1 instance = comp, \inst|WideOr3~2 , inst|WideOr3~2, SCOMP_System, 1 instance = comp, \inst|Selector27~6 , inst|Selector27~6, SCOMP_System, 1 -instance = comp, \inst|Selector18~0 , inst|Selector18~0, SCOMP_System, 1 -instance = comp, \inst|Selector19~4 , inst|Selector19~4, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[34]~54 , inst|shifter|auto_generated|sbit_w[34]~54, SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~17 , inst13|inst1[0]~17, SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~18 , inst13|inst1[0]~18, SCOMP_System, 1 -instance = comp, \inst13|inst1[3]~92 , inst13|inst1[3]~92, SCOMP_System, 1 -instance = comp, \SW[3]~input , SW[3]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[3] , inst7|B_DI[3], SCOMP_System, 1 -instance = comp, \inst13|inst1[3]~31 , inst13|inst1[3]~31, SCOMP_System, 1 -instance = comp, \GSENSOR_SDI~input , GSENSOR_SDI~input, SCOMP_System, 1 -instance = comp, \inst13|inst|Add1~0 , inst13|inst|Add1~0, SCOMP_System, 1 -instance = comp, \inst13|inst|bit_cnt[2] , inst13|inst|bit_cnt[2], SCOMP_System, 1 -instance = comp, \inst13|inst|state~14 , inst13|inst|state~14, SCOMP_System, 1 -instance = comp, \inst13|inst|state.mstr_ack , inst13|inst|state.mstr_ack, SCOMP_System, 1 -instance = comp, \inst13|inst|Equal1~0 , inst13|inst|Equal1~0, SCOMP_System, 1 -instance = comp, \inst13|inst|state~16 , inst13|inst|state~16, SCOMP_System, 1 -instance = comp, \inst13|inst|state.slv_ack2 , inst13|inst|state.slv_ack2, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector29~0 , inst13|inst|Selector29~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector29~1 , inst13|inst|Selector29~1, SCOMP_System, 1 -instance = comp, \inst13|inst|ack_error , inst13|inst|ack_error, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector23~1 , inst13|inst|Selector23~1, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector23~2 , inst13|inst|Selector23~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector23~3 , inst13|inst|Selector23~3, SCOMP_System, 1 -instance = comp, \inst13|inst|state.rd , inst13|inst|state.rd, SCOMP_System, 1 -instance = comp, \inst13|inst|Decoder0~0 , inst13|inst|Decoder0~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Decoder0~4 , inst13|inst|Decoder0~4, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[3]~3 , inst13|inst|data_rx[3]~3, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[3] , inst13|inst|data_rx[3], SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[3]~feeder , inst13|inst|data_rd[3]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[3] , inst13|inst|data_rd[3], SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[3]~5 , inst13|inst14|data_out[3]~5, SCOMP_System, 1 -instance = comp, \inst13|inst14|state_machine~0 , inst13|inst14|state_machine~0, SCOMP_System, 1 -instance = comp, \inst13|inst6 , inst13|inst6, SCOMP_System, 1 -instance = comp, \inst13|inst14|go~feeder , inst13|inst14|go~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|running~0 , inst13|inst14|running~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|running , inst13|inst14|running, SCOMP_System, 1 -instance = comp, \inst13|inst14|latch_rdy~0 , inst13|inst14|latch_rdy~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|go , inst13|inst14|go, SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[7]~0 , inst13|inst14|tx_addr[7]~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[7]~2 , inst13|inst14|data_out[7]~2, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[3] , inst13|inst14|data_out[3], SCOMP_System, 1 -instance = comp, \inst13|inst1[3]~30 , inst13|inst1[3]~30, SCOMP_System, 1 -instance = comp, \inst11|tri_enable , inst11|tri_enable, SCOMP_System, 1 -instance = comp, \ENCODER_H1~input , ENCODER_H1~input, SCOMP_System, 1 -instance = comp, \inst11|AB1[1]~feeder , inst11|AB1[1]~feeder, SCOMP_System, 1 -instance = comp, \inst11|AB1[1] , inst11|AB1[1], SCOMP_System, 1 -instance = comp, \inst11|AB[1] , inst11|AB[1], SCOMP_System, 1 -instance = comp, \ENCODER_H2~input , ENCODER_H2~input, SCOMP_System, 1 -instance = comp, \inst11|AB1[0] , inst11|AB1[0], SCOMP_System, 1 -instance = comp, \inst11|AB[0] , inst11|AB[0], SCOMP_System, 1 -instance = comp, \inst11|Selector3~2 , inst11|Selector3~2, SCOMP_System, 1 -instance = comp, \inst11|Selector20~0 , inst11|Selector20~0, SCOMP_System, 1 -instance = comp, \inst11|Selector2~2 , inst11|Selector2~2, SCOMP_System, 1 -instance = comp, \inst11|Selector2~3 , inst11|Selector2~3, SCOMP_System, 1 -instance = comp, \inst11|state.AB_10 , inst11|state.AB_10, SCOMP_System, 1 -instance = comp, \inst11|Selector3~0 , inst11|Selector3~0, SCOMP_System, 1 -instance = comp, \inst11|Selector3~1 , inst11|Selector3~1, SCOMP_System, 1 -instance = comp, \inst11|Selector3~3 , inst11|Selector3~3, SCOMP_System, 1 -instance = comp, \inst11|Selector3~4 , inst11|Selector3~4, SCOMP_System, 1 -instance = comp, \inst11|state.AB_11 , inst11|state.AB_11, SCOMP_System, 1 -instance = comp, \inst11|Selector2~0 , inst11|Selector2~0, SCOMP_System, 1 -instance = comp, \inst11|Selector2~1 , inst11|Selector2~1, SCOMP_System, 1 -instance = comp, \inst11|Selector4~0 , inst11|Selector4~0, SCOMP_System, 1 -instance = comp, \inst11|Selector4~1 , inst11|Selector4~1, SCOMP_System, 1 -instance = comp, \inst11|Selector4~2 , inst11|Selector4~2, SCOMP_System, 1 -instance = comp, \inst11|state.AB_01 , inst11|state.AB_01, SCOMP_System, 1 -instance = comp, \inst11|Selector1~1 , inst11|Selector1~1, SCOMP_System, 1 -instance = comp, \inst11|Selector1~0 , inst11|Selector1~0, SCOMP_System, 1 -instance = comp, \inst11|Selector1~2 , inst11|Selector1~2, SCOMP_System, 1 -instance = comp, \inst11|state.AB_00 , inst11|state.AB_00, SCOMP_System, 1 -instance = comp, \inst11|Add1~2 , inst11|Add1~2, SCOMP_System, 1 -instance = comp, \inst11|Add1~1 , inst11|Add1~1, SCOMP_System, 1 -instance = comp, \inst11|Add1~3 , inst11|Add1~3, SCOMP_System, 1 -instance = comp, \inst11|Add1~6 , inst11|Add1~6, SCOMP_System, 1 -instance = comp, \inst11|count[0]~16 , inst11|count[0]~16, SCOMP_System, 1 -instance = comp, \inst11|count[9]~18 , inst11|count[9]~18, SCOMP_System, 1 -instance = comp, \inst11|count[0] , inst11|count[0], SCOMP_System, 1 -instance = comp, \inst11|Add1~0 , inst11|Add1~0, SCOMP_System, 1 -instance = comp, \inst11|count[1]~19 , inst11|count[1]~19, SCOMP_System, 1 -instance = comp, \inst11|count[1] , inst11|count[1], SCOMP_System, 1 -instance = comp, \inst11|Add1~4 , inst11|Add1~4, SCOMP_System, 1 -instance = comp, \inst11|count[2]~21 , inst11|count[2]~21, SCOMP_System, 1 -instance = comp, \inst11|count[2] , inst11|count[2], SCOMP_System, 1 -instance = comp, \inst11|Add1~5 , inst11|Add1~5, SCOMP_System, 1 -instance = comp, \inst11|count[3]~23 , inst11|count[3]~23, SCOMP_System, 1 -instance = comp, \inst11|count[3] , inst11|count[3], SCOMP_System, 1 -instance = comp, \inst13|inst1[3]~32 , inst13|inst1[3]~32, SCOMP_System, 1 +instance = comp, \inst|Selector25~2 , inst|Selector25~2, SCOMP_System, 1 +instance = comp, \inst|Selector20~0 , inst|Selector20~0, SCOMP_System, 1 +instance = comp, \inst|IR[5] , inst|IR[5], SCOMP_System, 1 +instance = comp, \inst|Selector22~3 , inst|Selector22~3, SCOMP_System, 1 +instance = comp, \inst|Selector22~4 , inst|Selector22~4, SCOMP_System, 1 +instance = comp, \inst|Selector17~3 , inst|Selector17~3, SCOMP_System, 1 +instance = comp, \inst|Selector17~4 , inst|Selector17~4, SCOMP_System, 1 +instance = comp, \inst|IR[10] , inst|IR[10], SCOMP_System, 1 +instance = comp, \inst|Selector12~4 , inst|Selector12~4, SCOMP_System, 1 +instance = comp, \inst|Add1~80 , inst|Add1~80, SCOMP_System, 1 +instance = comp, \inst|Add1~78 , inst|Add1~78, SCOMP_System, 1 +instance = comp, \inst|Add1~79 , inst|Add1~79, SCOMP_System, 1 +instance = comp, \inst|Selector13~1 , inst|Selector13~1, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[28]~21 , inst|shifter|auto_generated|sbit_w[28]~21, SCOMP_System, 1 +instance = comp, \inst|Add1~65 , inst|Add1~65, SCOMP_System, 1 +instance = comp, \inst|Add1~63 , inst|Add1~63, SCOMP_System, 1 +instance = comp, \inst|Add1~64 , inst|Add1~64, SCOMP_System, 1 +instance = comp, \inst|Add1~58 , inst|Add1~58, SCOMP_System, 1 +instance = comp, \inst|Add1~59 , inst|Add1~59, SCOMP_System, 1 +instance = comp, \inst|Add1~60 , inst|Add1~60, SCOMP_System, 1 +instance = comp, \inst|Add1~55 , inst|Add1~55, SCOMP_System, 1 +instance = comp, \inst|Add1~53 , inst|Add1~53, SCOMP_System, 1 +instance = comp, \inst|Add1~54 , inst|Add1~54, SCOMP_System, 1 +instance = comp, \inst3|TIMER_EN~3 , inst3|TIMER_EN~3, SCOMP_System, 1 +instance = comp, \inst|Selector21~3 , inst|Selector21~3, SCOMP_System, 1 +instance = comp, \inst|Selector21~4 , inst|Selector21~4, SCOMP_System, 1 +instance = comp, \inst|Add1~33 , inst|Add1~33, SCOMP_System, 1 +instance = comp, \inst|Add1~34 , inst|Add1~34, SCOMP_System, 1 +instance = comp, \inst|Add1~35 , inst|Add1~35, SCOMP_System, 1 +instance = comp, \inst|Add1~30 , inst|Add1~30, SCOMP_System, 1 +instance = comp, \inst|Add1~28 , inst|Add1~28, SCOMP_System, 1 +instance = comp, \inst|Add1~29 , inst|Add1~29, SCOMP_System, 1 +instance = comp, \inst|Add1~25 , inst|Add1~25, SCOMP_System, 1 +instance = comp, \inst|Add1~23 , inst|Add1~23, SCOMP_System, 1 +instance = comp, \inst|Add1~24 , inst|Add1~24, SCOMP_System, 1 +instance = comp, \inst|Add1~20 , inst|Add1~20, SCOMP_System, 1 +instance = comp, \inst|Add1~18 , inst|Add1~18, SCOMP_System, 1 +instance = comp, \inst|Add1~19 , inst|Add1~19, SCOMP_System, 1 +instance = comp, \inst|Add1~21 , inst|Add1~21, SCOMP_System, 1 +instance = comp, \inst|Add1~26 , inst|Add1~26, SCOMP_System, 1 +instance = comp, \inst|Add1~31 , inst|Add1~31, SCOMP_System, 1 +instance = comp, \inst|Add1~36 , inst|Add1~36, SCOMP_System, 1 +instance = comp, \inst|Selector21~1 , inst|Selector21~1, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[26]~16 , inst|shifter|auto_generated|sbit_w[26]~16, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[26]~17 , inst|shifter|auto_generated|sbit_w[26]~17, SCOMP_System, 1 +instance = comp, \inst|Selector19~1 , inst|Selector19~1, SCOMP_System, 1 +instance = comp, \inst|IR[8] , inst|IR[8], SCOMP_System, 1 +instance = comp, \inst|Add1~43 , inst|Add1~43, SCOMP_System, 1 +instance = comp, \inst|Add1~44 , inst|Add1~44, SCOMP_System, 1 +instance = comp, \inst|Add1~45 , inst|Add1~45, SCOMP_System, 1 +instance = comp, \inst|Add1~38 , inst|Add1~38, SCOMP_System, 1 +instance = comp, \inst|Add1~39 , inst|Add1~39, SCOMP_System, 1 +instance = comp, \inst|Selector20~1 , inst|Selector20~1, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[23]~34 , inst|shifter|auto_generated|sbit_w[23]~34, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[23]~35 , inst|shifter|auto_generated|sbit_w[23]~35, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[21]~37 , inst|shifter|auto_generated|sbit_w[21]~37, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[21]~38 , inst|shifter|auto_generated|sbit_w[21]~38, SCOMP_System, 1 +instance = comp, \inst3|I2C_RDY_EN~0 , inst3|I2C_RDY_EN~0, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[39]~61 , inst|shifter|auto_generated|sbit_w[39]~61, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[39]~62 , inst|shifter|auto_generated|sbit_w[39]~62, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[17]~29 , inst|shifter|auto_generated|sbit_w[17]~29, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[35]~64 , inst|shifter|auto_generated|sbit_w[35]~64, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[35]~63 , inst|shifter|auto_generated|sbit_w[35]~63, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[35]~65 , inst|shifter|auto_generated|sbit_w[35]~65, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[27]~44 , inst|shifter|auto_generated|sbit_w[27]~44, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[27]~45 , inst|shifter|auto_generated|sbit_w[27]~45, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[29]~41 , inst|shifter|auto_generated|sbit_w[29]~41, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[29]~42 , inst|shifter|auto_generated|sbit_w[29]~42, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[43]~67 , inst|shifter|auto_generated|sbit_w[43]~67, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[43]~68 , inst|shifter|auto_generated|sbit_w[43]~68, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[55]~79 , inst|shifter|auto_generated|sbit_w[55]~79, SCOMP_System, 1 +instance = comp, \inst|Selector20~4 , inst|Selector20~4, SCOMP_System, 1 +instance = comp, \inst|Add1~41 , inst|Add1~41, SCOMP_System, 1 +instance = comp, \inst|Selector20~2 , inst|Selector20~2, SCOMP_System, 1 +instance = comp, \inst|Selector20~3 , inst|Selector20~3, SCOMP_System, 1 +instance = comp, \inst|Selector20~5 , inst|Selector20~5, SCOMP_System, 1 +instance = comp, \inst11|tri_enable~0 , inst11|tri_enable~0, SCOMP_System, 1 +instance = comp, \inst|state~34 , inst|state~34, SCOMP_System, 1 +instance = comp, \inst|state.ex_out , inst|state.ex_out, SCOMP_System, 1 +instance = comp, \inst|state.ex_out2 , inst|state.ex_out2, SCOMP_System, 1 +instance = comp, \inst|Selector29~0 , inst|Selector29~0, SCOMP_System, 1 +instance = comp, \inst|Selector29~1 , inst|Selector29~1, SCOMP_System, 1 +instance = comp, \inst|IO_CYCLE , inst|IO_CYCLE, SCOMP_System, 1 +instance = comp, \inst|IR[9] , inst|IR[9], SCOMP_System, 1 +instance = comp, \inst3|SWITCH_EN~0 , inst3|SWITCH_EN~0, SCOMP_System, 1 +instance = comp, \inst13|inst12~0 , inst13|inst12~0, SCOMP_System, 1 +instance = comp, \inst11|tri_enable~1 , inst11|tri_enable~1, SCOMP_System, 1 +instance = comp, \inst13|inst4 , inst13|inst4, SCOMP_System, 1 +instance = comp, \inst10|count[0]~16 , inst10|count[0]~16, SCOMP_System, 1 +instance = comp, \KEY1~input , KEY1~input, SCOMP_System, 1 +instance = comp, \inst10|state.BTN_high , inst10|state.BTN_high, SCOMP_System, 1 +instance = comp, \inst10|count[9]~18 , inst10|count[9]~18, SCOMP_System, 1 +instance = comp, \inst10|count[0] , inst10|count[0], SCOMP_System, 1 +instance = comp, \inst10|count[1]~19 , inst10|count[1]~19, SCOMP_System, 1 +instance = comp, \inst10|count[1] , inst10|count[1], SCOMP_System, 1 +instance = comp, \inst10|count[2]~21 , inst10|count[2]~21, SCOMP_System, 1 +instance = comp, \inst10|count[2] , inst10|count[2], SCOMP_System, 1 +instance = comp, \inst10|count[3]~23 , inst10|count[3]~23, SCOMP_System, 1 +instance = comp, \inst10|count[3] , inst10|count[3], SCOMP_System, 1 +instance = comp, \inst10|count[4]~25 , inst10|count[4]~25, SCOMP_System, 1 +instance = comp, \inst10|count[4] , inst10|count[4], SCOMP_System, 1 +instance = comp, \inst10|count[5]~27 , inst10|count[5]~27, SCOMP_System, 1 +instance = comp, \inst10|count[5] , inst10|count[5], SCOMP_System, 1 +instance = comp, \inst10|count[6]~29 , inst10|count[6]~29, SCOMP_System, 1 +instance = comp, \inst10|count[6]~feeder , inst10|count[6]~feeder, SCOMP_System, 1 +instance = comp, \inst10|count[6] , inst10|count[6], SCOMP_System, 1 +instance = comp, \inst10|count[7]~31 , inst10|count[7]~31, SCOMP_System, 1 +instance = comp, \inst10|count[7] , inst10|count[7], SCOMP_System, 1 +instance = comp, \inst13|inst1[7]~102 , inst13|inst1[7]~102, SCOMP_System, 1 +instance = comp, \inst3|TIMER_EN~2 , inst3|TIMER_EN~2, SCOMP_System, 1 instance = comp, \inst5|count_10Hz[0]~19 , inst5|count_10Hz[0]~19, SCOMP_System, 1 -instance = comp, \inst5|LessThan4~3 , inst5|LessThan4~3, SCOMP_System, 1 -instance = comp, \inst5|LessThan4~1 , inst5|LessThan4~1, SCOMP_System, 1 -instance = comp, \inst5|LessThan4~0 , inst5|LessThan4~0, SCOMP_System, 1 -instance = comp, \inst5|LessThan4~2 , inst5|LessThan4~2, SCOMP_System, 1 -instance = comp, \inst5|LessThan4~4 , inst5|LessThan4~4, SCOMP_System, 1 -instance = comp, \inst5|LessThan4~6 , inst5|LessThan4~6, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~3 , inst5|LessThan5~3, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~0 , inst5|LessThan5~0, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~1 , inst5|LessThan5~1, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~2 , inst5|LessThan5~2, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~4 , inst5|LessThan5~4, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~6 , inst5|LessThan5~6, SCOMP_System, 1 instance = comp, \inst5|count_10Hz[0] , inst5|count_10Hz[0], SCOMP_System, 1 instance = comp, \inst5|count_10Hz[1]~21 , inst5|count_10Hz[1]~21, SCOMP_System, 1 instance = comp, \inst5|count_10Hz[1] , inst5|count_10Hz[1], SCOMP_System, 1 @@ -458,10 +503,9 @@ instance = comp, \inst5|count_10Hz[17]~53 , inst5|count_10Hz[17]~53, SCOMP_Syste instance = comp, \inst5|count_10Hz[17] , inst5|count_10Hz[17], SCOMP_System, 1 instance = comp, \inst5|count_10Hz[18]~55 , inst5|count_10Hz[18]~55, SCOMP_System, 1 instance = comp, \inst5|count_10Hz[18] , inst5|count_10Hz[18], SCOMP_System, 1 -instance = comp, \inst5|LessThan4~5 , inst5|LessThan4~5, SCOMP_System, 1 +instance = comp, \inst5|LessThan5~5 , inst5|LessThan5~5, SCOMP_System, 1 instance = comp, \inst5|clock_10Hz_int~0 , inst5|clock_10Hz_int~0, SCOMP_System, 1 instance = comp, \inst5|clock_10Hz_int , inst5|clock_10Hz_int, SCOMP_System, 1 -instance = comp, \inst5|clock_10Hz~feeder , inst5|clock_10Hz~feeder, SCOMP_System, 1 instance = comp, \inst5|clock_10Hz , inst5|clock_10Hz, SCOMP_System, 1 instance = comp, \inst5|clock_10Hz~clkctrl , inst5|clock_10Hz~clkctrl, SCOMP_System, 1 instance = comp, \inst4|COUNT[0]~45 , inst4|COUNT[0]~45, SCOMP_System, 1 @@ -473,7 +517,6 @@ instance = comp, \inst4|COUNT[2]~17 , inst4|COUNT[2]~17, SCOMP_System, 1 instance = comp, \inst4|COUNT[2] , inst4|COUNT[2], SCOMP_System, 1 instance = comp, \inst4|COUNT[3]~19 , inst4|COUNT[3]~19, SCOMP_System, 1 instance = comp, \inst4|COUNT[3] , inst4|COUNT[3], SCOMP_System, 1 -instance = comp, \inst13|inst1[3]~33 , inst13|inst1[3]~33, SCOMP_System, 1 instance = comp, \inst4|COUNT[4]~21 , inst4|COUNT[4]~21, SCOMP_System, 1 instance = comp, \inst4|COUNT[4] , inst4|COUNT[4], SCOMP_System, 1 instance = comp, \inst4|COUNT[5]~23 , inst4|COUNT[5]~23, SCOMP_System, 1 @@ -482,103 +525,93 @@ instance = comp, \inst4|COUNT[6]~25 , inst4|COUNT[6]~25, SCOMP_System, 1 instance = comp, \inst4|COUNT[6] , inst4|COUNT[6], SCOMP_System, 1 instance = comp, \inst4|COUNT[7]~27 , inst4|COUNT[7]~27, SCOMP_System, 1 instance = comp, \inst4|COUNT[7] , inst4|COUNT[7], SCOMP_System, 1 -instance = comp, \inst4|COUNT[8]~29 , inst4|COUNT[8]~29, SCOMP_System, 1 -instance = comp, \inst4|COUNT[8] , inst4|COUNT[8], SCOMP_System, 1 -instance = comp, \inst4|COUNT[9]~31 , inst4|COUNT[9]~31, SCOMP_System, 1 -instance = comp, \inst4|COUNT[9] , inst4|COUNT[9], SCOMP_System, 1 -instance = comp, \inst4|COUNT[10]~33 , inst4|COUNT[10]~33, SCOMP_System, 1 -instance = comp, \inst4|COUNT[10] , inst4|COUNT[10], SCOMP_System, 1 -instance = comp, \inst4|COUNT[11]~35 , inst4|COUNT[11]~35, SCOMP_System, 1 -instance = comp, \inst4|COUNT[11] , inst4|COUNT[11], SCOMP_System, 1 -instance = comp, \inst4|COUNT[12]~37 , inst4|COUNT[12]~37, SCOMP_System, 1 -instance = comp, \inst4|COUNT[12] , inst4|COUNT[12], SCOMP_System, 1 -instance = comp, \inst4|COUNT[13]~39 , inst4|COUNT[13]~39, SCOMP_System, 1 -instance = comp, \inst4|COUNT[13] , inst4|COUNT[13], SCOMP_System, 1 -instance = comp, \inst13|inst1[13]~77 , inst13|inst1[13]~77, SCOMP_System, 1 -instance = comp, \inst|Add1~70 , inst|Add1~70, SCOMP_System, 1 -instance = comp, \inst|Add1~68 , inst|Add1~68, SCOMP_System, 1 -instance = comp, \inst|Add1~69 , inst|Add1~69, SCOMP_System, 1 -instance = comp, \inst|Add1~63 , inst|Add1~63, SCOMP_System, 1 -instance = comp, \inst|Add1~64 , inst|Add1~64, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[20]~12 , inst|shifter|auto_generated|sbit_w[20]~12, SCOMP_System, 1 -instance = comp, \inst|Selector27~4 , inst|Selector27~4, SCOMP_System, 1 -instance = comp, \inst3|TIMER_EN~3 , inst3|TIMER_EN~3, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[28]~21 , inst|shifter|auto_generated|sbit_w[28]~21, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[28]~22 , inst|shifter|auto_generated|sbit_w[28]~22, SCOMP_System, 1 -instance = comp, \inst|Selector19~2 , inst|Selector19~2, SCOMP_System, 1 -instance = comp, \inst|Add1~43 , inst|Add1~43, SCOMP_System, 1 -instance = comp, \inst|Add1~44 , inst|Add1~44, SCOMP_System, 1 -instance = comp, \inst|Add1~45 , inst|Add1~45, SCOMP_System, 1 -instance = comp, \inst|Add1~41 , inst|Add1~41, SCOMP_System, 1 -instance = comp, \inst|Add1~46 , inst|Add1~46, SCOMP_System, 1 -instance = comp, \inst|Selector19~3 , inst|Selector19~3, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[56]~24 , inst|shifter|auto_generated|sbit_w[56]~24, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[26]~16 , inst|shifter|auto_generated|sbit_w[26]~16, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[26]~17 , inst|shifter|auto_generated|sbit_w[26]~17, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[22]~9 , inst|shifter|auto_generated|sbit_w[22]~9, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[22]~10 , inst|shifter|auto_generated|sbit_w[22]~10, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[40]~25 , inst|shifter|auto_generated|sbit_w[40]~25, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[40]~28 , inst|shifter|auto_generated|sbit_w[40]~28, SCOMP_System, 1 -instance = comp, \inst|Selector19~5 , inst|Selector19~5, SCOMP_System, 1 -instance = comp, \inst|Selector19~6 , inst|Selector19~6, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[32]~4 , inst|shifter|auto_generated|sbit_w[32]~4, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[32]~5 , inst|shifter|auto_generated|sbit_w[32]~5, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[48]~8 , inst|shifter|auto_generated|sbit_w[48]~8, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[48]~15 , inst|shifter|auto_generated|sbit_w[48]~15, SCOMP_System, 1 -instance = comp, \inst|Selector19~7 , inst|Selector19~7, SCOMP_System, 1 -instance = comp, \inst|Selector19~1 , inst|Selector19~1, SCOMP_System, 1 -instance = comp, \inst|Selector19~8 , inst|Selector19~8, SCOMP_System, 1 -instance = comp, \inst11|Add1~11 , inst11|Add1~11, SCOMP_System, 1 -instance = comp, \inst11|count[4]~25 , inst11|count[4]~25, SCOMP_System, 1 -instance = comp, \inst11|count[4] , inst11|count[4], SCOMP_System, 1 -instance = comp, \inst11|Add1~7 , inst11|Add1~7, SCOMP_System, 1 -instance = comp, \inst11|count[5]~27 , inst11|count[5]~27, SCOMP_System, 1 -instance = comp, \inst11|count[5] , inst11|count[5], SCOMP_System, 1 -instance = comp, \inst11|Add1~8 , inst11|Add1~8, SCOMP_System, 1 -instance = comp, \inst11|count[6]~29 , inst11|count[6]~29, SCOMP_System, 1 -instance = comp, \inst11|count[6] , inst11|count[6], SCOMP_System, 1 -instance = comp, \inst11|Add1~9 , inst11|Add1~9, SCOMP_System, 1 -instance = comp, \inst11|count[7]~31 , inst11|count[7]~31, SCOMP_System, 1 -instance = comp, \inst11|count[7] , inst11|count[7], SCOMP_System, 1 +instance = comp, \inst4|IO_BUS|dout[7]~2 , inst4|IO_BUS|dout[7]~2, SCOMP_System, 1 +instance = comp, \inst11|tri_enable , inst11|tri_enable, SCOMP_System, 1 instance = comp, \inst11|Add1~10 , inst11|Add1~10, SCOMP_System, 1 -instance = comp, \inst11|count[8]~33 , inst11|count[8]~33, SCOMP_System, 1 -instance = comp, \inst11|count[8] , inst11|count[8], SCOMP_System, 1 -instance = comp, \SW[8]~input , SW[8]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[8] , inst7|B_DI[8], SCOMP_System, 1 -instance = comp, \inst13|inst1[8]~56 , inst13|inst1[8]~56, SCOMP_System, 1 -instance = comp, \inst10|tri_enable , inst10|tri_enable, SCOMP_System, 1 -instance = comp, \inst10|count[7]~31 , inst10|count[7]~31, SCOMP_System, 1 -instance = comp, \inst10|count[7] , inst10|count[7], SCOMP_System, 1 -instance = comp, \inst10|count[8]~33 , inst10|count[8]~33, SCOMP_System, 1 -instance = comp, \inst10|count[8] , inst10|count[8], SCOMP_System, 1 -instance = comp, \inst13|inst1[8]~57 , inst13|inst1[8]~57, SCOMP_System, 1 -instance = comp, \inst13|inst|Decoder0~1 , inst13|inst|Decoder0~1, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[0]~0 , inst13|inst|data_rx[0]~0, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[0] , inst13|inst|data_rx[0], SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[0]~feeder , inst13|inst|data_rd[0]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[0] , inst13|inst|data_rd[0], SCOMP_System, 1 -instance = comp, \inst13|inst|Decoder0~5 , inst13|inst|Decoder0~5, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[4]~4 , inst13|inst|data_rx[4]~4, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[4] , inst13|inst|data_rx[4], SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[4]~feeder , inst13|inst|data_rd[4]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[4] , inst13|inst|data_rd[4], SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[12]~15 , inst13|inst14|data_out[12]~15, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[15]~11 , inst13|inst14|data_out[15]~11, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[12] , inst13|inst14|data_out[12], SCOMP_System, 1 -instance = comp, \inst13|inst1[12]~76 , inst13|inst1[12]~76, SCOMP_System, 1 -instance = comp, \inst13|inst1[12]~74 , inst13|inst1[12]~74, SCOMP_System, 1 -instance = comp, \inst11|Add1~15 , inst11|Add1~15, SCOMP_System, 1 +instance = comp, \ENCODER_H2~input , ENCODER_H2~input, SCOMP_System, 1 +instance = comp, \inst11|AB1[0]~feeder , inst11|AB1[0]~feeder, SCOMP_System, 1 +instance = comp, \inst11|AB1[0] , inst11|AB1[0], SCOMP_System, 1 +instance = comp, \inst11|AB[0] , inst11|AB[0], SCOMP_System, 1 +instance = comp, \ENCODER_H1~input , ENCODER_H1~input, SCOMP_System, 1 +instance = comp, \inst11|AB1[1]~feeder , inst11|AB1[1]~feeder, SCOMP_System, 1 +instance = comp, \inst11|AB1[1] , inst11|AB1[1], SCOMP_System, 1 +instance = comp, \inst11|AB[1] , inst11|AB[1], SCOMP_System, 1 +instance = comp, \inst11|Selector2~0 , inst11|Selector2~0, SCOMP_System, 1 +instance = comp, \inst11|Selector2~1 , inst11|Selector2~1, SCOMP_System, 1 +instance = comp, \inst11|state.AB_10 , inst11|state.AB_10, SCOMP_System, 1 +instance = comp, \inst11|Selector1~1 , inst11|Selector1~1, SCOMP_System, 1 +instance = comp, \inst11|Selector1~0 , inst11|Selector1~0, SCOMP_System, 1 +instance = comp, \inst11|Selector1~2 , inst11|Selector1~2, SCOMP_System, 1 +instance = comp, \inst11|state.AB_00 , inst11|state.AB_00, SCOMP_System, 1 +instance = comp, \inst11|Selector4~0 , inst11|Selector4~0, SCOMP_System, 1 +instance = comp, \inst11|Selector4~1 , inst11|Selector4~1, SCOMP_System, 1 +instance = comp, \inst11|Selector4~2 , inst11|Selector4~2, SCOMP_System, 1 +instance = comp, \inst11|Selector4~3 , inst11|Selector4~3, SCOMP_System, 1 +instance = comp, \inst11|Selector4~4 , inst11|Selector4~4, SCOMP_System, 1 +instance = comp, \inst11|state.AB_01 , inst11|state.AB_01, SCOMP_System, 1 +instance = comp, \inst11|Selector3~0 , inst11|Selector3~0, SCOMP_System, 1 +instance = comp, \inst11|Selector3~1 , inst11|Selector3~1, SCOMP_System, 1 +instance = comp, \inst11|Selector3~3 , inst11|Selector3~3, SCOMP_System, 1 +instance = comp, \inst11|Selector3~2 , inst11|Selector3~2, SCOMP_System, 1 +instance = comp, \inst11|Selector20~0 , inst11|Selector20~0, SCOMP_System, 1 +instance = comp, \inst11|Selector3~4 , inst11|Selector3~4, SCOMP_System, 1 +instance = comp, \inst11|state.AB_11 , inst11|state.AB_11, SCOMP_System, 1 +instance = comp, \inst11|Add1~1 , inst11|Add1~1, SCOMP_System, 1 +instance = comp, \inst11|Add1~2 , inst11|Add1~2, SCOMP_System, 1 +instance = comp, \inst11|Add1~3 , inst11|Add1~3, SCOMP_System, 1 +instance = comp, \inst11|count[0]~16 , inst11|count[0]~16, SCOMP_System, 1 +instance = comp, \inst11|count[7]~18 , inst11|count[7]~18, SCOMP_System, 1 +instance = comp, \inst11|count[0] , inst11|count[0], SCOMP_System, 1 +instance = comp, \inst11|Add1~0 , inst11|Add1~0, SCOMP_System, 1 +instance = comp, \inst11|count[1]~19 , inst11|count[1]~19, SCOMP_System, 1 +instance = comp, \inst11|count[1] , inst11|count[1], SCOMP_System, 1 +instance = comp, \inst11|Add1~4 , inst11|Add1~4, SCOMP_System, 1 +instance = comp, \inst11|count[2]~21 , inst11|count[2]~21, SCOMP_System, 1 +instance = comp, \inst11|count[2] , inst11|count[2], SCOMP_System, 1 +instance = comp, \inst11|Add1~5 , inst11|Add1~5, SCOMP_System, 1 +instance = comp, \inst11|count[3]~23 , inst11|count[3]~23, SCOMP_System, 1 +instance = comp, \inst11|count[3] , inst11|count[3], SCOMP_System, 1 +instance = comp, \inst11|Add1~6 , inst11|Add1~6, SCOMP_System, 1 +instance = comp, \inst11|count[4]~25 , inst11|count[4]~25, SCOMP_System, 1 +instance = comp, \inst11|count[4] , inst11|count[4], SCOMP_System, 1 +instance = comp, \inst11|Add1~7 , inst11|Add1~7, SCOMP_System, 1 +instance = comp, \inst11|count[5]~27 , inst11|count[5]~27, SCOMP_System, 1 +instance = comp, \inst11|count[5] , inst11|count[5], SCOMP_System, 1 +instance = comp, \inst11|Add1~8 , inst11|Add1~8, SCOMP_System, 1 +instance = comp, \inst11|count[6]~29 , inst11|count[6]~29, SCOMP_System, 1 +instance = comp, \inst11|count[6] , inst11|count[6], SCOMP_System, 1 +instance = comp, \inst11|Add1~9 , inst11|Add1~9, SCOMP_System, 1 +instance = comp, \inst11|count[7]~31 , inst11|count[7]~31, SCOMP_System, 1 +instance = comp, \inst11|count[7] , inst11|count[7], SCOMP_System, 1 +instance = comp, \inst3|PWM_EN~0 , inst3|PWM_EN~0, SCOMP_System, 1 +instance = comp, \inst3|SWITCH_EN~1 , inst3|SWITCH_EN~1, SCOMP_System, 1 +instance = comp, \inst3|SWITCH_EN , inst3|SWITCH_EN, SCOMP_System, 1 +instance = comp, \inst3|SWITCH_EN~clkctrl , inst3|SWITCH_EN~clkctrl, SCOMP_System, 1 +instance = comp, \SW[7]~input , SW[7]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[7] , inst7|B_DI[7], SCOMP_System, 1 +instance = comp, \inst13|inst1[7]~55 , inst13|inst1[7]~55, SCOMP_System, 1 +instance = comp, \inst3|I2C_DATA_EN , inst3|I2C_DATA_EN, SCOMP_System, 1 +instance = comp, \inst11|Add1~12 , inst11|Add1~12, SCOMP_System, 1 +instance = comp, \inst11|count[8]~33 , inst11|count[8]~33, SCOMP_System, 1 +instance = comp, \inst11|count[8] , inst11|count[8], SCOMP_System, 1 +instance = comp, \inst11|Add1~11 , inst11|Add1~11, SCOMP_System, 1 instance = comp, \inst11|count[9]~35 , inst11|count[9]~35, SCOMP_System, 1 instance = comp, \inst11|count[9] , inst11|count[9], SCOMP_System, 1 -instance = comp, \inst11|Add1~12 , inst11|Add1~12, SCOMP_System, 1 -instance = comp, \inst11|count[10]~37 , inst11|count[10]~37, SCOMP_System, 1 -instance = comp, \inst11|count[10] , inst11|count[10], SCOMP_System, 1 -instance = comp, \inst11|Add1~13 , inst11|Add1~13, SCOMP_System, 1 -instance = comp, \inst11|count[11]~39 , inst11|count[11]~39, SCOMP_System, 1 -instance = comp, \inst11|count[11] , inst11|count[11], SCOMP_System, 1 -instance = comp, \inst11|Add1~14 , inst11|Add1~14, SCOMP_System, 1 -instance = comp, \inst11|count[12]~41 , inst11|count[12]~41, SCOMP_System, 1 -instance = comp, \inst11|count[12] , inst11|count[12], SCOMP_System, 1 +instance = comp, \inst13|inst1[9]~104 , inst13|inst1[9]~104, SCOMP_System, 1 +instance = comp, \SW[9]~input , SW[9]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[9] , inst7|B_DI[9], SCOMP_System, 1 +instance = comp, \inst13|inst1[9]~64 , inst13|inst1[9]~64, SCOMP_System, 1 +instance = comp, \inst13|inst14|state_machine~1 , inst13|inst14|state_machine~1, SCOMP_System, 1 +instance = comp, \inst13|inst6 , inst13|inst6, SCOMP_System, 1 +instance = comp, \inst13|inst14|go~feeder , inst13|inst14|go~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[0]~19 , inst13|inst14|data_out[0]~19, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector22~0 , inst13|inst14|Selector22~0, SCOMP_System, 1 +instance = comp, \inst10|count[8]~33 , inst10|count[8]~33, SCOMP_System, 1 +instance = comp, \inst10|count[8] , inst10|count[8], SCOMP_System, 1 +instance = comp, \inst13|inst1[8]~103 , inst13|inst1[8]~103, SCOMP_System, 1 +instance = comp, \SW[8]~input , SW[8]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[8] , inst7|B_DI[8], SCOMP_System, 1 +instance = comp, \inst13|inst1[8]~59 , inst13|inst1[8]~59, SCOMP_System, 1 instance = comp, \inst10|count[9]~35 , inst10|count[9]~35, SCOMP_System, 1 instance = comp, \inst10|count[9] , inst10|count[9], SCOMP_System, 1 instance = comp, \inst10|count[10]~37 , inst10|count[10]~37, SCOMP_System, 1 @@ -587,238 +620,348 @@ instance = comp, \inst10|count[11]~39 , inst10|count[11]~39, SCOMP_System, 1 instance = comp, \inst10|count[11] , inst10|count[11], SCOMP_System, 1 instance = comp, \inst10|count[12]~41 , inst10|count[12]~41, SCOMP_System, 1 instance = comp, \inst10|count[12] , inst10|count[12], SCOMP_System, 1 -instance = comp, \inst13|inst1[12]~75 , inst13|inst1[12]~75, SCOMP_System, 1 -instance = comp, \inst13|inst1[12]~95 , inst13|inst1[12]~95, SCOMP_System, 1 -instance = comp, \inst13|inst14|cmd_in[4] , inst13|inst14|cmd_in[4], SCOMP_System, 1 instance = comp, \inst10|count[13]~43 , inst10|count[13]~43, SCOMP_System, 1 instance = comp, \inst10|count[13] , inst10|count[13], SCOMP_System, 1 instance = comp, \inst11|Add1~16 , inst11|Add1~16, SCOMP_System, 1 +instance = comp, \inst11|count[10]~37 , inst11|count[10]~37, SCOMP_System, 1 +instance = comp, \inst11|count[10] , inst11|count[10], SCOMP_System, 1 +instance = comp, \inst11|Add1~13 , inst11|Add1~13, SCOMP_System, 1 +instance = comp, \inst11|count[11]~39 , inst11|count[11]~39, SCOMP_System, 1 +instance = comp, \inst11|count[11] , inst11|count[11], SCOMP_System, 1 +instance = comp, \inst11|Add1~14 , inst11|Add1~14, SCOMP_System, 1 +instance = comp, \inst11|count[12]~41 , inst11|count[12]~41, SCOMP_System, 1 +instance = comp, \inst11|count[12] , inst11|count[12], SCOMP_System, 1 +instance = comp, \inst11|Add1~15 , inst11|Add1~15, SCOMP_System, 1 instance = comp, \inst11|count[13]~43 , inst11|count[13]~43, SCOMP_System, 1 instance = comp, \inst11|count[13] , inst11|count[13], SCOMP_System, 1 -instance = comp, \inst13|inst1[13]~78 , inst13|inst1[13]~78, SCOMP_System, 1 +instance = comp, \inst13|inst1[13]~82 , inst13|inst1[13]~82, SCOMP_System, 1 +instance = comp, \inst13|inst1[13]~83 , inst13|inst1[13]~83, SCOMP_System, 1 +instance = comp, \GSENSOR_SDI~input , GSENSOR_SDI~input, SCOMP_System, 1 +instance = comp, \inst13|inst|Decoder0~0 , inst13|inst|Decoder0~0, SCOMP_System, 1 instance = comp, \inst13|inst|Decoder0~6 , inst13|inst|Decoder0~6, SCOMP_System, 1 instance = comp, \inst13|inst|data_rx[5]~5 , inst13|inst|data_rx[5]~5, SCOMP_System, 1 instance = comp, \inst13|inst|data_rx[5] , inst13|inst|data_rx[5], SCOMP_System, 1 instance = comp, \inst13|inst|data_rd[5]~feeder , inst13|inst|data_rd[5]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst|data_rd[5] , inst13|inst|data_rd[5], SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[13]~16 , inst13|inst14|data_out[13]~16, SCOMP_System, 1 +instance = comp, \inst13|inst14|state_machine~0 , inst13|inst14|state_machine~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[15]~11 , inst13|inst14|data_out[15]~11, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[13] , inst13|inst14|data_out[13], SCOMP_System, 1 -instance = comp, \inst13|inst1[13]~79 , inst13|inst1[13]~79, SCOMP_System, 1 -instance = comp, \inst13|inst1[13]~96 , inst13|inst1[13]~96, SCOMP_System, 1 +instance = comp, \inst13|inst1[13]~84 , inst13|inst1[13]~84, SCOMP_System, 1 +instance = comp, \inst4|IO_OUT , inst4|IO_OUT, SCOMP_System, 1 +instance = comp, \inst4|COUNT[8]~29 , inst4|COUNT[8]~29, SCOMP_System, 1 +instance = comp, \inst4|COUNT[8] , inst4|COUNT[8], SCOMP_System, 1 +instance = comp, \inst4|COUNT[9]~31 , inst4|COUNT[9]~31, SCOMP_System, 1 +instance = comp, \inst4|COUNT[9] , inst4|COUNT[9], SCOMP_System, 1 +instance = comp, \inst4|COUNT[10]~33 , inst4|COUNT[10]~33, SCOMP_System, 1 +instance = comp, \inst4|COUNT[10] , inst4|COUNT[10], SCOMP_System, 1 +instance = comp, \inst4|COUNT[11]~35 , inst4|COUNT[11]~35, SCOMP_System, 1 +instance = comp, \inst4|COUNT[11] , inst4|COUNT[11], SCOMP_System, 1 +instance = comp, \inst4|COUNT[12]~37 , inst4|COUNT[12]~37, SCOMP_System, 1 +instance = comp, \inst4|COUNT[12] , inst4|COUNT[12], SCOMP_System, 1 +instance = comp, \inst4|COUNT[13]~39 , inst4|COUNT[13]~39, SCOMP_System, 1 +instance = comp, \inst4|COUNT[13] , inst4|COUNT[13], SCOMP_System, 1 +instance = comp, \inst13|inst1[13]~81 , inst13|inst1[13]~81, SCOMP_System, 1 +instance = comp, \inst13|inst1[13]~85 , inst13|inst1[13]~85, SCOMP_System, 1 instance = comp, \inst13|inst14|cmd_in[5]~feeder , inst13|inst14|cmd_in[5]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|cmd_in[5] , inst13|inst14|cmd_in[5], SCOMP_System, 1 -instance = comp, \inst13|inst14|Equal0~0 , inst13|inst14|Equal0~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector17~0 , inst13|inst14|Selector17~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|state.Tx2 , inst13|inst14|state.Tx2, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector18~0 , inst13|inst14|Selector18~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|state.Tx1p , inst13|inst14|state.Tx1p, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector19~0 , inst13|inst14|Selector19~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|state.Tx1 , inst13|inst14|state.Tx1, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector22~0 , inst13|inst14|Selector22~0, SCOMP_System, 1 -instance = comp, \inst13|inst1[8]~59 , inst13|inst1[8]~59, SCOMP_System, 1 -instance = comp, \inst13|inst14|cmd_in[0] , inst13|inst14|cmd_in[0], SCOMP_System, 1 +instance = comp, \inst13|inst1[12]~76 , inst13|inst1[12]~76, SCOMP_System, 1 +instance = comp, \inst13|inst1[12]~77 , inst13|inst1[12]~77, SCOMP_System, 1 +instance = comp, \inst13|inst1[12]~78 , inst13|inst1[12]~78, SCOMP_System, 1 +instance = comp, \inst13|inst|Decoder0~5 , inst13|inst|Decoder0~5, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[4]~4 , inst13|inst|data_rx[4]~4, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[4] , inst13|inst|data_rx[4], SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[4]~feeder , inst13|inst|data_rd[4]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[4] , inst13|inst|data_rd[4], SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[12]~15 , inst13|inst14|data_out[12]~15, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[12] , inst13|inst14|data_out[12], SCOMP_System, 1 +instance = comp, \inst13|inst1[12]~79 , inst13|inst1[12]~79, SCOMP_System, 1 +instance = comp, \inst13|inst1[12]~80 , inst13|inst1[12]~80, SCOMP_System, 1 +instance = comp, \inst13|inst14|cmd_in[4]~feeder , inst13|inst14|cmd_in[4]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|cmd_in[4] , inst13|inst14|cmd_in[4], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector21~1 , inst13|inst14|Selector21~1, SCOMP_System, 1 instance = comp, \inst13|inst14|Selector20~2 , inst13|inst14|Selector20~2, SCOMP_System, 1 instance = comp, \inst13|inst14|Selector20~3 , inst13|inst14|Selector20~3, SCOMP_System, 1 instance = comp, \inst13|inst14|state.Rx2 , inst13|inst14|state.Rx2, SCOMP_System, 1 +instance = comp, \inst13|inst|Decoder0~1 , inst13|inst|Decoder0~1, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[0]~0 , inst13|inst|data_rx[0]~0, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[0] , inst13|inst|data_rx[0], SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[0]~feeder , inst13|inst|data_rd[0]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[0] , inst13|inst|data_rd[0], SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[8]~10 , inst13|inst14|data_out[8]~10, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[8] , inst13|inst14|data_out[8], SCOMP_System, 1 -instance = comp, \inst13|inst1[8]~55 , inst13|inst1[8]~55, SCOMP_System, 1 instance = comp, \inst13|inst1[8]~58 , inst13|inst1[8]~58, SCOMP_System, 1 +instance = comp, \inst13|inst1[8]~60 , inst13|inst1[8]~60, SCOMP_System, 1 +instance = comp, \inst13|inst1[8]~61 , inst13|inst1[8]~61, SCOMP_System, 1 +instance = comp, \inst13|inst1[8]~62 , inst13|inst1[8]~62, SCOMP_System, 1 +instance = comp, \inst13|inst14|cmd_in[0] , inst13|inst14|cmd_in[0], SCOMP_System, 1 +instance = comp, \inst13|inst14|state~18 , inst13|inst14|state~18, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector21~0 , inst13|inst14|Selector21~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector16~0 , inst13|inst14|Selector16~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector16~1 , inst13|inst14|Selector16~1, SCOMP_System, 1 +instance = comp, \inst13|inst14|state.idle , inst13|inst14|state.idle, SCOMP_System, 1 +instance = comp, \inst13|inst14|running~0 , inst13|inst14|running~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|running , inst13|inst14|running, SCOMP_System, 1 +instance = comp, \inst13|inst14|latch_rdy~0 , inst13|inst14|latch_rdy~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|go , inst13|inst14|go, SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[7]~0 , inst13|inst14|tx_addr[7]~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|Equal0~0 , inst13|inst14|Equal0~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector17~0 , inst13|inst14|Selector17~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|state.Tx2 , inst13|inst14|state.Tx2, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector18~0 , inst13|inst14|Selector18~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|state.Tx1p , inst13|inst14|state.Tx1p, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector19~0 , inst13|inst14|Selector19~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|state.Tx1 , inst13|inst14|state.Tx1, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector32~0 , inst13|inst14|Selector32~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector32~1 , inst13|inst14|Selector32~1, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector32~2 , inst13|inst14|Selector32~2, SCOMP_System, 1 +instance = comp, \inst13|inst14|comm_en , inst13|inst14|comm_en, SCOMP_System, 1 +instance = comp, \inst13|inst14|rnw~1 , inst13|inst14|rnw~1, SCOMP_System, 1 +instance = comp, \inst13|inst14|rnw~0 , inst13|inst14|rnw~0, SCOMP_System, 1 +instance = comp, \inst13|inst14|rnw~2 , inst13|inst14|rnw~2, SCOMP_System, 1 +instance = comp, \inst13|inst14|rnw~3 , inst13|inst14|rnw~3, SCOMP_System, 1 +instance = comp, \inst13|inst14|rnw , inst13|inst14|rnw, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector19~0 , inst13|inst|Selector19~0, SCOMP_System, 1 +instance = comp, \inst13|inst|state.start , inst13|inst|state.start, SCOMP_System, 1 +instance = comp, \inst13|inst|Equal1~0 , inst13|inst|Equal1~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector21~0 , inst13|inst|Selector21~0, SCOMP_System, 1 +instance = comp, \inst13|inst|state.command , inst13|inst|state.command, SCOMP_System, 1 +instance = comp, \inst13|inst|state~15 , inst13|inst|state~15, SCOMP_System, 1 +instance = comp, \inst13|inst|state.slv_ack1 , inst13|inst|state.slv_ack1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector29~0 , inst13|inst|Selector29~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector29~1 , inst13|inst|Selector29~1, SCOMP_System, 1 +instance = comp, \inst13|inst|ack_error , inst13|inst|ack_error, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector24~0 , inst13|inst|Selector24~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector24~1 , inst13|inst|Selector24~1, SCOMP_System, 1 +instance = comp, \inst13|inst|state.stop , inst13|inst|state.stop, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector18~0 , inst13|inst|Selector18~0, SCOMP_System, 1 +instance = comp, \inst13|inst|state.ready , inst13|inst|state.ready, SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[7]~2 , inst13|inst|addr_rw[7]~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~6 , inst13|inst|Selector25~6, SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[7]~3 , inst13|inst|addr_rw[7]~3, SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[0] , inst13|inst|addr_rw[0], SCOMP_System, 1 +instance = comp, \inst13|inst|Selector22~0 , inst13|inst|Selector22~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector22~1 , inst13|inst|Selector22~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector22~2 , inst13|inst|Selector22~2, SCOMP_System, 1 +instance = comp, \inst13|inst|state.wr , inst13|inst|state.wr, SCOMP_System, 1 +instance = comp, \inst13|inst|WideOr3~0 , inst13|inst|WideOr3~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector0~0 , inst13|inst|Selector0~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector0~1 , inst13|inst|Selector0~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector0~2 , inst13|inst|Selector0~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector0~3 , inst13|inst|Selector0~3, SCOMP_System, 1 +instance = comp, \inst13|inst|busy , inst13|inst|busy, SCOMP_System, 1 +instance = comp, \inst13|inst14|prev_busy~feeder , inst13|inst14|prev_busy~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|prev_busy , inst13|inst14|prev_busy, SCOMP_System, 1 +instance = comp, \inst13|inst|Decoder0~2 , inst13|inst|Decoder0~2, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[1]~1 , inst13|inst|data_rx[1]~1, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[1] , inst13|inst|data_rx[1], SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[1]~feeder , inst13|inst|data_rd[1]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[1] , inst13|inst|data_rd[1], SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[9]~12 , inst13|inst14|data_out[9]~12, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[9] , inst13|inst14|data_out[9], SCOMP_System, 1 +instance = comp, \inst13|inst1[9]~65 , inst13|inst1[9]~65, SCOMP_System, 1 +instance = comp, \inst4|IO_BUS|dout[9]~3 , inst4|IO_BUS|dout[9]~3, SCOMP_System, 1 +instance = comp, \inst10|tri_enable , inst10|tri_enable, SCOMP_System, 1 +instance = comp, \inst13|inst1[9]~63 , inst13|inst1[9]~63, SCOMP_System, 1 +instance = comp, \inst13|inst1[9]~66 , inst13|inst1[9]~66, SCOMP_System, 1 +instance = comp, \inst13|inst14|cmd_in[1] , inst13|inst14|cmd_in[1], SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector21~2 , inst13|inst14|Selector21~2, SCOMP_System, 1 +instance = comp, \inst13|inst14|state.Rx1p , inst13|inst14|state.Rx1p, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector22~1 , inst13|inst14|Selector22~1, SCOMP_System, 1 +instance = comp, \inst13|inst14|Selector22~2 , inst13|inst14|Selector22~2, SCOMP_System, 1 +instance = comp, \inst13|inst14|state.Rx1 , inst13|inst14|state.Rx1, SCOMP_System, 1 +instance = comp, \inst13|inst|Decoder0~8 , inst13|inst|Decoder0~8, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[7]~7 , inst13|inst|data_rx[7]~7, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[7] , inst13|inst|data_rx[7], SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[7]~feeder , inst13|inst|data_rd[7]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[7] , inst13|inst|data_rd[7], SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[7]~9 , inst13|inst14|data_out[7]~9, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[7]~2 , inst13|inst14|data_out[7]~2, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[7] , inst13|inst14|data_out[7], SCOMP_System, 1 +instance = comp, \inst13|inst1[7]~54 , inst13|inst1[7]~54, SCOMP_System, 1 +instance = comp, \inst13|inst1[7]~56 , inst13|inst1[7]~56, SCOMP_System, 1 +instance = comp, \inst|Selector20~6 , inst|Selector20~6, SCOMP_System, 1 +instance = comp, \inst|Selector20~7 , inst|Selector20~7, SCOMP_System, 1 +instance = comp, \inst|AC[7] , inst|AC[7], SCOMP_System, 1 +instance = comp, \inst|Add1~40 , inst|Add1~40, SCOMP_System, 1 +instance = comp, \inst|Add1~46 , inst|Add1~46, SCOMP_System, 1 +instance = comp, \inst|Selector19~2 , inst|Selector19~2, SCOMP_System, 1 +instance = comp, \inst|Selector19~3 , inst|Selector19~3, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[32]~4 , inst|shifter|auto_generated|sbit_w[32]~4, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[32]~5 , inst|shifter|auto_generated|sbit_w[32]~5, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[18]~6 , inst|shifter|auto_generated|sbit_w[18]~6, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[18]~7 , inst|shifter|auto_generated|sbit_w[18]~7, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[48]~8 , inst|shifter|auto_generated|sbit_w[48]~8, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[48]~15 , inst|shifter|auto_generated|sbit_w[48]~15, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[30]~18 , inst|shifter|auto_generated|sbit_w[30]~18, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[30]~19 , inst|shifter|auto_generated|sbit_w[30]~19, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[44]~20 , inst|shifter|auto_generated|sbit_w[44]~20, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[44]~23 , inst|shifter|auto_generated|sbit_w[44]~23, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[56]~24 , inst|shifter|auto_generated|sbit_w[56]~24, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[40]~25 , inst|shifter|auto_generated|sbit_w[40]~25, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[40]~28 , inst|shifter|auto_generated|sbit_w[40]~28, SCOMP_System, 1 +instance = comp, \inst|Selector19~5 , inst|Selector19~5, SCOMP_System, 1 +instance = comp, \inst|Selector19~6 , inst|Selector19~6, SCOMP_System, 1 +instance = comp, \inst|Selector19~7 , inst|Selector19~7, SCOMP_System, 1 +instance = comp, \inst|Selector19~8 , inst|Selector19~8, SCOMP_System, 1 instance = comp, \inst|Selector19~9 , inst|Selector19~9, SCOMP_System, 1 instance = comp, \inst|AC[8] , inst|AC[8], SCOMP_System, 1 instance = comp, \inst|shifter|auto_generated|sbit_w[24]~26 , inst|shifter|auto_generated|sbit_w[24]~26, SCOMP_System, 1 instance = comp, \inst|shifter|auto_generated|sbit_w[24]~27 , inst|shifter|auto_generated|sbit_w[24]~27, SCOMP_System, 1 instance = comp, \inst|shifter|auto_generated|sbit_w[42]~58 , inst|shifter|auto_generated|sbit_w[42]~58, SCOMP_System, 1 instance = comp, \inst|shifter|auto_generated|sbit_w[42]~59 , inst|shifter|auto_generated|sbit_w[42]~59, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[46]~56 , inst|shifter|auto_generated|sbit_w[46]~56, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[46]~79 , inst|shifter|auto_generated|sbit_w[46]~79, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[62]~74 , inst|shifter|auto_generated|sbit_w[62]~74, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[62]~75 , inst|shifter|auto_generated|sbit_w[62]~75, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[54]~76 , inst|shifter|auto_generated|sbit_w[54]~76, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[54]~78 , inst|shifter|auto_generated|sbit_w[54]~78, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[20]~13 , inst|shifter|auto_generated|sbit_w[20]~13, SCOMP_System, 1 instance = comp, \inst|shifter|auto_generated|sbit_w[38]~51 , inst|shifter|auto_generated|sbit_w[38]~51, SCOMP_System, 1 instance = comp, \inst|shifter|auto_generated|sbit_w[38]~52 , inst|shifter|auto_generated|sbit_w[38]~52, SCOMP_System, 1 -instance = comp, \inst|Selector13~2 , inst|Selector13~2, SCOMP_System, 1 -instance = comp, \inst|Selector13~1 , inst|Selector13~1, SCOMP_System, 1 -instance = comp, \inst|Selector13~3 , inst|Selector13~3, SCOMP_System, 1 -instance = comp, \inst|Selector13~4 , inst|Selector13~4, SCOMP_System, 1 -instance = comp, \inst|Add1~73 , inst|Add1~73, SCOMP_System, 1 -instance = comp, \inst|Add1~74 , inst|Add1~74, SCOMP_System, 1 -instance = comp, \inst|Add1~75 , inst|Add1~75, SCOMP_System, 1 -instance = comp, \inst|Add1~71 , inst|Add1~71, SCOMP_System, 1 -instance = comp, \inst|Add1~76 , inst|Add1~76, SCOMP_System, 1 -instance = comp, \inst|Selector13~0 , inst|Selector13~0, SCOMP_System, 1 -instance = comp, \inst|Selector13~5 , inst|Selector13~5, SCOMP_System, 1 -instance = comp, \inst|Selector16~0 , inst|Selector16~0, SCOMP_System, 1 -instance = comp, \inst|Selector13~6 , inst|Selector13~6, SCOMP_System, 1 -instance = comp, \inst10|count[14]~45 , inst10|count[14]~45, SCOMP_System, 1 -instance = comp, \inst10|count[14] , inst10|count[14], SCOMP_System, 1 -instance = comp, \inst11|Add1~17 , inst11|Add1~17, SCOMP_System, 1 -instance = comp, \inst11|count[14]~45 , inst11|count[14]~45, SCOMP_System, 1 -instance = comp, \inst11|count[14] , inst11|count[14], SCOMP_System, 1 -instance = comp, \inst13|inst1[14]~82 , inst13|inst1[14]~82, SCOMP_System, 1 -instance = comp, \inst13|inst1[14]~83 , inst13|inst1[14]~83, SCOMP_System, 1 +instance = comp, \inst|Selector21~0 , inst|Selector21~0, SCOMP_System, 1 +instance = comp, \inst|Selector21~2 , inst|Selector21~2, SCOMP_System, 1 +instance = comp, \inst|Selector21~5 , inst|Selector21~5, SCOMP_System, 1 instance = comp, \inst13|inst|Decoder0~7 , inst13|inst|Decoder0~7, SCOMP_System, 1 instance = comp, \inst13|inst|data_rx[6]~6 , inst13|inst|data_rx[6]~6, SCOMP_System, 1 instance = comp, \inst13|inst|data_rx[6] , inst13|inst|data_rx[6], SCOMP_System, 1 instance = comp, \inst13|inst|data_rd[6]~feeder , inst13|inst|data_rd[6]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst|data_rd[6] , inst13|inst|data_rd[6], SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[14]~17 , inst13|inst14|data_out[14]~17, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[14] , inst13|inst14|data_out[14], SCOMP_System, 1 -instance = comp, \inst13|inst1[14]~84 , inst13|inst1[14]~84, SCOMP_System, 1 -instance = comp, \inst4|COUNT[14]~41 , inst4|COUNT[14]~41, SCOMP_System, 1 -instance = comp, \inst4|COUNT[14] , inst4|COUNT[14], SCOMP_System, 1 -instance = comp, \inst13|inst1[14]~81 , inst13|inst1[14]~81, SCOMP_System, 1 -instance = comp, \inst|Selector13~7 , inst|Selector13~7, SCOMP_System, 1 -instance = comp, \inst|AC[14] , inst|AC[14], SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[30]~18 , inst|shifter|auto_generated|sbit_w[30]~18, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[30]~19 , inst|shifter|auto_generated|sbit_w[30]~19, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[44]~20 , inst|shifter|auto_generated|sbit_w[44]~20, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[44]~23 , inst|shifter|auto_generated|sbit_w[44]~23, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[60]~70 , inst|shifter|auto_generated|sbit_w[60]~70, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[6]~8 , inst13|inst14|data_out[6]~8, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[6] , inst13|inst14|data_out[6], SCOMP_System, 1 +instance = comp, \inst13|inst1[6]~49 , inst13|inst1[6]~49, SCOMP_System, 1 +instance = comp, \SW[6]~input , SW[6]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[6] , inst7|B_DI[6], SCOMP_System, 1 +instance = comp, \inst13|inst1[6]~50 , inst13|inst1[6]~50, SCOMP_System, 1 +instance = comp, \inst13|inst1[6]~51 , inst13|inst1[6]~51, SCOMP_System, 1 +instance = comp, \inst13|inst1[6]~101 , inst13|inst1[6]~101, SCOMP_System, 1 +instance = comp, \inst13|inst1[6]~52 , inst13|inst1[6]~52, SCOMP_System, 1 +instance = comp, \inst|Selector21~6 , inst|Selector21~6, SCOMP_System, 1 +instance = comp, \inst|AC[6] , inst|AC[6], SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[22]~9 , inst|shifter|auto_generated|sbit_w[22]~9, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[22]~10 , inst|shifter|auto_generated|sbit_w[22]~10, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[36]~11 , inst|shifter|auto_generated|sbit_w[36]~11, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[36]~14 , inst|shifter|auto_generated|sbit_w[36]~14, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[52]~70 , inst|shifter|auto_generated|sbit_w[52]~70, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[52]~71 , inst|shifter|auto_generated|sbit_w[52]~71, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[60]~72 , inst|shifter|auto_generated|sbit_w[60]~72, SCOMP_System, 1 instance = comp, \inst|Selector23~0 , inst|Selector23~0, SCOMP_System, 1 instance = comp, \inst|Selector23~2 , inst|Selector23~2, SCOMP_System, 1 instance = comp, \inst|Selector23~3 , inst|Selector23~3, SCOMP_System, 1 -instance = comp, \inst|Add1~25 , inst|Add1~25, SCOMP_System, 1 -instance = comp, \inst|Add1~23 , inst|Add1~23, SCOMP_System, 1 -instance = comp, \inst|Add1~24 , inst|Add1~24, SCOMP_System, 1 -instance = comp, \inst|Add1~20 , inst|Add1~20, SCOMP_System, 1 -instance = comp, \inst|Add1~18 , inst|Add1~18, SCOMP_System, 1 -instance = comp, \inst|Add1~19 , inst|Add1~19, SCOMP_System, 1 -instance = comp, \inst|Add1~15 , inst|Add1~15, SCOMP_System, 1 -instance = comp, \inst|Add1~13 , inst|Add1~13, SCOMP_System, 1 -instance = comp, \inst|Add1~14 , inst|Add1~14, SCOMP_System, 1 -instance = comp, \inst|Add1~10 , inst|Add1~10, SCOMP_System, 1 -instance = comp, \inst|Add1~8 , inst|Add1~8, SCOMP_System, 1 -instance = comp, \inst|Add1~9 , inst|Add1~9, SCOMP_System, 1 -instance = comp, \inst|Add1~3 , inst|Add1~3, SCOMP_System, 1 -instance = comp, \inst|Add1~0 , inst|Add1~0, SCOMP_System, 1 -instance = comp, \inst|Add1~2 , inst|Add1~2, SCOMP_System, 1 -instance = comp, \inst|Add1~5 , inst|Add1~5, SCOMP_System, 1 -instance = comp, \inst|Add1~6 , inst|Add1~6, SCOMP_System, 1 -instance = comp, \inst|Add1~11 , inst|Add1~11, SCOMP_System, 1 -instance = comp, \inst|Add1~16 , inst|Add1~16, SCOMP_System, 1 -instance = comp, \inst|Add1~21 , inst|Add1~21, SCOMP_System, 1 -instance = comp, \inst|Add1~26 , inst|Add1~26, SCOMP_System, 1 instance = comp, \inst|Selector23~1 , inst|Selector23~1, SCOMP_System, 1 instance = comp, \inst|Selector23~4 , inst|Selector23~4, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[52]~68 , inst|shifter|auto_generated|sbit_w[52]~68, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[52]~69 , inst|shifter|auto_generated|sbit_w[52]~69, SCOMP_System, 1 instance = comp, \inst|Selector23~5 , inst|Selector23~5, SCOMP_System, 1 +instance = comp, \inst13|inst1[4]~99 , inst13|inst1[4]~99, SCOMP_System, 1 instance = comp, \SW[4]~input , SW[4]~input, SCOMP_System, 1 instance = comp, \inst7|B_DI[4] , inst7|B_DI[4], SCOMP_System, 1 -instance = comp, \inst13|inst1[4]~36 , inst13|inst1[4]~36, SCOMP_System, 1 +instance = comp, \inst13|inst1[4]~40 , inst13|inst1[4]~40, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[4]~6 , inst13|inst14|data_out[4]~6, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[4] , inst13|inst14|data_out[4], SCOMP_System, 1 -instance = comp, \inst13|inst1[4]~35 , inst13|inst1[4]~35, SCOMP_System, 1 -instance = comp, \inst13|inst1[4]~37 , inst13|inst1[4]~37, SCOMP_System, 1 -instance = comp, \inst13|inst1[4]~93 , inst13|inst1[4]~93, SCOMP_System, 1 -instance = comp, \inst13|inst1[4]~38 , inst13|inst1[4]~38, SCOMP_System, 1 +instance = comp, \inst13|inst1[4]~39 , inst13|inst1[4]~39, SCOMP_System, 1 +instance = comp, \inst13|inst1[4]~41 , inst13|inst1[4]~41, SCOMP_System, 1 +instance = comp, \inst13|inst1[4]~42 , inst13|inst1[4]~42, SCOMP_System, 1 instance = comp, \inst|Selector23~6 , inst|Selector23~6, SCOMP_System, 1 instance = comp, \inst|AC[4] , inst|AC[4], SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[20]~13 , inst|shifter|auto_generated|sbit_w[20]~13, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[36]~11 , inst|shifter|auto_generated|sbit_w[36]~11, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[36]~14 , inst|shifter|auto_generated|sbit_w[36]~14, SCOMP_System, 1 -instance = comp, \inst|Selector15~0 , inst|Selector15~0, SCOMP_System, 1 -instance = comp, \inst|Selector15~2 , inst|Selector15~2, SCOMP_System, 1 -instance = comp, \inst|Add1~60 , inst|Add1~60, SCOMP_System, 1 -instance = comp, \inst|Add1~58 , inst|Add1~58, SCOMP_System, 1 -instance = comp, \inst|Add1~59 , inst|Add1~59, SCOMP_System, 1 -instance = comp, \inst|Add1~53 , inst|Add1~53, SCOMP_System, 1 -instance = comp, \inst|Add1~54 , inst|Add1~54, SCOMP_System, 1 -instance = comp, \inst|Add1~55 , inst|Add1~55, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[19]~31 , inst|shifter|auto_generated|sbit_w[19]~31, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[19]~32 , inst|shifter|auto_generated|sbit_w[19]~32, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[37]~36 , inst|shifter|auto_generated|sbit_w[37]~36, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[37]~39 , inst|shifter|auto_generated|sbit_w[37]~39, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[53]~30 , inst|shifter|auto_generated|sbit_w[53]~30, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[49]~33 , inst|shifter|auto_generated|sbit_w[49]~33, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[49]~40 , inst|shifter|auto_generated|sbit_w[49]~40, SCOMP_System, 1 +instance = comp, \inst|Selector18~4 , inst|Selector18~4, SCOMP_System, 1 +instance = comp, \inst|Selector18~5 , inst|Selector18~5, SCOMP_System, 1 instance = comp, \inst|Add1~48 , inst|Add1~48, SCOMP_System, 1 instance = comp, \inst|Add1~49 , inst|Add1~49, SCOMP_System, 1 -instance = comp, \inst|Add1~50 , inst|Add1~50, SCOMP_System, 1 instance = comp, \inst|Add1~51 , inst|Add1~51, SCOMP_System, 1 +instance = comp, \inst|Selector18~6 , inst|Selector18~6, SCOMP_System, 1 +instance = comp, \inst|Selector18~7 , inst|Selector18~7, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[45]~43 , inst|shifter|auto_generated|sbit_w[45]~43, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[45]~80 , inst|shifter|auto_generated|sbit_w[45]~80, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[57]~46 , inst|shifter|auto_generated|sbit_w[57]~46, SCOMP_System, 1 +instance = comp, \inst|Selector18~2 , inst|Selector18~2, SCOMP_System, 1 +instance = comp, \inst|Selector18~3 , inst|Selector18~3, SCOMP_System, 1 +instance = comp, \inst|Selector18~0 , inst|Selector18~0, SCOMP_System, 1 +instance = comp, \inst|Selector18~1 , inst|Selector18~1, SCOMP_System, 1 +instance = comp, \inst|Selector18~8 , inst|Selector18~8, SCOMP_System, 1 +instance = comp, \inst|AC[9] , inst|AC[9], SCOMP_System, 1 +instance = comp, \inst|Add1~50 , inst|Add1~50, SCOMP_System, 1 instance = comp, \inst|Add1~56 , inst|Add1~56, SCOMP_System, 1 instance = comp, \inst|Add1~61 , inst|Add1~61, SCOMP_System, 1 instance = comp, \inst|Add1~66 , inst|Add1~66, SCOMP_System, 1 instance = comp, \inst|Selector15~3 , inst|Selector15~3, SCOMP_System, 1 +instance = comp, \inst|Selector15~2 , inst|Selector15~2, SCOMP_System, 1 instance = comp, \inst|Selector15~4 , inst|Selector15~4, SCOMP_System, 1 +instance = comp, \inst|Selector15~0 , inst|Selector15~0, SCOMP_System, 1 instance = comp, \inst|Selector15~1 , inst|Selector15~1, SCOMP_System, 1 instance = comp, \inst|Selector15~5 , inst|Selector15~5, SCOMP_System, 1 instance = comp, \inst|Selector15~6 , inst|Selector15~6, SCOMP_System, 1 instance = comp, \inst|Selector15~7 , inst|Selector15~7, SCOMP_System, 1 instance = comp, \inst|AC[12] , inst|AC[12], SCOMP_System, 1 -instance = comp, \inst|Add1~65 , inst|Add1~65, SCOMP_System, 1 -instance = comp, \inst|Selector14~0 , inst|Selector14~0, SCOMP_System, 1 -instance = comp, \inst|Selector14~1 , inst|Selector14~1, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[17]~29 , inst|shifter|auto_generated|sbit_w[17]~29, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[53]~30 , inst|shifter|auto_generated|sbit_w[53]~30, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[53]~73 , inst|shifter|auto_generated|sbit_w[53]~73, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[23]~34 , inst|shifter|auto_generated|sbit_w[23]~34, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[23]~35 , inst|shifter|auto_generated|sbit_w[23]~35, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[19]~31 , inst|shifter|auto_generated|sbit_w[19]~31, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[19]~32 , inst|shifter|auto_generated|sbit_w[19]~32, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[37]~36 , inst|shifter|auto_generated|sbit_w[37]~36, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[37]~39 , inst|shifter|auto_generated|sbit_w[37]~39, SCOMP_System, 1 -instance = comp, \inst|Selector14~2 , inst|Selector14~2, SCOMP_System, 1 -instance = comp, \inst|Selector14~3 , inst|Selector14~3, SCOMP_System, 1 -instance = comp, \inst|Selector14~4 , inst|Selector14~4, SCOMP_System, 1 -instance = comp, \inst|Selector14~5 , inst|Selector14~5, SCOMP_System, 1 -instance = comp, \inst|Selector14~6 , inst|Selector14~6, SCOMP_System, 1 -instance = comp, \inst13|inst1[13]~80 , inst13|inst1[13]~80, SCOMP_System, 1 -instance = comp, \inst|Selector14~7 , inst|Selector14~7, SCOMP_System, 1 -instance = comp, \inst|AC[13] , inst|AC[13], SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[29]~41 , inst|shifter|auto_generated|sbit_w[29]~41, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[29]~42 , inst|shifter|auto_generated|sbit_w[29]~42, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[45]~43 , inst|shifter|auto_generated|sbit_w[45]~43, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[27]~44 , inst|shifter|auto_generated|sbit_w[27]~44, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[27]~45 , inst|shifter|auto_generated|sbit_w[27]~45, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[45]~78 , inst|shifter|auto_generated|sbit_w[45]~78, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[61]~71 , inst|shifter|auto_generated|sbit_w[61]~71, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[61]~72 , inst|shifter|auto_generated|sbit_w[61]~72, SCOMP_System, 1 -instance = comp, \inst|Selector22~0 , inst|Selector22~0, SCOMP_System, 1 -instance = comp, \inst|Selector22~1 , inst|Selector22~1, SCOMP_System, 1 -instance = comp, \inst|Selector22~2 , inst|Selector22~2, SCOMP_System, 1 -instance = comp, \inst|Selector22~3 , inst|Selector22~3, SCOMP_System, 1 -instance = comp, \inst|Selector22~4 , inst|Selector22~4, SCOMP_System, 1 -instance = comp, \inst|Add1~30 , inst|Add1~30, SCOMP_System, 1 -instance = comp, \inst|Add1~28 , inst|Add1~28, SCOMP_System, 1 -instance = comp, \inst|Add1~29 , inst|Add1~29, SCOMP_System, 1 -instance = comp, \inst|Add1~31 , inst|Add1~31, SCOMP_System, 1 -instance = comp, \inst|Selector22~5 , inst|Selector22~5, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[5]~7 , inst13|inst14|data_out[5]~7, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[5] , inst13|inst14|data_out[5], SCOMP_System, 1 -instance = comp, \inst13|inst1[5]~41 , inst13|inst1[5]~41, SCOMP_System, 1 -instance = comp, \inst13|inst1[5]~42 , inst13|inst1[5]~42, SCOMP_System, 1 -instance = comp, \SW[5]~input , SW[5]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[5] , inst7|B_DI[5], SCOMP_System, 1 -instance = comp, \inst13|inst1[5]~40 , inst13|inst1[5]~40, SCOMP_System, 1 -instance = comp, \inst13|inst1[5]~43 , inst13|inst1[5]~43, SCOMP_System, 1 -instance = comp, \inst|Selector22~6 , inst|Selector22~6, SCOMP_System, 1 -instance = comp, \inst|AC[5] , inst|AC[5], SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[21]~37 , inst|shifter|auto_generated|sbit_w[21]~37, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[21]~38 , inst|shifter|auto_generated|sbit_w[21]~38, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[35]~63 , inst|shifter|auto_generated|sbit_w[35]~63, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[35]~62 , inst|shifter|auto_generated|sbit_w[35]~62, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[35]~64 , inst|shifter|auto_generated|sbit_w[35]~64, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[39]~60 , inst|shifter|auto_generated|sbit_w[39]~60, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[39]~61 , inst|shifter|auto_generated|sbit_w[39]~61, SCOMP_System, 1 -instance = comp, \inst|Selector24~0 , inst|Selector24~0, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[59]~65 , inst|shifter|auto_generated|sbit_w[59]~65, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[43]~66 , inst|shifter|auto_generated|sbit_w[43]~66, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[43]~67 , inst|shifter|auto_generated|sbit_w[43]~67, SCOMP_System, 1 -instance = comp, \inst|Selector24~1 , inst|Selector24~1, SCOMP_System, 1 -instance = comp, \inst|Selector24~3 , inst|Selector24~3, SCOMP_System, 1 -instance = comp, \inst|Selector24~4 , inst|Selector24~4, SCOMP_System, 1 -instance = comp, \inst|Selector24~2 , inst|Selector24~2, SCOMP_System, 1 -instance = comp, \inst|Selector24~5 , inst|Selector24~5, SCOMP_System, 1 -instance = comp, \inst|Selector24~6 , inst|Selector24~6, SCOMP_System, 1 -instance = comp, \inst|Selector24~7 , inst|Selector24~7, SCOMP_System, 1 -instance = comp, \inst|AC[3] , inst|AC[3], SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[18]~6 , inst|shifter|auto_generated|sbit_w[18]~6, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[18]~7 , inst|shifter|auto_generated|sbit_w[18]~7, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[34]~53 , inst|shifter|auto_generated|sbit_w[34]~53, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[34]~55 , inst|shifter|auto_generated|sbit_w[34]~55, SCOMP_System, 1 -instance = comp, \inst|Selector17~3 , inst|Selector17~3, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[58]~57 , inst|shifter|auto_generated|sbit_w[58]~57, SCOMP_System, 1 -instance = comp, \inst|Selector17~2 , inst|Selector17~2, SCOMP_System, 1 -instance = comp, \inst|Selector17~4 , inst|Selector17~4, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[28]~22 , inst|shifter|auto_generated|sbit_w[28]~22, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[46]~56 , inst|shifter|auto_generated|sbit_w[46]~56, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[46]~81 , inst|shifter|auto_generated|sbit_w[46]~81, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[62]~76 , inst|shifter|auto_generated|sbit_w[62]~76, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[62]~77 , inst|shifter|auto_generated|sbit_w[62]~77, SCOMP_System, 1 +instance = comp, \inst|Selector13~2 , inst|Selector13~2, SCOMP_System, 1 +instance = comp, \inst|Selector13~3 , inst|Selector13~3, SCOMP_System, 1 +instance = comp, \inst|Selector13~4 , inst|Selector13~4, SCOMP_System, 1 +instance = comp, \inst|Add1~73 , inst|Add1~73, SCOMP_System, 1 +instance = comp, \inst|Add1~74 , inst|Add1~74, SCOMP_System, 1 +instance = comp, \inst|Add1~68 , inst|Add1~68, SCOMP_System, 1 +instance = comp, \inst|Add1~69 , inst|Add1~69, SCOMP_System, 1 +instance = comp, \inst|Add1~70 , inst|Add1~70, SCOMP_System, 1 +instance = comp, \inst|Add1~71 , inst|Add1~71, SCOMP_System, 1 +instance = comp, \inst|Add1~76 , inst|Add1~76, SCOMP_System, 1 +instance = comp, \inst|Selector13~0 , inst|Selector13~0, SCOMP_System, 1 +instance = comp, \inst|Selector13~5 , inst|Selector13~5, SCOMP_System, 1 +instance = comp, \inst|Selector13~6 , inst|Selector13~6, SCOMP_System, 1 +instance = comp, \inst4|COUNT[14]~41 , inst4|COUNT[14]~41, SCOMP_System, 1 +instance = comp, \inst4|COUNT[14] , inst4|COUNT[14], SCOMP_System, 1 +instance = comp, \inst13|inst1[14]~86 , inst13|inst1[14]~86, SCOMP_System, 1 +instance = comp, \inst11|Add1~17 , inst11|Add1~17, SCOMP_System, 1 +instance = comp, \inst11|count[14]~45 , inst11|count[14]~45, SCOMP_System, 1 +instance = comp, \inst11|count[14] , inst11|count[14], SCOMP_System, 1 +instance = comp, \inst10|count[14]~45 , inst10|count[14]~45, SCOMP_System, 1 +instance = comp, \inst10|count[14] , inst10|count[14], SCOMP_System, 1 +instance = comp, \inst13|inst1[14]~87 , inst13|inst1[14]~87, SCOMP_System, 1 +instance = comp, \inst13|inst1[14]~88 , inst13|inst1[14]~88, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[14]~17 , inst13|inst14|data_out[14]~17, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[14] , inst13|inst14|data_out[14], SCOMP_System, 1 +instance = comp, \inst13|inst1[14]~89 , inst13|inst1[14]~89, SCOMP_System, 1 +instance = comp, \inst|Selector13~7 , inst|Selector13~7, SCOMP_System, 1 +instance = comp, \inst|AC[14] , inst|AC[14], SCOMP_System, 1 +instance = comp, \inst|Add1~75 , inst|Add1~75, SCOMP_System, 1 +instance = comp, \inst|Add1~81 , inst|Add1~81, SCOMP_System, 1 +instance = comp, \inst|Selector12~5 , inst|Selector12~5, SCOMP_System, 1 +instance = comp, \inst|Selector12~6 , inst|Selector12~6, SCOMP_System, 1 +instance = comp, \inst|Selector12~7 , inst|Selector12~7, SCOMP_System, 1 +instance = comp, \inst|Selector12~8 , inst|Selector12~8, SCOMP_System, 1 +instance = comp, \inst|Selector12~1 , inst|Selector12~1, SCOMP_System, 1 +instance = comp, \inst|Selector12~2 , inst|Selector12~2, SCOMP_System, 1 +instance = comp, \inst|Selector12~3 , inst|Selector12~3, SCOMP_System, 1 +instance = comp, \inst|Selector12~9 , inst|Selector12~9, SCOMP_System, 1 +instance = comp, \inst|Selector12~0 , inst|Selector12~0, SCOMP_System, 1 +instance = comp, \inst|Selector12~10 , inst|Selector12~10, SCOMP_System, 1 +instance = comp, \inst4|COUNT[15]~43 , inst4|COUNT[15]~43, SCOMP_System, 1 +instance = comp, \inst4|COUNT[15] , inst4|COUNT[15], SCOMP_System, 1 +instance = comp, \inst13|inst1[15]~91 , inst13|inst1[15]~91, SCOMP_System, 1 +instance = comp, \inst10|count[15]~47 , inst10|count[15]~47, SCOMP_System, 1 +instance = comp, \inst10|count[15] , inst10|count[15], SCOMP_System, 1 +instance = comp, \inst11|Add1~18 , inst11|Add1~18, SCOMP_System, 1 +instance = comp, \inst11|count[15]~47 , inst11|count[15]~47, SCOMP_System, 1 +instance = comp, \inst11|count[15] , inst11|count[15], SCOMP_System, 1 +instance = comp, \inst13|inst1[15]~92 , inst13|inst1[15]~92, SCOMP_System, 1 +instance = comp, \inst13|inst1[15]~93 , inst13|inst1[15]~93, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[15]~18 , inst13|inst14|data_out[15]~18, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[15] , inst13|inst14|data_out[15], SCOMP_System, 1 +instance = comp, \inst13|inst1[15]~94 , inst13|inst1[15]~94, SCOMP_System, 1 +instance = comp, \inst|Selector12~11 , inst|Selector12~11, SCOMP_System, 1 +instance = comp, \inst|AC[15] , inst|AC[15], SCOMP_System, 1 +instance = comp, \inst|Selector19~0 , inst|Selector19~0, SCOMP_System, 1 +instance = comp, \inst|Selector16~0 , inst|Selector16~0, SCOMP_System, 1 instance = comp, \inst|Selector17~5 , inst|Selector17~5, SCOMP_System, 1 instance = comp, \inst|Selector17~6 , inst|Selector17~6, SCOMP_System, 1 instance = comp, \inst|Selector17~7 , inst|Selector17~7, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[58]~57 , inst|shifter|auto_generated|sbit_w[58]~57, SCOMP_System, 1 +instance = comp, \inst|Selector17~2 , inst|Selector17~2, SCOMP_System, 1 +instance = comp, \inst13|inst1[10]~68 , inst13|inst1[10]~68, SCOMP_System, 1 +instance = comp, \inst|Selector17~0 , inst|Selector17~0, SCOMP_System, 1 instance = comp, \inst13|inst|Decoder0~3 , inst13|inst|Decoder0~3, SCOMP_System, 1 instance = comp, \inst13|inst|data_rx[2]~2 , inst13|inst|data_rx[2]~2, SCOMP_System, 1 instance = comp, \inst13|inst|data_rx[2] , inst13|inst|data_rx[2], SCOMP_System, 1 @@ -826,162 +969,62 @@ instance = comp, \inst13|inst|data_rd[2]~feeder , inst13|inst|data_rd[2]~feeder, instance = comp, \inst13|inst|data_rd[2] , inst13|inst|data_rd[2], SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[10]~13 , inst13|inst14|data_out[10]~13, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[10] , inst13|inst14|data_out[10], SCOMP_System, 1 -instance = comp, \inst13|inst1[10]~67 , inst13|inst1[10]~67, SCOMP_System, 1 -instance = comp, \inst13|inst1[10]~66 , inst13|inst1[10]~66, SCOMP_System, 1 -instance = comp, \inst|Selector17~0 , inst|Selector17~0, SCOMP_System, 1 -instance = comp, \inst13|inst1[10]~65 , inst13|inst1[10]~65, SCOMP_System, 1 -instance = comp, \inst|Selector17~1 , inst|Selector17~1, SCOMP_System, 1 -instance = comp, \inst|Selector17~8 , inst|Selector17~8, SCOMP_System, 1 -instance = comp, \inst|AC[10] , inst|AC[10], SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[25]~48 , inst|shifter|auto_generated|sbit_w[25]~48, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[25]~49 , inst|shifter|auto_generated|sbit_w[25]~49, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[41]~47 , inst|shifter|auto_generated|sbit_w[41]~47, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[41]~50 , inst|shifter|auto_generated|sbit_w[41]~50, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[57]~46 , inst|shifter|auto_generated|sbit_w[57]~46, SCOMP_System, 1 -instance = comp, \inst|Selector18~3 , inst|Selector18~3, SCOMP_System, 1 -instance = comp, \inst|Selector18~4 , inst|Selector18~4, SCOMP_System, 1 -instance = comp, \inst|Selector18~1 , inst|Selector18~1, SCOMP_System, 1 -instance = comp, \inst|Selector18~2 , inst|Selector18~2, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[49]~33 , inst|shifter|auto_generated|sbit_w[49]~33, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[49]~40 , inst|shifter|auto_generated|sbit_w[49]~40, SCOMP_System, 1 -instance = comp, \inst|Selector18~5 , inst|Selector18~5, SCOMP_System, 1 -instance = comp, \inst|Selector18~6 , inst|Selector18~6, SCOMP_System, 1 -instance = comp, \inst|Selector18~7 , inst|Selector18~7, SCOMP_System, 1 -instance = comp, \inst|AC[9] , inst|AC[9], SCOMP_System, 1 -instance = comp, \inst13|inst|Decoder0~2 , inst13|inst|Decoder0~2, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[1]~1 , inst13|inst|data_rx[1]~1, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[1] , inst13|inst|data_rx[1], SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[1]~feeder , inst13|inst|data_rd[1]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[1] , inst13|inst|data_rd[1], SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[9]~12 , inst13|inst14|data_out[9]~12, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[9] , inst13|inst14|data_out[9], SCOMP_System, 1 -instance = comp, \inst13|inst1[9]~61 , inst13|inst1[9]~61, SCOMP_System, 1 -instance = comp, \inst13|inst1[9]~62 , inst13|inst1[9]~62, SCOMP_System, 1 -instance = comp, \SW[9]~input , SW[9]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[9] , inst7|B_DI[9], SCOMP_System, 1 -instance = comp, \inst13|inst1[9]~60 , inst13|inst1[9]~60, SCOMP_System, 1 -instance = comp, \inst13|inst1[9]~63 , inst13|inst1[9]~63, SCOMP_System, 1 -instance = comp, \inst13|inst1[9]~64 , inst13|inst1[9]~64, SCOMP_System, 1 -instance = comp, \inst13|inst14|cmd_in[1] , inst13|inst14|cmd_in[1], SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector21~2 , inst13|inst14|Selector21~2, SCOMP_System, 1 -instance = comp, \inst13|inst14|state.Rx1p , inst13|inst14|state.Rx1p, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector22~1 , inst13|inst14|Selector22~1, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector22~2 , inst13|inst14|Selector22~2, SCOMP_System, 1 -instance = comp, \inst13|inst14|state.Rx1 , inst13|inst14|state.Rx1, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[5]~19 , inst13|inst14|data_out[5]~19, SCOMP_System, 1 -instance = comp, \inst13|inst14|state~18 , inst13|inst14|state~18, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector21~0 , inst13|inst14|Selector21~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector16~0 , inst13|inst14|Selector16~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector16~1 , inst13|inst14|Selector16~1, SCOMP_System, 1 -instance = comp, \inst13|inst14|state.idle , inst13|inst14|state.idle, SCOMP_System, 1 -instance = comp, \inst13|inst14|rnw~0 , inst13|inst14|rnw~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|rnw~1 , inst13|inst14|rnw~1, SCOMP_System, 1 -instance = comp, \inst13|inst14|rnw~2 , inst13|inst14|rnw~2, SCOMP_System, 1 -instance = comp, \inst13|inst14|rnw~3 , inst13|inst14|rnw~3, SCOMP_System, 1 -instance = comp, \inst13|inst14|rnw , inst13|inst14|rnw, SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[0]~feeder , inst13|inst|addr_rw[0]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|state_machine~1 , inst13|inst14|state_machine~1, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector32~1 , inst13|inst14|Selector32~1, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector32~0 , inst13|inst14|Selector32~0, SCOMP_System, 1 -instance = comp, \inst13|inst14|Selector32~2 , inst13|inst14|Selector32~2, SCOMP_System, 1 -instance = comp, \inst13|inst14|comm_en , inst13|inst14|comm_en, SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[7]~2 , inst13|inst|addr_rw[7]~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~6 , inst13|inst|Selector25~6, SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[7]~3 , inst13|inst|addr_rw[7]~3, SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[0] , inst13|inst|addr_rw[0], SCOMP_System, 1 -instance = comp, \inst13|inst|Selector22~0 , inst13|inst|Selector22~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector22~1 , inst13|inst|Selector22~1, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector22~2 , inst13|inst|Selector22~2, SCOMP_System, 1 -instance = comp, \inst13|inst|state.wr , inst13|inst|state.wr, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector21~0 , inst13|inst|Selector21~0, SCOMP_System, 1 -instance = comp, \inst13|inst|state.command , inst13|inst|state.command, SCOMP_System, 1 -instance = comp, \inst13|inst|WideOr12~0 , inst13|inst|WideOr12~0, SCOMP_System, 1 -instance = comp, \inst13|inst|bit_cnt[0] , inst13|inst|bit_cnt[0], SCOMP_System, 1 -instance = comp, \inst13|inst|Selector27~0 , inst13|inst|Selector27~0, SCOMP_System, 1 -instance = comp, \inst13|inst|bit_cnt[1] , inst13|inst|bit_cnt[1], SCOMP_System, 1 -instance = comp, \inst13|inst|state~15 , inst13|inst|state~15, SCOMP_System, 1 -instance = comp, \inst13|inst|state.slv_ack1 , inst13|inst|state.slv_ack1, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector24~0 , inst13|inst|Selector24~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector24~1 , inst13|inst|Selector24~1, SCOMP_System, 1 -instance = comp, \inst13|inst|state.stop , inst13|inst|state.stop, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector18~0 , inst13|inst|Selector18~0, SCOMP_System, 1 -instance = comp, \inst13|inst|state.ready , inst13|inst|state.ready, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector19~0 , inst13|inst|Selector19~0, SCOMP_System, 1 -instance = comp, \inst13|inst|state.start , inst13|inst|state.start, SCOMP_System, 1 -instance = comp, \inst13|inst|WideOr3~0 , inst13|inst|WideOr3~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector0~0 , inst13|inst|Selector0~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector0~1 , inst13|inst|Selector0~1, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector0~2 , inst13|inst|Selector0~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector0~3 , inst13|inst|Selector0~3, SCOMP_System, 1 -instance = comp, \inst13|inst|busy , inst13|inst|busy, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[6]~8 , inst13|inst14|data_out[6]~8, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[6] , inst13|inst14|data_out[6], SCOMP_System, 1 -instance = comp, \inst13|inst1[6]~45 , inst13|inst1[6]~45, SCOMP_System, 1 -instance = comp, \inst13|inst1[6]~47 , inst13|inst1[6]~47, SCOMP_System, 1 -instance = comp, \inst13|inst1[6]~48 , inst13|inst1[6]~48, SCOMP_System, 1 -instance = comp, \inst|Selector21~3 , inst|Selector21~3, SCOMP_System, 1 -instance = comp, \inst|Selector21~4 , inst|Selector21~4, SCOMP_System, 1 -instance = comp, \inst|Add1~33 , inst|Add1~33, SCOMP_System, 1 -instance = comp, \inst|Add1~34 , inst|Add1~34, SCOMP_System, 1 -instance = comp, \inst|Add1~36 , inst|Add1~36, SCOMP_System, 1 -instance = comp, \inst|Selector21~1 , inst|Selector21~1, SCOMP_System, 1 -instance = comp, \inst|Selector21~0 , inst|Selector21~0, SCOMP_System, 1 -instance = comp, \inst|Selector21~2 , inst|Selector21~2, SCOMP_System, 1 -instance = comp, \inst|Selector21~5 , inst|Selector21~5, SCOMP_System, 1 -instance = comp, \inst|Selector21~6 , inst|Selector21~6, SCOMP_System, 1 -instance = comp, \inst|AC[6] , inst|AC[6], SCOMP_System, 1 -instance = comp, \inst|Add1~35 , inst|Add1~35, SCOMP_System, 1 -instance = comp, \inst|Selector20~2 , inst|Selector20~2, SCOMP_System, 1 -instance = comp, \inst|shifter|auto_generated|sbit_w[55]~77 , inst|shifter|auto_generated|sbit_w[55]~77, SCOMP_System, 1 -instance = comp, \inst|Selector20~3 , inst|Selector20~3, SCOMP_System, 1 -instance = comp, \inst|Selector20~4 , inst|Selector20~4, SCOMP_System, 1 -instance = comp, \inst|Selector20~5 , inst|Selector20~5, SCOMP_System, 1 -instance = comp, \inst|Selector20~6 , inst|Selector20~6, SCOMP_System, 1 -instance = comp, \inst13|inst|Decoder0~8 , inst13|inst|Decoder0~8, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[7]~7 , inst13|inst|data_rx[7]~7, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rx[7] , inst13|inst|data_rx[7], SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[7]~feeder , inst13|inst|data_rd[7]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst|data_rd[7] , inst13|inst|data_rd[7], SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[7]~9 , inst13|inst14|data_out[7]~9, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[7] , inst13|inst14|data_out[7], SCOMP_System, 1 -instance = comp, \inst13|inst1[7]~51 , inst13|inst1[7]~51, SCOMP_System, 1 -instance = comp, \inst13|inst1[7]~52 , inst13|inst1[7]~52, SCOMP_System, 1 -instance = comp, \SW[7]~input , SW[7]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[7] , inst7|B_DI[7], SCOMP_System, 1 -instance = comp, \inst13|inst1[7]~50 , inst13|inst1[7]~50, SCOMP_System, 1 -instance = comp, \inst13|inst1[7]~53 , inst13|inst1[7]~53, SCOMP_System, 1 -instance = comp, \inst|Selector20~7 , inst|Selector20~7, SCOMP_System, 1 -instance = comp, \inst|AC[7] , inst|AC[7], SCOMP_System, 1 -instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a2 , inst|altsyncram_component|auto_generated|ram_block1a2, SCOMP_System, 1 +instance = comp, \inst13|inst1[10]~69 , inst13|inst1[10]~69, SCOMP_System, 1 +instance = comp, \inst13|inst1[10]~67 , inst13|inst1[10]~67, SCOMP_System, 1 +instance = comp, \inst|Selector17~1 , inst|Selector17~1, SCOMP_System, 1 +instance = comp, \inst|Selector17~8 , inst|Selector17~8, SCOMP_System, 1 +instance = comp, \inst|AC[10] , inst|AC[10], SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[25]~48 , inst|shifter|auto_generated|sbit_w[25]~48, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[25]~49 , inst|shifter|auto_generated|sbit_w[25]~49, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[41]~47 , inst|shifter|auto_generated|sbit_w[41]~47, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[41]~50 , inst|shifter|auto_generated|sbit_w[41]~50, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[61]~73 , inst|shifter|auto_generated|sbit_w[61]~73, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[61]~74 , inst|shifter|auto_generated|sbit_w[61]~74, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[53]~75 , inst|shifter|auto_generated|sbit_w[53]~75, SCOMP_System, 1 +instance = comp, \inst|Selector22~0 , inst|Selector22~0, SCOMP_System, 1 +instance = comp, \inst|Selector22~1 , inst|Selector22~1, SCOMP_System, 1 +instance = comp, \inst|Selector22~2 , inst|Selector22~2, SCOMP_System, 1 +instance = comp, \inst|Selector22~5 , inst|Selector22~5, SCOMP_System, 1 +instance = comp, \SW[5]~input , SW[5]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[5] , inst7|B_DI[5], SCOMP_System, 1 +instance = comp, \inst13|inst1[5]~45 , inst13|inst1[5]~45, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[5]~7 , inst13|inst14|data_out[5]~7, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[5] , inst13|inst14|data_out[5], SCOMP_System, 1 +instance = comp, \inst13|inst1[5]~44 , inst13|inst1[5]~44, SCOMP_System, 1 +instance = comp, \inst13|inst1[5]~46 , inst13|inst1[5]~46, SCOMP_System, 1 +instance = comp, \inst13|inst1[5]~100 , inst13|inst1[5]~100, SCOMP_System, 1 +instance = comp, \inst13|inst1[5]~47 , inst13|inst1[5]~47, SCOMP_System, 1 +instance = comp, \inst|Selector22~6 , inst|Selector22~6, SCOMP_System, 1 +instance = comp, \inst|AC[5] , inst|AC[5], SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[20]~12 , inst|shifter|auto_generated|sbit_w[20]~12, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[34]~53 , inst|shifter|auto_generated|sbit_w[34]~53, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[34]~54 , inst|shifter|auto_generated|sbit_w[34]~54, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[34]~55 , inst|shifter|auto_generated|sbit_w[34]~55, SCOMP_System, 1 +instance = comp, \inst|Selector25~6 , inst|Selector25~6, SCOMP_System, 1 +instance = comp, \inst|Selector25~7 , inst|Selector25~7, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[58]~60 , inst|shifter|auto_generated|sbit_w[58]~60, SCOMP_System, 1 +instance = comp, \inst|Selector25~0 , inst|Selector25~0, SCOMP_System, 1 +instance = comp, \SW[2]~input , SW[2]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[2] , inst7|B_DI[2], SCOMP_System, 1 +instance = comp, \inst13|inst1[2]~32 , inst13|inst1[2]~32, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[2]~4 , inst13|inst14|data_out[2]~4, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[2] , inst13|inst14|data_out[2], SCOMP_System, 1 +instance = comp, \inst13|inst1[2]~33 , inst13|inst1[2]~33, SCOMP_System, 1 +instance = comp, \inst4|IO_BUS|dout[2]~0 , inst4|IO_BUS|dout[2]~0, SCOMP_System, 1 +instance = comp, \inst13|inst1[2]~31 , inst13|inst1[2]~31, SCOMP_System, 1 +instance = comp, \inst|Selector25~1 , inst|Selector25~1, SCOMP_System, 1 +instance = comp, \inst|Selector25~8 , inst|Selector25~8, SCOMP_System, 1 +instance = comp, \inst|AC[2] , inst|AC[2], SCOMP_System, 1 +instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a0 , inst|altsyncram_component|auto_generated|ram_block1a0, SCOMP_System, 1 instance = comp, \inst|Selector1~0 , inst|Selector1~0, SCOMP_System, 1 -instance = comp, \inst|Add0~20 , inst|Add0~20, SCOMP_System, 1 instance = comp, \inst|Selector1~1 , inst|Selector1~1, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][10]~feeder , inst|PC_stack[9][10]~feeder, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][10] , inst|PC_stack[9][10], SCOMP_System, 1 -instance = comp, \inst|Selector119~0 , inst|Selector119~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[8][10] , inst|PC_stack[8][10], SCOMP_System, 1 -instance = comp, \inst|Selector108~0 , inst|Selector108~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[7][10] , inst|PC_stack[7][10], SCOMP_System, 1 -instance = comp, \inst|Selector97~0 , inst|Selector97~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[6][10] , inst|PC_stack[6][10], SCOMP_System, 1 -instance = comp, \inst|Selector86~0 , inst|Selector86~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[5][10] , inst|PC_stack[5][10], SCOMP_System, 1 -instance = comp, \inst|Selector75~0 , inst|Selector75~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[4][10] , inst|PC_stack[4][10], SCOMP_System, 1 -instance = comp, \inst|Selector64~0 , inst|Selector64~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[3][10] , inst|PC_stack[3][10], SCOMP_System, 1 -instance = comp, \inst|Selector53~0 , inst|Selector53~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[2][10] , inst|PC_stack[2][10], SCOMP_System, 1 -instance = comp, \inst|Selector42~0 , inst|Selector42~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[1][10] , inst|PC_stack[1][10], SCOMP_System, 1 -instance = comp, \inst|Selector31~0 , inst|Selector31~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[0][10] , inst|PC_stack[0][10], SCOMP_System, 1 instance = comp, \inst|Selector1~2 , inst|Selector1~2, SCOMP_System, 1 instance = comp, \inst|PC[10] , inst|PC[10], SCOMP_System, 1 instance = comp, \inst|next_mem_addr[10]~10 , inst|next_mem_addr[10]~10, SCOMP_System, 1 -instance = comp, \inst|IR[9] , inst|IR[9], SCOMP_System, 1 +instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a3 , inst|altsyncram_component|auto_generated|ram_block1a3, SCOMP_System, 1 instance = comp, \inst|Selector2~0 , inst|Selector2~0, SCOMP_System, 1 instance = comp, \inst|Selector2~1 , inst|Selector2~1, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][9]~feeder , inst|PC_stack[9][9]~feeder, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][9] , inst|PC_stack[9][9], SCOMP_System, 1 instance = comp, \inst|Selector120~0 , inst|Selector120~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[8][9] , inst|PC_stack[8][9], SCOMP_System, 1 @@ -1004,62 +1047,71 @@ instance = comp, \inst|PC_stack[0][9] , inst|PC_stack[0][9], SCOMP_System, 1 instance = comp, \inst|Selector2~2 , inst|Selector2~2, SCOMP_System, 1 instance = comp, \inst|PC[9] , inst|PC[9], SCOMP_System, 1 instance = comp, \inst|next_mem_addr[9]~9 , inst|next_mem_addr[9]~9, SCOMP_System, 1 -instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a0 , inst|altsyncram_component|auto_generated|ram_block1a0, SCOMP_System, 1 -instance = comp, \inst|IR[8] , inst|IR[8], SCOMP_System, 1 instance = comp, \inst|Selector3~0 , inst|Selector3~0, SCOMP_System, 1 +instance = comp, \inst|Selector3~1 , inst|Selector3~1, SCOMP_System, 1 +instance = comp, \inst|Selector3~2 , inst|Selector3~2, SCOMP_System, 1 +instance = comp, \inst|PC[8] , inst|PC[8], SCOMP_System, 1 instance = comp, \inst|next_mem_addr[8]~8 , inst|next_mem_addr[8]~8, SCOMP_System, 1 +instance = comp, \inst|IR[7] , inst|IR[7], SCOMP_System, 1 +instance = comp, \inst|Selector4~0 , inst|Selector4~0, SCOMP_System, 1 +instance = comp, \inst|next_mem_addr[7]~7 , inst|next_mem_addr[7]~7, SCOMP_System, 1 +instance = comp, \inst|IR[3] , inst|IR[3], SCOMP_System, 1 +instance = comp, \inst|Selector27~4 , inst|Selector27~4, SCOMP_System, 1 +instance = comp, \inst|Selector24~2 , inst|Selector24~2, SCOMP_System, 1 +instance = comp, \inst|Selector24~3 , inst|Selector24~3, SCOMP_System, 1 +instance = comp, \inst|Selector24~4 , inst|Selector24~4, SCOMP_System, 1 +instance = comp, \inst|Selector24~5 , inst|Selector24~5, SCOMP_System, 1 +instance = comp, \inst|Selector24~6 , inst|Selector24~6, SCOMP_System, 1 +instance = comp, \inst|Selector24~7 , inst|Selector24~7, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[59]~66 , inst|shifter|auto_generated|sbit_w[59]~66, SCOMP_System, 1 +instance = comp, \inst|shifter|auto_generated|sbit_w[59]~69 , inst|shifter|auto_generated|sbit_w[59]~69, SCOMP_System, 1 +instance = comp, \inst|Selector24~0 , inst|Selector24~0, SCOMP_System, 1 +instance = comp, \inst4|IO_BUS|dout[3]~1 , inst4|IO_BUS|dout[3]~1, SCOMP_System, 1 +instance = comp, \inst13|inst1[3]~35 , inst13|inst1[3]~35, SCOMP_System, 1 +instance = comp, \SW[3]~input , SW[3]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[3] , inst7|B_DI[3], SCOMP_System, 1 +instance = comp, \inst13|inst1[3]~36 , inst13|inst1[3]~36, SCOMP_System, 1 +instance = comp, \inst13|inst|Decoder0~4 , inst13|inst|Decoder0~4, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[3]~3 , inst13|inst|data_rx[3]~3, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rx[3] , inst13|inst|data_rx[3], SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[3]~feeder , inst13|inst|data_rd[3]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_rd[3] , inst13|inst|data_rd[3], SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[3]~5 , inst13|inst14|data_out[3]~5, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[3] , inst13|inst14|data_out[3], SCOMP_System, 1 +instance = comp, \inst13|inst1[3]~37 , inst13|inst1[3]~37, SCOMP_System, 1 +instance = comp, \inst|Selector24~1 , inst|Selector24~1, SCOMP_System, 1 +instance = comp, \inst|Selector24~8 , inst|Selector24~8, SCOMP_System, 1 +instance = comp, \inst|AC[3] , inst|AC[3], SCOMP_System, 1 instance = comp, \inst|IR[6] , inst|IR[6], SCOMP_System, 1 instance = comp, \inst|Selector5~0 , inst|Selector5~0, SCOMP_System, 1 +instance = comp, \inst|Selector5~1 , inst|Selector5~1, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][6]~feeder , inst|PC_stack[9][6]~feeder, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][6] , inst|PC_stack[9][6], SCOMP_System, 1 +instance = comp, \inst|Selector123~0 , inst|Selector123~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[8][6] , inst|PC_stack[8][6], SCOMP_System, 1 +instance = comp, \inst|Selector112~0 , inst|Selector112~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[7][6] , inst|PC_stack[7][6], SCOMP_System, 1 +instance = comp, \inst|Selector101~0 , inst|Selector101~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[6][6] , inst|PC_stack[6][6], SCOMP_System, 1 +instance = comp, \inst|Selector90~0 , inst|Selector90~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[5][6] , inst|PC_stack[5][6], SCOMP_System, 1 +instance = comp, \inst|Selector79~0 , inst|Selector79~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[4][6] , inst|PC_stack[4][6], SCOMP_System, 1 +instance = comp, \inst|Selector68~0 , inst|Selector68~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[3][6] , inst|PC_stack[3][6], SCOMP_System, 1 +instance = comp, \inst|Selector57~0 , inst|Selector57~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[2][6] , inst|PC_stack[2][6], SCOMP_System, 1 +instance = comp, \inst|Selector46~0 , inst|Selector46~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[1][6] , inst|PC_stack[1][6], SCOMP_System, 1 +instance = comp, \inst|Selector35~0 , inst|Selector35~0, SCOMP_System, 1 +instance = comp, \inst|PC_stack[0][6] , inst|PC_stack[0][6], SCOMP_System, 1 +instance = comp, \inst|Selector5~2 , inst|Selector5~2, SCOMP_System, 1 +instance = comp, \inst|PC[6] , inst|PC[6], SCOMP_System, 1 instance = comp, \inst|next_mem_addr[6]~6 , inst|next_mem_addr[6]~6, SCOMP_System, 1 -instance = comp, \inst|IR[0] , inst|IR[0], SCOMP_System, 1 -instance = comp, \inst3|PWM_EN~0 , inst3|PWM_EN~0, SCOMP_System, 1 -instance = comp, \inst3|SWITCH_EN~1 , inst3|SWITCH_EN~1, SCOMP_System, 1 -instance = comp, \inst3|SWITCH_EN , inst3|SWITCH_EN, SCOMP_System, 1 -instance = comp, \inst4|COUNT[15]~43 , inst4|COUNT[15]~43, SCOMP_System, 1 -instance = comp, \inst4|COUNT[15] , inst4|COUNT[15], SCOMP_System, 1 -instance = comp, \inst13|inst1[15]~86 , inst13|inst1[15]~86, SCOMP_System, 1 -instance = comp, \inst|Selector12~0 , inst|Selector12~0, SCOMP_System, 1 -instance = comp, \inst|Selector12~4 , inst|Selector12~4, SCOMP_System, 1 -instance = comp, \inst|Selector12~5 , inst|Selector12~5, SCOMP_System, 1 -instance = comp, \inst|Add1~78 , inst|Add1~78, SCOMP_System, 1 -instance = comp, \inst|Add1~79 , inst|Add1~79, SCOMP_System, 1 -instance = comp, \inst|Add1~80 , inst|Add1~80, SCOMP_System, 1 -instance = comp, \inst|Add1~81 , inst|Add1~81, SCOMP_System, 1 -instance = comp, \inst|Selector12~6 , inst|Selector12~6, SCOMP_System, 1 -instance = comp, \inst|Selector12~7 , inst|Selector12~7, SCOMP_System, 1 -instance = comp, \inst|Selector12~8 , inst|Selector12~8, SCOMP_System, 1 -instance = comp, \inst|Selector12~1 , inst|Selector12~1, SCOMP_System, 1 -instance = comp, \inst|Selector12~2 , inst|Selector12~2, SCOMP_System, 1 -instance = comp, \inst|Selector12~3 , inst|Selector12~3, SCOMP_System, 1 -instance = comp, \inst|Selector12~9 , inst|Selector12~9, SCOMP_System, 1 -instance = comp, \inst|Selector12~10 , inst|Selector12~10, SCOMP_System, 1 -instance = comp, \inst10|count[15]~47 , inst10|count[15]~47, SCOMP_System, 1 -instance = comp, \inst10|count[15] , inst10|count[15], SCOMP_System, 1 -instance = comp, \inst11|Add1~18 , inst11|Add1~18, SCOMP_System, 1 -instance = comp, \inst11|count[15]~47 , inst11|count[15]~47, SCOMP_System, 1 -instance = comp, \inst11|count[15] , inst11|count[15], SCOMP_System, 1 -instance = comp, \inst13|inst1[15]~87 , inst13|inst1[15]~87, SCOMP_System, 1 -instance = comp, \inst13|inst1[15]~88 , inst13|inst1[15]~88, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[15]~18 , inst13|inst14|data_out[15]~18, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[15] , inst13|inst14|data_out[15], SCOMP_System, 1 -instance = comp, \inst13|inst1[15]~89 , inst13|inst1[15]~89, SCOMP_System, 1 -instance = comp, \inst|Selector12~11 , inst|Selector12~11, SCOMP_System, 1 -instance = comp, \inst|AC[15] , inst|AC[15], SCOMP_System, 1 -instance = comp, \inst|state~53 , inst|state~53, SCOMP_System, 1 -instance = comp, \inst|state.ex_jneg , inst|state.ex_jneg, SCOMP_System, 1 -instance = comp, \inst|WideOr2~0 , inst|WideOr2~0, SCOMP_System, 1 -instance = comp, \inst|state~54 , inst|state~54, SCOMP_System, 1 -instance = comp, \inst|state.ex_jump , inst|state.ex_jump, SCOMP_System, 1 -instance = comp, \inst|PC[0]~0 , inst|PC[0]~0, SCOMP_System, 1 -instance = comp, \inst|Equal0~0 , inst|Equal0~0, SCOMP_System, 1 -instance = comp, \inst|Equal0~1 , inst|Equal0~1, SCOMP_System, 1 -instance = comp, \inst|Equal0~3 , inst|Equal0~3, SCOMP_System, 1 -instance = comp, \inst|Equal0~2 , inst|Equal0~2, SCOMP_System, 1 -instance = comp, \inst|Equal0~4 , inst|Equal0~4, SCOMP_System, 1 -instance = comp, \inst|PC[0]~1 , inst|PC[0]~1, SCOMP_System, 1 -instance = comp, \inst|PC[0]~2 , inst|PC[0]~2, SCOMP_System, 1 -instance = comp, \inst|PC[4] , inst|PC[4], SCOMP_System, 1 +instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a1 , inst|altsyncram_component|auto_generated|ram_block1a1, SCOMP_System, 1 +instance = comp, \inst|Selector6~0 , inst|Selector6~0, SCOMP_System, 1 instance = comp, \inst|Selector6~1 , inst|Selector6~1, SCOMP_System, 1 +instance = comp, \inst|PC_stack[9][5]~feeder , inst|PC_stack[9][5]~feeder, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][5] , inst|PC_stack[9][5], SCOMP_System, 1 instance = comp, \inst|Selector124~0 , inst|Selector124~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[8][5] , inst|PC_stack[8][5], SCOMP_System, 1 @@ -1082,13 +1134,41 @@ instance = comp, \inst|PC_stack[0][5] , inst|PC_stack[0][5], SCOMP_System, 1 instance = comp, \inst|Selector6~2 , inst|Selector6~2, SCOMP_System, 1 instance = comp, \inst|PC[5] , inst|PC[5], SCOMP_System, 1 instance = comp, \inst|next_mem_addr[5]~5 , inst|next_mem_addr[5]~5, SCOMP_System, 1 -instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a1 , inst|altsyncram_component|auto_generated|ram_block1a1, SCOMP_System, 1 -instance = comp, \inst|Selector7~0 , inst|Selector7~0, SCOMP_System, 1 -instance = comp, \inst|next_mem_addr[4]~4 , inst|next_mem_addr[4]~4, SCOMP_System, 1 -instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a11 , inst|altsyncram_component|auto_generated|ram_block1a11, SCOMP_System, 1 -instance = comp, \inst|state~32 , inst|state~32, SCOMP_System, 1 -instance = comp, \inst|state~50 , inst|state~50, SCOMP_System, 1 -instance = comp, \inst|state.ex_return , inst|state.ex_return, SCOMP_System, 1 +instance = comp, \inst|IR[4] , inst|IR[4], SCOMP_System, 1 +instance = comp, \inst|Selector19~4 , inst|Selector19~4, SCOMP_System, 1 +instance = comp, \inst|Selector14~1 , inst|Selector14~1, SCOMP_System, 1 +instance = comp, \inst|Selector14~2 , inst|Selector14~2, SCOMP_System, 1 +instance = comp, \inst|Selector14~4 , inst|Selector14~4, SCOMP_System, 1 +instance = comp, \inst|Selector14~5 , inst|Selector14~5, SCOMP_System, 1 +instance = comp, \inst|Selector14~3 , inst|Selector14~3, SCOMP_System, 1 +instance = comp, \inst|Selector14~6 , inst|Selector14~6, SCOMP_System, 1 +instance = comp, \inst|Selector14~0 , inst|Selector14~0, SCOMP_System, 1 +instance = comp, \inst|Selector14~7 , inst|Selector14~7, SCOMP_System, 1 +instance = comp, \inst|AC[13] , inst|AC[13], SCOMP_System, 1 +instance = comp, \inst|Equal0~0 , inst|Equal0~0, SCOMP_System, 1 +instance = comp, \inst|Equal0~2 , inst|Equal0~2, SCOMP_System, 1 +instance = comp, \inst|Equal0~3 , inst|Equal0~3, SCOMP_System, 1 +instance = comp, \inst|Equal0~1 , inst|Equal0~1, SCOMP_System, 1 +instance = comp, \inst|Equal0~4 , inst|Equal0~4, SCOMP_System, 1 +instance = comp, \inst|state~52 , inst|state~52, SCOMP_System, 1 +instance = comp, \inst|state.ex_jzero , inst|state.ex_jzero, SCOMP_System, 1 +instance = comp, \inst|state~51 , inst|state~51, SCOMP_System, 1 +instance = comp, \inst|state.ex_jpos , inst|state.ex_jpos, SCOMP_System, 1 +instance = comp, \inst|state~53 , inst|state~53, SCOMP_System, 1 +instance = comp, \inst|state.ex_jneg , inst|state.ex_jneg, SCOMP_System, 1 +instance = comp, \inst|state~54 , inst|state~54, SCOMP_System, 1 +instance = comp, \inst|state.ex_jump , inst|state.ex_jump, SCOMP_System, 1 +instance = comp, \inst|WideOr2~0 , inst|WideOr2~0, SCOMP_System, 1 +instance = comp, \inst|PC[0]~0 , inst|PC[0]~0, SCOMP_System, 1 +instance = comp, \inst|PC[0]~1 , inst|PC[0]~1, SCOMP_System, 1 +instance = comp, \inst|PC[0]~2 , inst|PC[0]~2, SCOMP_System, 1 +instance = comp, \inst|PC[0] , inst|PC[0], SCOMP_System, 1 +instance = comp, \inst|Add0~2 , inst|Add0~2, SCOMP_System, 1 +instance = comp, \inst|Selector10~1 , inst|Selector10~1, SCOMP_System, 1 +instance = comp, \inst|Selector10~2 , inst|Selector10~2, SCOMP_System, 1 +instance = comp, \inst|PC[1] , inst|PC[1], SCOMP_System, 1 +instance = comp, \inst|Add0~4 , inst|Add0~4, SCOMP_System, 1 +instance = comp, \inst|Selector9~1 , inst|Selector9~1, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][2]~feeder , inst|PC_stack[9][2]~feeder, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][2] , inst|PC_stack[9][2], SCOMP_System, 1 instance = comp, \inst|Selector127~0 , inst|Selector127~0, SCOMP_System, 1 @@ -1109,58 +1189,10 @@ instance = comp, \inst|Selector50~0 , inst|Selector50~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[1][2] , inst|PC_stack[1][2], SCOMP_System, 1 instance = comp, \inst|Selector39~0 , inst|Selector39~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[0][2] , inst|PC_stack[0][2], SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][1] , inst|PC_stack[9][1], SCOMP_System, 1 -instance = comp, \inst|Selector128~0 , inst|Selector128~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[8][1] , inst|PC_stack[8][1], SCOMP_System, 1 -instance = comp, \inst|Selector117~0 , inst|Selector117~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[7][1] , inst|PC_stack[7][1], SCOMP_System, 1 -instance = comp, \inst|Selector106~0 , inst|Selector106~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[6][1] , inst|PC_stack[6][1], SCOMP_System, 1 -instance = comp, \inst|Selector95~0 , inst|Selector95~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[5][1] , inst|PC_stack[5][1], SCOMP_System, 1 -instance = comp, \inst|Selector84~0 , inst|Selector84~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[4][1] , inst|PC_stack[4][1], SCOMP_System, 1 -instance = comp, \inst|Selector73~0 , inst|Selector73~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[3][1] , inst|PC_stack[3][1], SCOMP_System, 1 -instance = comp, \inst|Selector62~0 , inst|Selector62~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[2][1] , inst|PC_stack[2][1], SCOMP_System, 1 -instance = comp, \inst|Selector51~0 , inst|Selector51~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[1][1] , inst|PC_stack[1][1], SCOMP_System, 1 -instance = comp, \inst|Selector40~0 , inst|Selector40~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[0][1] , inst|PC_stack[0][1], SCOMP_System, 1 -instance = comp, \inst|Add0~0 , inst|Add0~0, SCOMP_System, 1 -instance = comp, \inst|Selector11~1 , inst|Selector11~1, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][0] , inst|PC_stack[9][0], SCOMP_System, 1 -instance = comp, \inst|Selector129~0 , inst|Selector129~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[8][0] , inst|PC_stack[8][0], SCOMP_System, 1 -instance = comp, \inst|Selector118~0 , inst|Selector118~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[7][0] , inst|PC_stack[7][0], SCOMP_System, 1 -instance = comp, \inst|Selector107~0 , inst|Selector107~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[6][0] , inst|PC_stack[6][0], SCOMP_System, 1 -instance = comp, \inst|Selector96~0 , inst|Selector96~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[5][0] , inst|PC_stack[5][0], SCOMP_System, 1 -instance = comp, \inst|Selector85~0 , inst|Selector85~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[4][0] , inst|PC_stack[4][0], SCOMP_System, 1 -instance = comp, \inst|Selector74~0 , inst|Selector74~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[3][0] , inst|PC_stack[3][0], SCOMP_System, 1 -instance = comp, \inst|Selector63~0 , inst|Selector63~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[2][0] , inst|PC_stack[2][0], SCOMP_System, 1 -instance = comp, \inst|Selector52~0 , inst|Selector52~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[1][0] , inst|PC_stack[1][0], SCOMP_System, 1 -instance = comp, \inst|Selector41~0 , inst|Selector41~0, SCOMP_System, 1 -instance = comp, \inst|PC_stack[0][0] , inst|PC_stack[0][0], SCOMP_System, 1 -instance = comp, \inst|Selector11~2 , inst|Selector11~2, SCOMP_System, 1 -instance = comp, \inst|PC[0] , inst|PC[0], SCOMP_System, 1 -instance = comp, \inst|Add0~2 , inst|Add0~2, SCOMP_System, 1 -instance = comp, \inst|Selector10~1 , inst|Selector10~1, SCOMP_System, 1 -instance = comp, \inst|Selector10~2 , inst|Selector10~2, SCOMP_System, 1 -instance = comp, \inst|PC[1] , inst|PC[1], SCOMP_System, 1 -instance = comp, \inst|Add0~4 , inst|Add0~4, SCOMP_System, 1 -instance = comp, \inst|Selector9~1 , inst|Selector9~1, SCOMP_System, 1 instance = comp, \inst|Selector9~2 , inst|Selector9~2, SCOMP_System, 1 instance = comp, \inst|PC[2] , inst|PC[2], SCOMP_System, 1 +instance = comp, \inst|Selector8~0 , inst|Selector8~0, SCOMP_System, 1 instance = comp, \inst|Selector8~1 , inst|Selector8~1, SCOMP_System, 1 -instance = comp, \inst|PC_stack[9][3]~feeder , inst|PC_stack[9][3]~feeder, SCOMP_System, 1 instance = comp, \inst|PC_stack[9][3] , inst|PC_stack[9][3], SCOMP_System, 1 instance = comp, \inst|Selector126~0 , inst|Selector126~0, SCOMP_System, 1 instance = comp, \inst|PC_stack[8][3] , inst|PC_stack[8][3], SCOMP_System, 1 @@ -1183,123 +1215,121 @@ instance = comp, \inst|PC_stack[0][3] , inst|PC_stack[0][3], SCOMP_System, 1 instance = comp, \inst|Selector8~2 , inst|Selector8~2, SCOMP_System, 1 instance = comp, \inst|PC[3] , inst|PC[3], SCOMP_System, 1 instance = comp, \inst|next_mem_addr[3]~3 , inst|next_mem_addr[3]~3, SCOMP_System, 1 -instance = comp, \inst|IR[2] , inst|IR[2], SCOMP_System, 1 +instance = comp, \inst|state~43 , inst|state~43, SCOMP_System, 1 +instance = comp, \inst|state~44 , inst|state~44, SCOMP_System, 1 +instance = comp, \inst|state.ex_sub , inst|state.ex_sub, SCOMP_System, 1 +instance = comp, \inst|Add1~0 , inst|Add1~0, SCOMP_System, 1 +instance = comp, \inst|Add1~2 , inst|Add1~2, SCOMP_System, 1 +instance = comp, \inst|Selector27~2 , inst|Selector27~2, SCOMP_System, 1 +instance = comp, \inst|Selector27~0 , inst|Selector27~0, SCOMP_System, 1 +instance = comp, \inst|Selector27~3 , inst|Selector27~3, SCOMP_System, 1 +instance = comp, \inst|Selector27~5 , inst|Selector27~5, SCOMP_System, 1 +instance = comp, \inst|Selector27~7 , inst|Selector27~7, SCOMP_System, 1 +instance = comp, \inst|Selector27~8 , inst|Selector27~8, SCOMP_System, 1 +instance = comp, \inst|Selector27~9 , inst|Selector27~9, SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~20 , inst13|inst1[0]~20, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[0]~1 , inst13|inst14|data_out[0]~1, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_out[0] , inst13|inst14|data_out[0], SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~21 , inst13|inst1[0]~21, SCOMP_System, 1 +instance = comp, \SW[0]~input , SW[0]~input, SCOMP_System, 1 +instance = comp, \inst7|B_DI[0] , inst7|B_DI[0], SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~22 , inst13|inst1[0]~22, SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~18 , inst13|inst1[0]~18, SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~19 , inst13|inst1[0]~19, SCOMP_System, 1 +instance = comp, \inst|Selector27~10 , inst|Selector27~10, SCOMP_System, 1 +instance = comp, \inst|AC[0] , inst|AC[0], SCOMP_System, 1 instance = comp, \inst|Selector9~0 , inst|Selector9~0, SCOMP_System, 1 instance = comp, \inst|next_mem_addr[2]~2 , inst|next_mem_addr[2]~2, SCOMP_System, 1 -instance = comp, \inst|Selector10~0 , inst|Selector10~0, SCOMP_System, 1 -instance = comp, \inst|next_mem_addr[1]~1 , inst|next_mem_addr[1]~1, SCOMP_System, 1 -instance = comp, \inst|state~47 , inst|state~47, SCOMP_System, 1 -instance = comp, \inst|state.ex_iload , inst|state.ex_iload, SCOMP_System, 1 -instance = comp, \inst|state.ex_istore2 , inst|state.ex_istore2, SCOMP_System, 1 -instance = comp, \inst|WideNor0 , inst|WideNor0, SCOMP_System, 1 -instance = comp, \inst|Selector11~0 , inst|Selector11~0, SCOMP_System, 1 -instance = comp, \inst|next_mem_addr[0]~0 , inst|next_mem_addr[0]~0, SCOMP_System, 1 -instance = comp, \inst|state~34 , inst|state~34, SCOMP_System, 1 -instance = comp, \inst|state.ex_out , inst|state.ex_out, SCOMP_System, 1 -instance = comp, \inst|WideOr7~0 , inst|WideOr7~0, SCOMP_System, 1 -instance = comp, \inst|state~48 , inst|state~48, SCOMP_System, 1 -instance = comp, \inst|state.ex_store , inst|state.ex_store, SCOMP_System, 1 -instance = comp, \inst|WideOr7 , inst|WideOr7, SCOMP_System, 1 -instance = comp, \inst|state.fetch , inst|state.fetch, SCOMP_System, 1 -instance = comp, \inst|state.decode~feeder , inst|state.decode~feeder, SCOMP_System, 1 -instance = comp, \inst|state.decode , inst|state.decode, SCOMP_System, 1 -instance = comp, \inst|Selector30~0 , inst|Selector30~0, SCOMP_System, 1 -instance = comp, \inst|state~41 , inst|state~41, SCOMP_System, 1 -instance = comp, \inst|state.ex_addi , inst|state.ex_addi, SCOMP_System, 1 -instance = comp, \inst|AC[2]~0 , inst|AC[2]~0, SCOMP_System, 1 -instance = comp, \inst|Selector25~0 , inst|Selector25~0, SCOMP_System, 1 -instance = comp, \inst|Selector25~2 , inst|Selector25~2, SCOMP_System, 1 -instance = comp, \inst|Selector25~3 , inst|Selector25~3, SCOMP_System, 1 -instance = comp, \inst|Selector25~1 , inst|Selector25~1, SCOMP_System, 1 -instance = comp, \inst|Selector25~4 , inst|Selector25~4, SCOMP_System, 1 -instance = comp, \inst|Selector25~6 , inst|Selector25~6, SCOMP_System, 1 -instance = comp, \inst|Selector25~7 , inst|Selector25~7, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[2]~4 , inst13|inst14|data_out[2]~4, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[2] , inst13|inst14|data_out[2], SCOMP_System, 1 -instance = comp, \inst13|inst1[2]~26 , inst13|inst1[2]~26, SCOMP_System, 1 -instance = comp, \inst13|inst1[2]~27 , inst13|inst1[2]~27, SCOMP_System, 1 -instance = comp, \SW[2]~input , SW[2]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[2] , inst7|B_DI[2], SCOMP_System, 1 -instance = comp, \inst13|inst1[2]~25 , inst13|inst1[2]~25, SCOMP_System, 1 -instance = comp, \inst13|inst1[2]~28 , inst13|inst1[2]~28, SCOMP_System, 1 -instance = comp, \inst|Selector25~5 , inst|Selector25~5, SCOMP_System, 1 -instance = comp, \inst|AC[2] , inst|AC[2], SCOMP_System, 1 -instance = comp, \inst|IR[7] , inst|IR[7], SCOMP_System, 1 -instance = comp, \inst3|TIMER_EN~2 , inst3|TIMER_EN~2, SCOMP_System, 1 -instance = comp, \inst4|IO_OUT , inst4|IO_OUT, SCOMP_System, 1 -instance = comp, \inst13|inst1[1]~91 , inst13|inst1[1]~91, SCOMP_System, 1 +instance = comp, \inst|altsyncram_component|auto_generated|ram_block1a11 , inst|altsyncram_component|auto_generated|ram_block1a11, SCOMP_System, 1 +instance = comp, \inst|state~32 , inst|state~32, SCOMP_System, 1 +instance = comp, \inst|Selector28~0 , inst|Selector28~0, SCOMP_System, 1 +instance = comp, \inst|Selector28~1 , inst|Selector28~1, SCOMP_System, 1 +instance = comp, \inst|IO_WRITE_int , inst|IO_WRITE_int, SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~23 , inst13|inst1[0]~23, SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~24 , inst13|inst1[0]~24, SCOMP_System, 1 +instance = comp, \inst|Selector26~1 , inst|Selector26~1, SCOMP_System, 1 +instance = comp, \inst|Selector26~0 , inst|Selector26~0, SCOMP_System, 1 +instance = comp, \inst|Selector26~2 , inst|Selector26~2, SCOMP_System, 1 +instance = comp, \inst|Selector26~3 , inst|Selector26~3, SCOMP_System, 1 +instance = comp, \inst|Selector26~4 , inst|Selector26~4, SCOMP_System, 1 +instance = comp, \inst|Selector26~5 , inst|Selector26~5, SCOMP_System, 1 +instance = comp, \inst13|inst1[1]~96 , inst13|inst1[1]~96, SCOMP_System, 1 instance = comp, \SW[1]~input , SW[1]~input, SCOMP_System, 1 instance = comp, \inst7|B_DI[1] , inst7|B_DI[1], SCOMP_System, 1 -instance = comp, \inst13|inst1[1]~21 , inst13|inst1[1]~21, SCOMP_System, 1 +instance = comp, \inst13|inst1[1]~27 , inst13|inst1[1]~27, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[1]~3 , inst13|inst14|data_out[1]~3, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[1] , inst13|inst14|data_out[1], SCOMP_System, 1 -instance = comp, \inst13|inst1[1]~20 , inst13|inst1[1]~20, SCOMP_System, 1 -instance = comp, \inst13|inst1[1]~22 , inst13|inst1[1]~22, SCOMP_System, 1 -instance = comp, \inst13|inst1[1]~23 , inst13|inst1[1]~23, SCOMP_System, 1 -instance = comp, \inst|Selector26~3 , inst|Selector26~3, SCOMP_System, 1 -instance = comp, \inst|Selector26~4 , inst|Selector26~4, SCOMP_System, 1 -instance = comp, \inst|Selector26~0 , inst|Selector26~0, SCOMP_System, 1 -instance = comp, \inst|Selector26~1 , inst|Selector26~1, SCOMP_System, 1 -instance = comp, \inst|Selector26~2 , inst|Selector26~2, SCOMP_System, 1 -instance = comp, \inst|Selector26~5 , inst|Selector26~5, SCOMP_System, 1 +instance = comp, \inst13|inst1[1]~26 , inst13|inst1[1]~26, SCOMP_System, 1 +instance = comp, \inst13|inst1[1]~28 , inst13|inst1[1]~28, SCOMP_System, 1 +instance = comp, \inst13|inst1[1]~29 , inst13|inst1[1]~29, SCOMP_System, 1 instance = comp, \inst|Selector26~6 , inst|Selector26~6, SCOMP_System, 1 instance = comp, \inst|AC[1] , inst|AC[1], SCOMP_System, 1 +instance = comp, \inst|Selector10~0 , inst|Selector10~0, SCOMP_System, 1 +instance = comp, \inst|next_mem_addr[1]~1 , inst|next_mem_addr[1]~1, SCOMP_System, 1 +instance = comp, \inst|state~49 , inst|state~49, SCOMP_System, 1 +instance = comp, \inst|state.ex_istore , inst|state.ex_istore, SCOMP_System, 1 +instance = comp, \inst|WideOr7~0 , inst|WideOr7~0, SCOMP_System, 1 +instance = comp, \inst|WideOr7 , inst|WideOr7, SCOMP_System, 1 +instance = comp, \inst|state.fetch , inst|state.fetch, SCOMP_System, 1 +instance = comp, \inst|Selector11~0 , inst|Selector11~0, SCOMP_System, 1 +instance = comp, \inst|next_mem_addr[0]~0 , inst|next_mem_addr[0]~0, SCOMP_System, 1 instance = comp, \inst|state~33 , inst|state~33, SCOMP_System, 1 instance = comp, \inst|state.ex_in , inst|state.ex_in, SCOMP_System, 1 instance = comp, \inst|state.ex_in2 , inst|state.ex_in2, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[0]~1 , inst13|inst14|data_out[0]~1, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_out[0] , inst13|inst14|data_out[0], SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~15 , inst13|inst1[0]~15, SCOMP_System, 1 -instance = comp, \SW[0]~input , SW[0]~input, SCOMP_System, 1 -instance = comp, \inst7|B_DI[0] , inst7|B_DI[0], SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~14 , inst13|inst1[0]~14, SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~16 , inst13|inst1[0]~16, SCOMP_System, 1 -instance = comp, \inst|Selector27~7 , inst|Selector27~7, SCOMP_System, 1 -instance = comp, \inst|Selector27~5 , inst|Selector27~5, SCOMP_System, 1 -instance = comp, \inst|Selector27~8 , inst|Selector27~8, SCOMP_System, 1 -instance = comp, \inst|Selector27~0 , inst|Selector27~0, SCOMP_System, 1 -instance = comp, \inst|Selector27~2 , inst|Selector27~2, SCOMP_System, 1 -instance = comp, \inst|Selector27~3 , inst|Selector27~3, SCOMP_System, 1 -instance = comp, \inst|Selector27~9 , inst|Selector27~9, SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~12 , inst13|inst1[0]~12, SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~13 , inst13|inst1[0]~13, SCOMP_System, 1 -instance = comp, \inst|Selector27~10 , inst|Selector27~10, SCOMP_System, 1 -instance = comp, \inst|AC[0] , inst|AC[0], SCOMP_System, 1 -instance = comp, \inst|IR[3] , inst|IR[3], SCOMP_System, 1 -instance = comp, \inst|Selector20~0 , inst|Selector20~0, SCOMP_System, 1 +instance = comp, \inst|Selector16~1 , inst|Selector16~1, SCOMP_System, 1 instance = comp, \inst|Selector16~4 , inst|Selector16~4, SCOMP_System, 1 instance = comp, \inst|Selector16~5 , inst|Selector16~5, SCOMP_System, 1 instance = comp, \inst|Selector16~2 , inst|Selector16~2, SCOMP_System, 1 instance = comp, \inst|Selector16~3 , inst|Selector16~3, SCOMP_System, 1 instance = comp, \inst|Selector16~6 , inst|Selector16~6, SCOMP_System, 1 -instance = comp, \inst|Selector16~1 , inst|Selector16~1, SCOMP_System, 1 instance = comp, \inst|Selector16~7 , inst|Selector16~7, SCOMP_System, 1 -instance = comp, \inst13|inst1[11]~69 , inst13|inst1[11]~69, SCOMP_System, 1 -instance = comp, \inst13|inst1[11]~70 , inst13|inst1[11]~70, SCOMP_System, 1 instance = comp, \inst13|inst1[11]~71 , inst13|inst1[11]~71, SCOMP_System, 1 +instance = comp, \inst13|inst1[11]~72 , inst13|inst1[11]~72, SCOMP_System, 1 +instance = comp, \inst13|inst1[11]~73 , inst13|inst1[11]~73, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[11]~14 , inst13|inst14|data_out[11]~14, SCOMP_System, 1 instance = comp, \inst13|inst14|data_out[11] , inst13|inst14|data_out[11], SCOMP_System, 1 -instance = comp, \inst13|inst1[11]~72 , inst13|inst1[11]~72, SCOMP_System, 1 +instance = comp, \inst13|inst1[11]~74 , inst13|inst1[11]~74, SCOMP_System, 1 instance = comp, \inst|Selector16~8 , inst|Selector16~8, SCOMP_System, 1 instance = comp, \inst|AC[11] , inst|AC[11], SCOMP_System, 1 -instance = comp, \inst|state~49 , inst|state~49, SCOMP_System, 1 -instance = comp, \inst|state.ex_istore , inst|state.ex_istore, SCOMP_System, 1 +instance = comp, \inst|state~48 , inst|state~48, SCOMP_System, 1 +instance = comp, \inst|state.ex_store , inst|state.ex_store, SCOMP_System, 1 instance = comp, \inst|state.ex_store2 , inst|state.ex_store2, SCOMP_System, 1 instance = comp, \inst|Selector0~0 , inst|Selector0~0, SCOMP_System, 1 instance = comp, \inst|Selector0~1 , inst|Selector0~1, SCOMP_System, 1 instance = comp, \inst|MW , inst|MW, SCOMP_System, 1 -instance = comp, \inst|IR[5] , inst|IR[5], SCOMP_System, 1 +instance = comp, \inst|IR[0] , inst|IR[0], SCOMP_System, 1 instance = comp, \inst3|TIMER_EN~0 , inst3|TIMER_EN~0, SCOMP_System, 1 instance = comp, \inst3|TIMER_EN~1 , inst3|TIMER_EN~1, SCOMP_System, 1 instance = comp, \inst13|inst12 , inst13|inst12, SCOMP_System, 1 instance = comp, \inst13|inst12~clkctrl , inst13|inst12~clkctrl, SCOMP_System, 1 -instance = comp, \inst13|inst1[4]~39 , inst13|inst1[4]~39, SCOMP_System, 1 +instance = comp, \inst13|inst1[2]~97 , inst13|inst1[2]~97, SCOMP_System, 1 +instance = comp, \inst13|inst1[2]~34 , inst13|inst1[2]~34, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[2]~feeder , inst13|inst14|addr_in[2]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[2] , inst13|inst14|addr_in[2], SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[7]~1 , inst13|inst14|tx_addr[7]~1, SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[2] , inst13|inst14|tx_addr[2], SCOMP_System, 1 +instance = comp, \inst13|inst1[1]~30 , inst13|inst1[1]~30, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[1]~feeder , inst13|inst14|addr_in[1]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[1] , inst13|inst14|addr_in[1], SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[1]~feeder , inst13|inst14|tx_addr[1]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[1] , inst13|inst14|tx_addr[1], SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[1] , inst13|inst|addr_rw[1], SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[2] , inst13|inst|addr_rw[2], SCOMP_System, 1 +instance = comp, \inst13|inst|process_1~0 , inst13|inst|process_1~0, SCOMP_System, 1 +instance = comp, \inst13|inst1[7]~57 , inst13|inst1[7]~57, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[7]~feeder , inst13|inst14|addr_in[7]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[7] , inst13|inst14|addr_in[7], SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[7]~feeder , inst13|inst14|tx_addr[7]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[7] , inst13|inst14|tx_addr[7], SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[7] , inst13|inst|addr_rw[7], SCOMP_System, 1 +instance = comp, \inst13|inst|process_1~3 , inst13|inst|process_1~3, SCOMP_System, 1 +instance = comp, \inst13|inst1[4]~43 , inst13|inst1[4]~43, SCOMP_System, 1 instance = comp, \inst13|inst14|addr_in[4]~feeder , inst13|inst14|addr_in[4]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|addr_in[4] , inst13|inst14|addr_in[4], SCOMP_System, 1 instance = comp, \inst13|inst14|tx_addr[4]~feeder , inst13|inst14|tx_addr[4]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[7]~1 , inst13|inst14|tx_addr[7]~1, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_addr[4] , inst13|inst14|tx_addr[4], SCOMP_System, 1 -instance = comp, \inst13|inst1[3]~34 , inst13|inst1[3]~34, SCOMP_System, 1 +instance = comp, \inst13|inst1[3]~98 , inst13|inst1[3]~98, SCOMP_System, 1 +instance = comp, \inst13|inst1[3]~38 , inst13|inst1[3]~38, SCOMP_System, 1 instance = comp, \inst13|inst14|addr_in[3]~feeder , inst13|inst14|addr_in[3]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|addr_in[3] , inst13|inst14|addr_in[3], SCOMP_System, 1 instance = comp, \inst13|inst14|tx_addr[3]~feeder , inst13|inst14|tx_addr[3]~feeder, SCOMP_System, 1 @@ -1307,124 +1337,111 @@ instance = comp, \inst13|inst14|tx_addr[3] , inst13|inst14|tx_addr[3], SCOMP_Sys instance = comp, \inst13|inst|addr_rw[3] , inst13|inst|addr_rw[3], SCOMP_System, 1 instance = comp, \inst13|inst|addr_rw[4] , inst13|inst|addr_rw[4], SCOMP_System, 1 instance = comp, \inst13|inst|process_1~1 , inst13|inst|process_1~1, SCOMP_System, 1 -instance = comp, \inst13|inst1[7]~54 , inst13|inst1[7]~54, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[7]~feeder , inst13|inst14|addr_in[7]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[7] , inst13|inst14|addr_in[7], SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[7]~feeder , inst13|inst14|tx_addr[7]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[7] , inst13|inst14|tx_addr[7], SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[7] , inst13|inst|addr_rw[7], SCOMP_System, 1 -instance = comp, \inst13|inst|process_1~3 , inst13|inst|process_1~3, SCOMP_System, 1 -instance = comp, \inst13|inst1[2]~29 , inst13|inst1[2]~29, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[2]~feeder , inst13|inst14|addr_in[2]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[2] , inst13|inst14|addr_in[2], SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[2]~feeder , inst13|inst14|tx_addr[2]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[2] , inst13|inst14|tx_addr[2], SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[2] , inst13|inst|addr_rw[2], SCOMP_System, 1 -instance = comp, \inst13|inst1[1]~24 , inst13|inst1[1]~24, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[1]~feeder , inst13|inst14|addr_in[1]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[1] , inst13|inst14|addr_in[1], SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[1]~feeder , inst13|inst14|tx_addr[1]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[1] , inst13|inst14|tx_addr[1], SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[1] , inst13|inst|addr_rw[1], SCOMP_System, 1 -instance = comp, \inst13|inst|process_1~0 , inst13|inst|process_1~0, SCOMP_System, 1 -instance = comp, \inst13|inst1[5]~44 , inst13|inst1[5]~44, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[5]~feeder , inst13|inst14|addr_in[5]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|addr_in[5] , inst13|inst14|addr_in[5], SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[5]~feeder , inst13|inst14|tx_addr[5]~feeder, SCOMP_System, 1 -instance = comp, \inst13|inst14|tx_addr[5] , inst13|inst14|tx_addr[5], SCOMP_System, 1 -instance = comp, \inst13|inst1[6]~49 , inst13|inst1[6]~49, SCOMP_System, 1 +instance = comp, \inst13|inst1[6]~53 , inst13|inst1[6]~53, SCOMP_System, 1 instance = comp, \inst13|inst14|addr_in[6]~feeder , inst13|inst14|addr_in[6]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|addr_in[6] , inst13|inst14|addr_in[6], SCOMP_System, 1 instance = comp, \inst13|inst14|tx_addr[6]~feeder , inst13|inst14|tx_addr[6]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_addr[6] , inst13|inst14|tx_addr[6], SCOMP_System, 1 -instance = comp, \inst13|inst|addr_rw[6] , inst13|inst|addr_rw[6], SCOMP_System, 1 +instance = comp, \inst13|inst1[5]~48 , inst13|inst1[5]~48, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[5]~feeder , inst13|inst14|addr_in[5]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|addr_in[5] , inst13|inst14|addr_in[5], SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[5]~feeder , inst13|inst14|tx_addr[5]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|tx_addr[5] , inst13|inst14|tx_addr[5], SCOMP_System, 1 instance = comp, \inst13|inst|addr_rw[5] , inst13|inst|addr_rw[5], SCOMP_System, 1 +instance = comp, \inst13|inst|addr_rw[6] , inst13|inst|addr_rw[6], SCOMP_System, 1 instance = comp, \inst13|inst|process_1~2 , inst13|inst|process_1~2, SCOMP_System, 1 instance = comp, \inst13|inst|process_1~4 , inst13|inst|process_1~4, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector23~1 , inst13|inst|Selector23~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector23~2 , inst13|inst|Selector23~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector23~3 , inst13|inst|Selector23~3, SCOMP_System, 1 +instance = comp, \inst13|inst|state.rd , inst13|inst|state.rd, SCOMP_System, 1 +instance = comp, \inst13|inst|WideOr12~0 , inst13|inst|WideOr12~0, SCOMP_System, 1 +instance = comp, \inst13|inst|bit_cnt[0] , inst13|inst|bit_cnt[0], SCOMP_System, 1 +instance = comp, \inst13|inst|state~16 , inst13|inst|state~16, SCOMP_System, 1 +instance = comp, \inst13|inst|state.slv_ack2 , inst13|inst|state.slv_ack2, SCOMP_System, 1 instance = comp, \inst13|inst|Selector20~0 , inst13|inst|Selector20~0, SCOMP_System, 1 instance = comp, \inst13|inst|Selector20~1 , inst13|inst|Selector20~1, SCOMP_System, 1 instance = comp, \inst13|inst|state.restart , inst13|inst|state.restart, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~4 , inst13|inst|Selector25~4, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~5 , inst13|inst|Selector25~5, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~1 , inst13|inst|Selector25~1, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~2 , inst13|inst|Selector25~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~0 , inst13|inst|Selector25~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~3 , inst13|inst|Selector25~3, SCOMP_System, 1 instance = comp, \inst13|inst13 , inst13|inst13, SCOMP_System, 1 instance = comp, \inst13|inst13~clkctrl , inst13|inst13~clkctrl, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_in[7] , inst13|inst14|data_in[7], SCOMP_System, 1 -instance = comp, \inst13|inst1[15]~90 , inst13|inst1[15]~90, SCOMP_System, 1 +instance = comp, \inst13|inst1[15]~95 , inst13|inst1[15]~95, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_in[15]~feeder , inst13|inst14|data_in[15]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[15] , inst13|inst14|data_in[15], SCOMP_System, 1 +instance = comp, \inst13|inst14|data_in[7] , inst13|inst14|data_in[7], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector23~0 , inst13|inst14|Selector23~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[7]~0 , inst13|inst14|tx_byte[7]~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[7]~1 , inst13|inst14|tx_byte[7]~1, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[7] , inst13|inst14|tx_byte[7], SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[7]~feeder , inst13|inst|data_tx[7]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[7] , inst13|inst|data_tx[7], SCOMP_System, 1 +instance = comp, \inst13|inst1[14]~90 , inst13|inst1[14]~90, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_in[14]~feeder , inst13|inst14|data_in[14]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst14|data_in[14] , inst13|inst14|data_in[14], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[6]~feeder , inst13|inst14|data_in[6]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[6] , inst13|inst14|data_in[6], SCOMP_System, 1 -instance = comp, \inst13|inst1[14]~85 , inst13|inst1[14]~85, SCOMP_System, 1 -instance = comp, \inst13|inst14|data_in[14] , inst13|inst14|data_in[14], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector24~0 , inst13|inst14|Selector24~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[6] , inst13|inst14|tx_byte[6], SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[6]~feeder , inst13|inst|data_tx[6]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[6] , inst13|inst|data_tx[6], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[13]~feeder , inst13|inst14|data_in[13]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[13] , inst13|inst14|data_in[13], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[5]~feeder , inst13|inst14|data_in[5]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[5] , inst13|inst14|data_in[5], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector25~0 , inst13|inst14|Selector25~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[5] , inst13|inst14|tx_byte[5], SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[5] , inst13|inst|data_tx[5], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[12]~feeder , inst13|inst14|data_in[12]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[12] , inst13|inst14|data_in[12], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[4]~feeder , inst13|inst14|data_in[4]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[4] , inst13|inst14|data_in[4], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector26~0 , inst13|inst14|Selector26~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[4] , inst13|inst14|tx_byte[4], SCOMP_System, 1 -instance = comp, \inst13|inst|Mux4~2 , inst13|inst|Mux4~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux4~3 , inst13|inst|Mux4~3, SCOMP_System, 1 -instance = comp, \inst13|inst1[10]~68 , inst13|inst1[10]~68, SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[4] , inst13|inst|data_tx[4], SCOMP_System, 1 +instance = comp, \inst13|inst|Mux2~2 , inst13|inst|Mux2~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux2~3 , inst13|inst|Mux2~3, SCOMP_System, 1 +instance = comp, \inst13|inst1[10]~70 , inst13|inst1[10]~70, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[10]~feeder , inst13|inst14|data_in[10]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[10] , inst13|inst14|data_in[10], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[2]~feeder , inst13|inst14|data_in[2]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[2] , inst13|inst14|data_in[2], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector28~0 , inst13|inst14|Selector28~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[2] , inst13|inst14|tx_byte[2], SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[2] , inst13|inst|data_tx[2], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[3]~feeder , inst13|inst14|data_in[3]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[3] , inst13|inst14|data_in[3], SCOMP_System, 1 -instance = comp, \inst13|inst1[11]~73 , inst13|inst1[11]~73, SCOMP_System, 1 +instance = comp, \inst13|inst1[11]~75 , inst13|inst1[11]~75, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[11]~feeder , inst13|inst14|data_in[11]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[11] , inst13|inst14|data_in[11], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector27~0 , inst13|inst14|Selector27~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[3] , inst13|inst14|tx_byte[3], SCOMP_System, 1 -instance = comp, \inst13|inst14|data_in[9]~feeder , inst13|inst14|data_in[9]~feeder, SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[3] , inst13|inst|data_tx[3], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[9] , inst13|inst14|data_in[9], SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[1]~feeder , inst13|inst14|data_in[1]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[1] , inst13|inst14|data_in[1], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector29~0 , inst13|inst14|Selector29~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[1] , inst13|inst14|tx_byte[1], SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[1] , inst13|inst|data_tx[1], SCOMP_System, 1 +instance = comp, \inst13|inst14|data_in[8]~feeder , inst13|inst14|data_in[8]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[8] , inst13|inst14|data_in[8], SCOMP_System, 1 -instance = comp, \inst13|inst1[0]~19 , inst13|inst1[0]~19, SCOMP_System, 1 +instance = comp, \inst13|inst1[0]~25 , inst13|inst1[0]~25, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[0]~feeder , inst13|inst14|data_in[0]~feeder, SCOMP_System, 1 instance = comp, \inst13|inst14|data_in[0] , inst13|inst14|data_in[0], SCOMP_System, 1 instance = comp, \inst13|inst14|Selector30~0 , inst13|inst14|Selector30~0, SCOMP_System, 1 instance = comp, \inst13|inst14|tx_byte[0] , inst13|inst14|tx_byte[0], SCOMP_System, 1 -instance = comp, \inst13|inst|Mux4~0 , inst13|inst|Mux4~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux4~1 , inst13|inst|Mux4~1, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~7 , inst13|inst|Selector25~7, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux0~0 , inst13|inst|Mux0~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux0~1 , inst13|inst|Mux0~1, SCOMP_System, 1 +instance = comp, \inst13|inst|data_tx[0] , inst13|inst|data_tx[0], SCOMP_System, 1 +instance = comp, \inst13|inst|Mux2~0 , inst13|inst|Mux2~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux2~1 , inst13|inst|Mux2~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector23~0 , inst13|inst|Selector23~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~11 , inst13|inst|Selector25~11, SCOMP_System, 1 instance = comp, \inst13|inst|Mux0~2 , inst13|inst|Mux0~2, SCOMP_System, 1 instance = comp, \inst13|inst|Mux0~3 , inst13|inst|Mux0~3, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux0~0 , inst13|inst|Mux0~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux0~1 , inst13|inst|Mux0~1, SCOMP_System, 1 instance = comp, \inst13|inst|Selector25~13 , inst13|inst|Selector25~13, SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[5] , inst13|inst|data_tx[5], SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[4] , inst13|inst|data_tx[4], SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[7] , inst13|inst|data_tx[7], SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[6] , inst13|inst|data_tx[6], SCOMP_System, 1 -instance = comp, \inst13|inst|Mux3~2 , inst13|inst|Mux3~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux3~3 , inst13|inst|Mux3~3, SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[0] , inst13|inst|data_tx[0], SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[2] , inst13|inst|data_tx[2], SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[3] , inst13|inst|data_tx[3], SCOMP_System, 1 instance = comp, \inst13|inst|Mux3~0 , inst13|inst|Mux3~0, SCOMP_System, 1 -instance = comp, \inst13|inst|data_tx[1] , inst13|inst|data_tx[1], SCOMP_System, 1 instance = comp, \inst13|inst|Mux3~1 , inst13|inst|Mux3~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux3~2 , inst13|inst|Mux3~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux3~3 , inst13|inst|Mux3~3, SCOMP_System, 1 instance = comp, \inst13|inst|Selector25~8 , inst13|inst|Selector25~8, SCOMP_System, 1 instance = comp, \inst13|inst|Mux1~0 , inst13|inst|Mux1~0, SCOMP_System, 1 instance = comp, \inst13|inst|Mux1~1 , inst13|inst|Mux1~1, SCOMP_System, 1 @@ -1432,94 +1449,103 @@ instance = comp, \inst13|inst|Mux1~2 , inst13|inst|Mux1~2, SCOMP_System, 1 instance = comp, \inst13|inst|Mux1~3 , inst13|inst|Mux1~3, SCOMP_System, 1 instance = comp, \inst13|inst|Selector25~9 , inst13|inst|Selector25~9, SCOMP_System, 1 instance = comp, \inst13|inst|Selector25~10 , inst13|inst|Selector25~10, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux2~0 , inst13|inst|Mux2~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux2~1 , inst13|inst|Mux2~1, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux2~2 , inst13|inst|Mux2~2, SCOMP_System, 1 -instance = comp, \inst13|inst|Mux2~3 , inst13|inst|Mux2~3, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector23~0 , inst13|inst|Selector23~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector25~11 , inst13|inst|Selector25~11, SCOMP_System, 1 instance = comp, \inst13|inst|Selector25~14 , inst13|inst|Selector25~14, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux4~2 , inst13|inst|Mux4~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux4~3 , inst13|inst|Mux4~3, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux4~0 , inst13|inst|Mux4~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Mux4~1 , inst13|inst|Mux4~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~7 , inst13|inst|Selector25~7, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~0 , inst13|inst|Selector25~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~1 , inst13|inst|Selector25~1, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~2 , inst13|inst|Selector25~2, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~3 , inst13|inst|Selector25~3, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~4 , inst13|inst|Selector25~4, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector25~5 , inst13|inst|Selector25~5, SCOMP_System, 1 instance = comp, \inst13|inst|Selector25~12 , inst13|inst|Selector25~12, SCOMP_System, 1 instance = comp, \inst13|inst|sda_int , inst13|inst|sda_int, SCOMP_System, 1 instance = comp, \inst13|inst|Selector30~0 , inst13|inst|Selector30~0, SCOMP_System, 1 +instance = comp, \inst13|inst|Selector17~0 , inst13|inst|Selector17~0, SCOMP_System, 1 +instance = comp, \inst13|inst|scl_req~0 , inst13|inst|scl_req~0, SCOMP_System, 1 instance = comp, \inst13|inst|Selector17~1 , inst13|inst|Selector17~1, SCOMP_System, 1 instance = comp, \inst13|inst|Selector17~2 , inst13|inst|Selector17~2, SCOMP_System, 1 instance = comp, \inst13|inst|Selector17~3 , inst13|inst|Selector17~3, SCOMP_System, 1 -instance = comp, \inst13|inst|scl_req~0 , inst13|inst|scl_req~0, SCOMP_System, 1 -instance = comp, \inst13|inst|Selector17~0 , inst13|inst|Selector17~0, SCOMP_System, 1 instance = comp, \inst13|inst|Selector17~4 , inst13|inst|Selector17~4, SCOMP_System, 1 instance = comp, \inst13|inst|scl_req , inst13|inst|scl_req, SCOMP_System, 1 instance = comp, \inst13|inst|scl_ena , inst13|inst|scl_ena, SCOMP_System, 1 instance = comp, \inst13|inst|scl_clk~1 , inst13|inst|scl_clk~1, SCOMP_System, 1 instance = comp, \inst13|inst|scl_clk~en , inst13|inst|scl_clk~en, SCOMP_System, 1 instance = comp, \inst13|inst|scl~1 , inst13|inst|scl~1, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[0]~9 , inst5|count_10kHz[0]~9, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[4]~17 , inst5|count_10kHz[4]~17, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[5]~19 , inst5|count_10kHz[5]~19, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[5] , inst5|count_10kHz[5], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[6]~21 , inst5|count_10kHz[6]~21, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[6] , inst5|count_10kHz[6], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[7]~23 , inst5|count_10kHz[7]~23, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[7] , inst5|count_10kHz[7], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[8]~25 , inst5|count_10kHz[8]~25, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[8] , inst5|count_10kHz[8], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[0]~8 , inst5|count_25kHz[0]~8, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[0] , inst5|count_25kHz[0], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[1]~10 , inst5|count_25kHz[1]~10, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[1] , inst5|count_25kHz[1], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[2]~12 , inst5|count_25kHz[2]~12, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[2] , inst5|count_25kHz[2], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[3]~14 , inst5|count_25kHz[3]~14, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[3] , inst5|count_25kHz[3], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[4]~16 , inst5|count_25kHz[4]~16, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[4] , inst5|count_25kHz[4], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[5]~18 , inst5|count_25kHz[5]~18, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[5] , inst5|count_25kHz[5], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[6]~20 , inst5|count_25kHz[6]~20, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[6] , inst5|count_25kHz[6], SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[7]~22 , inst5|count_25kHz[7]~22, SCOMP_System, 1 +instance = comp, \inst5|count_25kHz[7] , inst5|count_25kHz[7], SCOMP_System, 1 +instance = comp, \inst5|LessThan1~1 , inst5|LessThan1~1, SCOMP_System, 1 instance = comp, \inst5|LessThan1~0 , inst5|LessThan1~0, SCOMP_System, 1 instance = comp, \inst5|LessThan1~2 , inst5|LessThan1~2, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[0] , inst5|count_10kHz[0], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[1]~11 , inst5|count_10kHz[1]~11, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[1] , inst5|count_10kHz[1], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[2]~13 , inst5|count_10kHz[2]~13, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[2] , inst5|count_10kHz[2], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[3]~15 , inst5|count_10kHz[3]~15, SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[3] , inst5|count_10kHz[3], SCOMP_System, 1 -instance = comp, \inst5|count_10kHz[4] , inst5|count_10kHz[4], SCOMP_System, 1 -instance = comp, \inst5|LessThan1~1 , inst5|LessThan1~1, SCOMP_System, 1 -instance = comp, \inst5|clock_10kHz_int~0 , inst5|clock_10kHz_int~0, SCOMP_System, 1 -instance = comp, \inst5|clock_10kHz_int , inst5|clock_10kHz_int, SCOMP_System, 1 -instance = comp, \inst5|clock_10kHz~feeder , inst5|clock_10kHz~feeder, SCOMP_System, 1 -instance = comp, \inst5|clock_10kHz , inst5|clock_10kHz, SCOMP_System, 1 -instance = comp, \inst5|clock_10kHz~clkctrl , inst5|clock_10kHz~clkctrl, SCOMP_System, 1 -instance = comp, \inst14|COUNT[0]~12 , inst14|COUNT[0]~12, SCOMP_System, 1 +instance = comp, \inst5|clock_25kHz_int~0 , inst5|clock_25kHz_int~0, SCOMP_System, 1 +instance = comp, \inst5|clock_25kHz_int , inst5|clock_25kHz_int, SCOMP_System, 1 +instance = comp, \inst5|clock_25kHz~feeder , inst5|clock_25kHz~feeder, SCOMP_System, 1 +instance = comp, \inst5|clock_25kHz , inst5|clock_25kHz, SCOMP_System, 1 +instance = comp, \inst5|clock_25kHz~clkctrl , inst5|clock_25kHz~clkctrl, SCOMP_System, 1 +instance = comp, \inst14|COUNT[0]~18 , inst14|COUNT[0]~18, SCOMP_System, 1 instance = comp, \inst14|COUNT[0] , inst14|COUNT[0], SCOMP_System, 1 -instance = comp, \inst14|COUNT[1]~4 , inst14|COUNT[1]~4, SCOMP_System, 1 +instance = comp, \inst14|COUNT[1]~6 , inst14|COUNT[1]~6, SCOMP_System, 1 instance = comp, \inst14|COUNT[1] , inst14|COUNT[1], SCOMP_System, 1 -instance = comp, \inst14|COUNT[2]~6 , inst14|COUNT[2]~6, SCOMP_System, 1 +instance = comp, \inst14|COUNT[2]~8 , inst14|COUNT[2]~8, SCOMP_System, 1 instance = comp, \inst14|COUNT[2] , inst14|COUNT[2], SCOMP_System, 1 -instance = comp, \inst14|COUNT[3]~8 , inst14|COUNT[3]~8, SCOMP_System, 1 +instance = comp, \inst14|COUNT[3]~10 , inst14|COUNT[3]~10, SCOMP_System, 1 instance = comp, \inst14|COUNT[3] , inst14|COUNT[3], SCOMP_System, 1 -instance = comp, \inst14|COUNT[4]~10 , inst14|COUNT[4]~10, SCOMP_System, 1 +instance = comp, \inst14|Equal1~0 , inst14|Equal1~0, SCOMP_System, 1 +instance = comp, \inst14|COUNT[4]~12 , inst14|COUNT[4]~12, SCOMP_System, 1 instance = comp, \inst14|COUNT[4] , inst14|COUNT[4], SCOMP_System, 1 -instance = comp, \inst14|PWM_OUT~0 , inst14|PWM_OUT~0, SCOMP_System, 1 +instance = comp, \inst14|COUNT[5]~14 , inst14|COUNT[5]~14, SCOMP_System, 1 +instance = comp, \inst14|COUNT[5] , inst14|COUNT[5], SCOMP_System, 1 +instance = comp, \inst14|COUNT[6]~16 , inst14|COUNT[6]~16, SCOMP_System, 1 +instance = comp, \inst14|COUNT[6] , inst14|COUNT[6], SCOMP_System, 1 +instance = comp, \inst14|Equal1~1 , inst14|Equal1~1, SCOMP_System, 1 instance = comp, \inst3|PWM_EN~1 , inst3|PWM_EN~1, SCOMP_System, 1 instance = comp, \inst3|PWM_EN~2 , inst3|PWM_EN~2, SCOMP_System, 1 instance = comp, \inst3|PWM_EN , inst3|PWM_EN, SCOMP_System, 1 instance = comp, \inst3|PWM_EN~clkctrl , inst3|PWM_EN~clkctrl, SCOMP_System, 1 -instance = comp, \inst14|COMPARE[3]~feeder , inst14|COMPARE[3]~feeder, SCOMP_System, 1 +instance = comp, \inst14|COMPARE[6] , inst14|COMPARE[6], SCOMP_System, 1 +instance = comp, \inst14|Equal0~0 , inst14|Equal0~0, SCOMP_System, 1 instance = comp, \inst14|COMPARE[3] , inst14|COMPARE[3], SCOMP_System, 1 -instance = comp, \inst14|PWM_OUT~1 , inst14|PWM_OUT~1, SCOMP_System, 1 -instance = comp, \inst14|COMPARE[1]~feeder , inst14|COMPARE[1]~feeder, SCOMP_System, 1 -instance = comp, \inst14|COMPARE[1] , inst14|COMPARE[1], SCOMP_System, 1 -instance = comp, \inst14|COMPARE[0]~feeder , inst14|COMPARE[0]~feeder, SCOMP_System, 1 -instance = comp, \inst14|COMPARE[0] , inst14|COMPARE[0], SCOMP_System, 1 -instance = comp, \inst14|PWM_OUT~3 , inst14|PWM_OUT~3, SCOMP_System, 1 instance = comp, \inst14|COMPARE[2]~feeder , inst14|COMPARE[2]~feeder, SCOMP_System, 1 instance = comp, \inst14|COMPARE[2] , inst14|COMPARE[2], SCOMP_System, 1 +instance = comp, \inst14|PWM_OUT~1 , inst14|PWM_OUT~1, SCOMP_System, 1 +instance = comp, \inst14|COMPARE[0] , inst14|COMPARE[0], SCOMP_System, 1 +instance = comp, \inst14|COMPARE[1] , inst14|COMPARE[1], SCOMP_System, 1 +instance = comp, \inst14|PWM_OUT~0 , inst14|PWM_OUT~0, SCOMP_System, 1 +instance = comp, \inst14|COMPARE[5] , inst14|COMPARE[5], SCOMP_System, 1 instance = comp, \inst14|COMPARE[4]~feeder , inst14|COMPARE[4]~feeder, SCOMP_System, 1 instance = comp, \inst14|COMPARE[4] , inst14|COMPARE[4], SCOMP_System, 1 instance = comp, \inst14|PWM_OUT~2 , inst14|PWM_OUT~2, SCOMP_System, 1 +instance = comp, \inst14|PWM_OUT~3 , inst14|PWM_OUT~3, SCOMP_System, 1 instance = comp, \inst14|PWM_OUT~4 , inst14|PWM_OUT~4, SCOMP_System, 1 instance = comp, \inst14|PWM_OUT , inst14|PWM_OUT, SCOMP_System, 1 instance = comp, \inst3|HEX0_EN~0 , inst3|HEX0_EN~0, SCOMP_System, 1 instance = comp, \inst3|HEX0_EN , inst3|HEX0_EN, SCOMP_System, 1 instance = comp, \inst3|HEX0_EN~clkctrl , inst3|HEX0_EN~clkctrl, SCOMP_System, 1 -instance = comp, \inst9|inst1|latched_hex[0]~feeder , inst9|inst1|latched_hex[0]~feeder, SCOMP_System, 1 -instance = comp, \inst9|inst1|latched_hex[0] , inst9|inst1|latched_hex[0], SCOMP_System, 1 -instance = comp, \inst9|inst1|latched_hex[2]~feeder , inst9|inst1|latched_hex[2]~feeder, SCOMP_System, 1 -instance = comp, \inst9|inst1|latched_hex[2] , inst9|inst1|latched_hex[2], SCOMP_System, 1 instance = comp, \inst9|inst1|latched_hex[1]~feeder , inst9|inst1|latched_hex[1]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst1|latched_hex[1] , inst9|inst1|latched_hex[1], SCOMP_System, 1 +instance = comp, \inst9|inst1|latched_hex[2]~feeder , inst9|inst1|latched_hex[2]~feeder, SCOMP_System, 1 +instance = comp, \inst9|inst1|latched_hex[2] , inst9|inst1|latched_hex[2], SCOMP_System, 1 instance = comp, \inst9|inst1|latched_hex[3]~feeder , inst9|inst1|latched_hex[3]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst1|latched_hex[3] , inst9|inst1|latched_hex[3], SCOMP_System, 1 +instance = comp, \inst9|inst1|latched_hex[0]~feeder , inst9|inst1|latched_hex[0]~feeder, SCOMP_System, 1 +instance = comp, \inst9|inst1|latched_hex[0] , inst9|inst1|latched_hex[0], SCOMP_System, 1 instance = comp, \inst9|inst1|Mux0~0 , inst9|inst1|Mux0~0, SCOMP_System, 1 instance = comp, \inst9|inst1|Mux1~0 , inst9|inst1|Mux1~0, SCOMP_System, 1 instance = comp, \inst9|inst1|Mux2~0 , inst9|inst1|Mux2~0, SCOMP_System, 1 @@ -1529,11 +1555,9 @@ instance = comp, \inst9|inst1|Mux5~0 , inst9|inst1|Mux5~0, SCOMP_System, 1 instance = comp, \inst9|inst1|Mux6~0 , inst9|inst1|Mux6~0, SCOMP_System, 1 instance = comp, \inst9|inst2|latched_hex[3]~feeder , inst9|inst2|latched_hex[3]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst2|latched_hex[3] , inst9|inst2|latched_hex[3], SCOMP_System, 1 +instance = comp, \inst9|inst2|latched_hex[1] , inst9|inst2|latched_hex[1], SCOMP_System, 1 instance = comp, \inst9|inst2|latched_hex[2]~feeder , inst9|inst2|latched_hex[2]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst2|latched_hex[2] , inst9|inst2|latched_hex[2], SCOMP_System, 1 -instance = comp, \inst9|inst2|latched_hex[1]~feeder , inst9|inst2|latched_hex[1]~feeder, SCOMP_System, 1 -instance = comp, \inst9|inst2|latched_hex[1] , inst9|inst2|latched_hex[1], SCOMP_System, 1 -instance = comp, \inst9|inst2|latched_hex[0]~feeder , inst9|inst2|latched_hex[0]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst2|latched_hex[0] , inst9|inst2|latched_hex[0], SCOMP_System, 1 instance = comp, \inst9|inst2|Mux0~0 , inst9|inst2|Mux0~0, SCOMP_System, 1 instance = comp, \inst9|inst2|Mux1~0 , inst9|inst2|Mux1~0, SCOMP_System, 1 @@ -1542,10 +1566,10 @@ instance = comp, \inst9|inst2|Mux3~0 , inst9|inst2|Mux3~0, SCOMP_System, 1 instance = comp, \inst9|inst2|Mux4~0 , inst9|inst2|Mux4~0, SCOMP_System, 1 instance = comp, \inst9|inst2|Mux5~0 , inst9|inst2|Mux5~0, SCOMP_System, 1 instance = comp, \inst9|inst2|Mux6~0 , inst9|inst2|Mux6~0, SCOMP_System, 1 -instance = comp, \inst9|inst3|latched_hex[3] , inst9|inst3|latched_hex[3], SCOMP_System, 1 instance = comp, \inst9|inst3|latched_hex[2] , inst9|inst3|latched_hex[2], SCOMP_System, 1 -instance = comp, \inst9|inst3|latched_hex[1] , inst9|inst3|latched_hex[1], SCOMP_System, 1 instance = comp, \inst9|inst3|latched_hex[0] , inst9|inst3|latched_hex[0], SCOMP_System, 1 +instance = comp, \inst9|inst3|latched_hex[1] , inst9|inst3|latched_hex[1], SCOMP_System, 1 +instance = comp, \inst9|inst3|latched_hex[3] , inst9|inst3|latched_hex[3], SCOMP_System, 1 instance = comp, \inst9|inst3|Mux0~0 , inst9|inst3|Mux0~0, SCOMP_System, 1 instance = comp, \inst9|inst3|Mux1~0 , inst9|inst3|Mux1~0, SCOMP_System, 1 instance = comp, \inst9|inst3|Mux2~0 , inst9|inst3|Mux2~0, SCOMP_System, 1 @@ -1555,12 +1579,10 @@ instance = comp, \inst9|inst3|Mux5~0 , inst9|inst3|Mux5~0, SCOMP_System, 1 instance = comp, \inst9|inst3|Mux6~0 , inst9|inst3|Mux6~0, SCOMP_System, 1 instance = comp, \inst9|inst4|latched_hex[2]~feeder , inst9|inst4|latched_hex[2]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst4|latched_hex[2] , inst9|inst4|latched_hex[2], SCOMP_System, 1 +instance = comp, \inst9|inst4|latched_hex[0] , inst9|inst4|latched_hex[0], SCOMP_System, 1 +instance = comp, \inst9|inst4|latched_hex[3] , inst9|inst4|latched_hex[3], SCOMP_System, 1 instance = comp, \inst9|inst4|latched_hex[1]~feeder , inst9|inst4|latched_hex[1]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst4|latched_hex[1] , inst9|inst4|latched_hex[1], SCOMP_System, 1 -instance = comp, \inst9|inst4|latched_hex[3]~feeder , inst9|inst4|latched_hex[3]~feeder, SCOMP_System, 1 -instance = comp, \inst9|inst4|latched_hex[3] , inst9|inst4|latched_hex[3], SCOMP_System, 1 -instance = comp, \inst9|inst4|latched_hex[0]~feeder , inst9|inst4|latched_hex[0]~feeder, SCOMP_System, 1 -instance = comp, \inst9|inst4|latched_hex[0] , inst9|inst4|latched_hex[0], SCOMP_System, 1 instance = comp, \inst9|inst4|Mux0~0 , inst9|inst4|Mux0~0, SCOMP_System, 1 instance = comp, \inst9|inst4|Mux1~0 , inst9|inst4|Mux1~0, SCOMP_System, 1 instance = comp, \inst9|inst4|Mux2~0 , inst9|inst4|Mux2~0, SCOMP_System, 1 @@ -1570,9 +1592,13 @@ instance = comp, \inst9|inst4|Mux5~0 , inst9|inst4|Mux5~0, SCOMP_System, 1 instance = comp, \inst9|inst4|Mux6~0 , inst9|inst4|Mux6~0, SCOMP_System, 1 instance = comp, \inst3|HEX1_EN , inst3|HEX1_EN, SCOMP_System, 1 instance = comp, \inst3|HEX1_EN~clkctrl , inst3|HEX1_EN~clkctrl, SCOMP_System, 1 +instance = comp, \inst9|inst5|latched_hex[0]~feeder , inst9|inst5|latched_hex[0]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst5|latched_hex[0] , inst9|inst5|latched_hex[0], SCOMP_System, 1 -instance = comp, \inst9|inst5|latched_hex[1] , inst9|inst5|latched_hex[1], SCOMP_System, 1 +instance = comp, \inst9|inst5|latched_hex[3]~feeder , inst9|inst5|latched_hex[3]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst5|latched_hex[3] , inst9|inst5|latched_hex[3], SCOMP_System, 1 +instance = comp, \inst9|inst5|latched_hex[1]~feeder , inst9|inst5|latched_hex[1]~feeder, SCOMP_System, 1 +instance = comp, \inst9|inst5|latched_hex[1] , inst9|inst5|latched_hex[1], SCOMP_System, 1 +instance = comp, \inst9|inst5|latched_hex[2]~feeder , inst9|inst5|latched_hex[2]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst5|latched_hex[2] , inst9|inst5|latched_hex[2], SCOMP_System, 1 instance = comp, \inst9|inst5|Mux0~0 , inst9|inst5|Mux0~0, SCOMP_System, 1 instance = comp, \inst9|inst5|Mux1~0 , inst9|inst5|Mux1~0, SCOMP_System, 1 @@ -1581,11 +1607,13 @@ instance = comp, \inst9|inst5|Mux3~0 , inst9|inst5|Mux3~0, SCOMP_System, 1 instance = comp, \inst9|inst5|Mux4~0 , inst9|inst5|Mux4~0, SCOMP_System, 1 instance = comp, \inst9|inst5|Mux5~0 , inst9|inst5|Mux5~0, SCOMP_System, 1 instance = comp, \inst9|inst5|Mux6~0 , inst9|inst5|Mux6~0, SCOMP_System, 1 -instance = comp, \inst9|inst6|latched_hex[3] , inst9|inst6|latched_hex[3], SCOMP_System, 1 -instance = comp, \inst9|inst6|latched_hex[0] , inst9|inst6|latched_hex[0], SCOMP_System, 1 instance = comp, \inst9|inst6|latched_hex[1]~feeder , inst9|inst6|latched_hex[1]~feeder, SCOMP_System, 1 instance = comp, \inst9|inst6|latched_hex[1] , inst9|inst6|latched_hex[1], SCOMP_System, 1 instance = comp, \inst9|inst6|latched_hex[2] , inst9|inst6|latched_hex[2], SCOMP_System, 1 +instance = comp, \inst9|inst6|latched_hex[3]~feeder , inst9|inst6|latched_hex[3]~feeder, SCOMP_System, 1 +instance = comp, \inst9|inst6|latched_hex[3] , inst9|inst6|latched_hex[3], SCOMP_System, 1 +instance = comp, \inst9|inst6|latched_hex[0]~feeder , inst9|inst6|latched_hex[0]~feeder, SCOMP_System, 1 +instance = comp, \inst9|inst6|latched_hex[0] , inst9|inst6|latched_hex[0], SCOMP_System, 1 instance = comp, \inst9|inst6|Mux0~0 , inst9|inst6|Mux0~0, SCOMP_System, 1 instance = comp, \inst9|inst6|Mux1~0 , inst9|inst6|Mux1~0, SCOMP_System, 1 instance = comp, \inst9|inst6|Mux2~0 , inst9|inst6|Mux2~0, SCOMP_System, 1 @@ -1601,14 +1629,14 @@ instance = comp, \inst6|DATA[8]~feeder , inst6|DATA[8]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[8] , inst6|DATA[8], SCOMP_System, 1 instance = comp, \inst6|DATA[7]~feeder , inst6|DATA[7]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[7] , inst6|DATA[7], SCOMP_System, 1 -instance = comp, \inst6|DATA[6]~feeder , inst6|DATA[6]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[6] , inst6|DATA[6], SCOMP_System, 1 +instance = comp, \inst6|DATA[5]~feeder , inst6|DATA[5]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[5] , inst6|DATA[5], SCOMP_System, 1 instance = comp, \inst6|DATA[4]~feeder , inst6|DATA[4]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[4] , inst6|DATA[4], SCOMP_System, 1 -instance = comp, \inst6|DATA[3]~feeder , inst6|DATA[3]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[3] , inst6|DATA[3], SCOMP_System, 1 instance = comp, \inst6|DATA[2] , inst6|DATA[2], SCOMP_System, 1 +instance = comp, \inst6|DATA[1]~feeder , inst6|DATA[1]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[1] , inst6|DATA[1], SCOMP_System, 1 instance = comp, \inst6|DATA[0]~feeder , inst6|DATA[0]~feeder, SCOMP_System, 1 instance = comp, \inst6|DATA[0] , inst6|DATA[0], SCOMP_System, 1